1# SPDX-License-Identifier: GPL-2.0-only 2# 3# Memory devices 4# 5 6menuconfig MEMORY 7 bool "Memory Controller drivers" 8 9if MEMORY 10 11config ARM_PL172_MPMC 12 tristate "ARM PL172 MPMC driver" 13 depends on ARM_AMBA && OF 14 help 15 This selects the ARM PrimeCell PL172 MultiPort Memory Controller. 16 If you have an embedded system with an AMBA bus and a PL172 17 controller, say Y or M here. 18 19config ATMEL_SDRAMC 20 bool "Atmel (Multi-port DDR-)SDRAM Controller" 21 default y 22 depends on ARCH_AT91 && OF 23 help 24 This driver is for Atmel SDRAM Controller or Atmel Multi-port 25 DDR-SDRAM Controller available on Atmel AT91SAM9 and SAMA5 SoCs. 26 Starting with the at91sam9g45, this controller supports SDR, DDR and 27 LP-DDR memories. 28 29config ATMEL_EBI 30 bool "Atmel EBI driver" 31 default y 32 depends on ARCH_AT91 && OF 33 select MFD_SYSCON 34 select MFD_ATMEL_SMC 35 help 36 Driver for Atmel EBI controller. 37 Used to configure the EBI (external bus interface) when the device- 38 tree is used. This bus supports NANDs, external ethernet controller, 39 SRAMs, ATA devices, etc. 40 41config TI_AEMIF 42 tristate "Texas Instruments AEMIF driver" 43 depends on (ARCH_DAVINCI || ARCH_KEYSTONE) && OF 44 help 45 This driver is for the AEMIF module available in Texas Instruments 46 SoCs. AEMIF stands for Asynchronous External Memory Interface and 47 is intended to provide a glue-less interface to a variety of 48 asynchronuous memory devices like ASRAM, NOR and NAND memory. A total 49 of 256M bytes of any of these memories can be accessed at a given 50 time via four chip selects with 64M byte access per chip select. 51 52config TI_EMIF 53 tristate "Texas Instruments EMIF driver" 54 depends on ARCH_OMAP2PLUS 55 select DDR 56 help 57 This driver is for the EMIF module available in Texas Instruments 58 SoCs. EMIF is an SDRAM controller that, based on its revision, 59 supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols. 60 This driver takes care of only LPDDR2 memories presently. The 61 functions of the driver includes re-configuring AC timing 62 parameters and other settings during frequency, voltage and 63 temperature changes 64 65config OMAP_GPMC 66 bool 67 select GPIOLIB 68 help 69 This driver is for the General Purpose Memory Controller (GPMC) 70 present on Texas Instruments SoCs (e.g. OMAP2+). GPMC allows 71 interfacing to a variety of asynchronous as well as synchronous 72 memory drives like NOR, NAND, OneNAND, SRAM. 73 74config OMAP_GPMC_DEBUG 75 bool "Enable GPMC debug output and skip reset of GPMC during init" 76 depends on OMAP_GPMC 77 help 78 Enables verbose debugging mostly to decode the bootloader provided 79 timings. To preserve the bootloader provided timings, the reset 80 of GPMC is skipped during init. Enable this during development to 81 configure devices connected to the GPMC bus. 82 83 NOTE: In addition to matching the register setup with the bootloader 84 you also need to match the GPMC FCLK frequency used by the 85 bootloader or else the GPMC timings won't be identical with the 86 bootloader timings. 87 88config TI_EMIF_SRAM 89 tristate "Texas Instruments EMIF SRAM driver" 90 depends on (SOC_AM33XX || SOC_AM43XX) && SRAM 91 help 92 This driver is for the EMIF module available on Texas Instruments 93 AM33XX and AM43XX SoCs and is required for PM. Certain parts of 94 the EMIF PM code must run from on-chip SRAM late in the suspend 95 sequence so this driver provides several relocatable PM functions 96 for the SoC PM code to use. 97 98config MVEBU_DEVBUS 99 bool "Marvell EBU Device Bus Controller" 100 default y 101 depends on PLAT_ORION && OF 102 help 103 This driver is for the Device Bus controller available in some 104 Marvell EBU SoCs such as Discovery (mv78xx0), Orion (88f5xxx) and 105 Armada 370 and Armada XP. This controller allows to handle flash 106 devices such as NOR, NAND, SRAM, and FPGA. 107 108config FSL_CORENET_CF 109 tristate "Freescale CoreNet Error Reporting" 110 depends on FSL_SOC_BOOKE 111 help 112 Say Y for reporting of errors from the Freescale CoreNet 113 Coherency Fabric. Errors reported include accesses to 114 physical addresses that mapped by no local access window 115 (LAW) or an invalid LAW, as well as bad cache state that 116 represents a coherency violation. 117 118config FSL_IFC 119 bool 120 depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A || COMPILE_TEST 121 depends on HAS_IOMEM 122 123config JZ4780_NEMC 124 bool "Ingenic JZ4780 SoC NEMC driver" 125 default y 126 depends on MIPS || COMPILE_TEST 127 depends on HAS_IOMEM && OF 128 help 129 This driver is for the NAND/External Memory Controller (NEMC) in 130 the Ingenic JZ4780. This controller is used to handle external 131 memory devices such as NAND and SRAM. 132 133config MTK_SMI 134 bool 135 depends on ARCH_MEDIATEK || COMPILE_TEST 136 help 137 This driver is for the Memory Controller module in MediaTek SoCs, 138 mainly help enable/disable iommu and control the power domain and 139 clocks for each local arbiter. 140 141config DA8XX_DDRCTL 142 bool "Texas Instruments da8xx DDR2/mDDR driver" 143 depends on ARCH_DAVINCI_DA8XX 144 help 145 This driver is for the DDR2/mDDR Memory Controller present on 146 Texas Instruments da8xx SoCs. It's used to tweak various memory 147 controller configuration options. 148 149config PL353_SMC 150 tristate "ARM PL35X Static Memory Controller(SMC) driver" 151 default y 152 depends on ARM 153 depends on ARM_AMBA 154 help 155 This driver is for the ARM PL351/PL353 Static Memory 156 Controller(SMC) module. 157 158source "drivers/memory/samsung/Kconfig" 159source "drivers/memory/tegra/Kconfig" 160 161endif 162