10c0d06caSMauro Carvalho Chehab /* 20c0d06caSMauro Carvalho Chehab * STK1160 driver 30c0d06caSMauro Carvalho Chehab * 40c0d06caSMauro Carvalho Chehab * Copyright (C) 2012 Ezequiel Garcia 50c0d06caSMauro Carvalho Chehab * <elezegarcia--a.t--gmail.com> 60c0d06caSMauro Carvalho Chehab * 7e36e6b5fSMarcel Hasler * Copyright (C) 2016 Marcel Hasler 8e36e6b5fSMarcel Hasler * <mahasler--a.t--gmail.com> 9e36e6b5fSMarcel Hasler * 100c0d06caSMauro Carvalho Chehab * Based on Easycap driver by R.M. Thomas 110c0d06caSMauro Carvalho Chehab * Copyright (C) 2010 R.M. Thomas 120c0d06caSMauro Carvalho Chehab * <rmthomas--a.t--sciolus.org> 130c0d06caSMauro Carvalho Chehab * 140c0d06caSMauro Carvalho Chehab * This program is free software; you can redistribute it and/or modify 150c0d06caSMauro Carvalho Chehab * it under the terms of the GNU General Public License as published by 160c0d06caSMauro Carvalho Chehab * the Free Software Foundation; either version 2 of the License, or 170c0d06caSMauro Carvalho Chehab * (at your option) any later version. 180c0d06caSMauro Carvalho Chehab * 190c0d06caSMauro Carvalho Chehab * This program is distributed in the hope that it will be useful, 200c0d06caSMauro Carvalho Chehab * but WITHOUT ANY WARRANTY; without even the implied warranty of 210c0d06caSMauro Carvalho Chehab * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 220c0d06caSMauro Carvalho Chehab * GNU General Public License for more details. 230c0d06caSMauro Carvalho Chehab * 240c0d06caSMauro Carvalho Chehab */ 250c0d06caSMauro Carvalho Chehab 269a4825edSMarcel Hasler #include <linux/delay.h> 279a4825edSMarcel Hasler 280c0d06caSMauro Carvalho Chehab #include "stk1160.h" 290c0d06caSMauro Carvalho Chehab #include "stk1160-reg.h" 300c0d06caSMauro Carvalho Chehab 319a4825edSMarcel Hasler static int stk1160_ac97_wait_transfer_complete(struct stk1160 *dev) 329a4825edSMarcel Hasler { 339a4825edSMarcel Hasler unsigned long timeout = jiffies + msecs_to_jiffies(STK1160_AC97_TIMEOUT); 349a4825edSMarcel Hasler u8 value; 359a4825edSMarcel Hasler 369a4825edSMarcel Hasler /* Wait for AC97 transfer to complete */ 379a4825edSMarcel Hasler while (time_is_after_jiffies(timeout)) { 389a4825edSMarcel Hasler stk1160_read_reg(dev, STK1160_AC97CTL_0, &value); 399a4825edSMarcel Hasler 409a4825edSMarcel Hasler if (!(value & (STK1160_AC97CTL_0_CR | STK1160_AC97CTL_0_CW))) 419a4825edSMarcel Hasler return 0; 429a4825edSMarcel Hasler 439a4825edSMarcel Hasler usleep_range(50, 100); 449a4825edSMarcel Hasler } 459a4825edSMarcel Hasler 469a4825edSMarcel Hasler stk1160_err("AC97 transfer took too long, this should never happen!"); 479a4825edSMarcel Hasler return -EBUSY; 489a4825edSMarcel Hasler } 499a4825edSMarcel Hasler 50e36e6b5fSMarcel Hasler static void stk1160_write_ac97(struct stk1160 *dev, u16 reg, u16 value) 510c0d06caSMauro Carvalho Chehab { 520c0d06caSMauro Carvalho Chehab /* Set codec register address */ 530c0d06caSMauro Carvalho Chehab stk1160_write_reg(dev, STK1160_AC97_ADDR, reg); 540c0d06caSMauro Carvalho Chehab 550c0d06caSMauro Carvalho Chehab /* Set codec command */ 560c0d06caSMauro Carvalho Chehab stk1160_write_reg(dev, STK1160_AC97_CMD, value & 0xff); 570c0d06caSMauro Carvalho Chehab stk1160_write_reg(dev, STK1160_AC97_CMD + 1, (value & 0xff00) >> 8); 580c0d06caSMauro Carvalho Chehab 599a4825edSMarcel Hasler /* Set command write bit to initiate write operation */ 600c0d06caSMauro Carvalho Chehab stk1160_write_reg(dev, STK1160_AC97CTL_0, 0x8c); 619a4825edSMarcel Hasler 629a4825edSMarcel Hasler /* Wait for command write bit to be cleared */ 639a4825edSMarcel Hasler stk1160_ac97_wait_transfer_complete(dev); 640c0d06caSMauro Carvalho Chehab } 650c0d06caSMauro Carvalho Chehab 66e36e6b5fSMarcel Hasler #ifdef DEBUG 67e36e6b5fSMarcel Hasler static u16 stk1160_read_ac97(struct stk1160 *dev, u16 reg) 680c0d06caSMauro Carvalho Chehab { 690c0d06caSMauro Carvalho Chehab u8 vall = 0; 700c0d06caSMauro Carvalho Chehab u8 valh = 0; 710c0d06caSMauro Carvalho Chehab 720c0d06caSMauro Carvalho Chehab /* Set codec register address */ 730c0d06caSMauro Carvalho Chehab stk1160_write_reg(dev, STK1160_AC97_ADDR, reg); 740c0d06caSMauro Carvalho Chehab 759a4825edSMarcel Hasler /* Set command read bit to initiate read operation */ 760c0d06caSMauro Carvalho Chehab stk1160_write_reg(dev, STK1160_AC97CTL_0, 0x8b); 770c0d06caSMauro Carvalho Chehab 789a4825edSMarcel Hasler /* Wait for command read bit to be cleared */ 799a4825edSMarcel Hasler if (stk1160_ac97_wait_transfer_complete(dev) < 0) 809a4825edSMarcel Hasler return 0; 819a4825edSMarcel Hasler 829a4825edSMarcel Hasler 830c0d06caSMauro Carvalho Chehab /* Retrieve register value */ 840c0d06caSMauro Carvalho Chehab stk1160_read_reg(dev, STK1160_AC97_CMD, &vall); 850c0d06caSMauro Carvalho Chehab stk1160_read_reg(dev, STK1160_AC97_CMD + 1, &valh); 860c0d06caSMauro Carvalho Chehab 870c0d06caSMauro Carvalho Chehab return (valh << 8) | vall; 880c0d06caSMauro Carvalho Chehab } 890c0d06caSMauro Carvalho Chehab 90e36e6b5fSMarcel Hasler void stk1160_ac97_dump_regs(struct stk1160 *dev) 910c0d06caSMauro Carvalho Chehab { 92e36e6b5fSMarcel Hasler u16 value; 93e36e6b5fSMarcel Hasler 94e36e6b5fSMarcel Hasler value = stk1160_read_ac97(dev, 0x12); /* CD volume */ 95e36e6b5fSMarcel Hasler stk1160_dbg("0x12 == 0x%04x", value); 96e36e6b5fSMarcel Hasler 97e36e6b5fSMarcel Hasler value = stk1160_read_ac97(dev, 0x10); /* Line-in volume */ 98e36e6b5fSMarcel Hasler stk1160_dbg("0x10 == 0x%04x", value); 99e36e6b5fSMarcel Hasler 100e36e6b5fSMarcel Hasler value = stk1160_read_ac97(dev, 0x0e); /* MIC volume (mono) */ 101e36e6b5fSMarcel Hasler stk1160_dbg("0x0e == 0x%04x", value); 102e36e6b5fSMarcel Hasler 103e36e6b5fSMarcel Hasler value = stk1160_read_ac97(dev, 0x16); /* Aux volume */ 104e36e6b5fSMarcel Hasler stk1160_dbg("0x16 == 0x%04x", value); 105e36e6b5fSMarcel Hasler 106e36e6b5fSMarcel Hasler value = stk1160_read_ac97(dev, 0x1a); /* Record select */ 107e36e6b5fSMarcel Hasler stk1160_dbg("0x1a == 0x%04x", value); 108e36e6b5fSMarcel Hasler 109e36e6b5fSMarcel Hasler value = stk1160_read_ac97(dev, 0x02); /* Master volume */ 110e36e6b5fSMarcel Hasler stk1160_dbg("0x02 == 0x%04x", value); 111e36e6b5fSMarcel Hasler 112e36e6b5fSMarcel Hasler value = stk1160_read_ac97(dev, 0x1c); /* Record gain */ 113e36e6b5fSMarcel Hasler stk1160_dbg("0x1c == 0x%04x", value); 114e36e6b5fSMarcel Hasler } 115e36e6b5fSMarcel Hasler #endif 116e36e6b5fSMarcel Hasler 117504fc028SMauro Carvalho Chehab static int stk1160_has_audio(struct stk1160 *dev) 1181dc7df4dSMarcel Hasler { 1191dc7df4dSMarcel Hasler u8 value; 1201dc7df4dSMarcel Hasler 1211dc7df4dSMarcel Hasler stk1160_read_reg(dev, STK1160_POSV_L, &value); 1221dc7df4dSMarcel Hasler return !(value & STK1160_POSV_L_ACDOUT); 1231dc7df4dSMarcel Hasler } 1241dc7df4dSMarcel Hasler 125504fc028SMauro Carvalho Chehab static int stk1160_has_ac97(struct stk1160 *dev) 1261dc7df4dSMarcel Hasler { 1271dc7df4dSMarcel Hasler u8 value; 1281dc7df4dSMarcel Hasler 1291dc7df4dSMarcel Hasler stk1160_read_reg(dev, STK1160_POSV_L, &value); 1301dc7df4dSMarcel Hasler return !(value & STK1160_POSV_L_ACSYNC); 1311dc7df4dSMarcel Hasler } 1321dc7df4dSMarcel Hasler 133e36e6b5fSMarcel Hasler void stk1160_ac97_setup(struct stk1160 *dev) 134e36e6b5fSMarcel Hasler { 1351dc7df4dSMarcel Hasler if (!stk1160_has_audio(dev)) { 1361dc7df4dSMarcel Hasler stk1160_info("Device doesn't support audio, skipping AC97 setup."); 1371dc7df4dSMarcel Hasler return; 1381dc7df4dSMarcel Hasler } 1391dc7df4dSMarcel Hasler 1401dc7df4dSMarcel Hasler if (!stk1160_has_ac97(dev)) { 1411dc7df4dSMarcel Hasler stk1160_info("Device uses internal 8-bit ADC, skipping AC97 setup."); 1421dc7df4dSMarcel Hasler return; 1431dc7df4dSMarcel Hasler } 1441dc7df4dSMarcel Hasler 1450c0d06caSMauro Carvalho Chehab /* Two-step reset AC97 interface and hardware codec */ 1460c0d06caSMauro Carvalho Chehab stk1160_write_reg(dev, STK1160_AC97CTL_0, 0x94); 147e36e6b5fSMarcel Hasler stk1160_write_reg(dev, STK1160_AC97CTL_0, 0x8c); 1480c0d06caSMauro Carvalho Chehab 1490c0d06caSMauro Carvalho Chehab /* Set 16-bit audio data and choose L&R channel*/ 1500c0d06caSMauro Carvalho Chehab stk1160_write_reg(dev, STK1160_AC97CTL_1 + 2, 0x01); 151e36e6b5fSMarcel Hasler stk1160_write_reg(dev, STK1160_AC97CTL_1 + 3, 0x00); 1520c0d06caSMauro Carvalho Chehab 153e36e6b5fSMarcel Hasler /* Setup channels */ 154e36e6b5fSMarcel Hasler stk1160_write_ac97(dev, 0x12, 0x8808); /* CD volume */ 155e36e6b5fSMarcel Hasler stk1160_write_ac97(dev, 0x10, 0x0808); /* Line-in volume */ 156e36e6b5fSMarcel Hasler stk1160_write_ac97(dev, 0x0e, 0x0008); /* MIC volume (mono) */ 157e36e6b5fSMarcel Hasler stk1160_write_ac97(dev, 0x16, 0x0808); /* Aux volume */ 158e36e6b5fSMarcel Hasler stk1160_write_ac97(dev, 0x1a, 0x0404); /* Record select */ 159e36e6b5fSMarcel Hasler stk1160_write_ac97(dev, 0x02, 0x0000); /* Master volume */ 160e36e6b5fSMarcel Hasler stk1160_write_ac97(dev, 0x1c, 0x0808); /* Record gain */ 1610c0d06caSMauro Carvalho Chehab 162e36e6b5fSMarcel Hasler #ifdef DEBUG 163e36e6b5fSMarcel Hasler stk1160_ac97_dump_regs(dev); 164e36e6b5fSMarcel Hasler #endif 1650c0d06caSMauro Carvalho Chehab } 166