xref: /openbmc/linux/drivers/media/usb/gspca/se401.h (revision c942fddf)
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3  * GSPCA Endpoints (formerly known as AOX) se401 USB Camera sub Driver
4  *
5  * Copyright (C) 2011 Hans de Goede <hdegoede@redhat.com>
6  *
7  * Based on the v4l1 se401 driver which is:
8  *
9  * Copyright (c) 2000 Jeroen B. Vreeken (pe1rxq@amsat.org)
10  */
11 
12 #define SE401_REQ_GET_CAMERA_DESCRIPTOR		0x06
13 #define SE401_REQ_START_CONTINUOUS_CAPTURE	0x41
14 #define SE401_REQ_STOP_CONTINUOUS_CAPTURE	0x42
15 #define SE401_REQ_CAPTURE_FRAME			0x43
16 #define SE401_REQ_GET_BRT			0x44
17 #define SE401_REQ_SET_BRT			0x45
18 #define SE401_REQ_GET_WIDTH			0x4c
19 #define SE401_REQ_SET_WIDTH			0x4d
20 #define SE401_REQ_GET_HEIGHT			0x4e
21 #define SE401_REQ_SET_HEIGHT			0x4f
22 #define SE401_REQ_GET_OUTPUT_MODE		0x50
23 #define SE401_REQ_SET_OUTPUT_MODE		0x51
24 #define SE401_REQ_GET_EXT_FEATURE		0x52
25 #define SE401_REQ_SET_EXT_FEATURE		0x53
26 #define SE401_REQ_CAMERA_POWER			0x56
27 #define SE401_REQ_LED_CONTROL			0x57
28 #define SE401_REQ_BIOS				0xff
29 
30 #define SE401_BIOS_READ				0x07
31 
32 #define SE401_FORMAT_BAYER	0x40
33 
34 /* Hyundai hv7131b registers
35    7121 and 7141 should be the same (haven't really checked...) */
36 /* Mode registers: */
37 #define HV7131_REG_MODE_A		0x00
38 #define HV7131_REG_MODE_B		0x01
39 #define HV7131_REG_MODE_C		0x02
40 /* Frame registers: */
41 #define HV7131_REG_FRSU		0x10
42 #define HV7131_REG_FRSL		0x11
43 #define HV7131_REG_FCSU		0x12
44 #define HV7131_REG_FCSL		0x13
45 #define HV7131_REG_FWHU		0x14
46 #define HV7131_REG_FWHL		0x15
47 #define HV7131_REG_FWWU		0x16
48 #define HV7131_REG_FWWL		0x17
49 /* Timing registers: */
50 #define HV7131_REG_THBU		0x20
51 #define HV7131_REG_THBL		0x21
52 #define HV7131_REG_TVBU		0x22
53 #define HV7131_REG_TVBL		0x23
54 #define HV7131_REG_TITU		0x25
55 #define HV7131_REG_TITM		0x26
56 #define HV7131_REG_TITL		0x27
57 #define HV7131_REG_TMCD		0x28
58 /* Adjust Registers: */
59 #define HV7131_REG_ARLV		0x30
60 #define HV7131_REG_ARCG		0x31
61 #define HV7131_REG_AGCG		0x32
62 #define HV7131_REG_ABCG		0x33
63 #define HV7131_REG_APBV		0x34
64 #define HV7131_REG_ASLP		0x54
65 /* Offset Registers: */
66 #define HV7131_REG_OFSR		0x50
67 #define HV7131_REG_OFSG		0x51
68 #define HV7131_REG_OFSB		0x52
69 /* REset level statistics registers: */
70 #define HV7131_REG_LOREFNOH	0x57
71 #define HV7131_REG_LOREFNOL	0x58
72 #define HV7131_REG_HIREFNOH	0x59
73 #define HV7131_REG_HIREFNOL	0x5a
74 
75 /* se401 registers */
76 #define SE401_OPERATINGMODE	0x2000
77