1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * OV519 driver 4 * 5 * Copyright (C) 2008-2011 Jean-François Moine <moinejf@free.fr> 6 * Copyright (C) 2009 Hans de Goede <hdegoede@redhat.com> 7 * 8 * This module is adapted from the ov51x-jpeg package, which itself 9 * was adapted from the ov511 driver. 10 * 11 * Original copyright for the ov511 driver is: 12 * 13 * Copyright (c) 1999-2006 Mark W. McClelland 14 * Support for OV519, OV8610 Copyright (c) 2003 Joerg Heckenbach 15 * Many improvements by Bret Wallach <bwallac1@san.rr.com> 16 * Color fixes by by Orion Sky Lawlor <olawlor@acm.org> (2/26/2000) 17 * OV7620 fixes by Charl P. Botha <cpbotha@ieee.org> 18 * Changes by Claudio Matsuoka <claudio@conectiva.com> 19 * 20 * ov51x-jpeg original copyright is: 21 * 22 * Copyright (c) 2004-2007 Romain Beauxis <toots@rastageeks.org> 23 * Support for OV7670 sensors was contributed by Sam Skipsey <aoanla@yahoo.com> 24 */ 25 26 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 27 28 #define MODULE_NAME "ov519" 29 30 #include <linux/input.h> 31 #include "gspca.h" 32 33 /* The jpeg_hdr is used by w996Xcf only */ 34 /* The CONEX_CAM define for jpeg.h needs renaming, now its used here too */ 35 #define CONEX_CAM 36 #include "jpeg.h" 37 38 MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>"); 39 MODULE_DESCRIPTION("OV519 USB Camera Driver"); 40 MODULE_LICENSE("GPL"); 41 42 /* global parameters */ 43 static int frame_rate; 44 45 /* Number of times to retry a failed I2C transaction. Increase this if you 46 * are getting "Failed to read sensor ID..." */ 47 static int i2c_detect_tries = 10; 48 49 /* ov519 device descriptor */ 50 struct sd { 51 struct gspca_dev gspca_dev; /* !! must be the first item */ 52 53 struct v4l2_ctrl *jpegqual; 54 struct v4l2_ctrl *freq; 55 struct { /* h/vflip control cluster */ 56 struct v4l2_ctrl *hflip; 57 struct v4l2_ctrl *vflip; 58 }; 59 struct { /* autobrightness/brightness control cluster */ 60 struct v4l2_ctrl *autobright; 61 struct v4l2_ctrl *brightness; 62 }; 63 64 u8 revision; 65 66 u8 packet_nr; 67 68 char bridge; 69 #define BRIDGE_OV511 0 70 #define BRIDGE_OV511PLUS 1 71 #define BRIDGE_OV518 2 72 #define BRIDGE_OV518PLUS 3 73 #define BRIDGE_OV519 4 /* = ov530 */ 74 #define BRIDGE_OVFX2 5 75 #define BRIDGE_W9968CF 6 76 #define BRIDGE_MASK 7 77 78 char invert_led; 79 #define BRIDGE_INVERT_LED 8 80 81 char snapshot_pressed; 82 char snapshot_needs_reset; 83 84 /* Determined by sensor type */ 85 u8 sif; 86 87 #define QUALITY_MIN 50 88 #define QUALITY_MAX 70 89 #define QUALITY_DEF 50 90 91 u8 stopped; /* Streaming is temporarily paused */ 92 u8 first_frame; 93 94 u8 frame_rate; /* current Framerate */ 95 u8 clockdiv; /* clockdiv override */ 96 97 s8 sensor; /* Type of image sensor chip (SEN_*) */ 98 99 u8 sensor_addr; 100 u16 sensor_width; 101 u16 sensor_height; 102 s16 sensor_reg_cache[256]; 103 104 u8 jpeg_hdr[JPEG_HDR_SZ]; 105 }; 106 enum sensors { 107 SEN_OV2610, 108 SEN_OV2610AE, 109 SEN_OV3610, 110 SEN_OV6620, 111 SEN_OV6630, 112 SEN_OV66308AF, 113 SEN_OV7610, 114 SEN_OV7620, 115 SEN_OV7620AE, 116 SEN_OV7640, 117 SEN_OV7648, 118 SEN_OV7660, 119 SEN_OV7670, 120 SEN_OV76BE, 121 SEN_OV8610, 122 SEN_OV9600, 123 }; 124 125 /* Note this is a bit of a hack, but the w9968cf driver needs the code for all 126 the ov sensors which is already present here. When we have the time we 127 really should move the sensor drivers to v4l2 sub drivers. */ 128 #include "w996Xcf.c" 129 130 /* table of the disabled controls */ 131 struct ctrl_valid { 132 unsigned int has_brightness:1; 133 unsigned int has_contrast:1; 134 unsigned int has_exposure:1; 135 unsigned int has_autogain:1; 136 unsigned int has_sat:1; 137 unsigned int has_hvflip:1; 138 unsigned int has_autobright:1; 139 unsigned int has_freq:1; 140 }; 141 142 static const struct ctrl_valid valid_controls[] = { 143 [SEN_OV2610] = { 144 .has_exposure = 1, 145 .has_autogain = 1, 146 }, 147 [SEN_OV2610AE] = { 148 .has_exposure = 1, 149 .has_autogain = 1, 150 }, 151 [SEN_OV3610] = { 152 /* No controls */ 153 }, 154 [SEN_OV6620] = { 155 .has_brightness = 1, 156 .has_contrast = 1, 157 .has_sat = 1, 158 .has_autobright = 1, 159 .has_freq = 1, 160 }, 161 [SEN_OV6630] = { 162 .has_brightness = 1, 163 .has_contrast = 1, 164 .has_sat = 1, 165 .has_autobright = 1, 166 .has_freq = 1, 167 }, 168 [SEN_OV66308AF] = { 169 .has_brightness = 1, 170 .has_contrast = 1, 171 .has_sat = 1, 172 .has_autobright = 1, 173 .has_freq = 1, 174 }, 175 [SEN_OV7610] = { 176 .has_brightness = 1, 177 .has_contrast = 1, 178 .has_sat = 1, 179 .has_autobright = 1, 180 .has_freq = 1, 181 }, 182 [SEN_OV7620] = { 183 .has_brightness = 1, 184 .has_contrast = 1, 185 .has_sat = 1, 186 .has_autobright = 1, 187 .has_freq = 1, 188 }, 189 [SEN_OV7620AE] = { 190 .has_brightness = 1, 191 .has_contrast = 1, 192 .has_sat = 1, 193 .has_autobright = 1, 194 .has_freq = 1, 195 }, 196 [SEN_OV7640] = { 197 .has_brightness = 1, 198 .has_sat = 1, 199 .has_freq = 1, 200 }, 201 [SEN_OV7648] = { 202 .has_brightness = 1, 203 .has_sat = 1, 204 .has_freq = 1, 205 }, 206 [SEN_OV7660] = { 207 .has_brightness = 1, 208 .has_contrast = 1, 209 .has_sat = 1, 210 .has_hvflip = 1, 211 .has_freq = 1, 212 }, 213 [SEN_OV7670] = { 214 .has_brightness = 1, 215 .has_contrast = 1, 216 .has_hvflip = 1, 217 .has_freq = 1, 218 }, 219 [SEN_OV76BE] = { 220 .has_brightness = 1, 221 .has_contrast = 1, 222 .has_sat = 1, 223 .has_autobright = 1, 224 .has_freq = 1, 225 }, 226 [SEN_OV8610] = { 227 .has_brightness = 1, 228 .has_contrast = 1, 229 .has_sat = 1, 230 .has_autobright = 1, 231 }, 232 [SEN_OV9600] = { 233 .has_exposure = 1, 234 .has_autogain = 1, 235 }, 236 }; 237 238 static const struct v4l2_pix_format ov519_vga_mode[] = { 239 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE, 240 .bytesperline = 320, 241 .sizeimage = 320 * 240 * 3 / 8 + 590, 242 .colorspace = V4L2_COLORSPACE_JPEG, 243 .priv = 1}, 244 {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE, 245 .bytesperline = 640, 246 .sizeimage = 640 * 480 * 3 / 8 + 590, 247 .colorspace = V4L2_COLORSPACE_JPEG, 248 .priv = 0}, 249 }; 250 static const struct v4l2_pix_format ov519_sif_mode[] = { 251 {160, 120, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE, 252 .bytesperline = 160, 253 .sizeimage = 160 * 120 * 3 / 8 + 590, 254 .colorspace = V4L2_COLORSPACE_JPEG, 255 .priv = 3}, 256 {176, 144, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE, 257 .bytesperline = 176, 258 .sizeimage = 176 * 144 * 3 / 8 + 590, 259 .colorspace = V4L2_COLORSPACE_JPEG, 260 .priv = 1}, 261 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE, 262 .bytesperline = 320, 263 .sizeimage = 320 * 240 * 3 / 8 + 590, 264 .colorspace = V4L2_COLORSPACE_JPEG, 265 .priv = 2}, 266 {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE, 267 .bytesperline = 352, 268 .sizeimage = 352 * 288 * 3 / 8 + 590, 269 .colorspace = V4L2_COLORSPACE_JPEG, 270 .priv = 0}, 271 }; 272 273 /* Note some of the sizeimage values for the ov511 / ov518 may seem 274 larger then necessary, however they need to be this big as the ov511 / 275 ov518 always fills the entire isoc frame, using 0 padding bytes when 276 it doesn't have any data. So with low framerates the amount of data 277 transferred can become quite large (libv4l will remove all the 0 padding 278 in userspace). */ 279 static const struct v4l2_pix_format ov518_vga_mode[] = { 280 {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE, 281 .bytesperline = 320, 282 .sizeimage = 320 * 240 * 3, 283 .colorspace = V4L2_COLORSPACE_JPEG, 284 .priv = 1}, 285 {640, 480, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE, 286 .bytesperline = 640, 287 .sizeimage = 640 * 480 * 2, 288 .colorspace = V4L2_COLORSPACE_JPEG, 289 .priv = 0}, 290 }; 291 static const struct v4l2_pix_format ov518_sif_mode[] = { 292 {160, 120, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE, 293 .bytesperline = 160, 294 .sizeimage = 70000, 295 .colorspace = V4L2_COLORSPACE_JPEG, 296 .priv = 3}, 297 {176, 144, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE, 298 .bytesperline = 176, 299 .sizeimage = 70000, 300 .colorspace = V4L2_COLORSPACE_JPEG, 301 .priv = 1}, 302 {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE, 303 .bytesperline = 320, 304 .sizeimage = 320 * 240 * 3, 305 .colorspace = V4L2_COLORSPACE_JPEG, 306 .priv = 2}, 307 {352, 288, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE, 308 .bytesperline = 352, 309 .sizeimage = 352 * 288 * 3, 310 .colorspace = V4L2_COLORSPACE_JPEG, 311 .priv = 0}, 312 }; 313 314 static const struct v4l2_pix_format ov511_vga_mode[] = { 315 {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE, 316 .bytesperline = 320, 317 .sizeimage = 320 * 240 * 3, 318 .colorspace = V4L2_COLORSPACE_JPEG, 319 .priv = 1}, 320 {640, 480, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE, 321 .bytesperline = 640, 322 .sizeimage = 640 * 480 * 2, 323 .colorspace = V4L2_COLORSPACE_JPEG, 324 .priv = 0}, 325 }; 326 static const struct v4l2_pix_format ov511_sif_mode[] = { 327 {160, 120, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE, 328 .bytesperline = 160, 329 .sizeimage = 70000, 330 .colorspace = V4L2_COLORSPACE_JPEG, 331 .priv = 3}, 332 {176, 144, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE, 333 .bytesperline = 176, 334 .sizeimage = 70000, 335 .colorspace = V4L2_COLORSPACE_JPEG, 336 .priv = 1}, 337 {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE, 338 .bytesperline = 320, 339 .sizeimage = 320 * 240 * 3, 340 .colorspace = V4L2_COLORSPACE_JPEG, 341 .priv = 2}, 342 {352, 288, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE, 343 .bytesperline = 352, 344 .sizeimage = 352 * 288 * 3, 345 .colorspace = V4L2_COLORSPACE_JPEG, 346 .priv = 0}, 347 }; 348 349 static const struct v4l2_pix_format ovfx2_ov2610_mode[] = { 350 {800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, 351 .bytesperline = 800, 352 .sizeimage = 800 * 600, 353 .colorspace = V4L2_COLORSPACE_SRGB, 354 .priv = 1}, 355 {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, 356 .bytesperline = 1600, 357 .sizeimage = 1600 * 1200, 358 .colorspace = V4L2_COLORSPACE_SRGB}, 359 }; 360 static const struct v4l2_pix_format ovfx2_ov3610_mode[] = { 361 {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, 362 .bytesperline = 640, 363 .sizeimage = 640 * 480, 364 .colorspace = V4L2_COLORSPACE_SRGB, 365 .priv = 1}, 366 {800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, 367 .bytesperline = 800, 368 .sizeimage = 800 * 600, 369 .colorspace = V4L2_COLORSPACE_SRGB, 370 .priv = 1}, 371 {1024, 768, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, 372 .bytesperline = 1024, 373 .sizeimage = 1024 * 768, 374 .colorspace = V4L2_COLORSPACE_SRGB, 375 .priv = 1}, 376 {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, 377 .bytesperline = 1600, 378 .sizeimage = 1600 * 1200, 379 .colorspace = V4L2_COLORSPACE_SRGB, 380 .priv = 0}, 381 {2048, 1536, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, 382 .bytesperline = 2048, 383 .sizeimage = 2048 * 1536, 384 .colorspace = V4L2_COLORSPACE_SRGB, 385 .priv = 0}, 386 }; 387 static const struct v4l2_pix_format ovfx2_ov9600_mode[] = { 388 {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, 389 .bytesperline = 640, 390 .sizeimage = 640 * 480, 391 .colorspace = V4L2_COLORSPACE_SRGB, 392 .priv = 1}, 393 {1280, 1024, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, 394 .bytesperline = 1280, 395 .sizeimage = 1280 * 1024, 396 .colorspace = V4L2_COLORSPACE_SRGB}, 397 }; 398 399 /* Registers common to OV511 / OV518 */ 400 #define R51x_FIFO_PSIZE 0x30 /* 2 bytes wide w/ OV518(+) */ 401 #define R51x_SYS_RESET 0x50 402 /* Reset type flags */ 403 #define OV511_RESET_OMNICE 0x08 404 #define R51x_SYS_INIT 0x53 405 #define R51x_SYS_SNAP 0x52 406 #define R51x_SYS_CUST_ID 0x5f 407 #define R51x_COMP_LUT_BEGIN 0x80 408 409 /* OV511 Camera interface register numbers */ 410 #define R511_CAM_DELAY 0x10 411 #define R511_CAM_EDGE 0x11 412 #define R511_CAM_PXCNT 0x12 413 #define R511_CAM_LNCNT 0x13 414 #define R511_CAM_PXDIV 0x14 415 #define R511_CAM_LNDIV 0x15 416 #define R511_CAM_UV_EN 0x16 417 #define R511_CAM_LINE_MODE 0x17 418 #define R511_CAM_OPTS 0x18 419 420 #define R511_SNAP_FRAME 0x19 421 #define R511_SNAP_PXCNT 0x1a 422 #define R511_SNAP_LNCNT 0x1b 423 #define R511_SNAP_PXDIV 0x1c 424 #define R511_SNAP_LNDIV 0x1d 425 #define R511_SNAP_UV_EN 0x1e 426 #define R511_SNAP_OPTS 0x1f 427 428 #define R511_DRAM_FLOW_CTL 0x20 429 #define R511_FIFO_OPTS 0x31 430 #define R511_I2C_CTL 0x40 431 #define R511_SYS_LED_CTL 0x55 /* OV511+ only */ 432 #define R511_COMP_EN 0x78 433 #define R511_COMP_LUT_EN 0x79 434 435 /* OV518 Camera interface register numbers */ 436 #define R518_GPIO_OUT 0x56 /* OV518(+) only */ 437 #define R518_GPIO_CTL 0x57 /* OV518(+) only */ 438 439 /* OV519 Camera interface register numbers */ 440 #define OV519_R10_H_SIZE 0x10 441 #define OV519_R11_V_SIZE 0x11 442 #define OV519_R12_X_OFFSETL 0x12 443 #define OV519_R13_X_OFFSETH 0x13 444 #define OV519_R14_Y_OFFSETL 0x14 445 #define OV519_R15_Y_OFFSETH 0x15 446 #define OV519_R16_DIVIDER 0x16 447 #define OV519_R20_DFR 0x20 448 #define OV519_R25_FORMAT 0x25 449 450 /* OV519 System Controller register numbers */ 451 #define OV519_R51_RESET1 0x51 452 #define OV519_R54_EN_CLK1 0x54 453 #define OV519_R57_SNAPSHOT 0x57 454 455 #define OV519_GPIO_DATA_OUT0 0x71 456 #define OV519_GPIO_IO_CTRL0 0x72 457 458 /*#define OV511_ENDPOINT_ADDRESS 1 * Isoc endpoint number */ 459 460 /* 461 * The FX2 chip does not give us a zero length read at end of frame. 462 * It does, however, give a short read at the end of a frame, if 463 * necessary, rather than run two frames together. 464 * 465 * By choosing the right bulk transfer size, we are guaranteed to always 466 * get a short read for the last read of each frame. Frame sizes are 467 * always a composite number (width * height, or a multiple) so if we 468 * choose a prime number, we are guaranteed that the last read of a 469 * frame will be short. 470 * 471 * But it isn't that easy: the 2.6 kernel requires a multiple of 4KB, 472 * otherwise EOVERFLOW "babbling" errors occur. I have not been able 473 * to figure out why. [PMiller] 474 * 475 * The constant (13 * 4096) is the largest "prime enough" number less than 64KB. 476 * 477 * It isn't enough to know the number of bytes per frame, in case we 478 * have data dropouts or buffer overruns (even though the FX2 double 479 * buffers, there are some pretty strict real time constraints for 480 * isochronous transfer for larger frame sizes). 481 */ 482 /*jfm: this value does not work for 800x600 - see isoc_init */ 483 #define OVFX2_BULK_SIZE (13 * 4096) 484 485 /* I2C registers */ 486 #define R51x_I2C_W_SID 0x41 487 #define R51x_I2C_SADDR_3 0x42 488 #define R51x_I2C_SADDR_2 0x43 489 #define R51x_I2C_R_SID 0x44 490 #define R51x_I2C_DATA 0x45 491 #define R518_I2C_CTL 0x47 /* OV518(+) only */ 492 #define OVFX2_I2C_ADDR 0x00 493 494 /* I2C ADDRESSES */ 495 #define OV7xx0_SID 0x42 496 #define OV_HIRES_SID 0x60 /* OV9xxx / OV2xxx / OV3xxx */ 497 #define OV8xx0_SID 0xa0 498 #define OV6xx0_SID 0xc0 499 500 /* OV7610 registers */ 501 #define OV7610_REG_GAIN 0x00 /* gain setting (5:0) */ 502 #define OV7610_REG_BLUE 0x01 /* blue channel balance */ 503 #define OV7610_REG_RED 0x02 /* red channel balance */ 504 #define OV7610_REG_SAT 0x03 /* saturation */ 505 #define OV8610_REG_HUE 0x04 /* 04 reserved */ 506 #define OV7610_REG_CNT 0x05 /* Y contrast */ 507 #define OV7610_REG_BRT 0x06 /* Y brightness */ 508 #define OV7610_REG_COM_C 0x14 /* misc common regs */ 509 #define OV7610_REG_ID_HIGH 0x1c /* manufacturer ID MSB */ 510 #define OV7610_REG_ID_LOW 0x1d /* manufacturer ID LSB */ 511 #define OV7610_REG_COM_I 0x29 /* misc settings */ 512 513 /* OV7660 and OV7670 registers */ 514 #define OV7670_R00_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */ 515 #define OV7670_R01_BLUE 0x01 /* blue gain */ 516 #define OV7670_R02_RED 0x02 /* red gain */ 517 #define OV7670_R03_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */ 518 #define OV7670_R04_COM1 0x04 /* Control 1 */ 519 /*#define OV7670_R07_AECHH 0x07 * AEC MS 5 bits */ 520 #define OV7670_R0C_COM3 0x0c /* Control 3 */ 521 #define OV7670_R0D_COM4 0x0d /* Control 4 */ 522 #define OV7670_R0E_COM5 0x0e /* All "reserved" */ 523 #define OV7670_R0F_COM6 0x0f /* Control 6 */ 524 #define OV7670_R10_AECH 0x10 /* More bits of AEC value */ 525 #define OV7670_R11_CLKRC 0x11 /* Clock control */ 526 #define OV7670_R12_COM7 0x12 /* Control 7 */ 527 #define OV7670_COM7_FMT_VGA 0x00 528 /*#define OV7670_COM7_YUV 0x00 * YUV */ 529 #define OV7670_COM7_FMT_QVGA 0x10 /* QVGA format */ 530 #define OV7670_COM7_FMT_MASK 0x38 531 #define OV7670_COM7_RESET 0x80 /* Register reset */ 532 #define OV7670_R13_COM8 0x13 /* Control 8 */ 533 #define OV7670_COM8_AEC 0x01 /* Auto exposure enable */ 534 #define OV7670_COM8_AWB 0x02 /* White balance enable */ 535 #define OV7670_COM8_AGC 0x04 /* Auto gain enable */ 536 #define OV7670_COM8_BFILT 0x20 /* Band filter enable */ 537 #define OV7670_COM8_AECSTEP 0x40 /* Unlimited AEC step size */ 538 #define OV7670_COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */ 539 #define OV7670_R14_COM9 0x14 /* Control 9 - gain ceiling */ 540 #define OV7670_R15_COM10 0x15 /* Control 10 */ 541 #define OV7670_R17_HSTART 0x17 /* Horiz start high bits */ 542 #define OV7670_R18_HSTOP 0x18 /* Horiz stop high bits */ 543 #define OV7670_R19_VSTART 0x19 /* Vert start high bits */ 544 #define OV7670_R1A_VSTOP 0x1a /* Vert stop high bits */ 545 #define OV7670_R1E_MVFP 0x1e /* Mirror / vflip */ 546 #define OV7670_MVFP_VFLIP 0x10 /* vertical flip */ 547 #define OV7670_MVFP_MIRROR 0x20 /* Mirror image */ 548 #define OV7670_R24_AEW 0x24 /* AGC upper limit */ 549 #define OV7670_R25_AEB 0x25 /* AGC lower limit */ 550 #define OV7670_R26_VPT 0x26 /* AGC/AEC fast mode op region */ 551 #define OV7670_R32_HREF 0x32 /* HREF pieces */ 552 #define OV7670_R3A_TSLB 0x3a /* lots of stuff */ 553 #define OV7670_R3B_COM11 0x3b /* Control 11 */ 554 #define OV7670_COM11_EXP 0x02 555 #define OV7670_COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */ 556 #define OV7670_R3C_COM12 0x3c /* Control 12 */ 557 #define OV7670_R3D_COM13 0x3d /* Control 13 */ 558 #define OV7670_COM13_GAMMA 0x80 /* Gamma enable */ 559 #define OV7670_COM13_UVSAT 0x40 /* UV saturation auto adjustment */ 560 #define OV7670_R3E_COM14 0x3e /* Control 14 */ 561 #define OV7670_R3F_EDGE 0x3f /* Edge enhancement factor */ 562 #define OV7670_R40_COM15 0x40 /* Control 15 */ 563 /*#define OV7670_COM15_R00FF 0xc0 * 00 to FF */ 564 #define OV7670_R41_COM16 0x41 /* Control 16 */ 565 #define OV7670_COM16_AWBGAIN 0x08 /* AWB gain enable */ 566 /* end of ov7660 common registers */ 567 #define OV7670_R55_BRIGHT 0x55 /* Brightness */ 568 #define OV7670_R56_CONTRAS 0x56 /* Contrast control */ 569 #define OV7670_R69_GFIX 0x69 /* Fix gain control */ 570 /*#define OV7670_R8C_RGB444 0x8c * RGB 444 control */ 571 #define OV7670_R9F_HAECC1 0x9f /* Hist AEC/AGC control 1 */ 572 #define OV7670_RA0_HAECC2 0xa0 /* Hist AEC/AGC control 2 */ 573 #define OV7670_RA5_BD50MAX 0xa5 /* 50hz banding step limit */ 574 #define OV7670_RA6_HAECC3 0xa6 /* Hist AEC/AGC control 3 */ 575 #define OV7670_RA7_HAECC4 0xa7 /* Hist AEC/AGC control 4 */ 576 #define OV7670_RA8_HAECC5 0xa8 /* Hist AEC/AGC control 5 */ 577 #define OV7670_RA9_HAECC6 0xa9 /* Hist AEC/AGC control 6 */ 578 #define OV7670_RAA_HAECC7 0xaa /* Hist AEC/AGC control 7 */ 579 #define OV7670_RAB_BD60MAX 0xab /* 60hz banding step limit */ 580 581 struct ov_regvals { 582 u8 reg; 583 u8 val; 584 }; 585 struct ov_i2c_regvals { 586 u8 reg; 587 u8 val; 588 }; 589 590 /* Settings for OV2610 camera chip */ 591 static const struct ov_i2c_regvals norm_2610[] = { 592 { 0x12, 0x80 }, /* reset */ 593 }; 594 595 static const struct ov_i2c_regvals norm_2610ae[] = { 596 {0x12, 0x80}, /* reset */ 597 {0x13, 0xcd}, 598 {0x09, 0x01}, 599 {0x0d, 0x00}, 600 {0x11, 0x80}, 601 {0x12, 0x20}, /* 1600x1200 */ 602 {0x33, 0x0c}, 603 {0x35, 0x90}, 604 {0x36, 0x37}, 605 /* ms-win traces */ 606 {0x11, 0x83}, /* clock / 3 ? */ 607 {0x2d, 0x00}, /* 60 Hz filter */ 608 {0x24, 0xb0}, /* normal colors */ 609 {0x25, 0x90}, 610 {0x10, 0x43}, 611 }; 612 613 static const struct ov_i2c_regvals norm_3620b[] = { 614 /* 615 * From the datasheet: "Note that after writing to register COMH 616 * (0x12) to change the sensor mode, registers related to the 617 * sensor’s cropping window will be reset back to their default 618 * values." 619 * 620 * "wait 4096 external clock ... to make sure the sensor is 621 * stable and ready to access registers" i.e. 160us at 24MHz 622 */ 623 { 0x12, 0x80 }, /* COMH reset */ 624 { 0x12, 0x00 }, /* QXGA, master */ 625 626 /* 627 * 11 CLKRC "Clock Rate Control" 628 * [7] internal frequency doublers: on 629 * [6] video port mode: master 630 * [5:0] clock divider: 1 631 */ 632 { 0x11, 0x80 }, 633 634 /* 635 * 13 COMI "Common Control I" 636 * = 192 (0xC0) 11000000 637 * COMI[7] "AEC speed selection" 638 * = 1 (0x01) 1....... "Faster AEC correction" 639 * COMI[6] "AEC speed step selection" 640 * = 1 (0x01) .1...... "Big steps, fast" 641 * COMI[5] "Banding filter on off" 642 * = 0 (0x00) ..0..... "Off" 643 * COMI[4] "Banding filter option" 644 * = 0 (0x00) ...0.... "Main clock is 48 MHz and 645 * the PLL is ON" 646 * COMI[3] "Reserved" 647 * = 0 (0x00) ....0... 648 * COMI[2] "AGC auto manual control selection" 649 * = 0 (0x00) .....0.. "Manual" 650 * COMI[1] "AWB auto manual control selection" 651 * = 0 (0x00) ......0. "Manual" 652 * COMI[0] "Exposure control" 653 * = 0 (0x00) .......0 "Manual" 654 */ 655 { 0x13, 0xc0 }, 656 657 /* 658 * 09 COMC "Common Control C" 659 * = 8 (0x08) 00001000 660 * COMC[7:5] "Reserved" 661 * = 0 (0x00) 000..... 662 * COMC[4] "Sleep Mode Enable" 663 * = 0 (0x00) ...0.... "Normal mode" 664 * COMC[3:2] "Sensor sampling reset timing selection" 665 * = 2 (0x02) ....10.. "Longer reset time" 666 * COMC[1:0] "Output drive current select" 667 * = 0 (0x00) ......00 "Weakest" 668 */ 669 { 0x09, 0x08 }, 670 671 /* 672 * 0C COMD "Common Control D" 673 * = 8 (0x08) 00001000 674 * COMD[7] "Reserved" 675 * = 0 (0x00) 0....... 676 * COMD[6] "Swap MSB and LSB at the output port" 677 * = 0 (0x00) .0...... "False" 678 * COMD[5:3] "Reserved" 679 * = 1 (0x01) ..001... 680 * COMD[2] "Output Average On Off" 681 * = 0 (0x00) .....0.. "Output Normal" 682 * COMD[1] "Sensor precharge voltage selection" 683 * = 0 (0x00) ......0. "Selects internal 684 * reference precharge 685 * voltage" 686 * COMD[0] "Snapshot option" 687 * = 0 (0x00) .......0 "Enable live video output 688 * after snapshot sequence" 689 */ 690 { 0x0c, 0x08 }, 691 692 /* 693 * 0D COME "Common Control E" 694 * = 161 (0xA1) 10100001 695 * COME[7] "Output average option" 696 * = 1 (0x01) 1....... "Output average of 4 pixels" 697 * COME[6] "Anti-blooming control" 698 * = 0 (0x00) .0...... "Off" 699 * COME[5:3] "Reserved" 700 * = 4 (0x04) ..100... 701 * COME[2] "Clock output power down pin status" 702 * = 0 (0x00) .....0.. "Tri-state data output pin 703 * on power down" 704 * COME[1] "Data output pin status selection at power down" 705 * = 0 (0x00) ......0. "Tri-state VSYNC, PCLK, 706 * HREF, and CHSYNC pins on 707 * power down" 708 * COME[0] "Auto zero circuit select" 709 * = 1 (0x01) .......1 "On" 710 */ 711 { 0x0d, 0xa1 }, 712 713 /* 714 * 0E COMF "Common Control F" 715 * = 112 (0x70) 01110000 716 * COMF[7] "System clock selection" 717 * = 0 (0x00) 0....... "Use 24 MHz system clock" 718 * COMF[6:4] "Reserved" 719 * = 7 (0x07) .111.... 720 * COMF[3] "Manual auto negative offset canceling selection" 721 * = 0 (0x00) ....0... "Auto detect negative 722 * offset and cancel it" 723 * COMF[2:0] "Reserved" 724 * = 0 (0x00) .....000 725 */ 726 { 0x0e, 0x70 }, 727 728 /* 729 * 0F COMG "Common Control G" 730 * = 66 (0x42) 01000010 731 * COMG[7] "Optical black output selection" 732 * = 0 (0x00) 0....... "Disable" 733 * COMG[6] "Black level calibrate selection" 734 * = 1 (0x01) .1...... "Use optical black pixels 735 * to calibrate" 736 * COMG[5:4] "Reserved" 737 * = 0 (0x00) ..00.... 738 * COMG[3] "Channel offset adjustment" 739 * = 0 (0x00) ....0... "Disable offset adjustment" 740 * COMG[2] "ADC black level calibration option" 741 * = 0 (0x00) .....0.. "Use B/G line and G/R 742 * line to calibrate each 743 * channel's black level" 744 * COMG[1] "Reserved" 745 * = 1 (0x01) ......1. 746 * COMG[0] "ADC black level calibration enable" 747 * = 0 (0x00) .......0 "Disable" 748 */ 749 { 0x0f, 0x42 }, 750 751 /* 752 * 14 COMJ "Common Control J" 753 * = 198 (0xC6) 11000110 754 * COMJ[7:6] "AGC gain ceiling" 755 * = 3 (0x03) 11...... "8x" 756 * COMJ[5:4] "Reserved" 757 * = 0 (0x00) ..00.... 758 * COMJ[3] "Auto banding filter" 759 * = 0 (0x00) ....0... "Banding filter is always 760 * on off depending on 761 * COMI[5] setting" 762 * COMJ[2] "VSYNC drop option" 763 * = 1 (0x01) .....1.. "SYNC is dropped if frame 764 * data is dropped" 765 * COMJ[1] "Frame data drop" 766 * = 1 (0x01) ......1. "Drop frame data if 767 * exposure is not within 768 * tolerance. In AEC mode, 769 * data is normally dropped 770 * when data is out of 771 * range." 772 * COMJ[0] "Reserved" 773 * = 0 (0x00) .......0 774 */ 775 { 0x14, 0xc6 }, 776 777 /* 778 * 15 COMK "Common Control K" 779 * = 2 (0x02) 00000010 780 * COMK[7] "CHSYNC pin output swap" 781 * = 0 (0x00) 0....... "CHSYNC" 782 * COMK[6] "HREF pin output swap" 783 * = 0 (0x00) .0...... "HREF" 784 * COMK[5] "PCLK output selection" 785 * = 0 (0x00) ..0..... "PCLK always output" 786 * COMK[4] "PCLK edge selection" 787 * = 0 (0x00) ...0.... "Data valid on falling edge" 788 * COMK[3] "HREF output polarity" 789 * = 0 (0x00) ....0... "positive" 790 * COMK[2] "Reserved" 791 * = 0 (0x00) .....0.. 792 * COMK[1] "VSYNC polarity" 793 * = 1 (0x01) ......1. "negative" 794 * COMK[0] "HSYNC polarity" 795 * = 0 (0x00) .......0 "positive" 796 */ 797 { 0x15, 0x02 }, 798 799 /* 800 * 33 CHLF "Current Control" 801 * = 9 (0x09) 00001001 802 * CHLF[7:6] "Sensor current control" 803 * = 0 (0x00) 00...... 804 * CHLF[5] "Sensor current range control" 805 * = 0 (0x00) ..0..... "normal range" 806 * CHLF[4] "Sensor current" 807 * = 0 (0x00) ...0.... "normal current" 808 * CHLF[3] "Sensor buffer current control" 809 * = 1 (0x01) ....1... "half current" 810 * CHLF[2] "Column buffer current control" 811 * = 0 (0x00) .....0.. "normal current" 812 * CHLF[1] "Analog DSP current control" 813 * = 0 (0x00) ......0. "normal current" 814 * CHLF[1] "ADC current control" 815 * = 0 (0x00) ......0. "normal current" 816 */ 817 { 0x33, 0x09 }, 818 819 /* 820 * 34 VBLM "Blooming Control" 821 * = 80 (0x50) 01010000 822 * VBLM[7] "Hard soft reset switch" 823 * = 0 (0x00) 0....... "Hard reset" 824 * VBLM[6:4] "Blooming voltage selection" 825 * = 5 (0x05) .101.... 826 * VBLM[3:0] "Sensor current control" 827 * = 0 (0x00) ....0000 828 */ 829 { 0x34, 0x50 }, 830 831 /* 832 * 36 VCHG "Sensor Precharge Voltage Control" 833 * = 0 (0x00) 00000000 834 * VCHG[7] "Reserved" 835 * = 0 (0x00) 0....... 836 * VCHG[6:4] "Sensor precharge voltage control" 837 * = 0 (0x00) .000.... 838 * VCHG[3:0] "Sensor array common reference" 839 * = 0 (0x00) ....0000 840 */ 841 { 0x36, 0x00 }, 842 843 /* 844 * 37 ADC "ADC Reference Control" 845 * = 4 (0x04) 00000100 846 * ADC[7:4] "Reserved" 847 * = 0 (0x00) 0000.... 848 * ADC[3] "ADC input signal range" 849 * = 0 (0x00) ....0... "Input signal 1.0x" 850 * ADC[2:0] "ADC range control" 851 * = 4 (0x04) .....100 852 */ 853 { 0x37, 0x04 }, 854 855 /* 856 * 38 ACOM "Analog Common Ground" 857 * = 82 (0x52) 01010010 858 * ACOM[7] "Analog gain control" 859 * = 0 (0x00) 0....... "Gain 1x" 860 * ACOM[6] "Analog black level calibration" 861 * = 1 (0x01) .1...... "On" 862 * ACOM[5:0] "Reserved" 863 * = 18 (0x12) ..010010 864 */ 865 { 0x38, 0x52 }, 866 867 /* 868 * 3A FREFA "Internal Reference Adjustment" 869 * = 0 (0x00) 00000000 870 * FREFA[7:0] "Range" 871 * = 0 (0x00) 00000000 872 */ 873 { 0x3a, 0x00 }, 874 875 /* 876 * 3C FVOPT "Internal Reference Adjustment" 877 * = 31 (0x1F) 00011111 878 * FVOPT[7:0] "Range" 879 * = 31 (0x1F) 00011111 880 */ 881 { 0x3c, 0x1f }, 882 883 /* 884 * 44 Undocumented = 0 (0x00) 00000000 885 * 44[7:0] "It's a secret" 886 * = 0 (0x00) 00000000 887 */ 888 { 0x44, 0x00 }, 889 890 /* 891 * 40 Undocumented = 0 (0x00) 00000000 892 * 40[7:0] "It's a secret" 893 * = 0 (0x00) 00000000 894 */ 895 { 0x40, 0x00 }, 896 897 /* 898 * 41 Undocumented = 0 (0x00) 00000000 899 * 41[7:0] "It's a secret" 900 * = 0 (0x00) 00000000 901 */ 902 { 0x41, 0x00 }, 903 904 /* 905 * 42 Undocumented = 0 (0x00) 00000000 906 * 42[7:0] "It's a secret" 907 * = 0 (0x00) 00000000 908 */ 909 { 0x42, 0x00 }, 910 911 /* 912 * 43 Undocumented = 0 (0x00) 00000000 913 * 43[7:0] "It's a secret" 914 * = 0 (0x00) 00000000 915 */ 916 { 0x43, 0x00 }, 917 918 /* 919 * 45 Undocumented = 128 (0x80) 10000000 920 * 45[7:0] "It's a secret" 921 * = 128 (0x80) 10000000 922 */ 923 { 0x45, 0x80 }, 924 925 /* 926 * 48 Undocumented = 192 (0xC0) 11000000 927 * 48[7:0] "It's a secret" 928 * = 192 (0xC0) 11000000 929 */ 930 { 0x48, 0xc0 }, 931 932 /* 933 * 49 Undocumented = 25 (0x19) 00011001 934 * 49[7:0] "It's a secret" 935 * = 25 (0x19) 00011001 936 */ 937 { 0x49, 0x19 }, 938 939 /* 940 * 4B Undocumented = 128 (0x80) 10000000 941 * 4B[7:0] "It's a secret" 942 * = 128 (0x80) 10000000 943 */ 944 { 0x4b, 0x80 }, 945 946 /* 947 * 4D Undocumented = 196 (0xC4) 11000100 948 * 4D[7:0] "It's a secret" 949 * = 196 (0xC4) 11000100 950 */ 951 { 0x4d, 0xc4 }, 952 953 /* 954 * 35 VREF "Reference Voltage Control" 955 * = 76 (0x4c) 01001100 956 * VREF[7:5] "Column high reference control" 957 * = 2 (0x02) 010..... "higher voltage" 958 * VREF[4:2] "Column low reference control" 959 * = 3 (0x03) ...011.. "Highest voltage" 960 * VREF[1:0] "Reserved" 961 * = 0 (0x00) ......00 962 */ 963 { 0x35, 0x4c }, 964 965 /* 966 * 3D Undocumented = 0 (0x00) 00000000 967 * 3D[7:0] "It's a secret" 968 * = 0 (0x00) 00000000 969 */ 970 { 0x3d, 0x00 }, 971 972 /* 973 * 3E Undocumented = 0 (0x00) 00000000 974 * 3E[7:0] "It's a secret" 975 * = 0 (0x00) 00000000 976 */ 977 { 0x3e, 0x00 }, 978 979 /* 980 * 3B FREFB "Internal Reference Adjustment" 981 * = 24 (0x18) 00011000 982 * FREFB[7:0] "Range" 983 * = 24 (0x18) 00011000 984 */ 985 { 0x3b, 0x18 }, 986 987 /* 988 * 33 CHLF "Current Control" 989 * = 25 (0x19) 00011001 990 * CHLF[7:6] "Sensor current control" 991 * = 0 (0x00) 00...... 992 * CHLF[5] "Sensor current range control" 993 * = 0 (0x00) ..0..... "normal range" 994 * CHLF[4] "Sensor current" 995 * = 1 (0x01) ...1.... "double current" 996 * CHLF[3] "Sensor buffer current control" 997 * = 1 (0x01) ....1... "half current" 998 * CHLF[2] "Column buffer current control" 999 * = 0 (0x00) .....0.. "normal current" 1000 * CHLF[1] "Analog DSP current control" 1001 * = 0 (0x00) ......0. "normal current" 1002 * CHLF[1] "ADC current control" 1003 * = 0 (0x00) ......0. "normal current" 1004 */ 1005 { 0x33, 0x19 }, 1006 1007 /* 1008 * 34 VBLM "Blooming Control" 1009 * = 90 (0x5A) 01011010 1010 * VBLM[7] "Hard soft reset switch" 1011 * = 0 (0x00) 0....... "Hard reset" 1012 * VBLM[6:4] "Blooming voltage selection" 1013 * = 5 (0x05) .101.... 1014 * VBLM[3:0] "Sensor current control" 1015 * = 10 (0x0A) ....1010 1016 */ 1017 { 0x34, 0x5a }, 1018 1019 /* 1020 * 3B FREFB "Internal Reference Adjustment" 1021 * = 0 (0x00) 00000000 1022 * FREFB[7:0] "Range" 1023 * = 0 (0x00) 00000000 1024 */ 1025 { 0x3b, 0x00 }, 1026 1027 /* 1028 * 33 CHLF "Current Control" 1029 * = 9 (0x09) 00001001 1030 * CHLF[7:6] "Sensor current control" 1031 * = 0 (0x00) 00...... 1032 * CHLF[5] "Sensor current range control" 1033 * = 0 (0x00) ..0..... "normal range" 1034 * CHLF[4] "Sensor current" 1035 * = 0 (0x00) ...0.... "normal current" 1036 * CHLF[3] "Sensor buffer current control" 1037 * = 1 (0x01) ....1... "half current" 1038 * CHLF[2] "Column buffer current control" 1039 * = 0 (0x00) .....0.. "normal current" 1040 * CHLF[1] "Analog DSP current control" 1041 * = 0 (0x00) ......0. "normal current" 1042 * CHLF[1] "ADC current control" 1043 * = 0 (0x00) ......0. "normal current" 1044 */ 1045 { 0x33, 0x09 }, 1046 1047 /* 1048 * 34 VBLM "Blooming Control" 1049 * = 80 (0x50) 01010000 1050 * VBLM[7] "Hard soft reset switch" 1051 * = 0 (0x00) 0....... "Hard reset" 1052 * VBLM[6:4] "Blooming voltage selection" 1053 * = 5 (0x05) .101.... 1054 * VBLM[3:0] "Sensor current control" 1055 * = 0 (0x00) ....0000 1056 */ 1057 { 0x34, 0x50 }, 1058 1059 /* 1060 * 12 COMH "Common Control H" 1061 * = 64 (0x40) 01000000 1062 * COMH[7] "SRST" 1063 * = 0 (0x00) 0....... "No-op" 1064 * COMH[6:4] "Resolution selection" 1065 * = 4 (0x04) .100.... "XGA" 1066 * COMH[3] "Master slave selection" 1067 * = 0 (0x00) ....0... "Master mode" 1068 * COMH[2] "Internal B/R channel option" 1069 * = 0 (0x00) .....0.. "B/R use same channel" 1070 * COMH[1] "Color bar test pattern" 1071 * = 0 (0x00) ......0. "Off" 1072 * COMH[0] "Reserved" 1073 * = 0 (0x00) .......0 1074 */ 1075 { 0x12, 0x40 }, 1076 1077 /* 1078 * 17 HREFST "Horizontal window start" 1079 * = 31 (0x1F) 00011111 1080 * HREFST[7:0] "Horizontal window start, 8 MSBs" 1081 * = 31 (0x1F) 00011111 1082 */ 1083 { 0x17, 0x1f }, 1084 1085 /* 1086 * 18 HREFEND "Horizontal window end" 1087 * = 95 (0x5F) 01011111 1088 * HREFEND[7:0] "Horizontal Window End, 8 MSBs" 1089 * = 95 (0x5F) 01011111 1090 */ 1091 { 0x18, 0x5f }, 1092 1093 /* 1094 * 19 VSTRT "Vertical window start" 1095 * = 0 (0x00) 00000000 1096 * VSTRT[7:0] "Vertical Window Start, 8 MSBs" 1097 * = 0 (0x00) 00000000 1098 */ 1099 { 0x19, 0x00 }, 1100 1101 /* 1102 * 1A VEND "Vertical window end" 1103 * = 96 (0x60) 01100000 1104 * VEND[7:0] "Vertical Window End, 8 MSBs" 1105 * = 96 (0x60) 01100000 1106 */ 1107 { 0x1a, 0x60 }, 1108 1109 /* 1110 * 32 COMM "Common Control M" 1111 * = 18 (0x12) 00010010 1112 * COMM[7:6] "Pixel clock divide option" 1113 * = 0 (0x00) 00...... "/1" 1114 * COMM[5:3] "Horizontal window end position, 3 LSBs" 1115 * = 2 (0x02) ..010... 1116 * COMM[2:0] "Horizontal window start position, 3 LSBs" 1117 * = 2 (0x02) .....010 1118 */ 1119 { 0x32, 0x12 }, 1120 1121 /* 1122 * 03 COMA "Common Control A" 1123 * = 74 (0x4A) 01001010 1124 * COMA[7:4] "AWB Update Threshold" 1125 * = 4 (0x04) 0100.... 1126 * COMA[3:2] "Vertical window end line control 2 LSBs" 1127 * = 2 (0x02) ....10.. 1128 * COMA[1:0] "Vertical window start line control 2 LSBs" 1129 * = 2 (0x02) ......10 1130 */ 1131 { 0x03, 0x4a }, 1132 1133 /* 1134 * 11 CLKRC "Clock Rate Control" 1135 * = 128 (0x80) 10000000 1136 * CLKRC[7] "Internal frequency doublers on off seclection" 1137 * = 1 (0x01) 1....... "On" 1138 * CLKRC[6] "Digital video master slave selection" 1139 * = 0 (0x00) .0...... "Master mode, sensor 1140 * provides PCLK" 1141 * CLKRC[5:0] "Clock divider { CLK = PCLK/(1+CLKRC[5:0]) }" 1142 * = 0 (0x00) ..000000 1143 */ 1144 { 0x11, 0x80 }, 1145 1146 /* 1147 * 12 COMH "Common Control H" 1148 * = 0 (0x00) 00000000 1149 * COMH[7] "SRST" 1150 * = 0 (0x00) 0....... "No-op" 1151 * COMH[6:4] "Resolution selection" 1152 * = 0 (0x00) .000.... "QXGA" 1153 * COMH[3] "Master slave selection" 1154 * = 0 (0x00) ....0... "Master mode" 1155 * COMH[2] "Internal B/R channel option" 1156 * = 0 (0x00) .....0.. "B/R use same channel" 1157 * COMH[1] "Color bar test pattern" 1158 * = 0 (0x00) ......0. "Off" 1159 * COMH[0] "Reserved" 1160 * = 0 (0x00) .......0 1161 */ 1162 { 0x12, 0x00 }, 1163 1164 /* 1165 * 12 COMH "Common Control H" 1166 * = 64 (0x40) 01000000 1167 * COMH[7] "SRST" 1168 * = 0 (0x00) 0....... "No-op" 1169 * COMH[6:4] "Resolution selection" 1170 * = 4 (0x04) .100.... "XGA" 1171 * COMH[3] "Master slave selection" 1172 * = 0 (0x00) ....0... "Master mode" 1173 * COMH[2] "Internal B/R channel option" 1174 * = 0 (0x00) .....0.. "B/R use same channel" 1175 * COMH[1] "Color bar test pattern" 1176 * = 0 (0x00) ......0. "Off" 1177 * COMH[0] "Reserved" 1178 * = 0 (0x00) .......0 1179 */ 1180 { 0x12, 0x40 }, 1181 1182 /* 1183 * 17 HREFST "Horizontal window start" 1184 * = 31 (0x1F) 00011111 1185 * HREFST[7:0] "Horizontal window start, 8 MSBs" 1186 * = 31 (0x1F) 00011111 1187 */ 1188 { 0x17, 0x1f }, 1189 1190 /* 1191 * 18 HREFEND "Horizontal window end" 1192 * = 95 (0x5F) 01011111 1193 * HREFEND[7:0] "Horizontal Window End, 8 MSBs" 1194 * = 95 (0x5F) 01011111 1195 */ 1196 { 0x18, 0x5f }, 1197 1198 /* 1199 * 19 VSTRT "Vertical window start" 1200 * = 0 (0x00) 00000000 1201 * VSTRT[7:0] "Vertical Window Start, 8 MSBs" 1202 * = 0 (0x00) 00000000 1203 */ 1204 { 0x19, 0x00 }, 1205 1206 /* 1207 * 1A VEND "Vertical window end" 1208 * = 96 (0x60) 01100000 1209 * VEND[7:0] "Vertical Window End, 8 MSBs" 1210 * = 96 (0x60) 01100000 1211 */ 1212 { 0x1a, 0x60 }, 1213 1214 /* 1215 * 32 COMM "Common Control M" 1216 * = 18 (0x12) 00010010 1217 * COMM[7:6] "Pixel clock divide option" 1218 * = 0 (0x00) 00...... "/1" 1219 * COMM[5:3] "Horizontal window end position, 3 LSBs" 1220 * = 2 (0x02) ..010... 1221 * COMM[2:0] "Horizontal window start position, 3 LSBs" 1222 * = 2 (0x02) .....010 1223 */ 1224 { 0x32, 0x12 }, 1225 1226 /* 1227 * 03 COMA "Common Control A" 1228 * = 74 (0x4A) 01001010 1229 * COMA[7:4] "AWB Update Threshold" 1230 * = 4 (0x04) 0100.... 1231 * COMA[3:2] "Vertical window end line control 2 LSBs" 1232 * = 2 (0x02) ....10.. 1233 * COMA[1:0] "Vertical window start line control 2 LSBs" 1234 * = 2 (0x02) ......10 1235 */ 1236 { 0x03, 0x4a }, 1237 1238 /* 1239 * 02 RED "Red Gain Control" 1240 * = 175 (0xAF) 10101111 1241 * RED[7] "Action" 1242 * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))" 1243 * RED[6:0] "Value" 1244 * = 47 (0x2F) .0101111 1245 */ 1246 { 0x02, 0xaf }, 1247 1248 /* 1249 * 2D ADDVSL "VSYNC Pulse Width" 1250 * = 210 (0xD2) 11010010 1251 * ADDVSL[7:0] "VSYNC pulse width, LSB" 1252 * = 210 (0xD2) 11010010 1253 */ 1254 { 0x2d, 0xd2 }, 1255 1256 /* 1257 * 00 GAIN = 24 (0x18) 00011000 1258 * GAIN[7:6] "Reserved" 1259 * = 0 (0x00) 00...... 1260 * GAIN[5] "Double" 1261 * = 0 (0x00) ..0..... "False" 1262 * GAIN[4] "Double" 1263 * = 1 (0x01) ...1.... "True" 1264 * GAIN[3:0] "Range" 1265 * = 8 (0x08) ....1000 1266 */ 1267 { 0x00, 0x18 }, 1268 1269 /* 1270 * 01 BLUE "Blue Gain Control" 1271 * = 240 (0xF0) 11110000 1272 * BLUE[7] "Action" 1273 * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))" 1274 * BLUE[6:0] "Value" 1275 * = 112 (0x70) .1110000 1276 */ 1277 { 0x01, 0xf0 }, 1278 1279 /* 1280 * 10 AEC "Automatic Exposure Control" 1281 * = 10 (0x0A) 00001010 1282 * AEC[7:0] "Automatic Exposure Control, 8 MSBs" 1283 * = 10 (0x0A) 00001010 1284 */ 1285 { 0x10, 0x0a }, 1286 1287 { 0xe1, 0x67 }, 1288 { 0xe3, 0x03 }, 1289 { 0xe4, 0x26 }, 1290 { 0xe5, 0x3e }, 1291 { 0xf8, 0x01 }, 1292 { 0xff, 0x01 }, 1293 }; 1294 1295 static const struct ov_i2c_regvals norm_6x20[] = { 1296 { 0x12, 0x80 }, /* reset */ 1297 { 0x11, 0x01 }, 1298 { 0x03, 0x60 }, 1299 { 0x05, 0x7f }, /* For when autoadjust is off */ 1300 { 0x07, 0xa8 }, 1301 /* The ratio of 0x0c and 0x0d controls the white point */ 1302 { 0x0c, 0x24 }, 1303 { 0x0d, 0x24 }, 1304 { 0x0f, 0x15 }, /* COMS */ 1305 { 0x10, 0x75 }, /* AEC Exposure time */ 1306 { 0x12, 0x24 }, /* Enable AGC */ 1307 { 0x14, 0x04 }, 1308 /* 0x16: 0x06 helps frame stability with moving objects */ 1309 { 0x16, 0x06 }, 1310 /* { 0x20, 0x30 }, * Aperture correction enable */ 1311 { 0x26, 0xb2 }, /* BLC enable */ 1312 /* 0x28: 0x05 Selects RGB format if RGB on */ 1313 { 0x28, 0x05 }, 1314 { 0x2a, 0x04 }, /* Disable framerate adjust */ 1315 /* { 0x2b, 0xac }, * Framerate; Set 2a[7] first */ 1316 { 0x2d, 0x85 }, 1317 { 0x33, 0xa0 }, /* Color Processing Parameter */ 1318 { 0x34, 0xd2 }, /* Max A/D range */ 1319 { 0x38, 0x8b }, 1320 { 0x39, 0x40 }, 1321 1322 { 0x3c, 0x39 }, /* Enable AEC mode changing */ 1323 { 0x3c, 0x3c }, /* Change AEC mode */ 1324 { 0x3c, 0x24 }, /* Disable AEC mode changing */ 1325 1326 { 0x3d, 0x80 }, 1327 /* These next two registers (0x4a, 0x4b) are undocumented. 1328 * They control the color balance */ 1329 { 0x4a, 0x80 }, 1330 { 0x4b, 0x80 }, 1331 { 0x4d, 0xd2 }, /* This reduces noise a bit */ 1332 { 0x4e, 0xc1 }, 1333 { 0x4f, 0x04 }, 1334 /* Do 50-53 have any effect? */ 1335 /* Toggle 0x12[2] off and on here? */ 1336 }; 1337 1338 static const struct ov_i2c_regvals norm_6x30[] = { 1339 { 0x12, 0x80 }, /* Reset */ 1340 { 0x00, 0x1f }, /* Gain */ 1341 { 0x01, 0x99 }, /* Blue gain */ 1342 { 0x02, 0x7c }, /* Red gain */ 1343 { 0x03, 0xc0 }, /* Saturation */ 1344 { 0x05, 0x0a }, /* Contrast */ 1345 { 0x06, 0x95 }, /* Brightness */ 1346 { 0x07, 0x2d }, /* Sharpness */ 1347 { 0x0c, 0x20 }, 1348 { 0x0d, 0x20 }, 1349 { 0x0e, 0xa0 }, /* Was 0x20, bit7 enables a 2x gain which we need */ 1350 { 0x0f, 0x05 }, 1351 { 0x10, 0x9a }, 1352 { 0x11, 0x00 }, /* Pixel clock = fastest */ 1353 { 0x12, 0x24 }, /* Enable AGC and AWB */ 1354 { 0x13, 0x21 }, 1355 { 0x14, 0x80 }, 1356 { 0x15, 0x01 }, 1357 { 0x16, 0x03 }, 1358 { 0x17, 0x38 }, 1359 { 0x18, 0xea }, 1360 { 0x19, 0x04 }, 1361 { 0x1a, 0x93 }, 1362 { 0x1b, 0x00 }, 1363 { 0x1e, 0xc4 }, 1364 { 0x1f, 0x04 }, 1365 { 0x20, 0x20 }, 1366 { 0x21, 0x10 }, 1367 { 0x22, 0x88 }, 1368 { 0x23, 0xc0 }, /* Crystal circuit power level */ 1369 { 0x25, 0x9a }, /* Increase AEC black ratio */ 1370 { 0x26, 0xb2 }, /* BLC enable */ 1371 { 0x27, 0xa2 }, 1372 { 0x28, 0x00 }, 1373 { 0x29, 0x00 }, 1374 { 0x2a, 0x84 }, /* 60 Hz power */ 1375 { 0x2b, 0xa8 }, /* 60 Hz power */ 1376 { 0x2c, 0xa0 }, 1377 { 0x2d, 0x95 }, /* Enable auto-brightness */ 1378 { 0x2e, 0x88 }, 1379 { 0x33, 0x26 }, 1380 { 0x34, 0x03 }, 1381 { 0x36, 0x8f }, 1382 { 0x37, 0x80 }, 1383 { 0x38, 0x83 }, 1384 { 0x39, 0x80 }, 1385 { 0x3a, 0x0f }, 1386 { 0x3b, 0x3c }, 1387 { 0x3c, 0x1a }, 1388 { 0x3d, 0x80 }, 1389 { 0x3e, 0x80 }, 1390 { 0x3f, 0x0e }, 1391 { 0x40, 0x00 }, /* White bal */ 1392 { 0x41, 0x00 }, /* White bal */ 1393 { 0x42, 0x80 }, 1394 { 0x43, 0x3f }, /* White bal */ 1395 { 0x44, 0x80 }, 1396 { 0x45, 0x20 }, 1397 { 0x46, 0x20 }, 1398 { 0x47, 0x80 }, 1399 { 0x48, 0x7f }, 1400 { 0x49, 0x00 }, 1401 { 0x4a, 0x00 }, 1402 { 0x4b, 0x80 }, 1403 { 0x4c, 0xd0 }, 1404 { 0x4d, 0x10 }, /* U = 0.563u, V = 0.714v */ 1405 { 0x4e, 0x40 }, 1406 { 0x4f, 0x07 }, /* UV avg., col. killer: max */ 1407 { 0x50, 0xff }, 1408 { 0x54, 0x23 }, /* Max AGC gain: 18dB */ 1409 { 0x55, 0xff }, 1410 { 0x56, 0x12 }, 1411 { 0x57, 0x81 }, 1412 { 0x58, 0x75 }, 1413 { 0x59, 0x01 }, /* AGC dark current comp.: +1 */ 1414 { 0x5a, 0x2c }, 1415 { 0x5b, 0x0f }, /* AWB chrominance levels */ 1416 { 0x5c, 0x10 }, 1417 { 0x3d, 0x80 }, 1418 { 0x27, 0xa6 }, 1419 { 0x12, 0x20 }, /* Toggle AWB */ 1420 { 0x12, 0x24 }, 1421 }; 1422 1423 /* Lawrence Glaister <lg@jfm.bc.ca> reports: 1424 * 1425 * Register 0x0f in the 7610 has the following effects: 1426 * 1427 * 0x85 (AEC method 1): Best overall, good contrast range 1428 * 0x45 (AEC method 2): Very overexposed 1429 * 0xa5 (spec sheet default): Ok, but the black level is 1430 * shifted resulting in loss of contrast 1431 * 0x05 (old driver setting): very overexposed, too much 1432 * contrast 1433 */ 1434 static const struct ov_i2c_regvals norm_7610[] = { 1435 { 0x10, 0xff }, 1436 { 0x16, 0x06 }, 1437 { 0x28, 0x24 }, 1438 { 0x2b, 0xac }, 1439 { 0x12, 0x00 }, 1440 { 0x38, 0x81 }, 1441 { 0x28, 0x24 }, /* 0c */ 1442 { 0x0f, 0x85 }, /* lg's setting */ 1443 { 0x15, 0x01 }, 1444 { 0x20, 0x1c }, 1445 { 0x23, 0x2a }, 1446 { 0x24, 0x10 }, 1447 { 0x25, 0x8a }, 1448 { 0x26, 0xa2 }, 1449 { 0x27, 0xc2 }, 1450 { 0x2a, 0x04 }, 1451 { 0x2c, 0xfe }, 1452 { 0x2d, 0x93 }, 1453 { 0x30, 0x71 }, 1454 { 0x31, 0x60 }, 1455 { 0x32, 0x26 }, 1456 { 0x33, 0x20 }, 1457 { 0x34, 0x48 }, 1458 { 0x12, 0x24 }, 1459 { 0x11, 0x01 }, 1460 { 0x0c, 0x24 }, 1461 { 0x0d, 0x24 }, 1462 }; 1463 1464 static const struct ov_i2c_regvals norm_7620[] = { 1465 { 0x12, 0x80 }, /* reset */ 1466 { 0x00, 0x00 }, /* gain */ 1467 { 0x01, 0x80 }, /* blue gain */ 1468 { 0x02, 0x80 }, /* red gain */ 1469 { 0x03, 0xc0 }, /* OV7670_R03_VREF */ 1470 { 0x06, 0x60 }, 1471 { 0x07, 0x00 }, 1472 { 0x0c, 0x24 }, 1473 { 0x0c, 0x24 }, 1474 { 0x0d, 0x24 }, 1475 { 0x11, 0x01 }, 1476 { 0x12, 0x24 }, 1477 { 0x13, 0x01 }, 1478 { 0x14, 0x84 }, 1479 { 0x15, 0x01 }, 1480 { 0x16, 0x03 }, 1481 { 0x17, 0x2f }, 1482 { 0x18, 0xcf }, 1483 { 0x19, 0x06 }, 1484 { 0x1a, 0xf5 }, 1485 { 0x1b, 0x00 }, 1486 { 0x20, 0x18 }, 1487 { 0x21, 0x80 }, 1488 { 0x22, 0x80 }, 1489 { 0x23, 0x00 }, 1490 { 0x26, 0xa2 }, 1491 { 0x27, 0xea }, 1492 { 0x28, 0x22 }, /* Was 0x20, bit1 enables a 2x gain which we need */ 1493 { 0x29, 0x00 }, 1494 { 0x2a, 0x10 }, 1495 { 0x2b, 0x00 }, 1496 { 0x2c, 0x88 }, 1497 { 0x2d, 0x91 }, 1498 { 0x2e, 0x80 }, 1499 { 0x2f, 0x44 }, 1500 { 0x60, 0x27 }, 1501 { 0x61, 0x02 }, 1502 { 0x62, 0x5f }, 1503 { 0x63, 0xd5 }, 1504 { 0x64, 0x57 }, 1505 { 0x65, 0x83 }, 1506 { 0x66, 0x55 }, 1507 { 0x67, 0x92 }, 1508 { 0x68, 0xcf }, 1509 { 0x69, 0x76 }, 1510 { 0x6a, 0x22 }, 1511 { 0x6b, 0x00 }, 1512 { 0x6c, 0x02 }, 1513 { 0x6d, 0x44 }, 1514 { 0x6e, 0x80 }, 1515 { 0x6f, 0x1d }, 1516 { 0x70, 0x8b }, 1517 { 0x71, 0x00 }, 1518 { 0x72, 0x14 }, 1519 { 0x73, 0x54 }, 1520 { 0x74, 0x00 }, 1521 { 0x75, 0x8e }, 1522 { 0x76, 0x00 }, 1523 { 0x77, 0xff }, 1524 { 0x78, 0x80 }, 1525 { 0x79, 0x80 }, 1526 { 0x7a, 0x80 }, 1527 { 0x7b, 0xe2 }, 1528 { 0x7c, 0x00 }, 1529 }; 1530 1531 /* 7640 and 7648. The defaults should be OK for most registers. */ 1532 static const struct ov_i2c_regvals norm_7640[] = { 1533 { 0x12, 0x80 }, 1534 { 0x12, 0x14 }, 1535 }; 1536 1537 static const struct ov_regvals init_519_ov7660[] = { 1538 { 0x5d, 0x03 }, /* Turn off suspend mode */ 1539 { 0x53, 0x9b }, /* 0x9f enables the (unused) microcontroller */ 1540 { 0x54, 0x0f }, /* bit2 (jpeg enable) */ 1541 { 0xa2, 0x20 }, /* a2-a5 are undocumented */ 1542 { 0xa3, 0x18 }, 1543 { 0xa4, 0x04 }, 1544 { 0xa5, 0x28 }, 1545 { 0x37, 0x00 }, /* SetUsbInit */ 1546 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */ 1547 /* Enable both fields, YUV Input, disable defect comp (why?) */ 1548 { 0x20, 0x0c }, /* 0x0d does U <-> V swap */ 1549 { 0x21, 0x38 }, 1550 { 0x22, 0x1d }, 1551 { 0x17, 0x50 }, /* undocumented */ 1552 { 0x37, 0x00 }, /* undocumented */ 1553 { 0x40, 0xff }, /* I2C timeout counter */ 1554 { 0x46, 0x00 }, /* I2C clock prescaler */ 1555 }; 1556 static const struct ov_i2c_regvals norm_7660[] = { 1557 {OV7670_R12_COM7, OV7670_COM7_RESET}, 1558 {OV7670_R11_CLKRC, 0x81}, 1559 {0x92, 0x00}, /* DM_LNL */ 1560 {0x93, 0x00}, /* DM_LNH */ 1561 {0x9d, 0x4c}, /* BD50ST */ 1562 {0x9e, 0x3f}, /* BD60ST */ 1563 {OV7670_R3B_COM11, 0x02}, 1564 {OV7670_R13_COM8, 0xf5}, 1565 {OV7670_R10_AECH, 0x00}, 1566 {OV7670_R00_GAIN, 0x00}, 1567 {OV7670_R01_BLUE, 0x7c}, 1568 {OV7670_R02_RED, 0x9d}, 1569 {OV7670_R12_COM7, 0x00}, 1570 {OV7670_R04_COM1, 00}, 1571 {OV7670_R18_HSTOP, 0x01}, 1572 {OV7670_R17_HSTART, 0x13}, 1573 {OV7670_R32_HREF, 0x92}, 1574 {OV7670_R19_VSTART, 0x02}, 1575 {OV7670_R1A_VSTOP, 0x7a}, 1576 {OV7670_R03_VREF, 0x00}, 1577 {OV7670_R0E_COM5, 0x04}, 1578 {OV7670_R0F_COM6, 0x62}, 1579 {OV7670_R15_COM10, 0x00}, 1580 {0x16, 0x02}, /* RSVD */ 1581 {0x1b, 0x00}, /* PSHFT */ 1582 {OV7670_R1E_MVFP, 0x01}, 1583 {0x29, 0x3c}, /* RSVD */ 1584 {0x33, 0x00}, /* CHLF */ 1585 {0x34, 0x07}, /* ARBLM */ 1586 {0x35, 0x84}, /* RSVD */ 1587 {0x36, 0x00}, /* RSVD */ 1588 {0x37, 0x04}, /* ADC */ 1589 {0x39, 0x43}, /* OFON */ 1590 {OV7670_R3A_TSLB, 0x00}, 1591 {OV7670_R3C_COM12, 0x6c}, 1592 {OV7670_R3D_COM13, 0x98}, 1593 {OV7670_R3F_EDGE, 0x23}, 1594 {OV7670_R40_COM15, 0xc1}, 1595 {OV7670_R41_COM16, 0x22}, 1596 {0x6b, 0x0a}, /* DBLV */ 1597 {0xa1, 0x08}, /* RSVD */ 1598 {0x69, 0x80}, /* HV */ 1599 {0x43, 0xf0}, /* RSVD.. */ 1600 {0x44, 0x10}, 1601 {0x45, 0x78}, 1602 {0x46, 0xa8}, 1603 {0x47, 0x60}, 1604 {0x48, 0x80}, 1605 {0x59, 0xba}, 1606 {0x5a, 0x9a}, 1607 {0x5b, 0x22}, 1608 {0x5c, 0xb9}, 1609 {0x5d, 0x9b}, 1610 {0x5e, 0x10}, 1611 {0x5f, 0xe0}, 1612 {0x60, 0x85}, 1613 {0x61, 0x60}, 1614 {0x9f, 0x9d}, /* RSVD */ 1615 {0xa0, 0xa0}, /* DSPC2 */ 1616 {0x4f, 0x60}, /* matrix */ 1617 {0x50, 0x64}, 1618 {0x51, 0x04}, 1619 {0x52, 0x18}, 1620 {0x53, 0x3c}, 1621 {0x54, 0x54}, 1622 {0x55, 0x40}, 1623 {0x56, 0x40}, 1624 {0x57, 0x40}, 1625 {0x58, 0x0d}, /* matrix sign */ 1626 {0x8b, 0xcc}, /* RSVD */ 1627 {0x8c, 0xcc}, 1628 {0x8d, 0xcf}, 1629 {0x6c, 0x40}, /* gamma curve */ 1630 {0x6d, 0xe0}, 1631 {0x6e, 0xa0}, 1632 {0x6f, 0x80}, 1633 {0x70, 0x70}, 1634 {0x71, 0x80}, 1635 {0x72, 0x60}, 1636 {0x73, 0x60}, 1637 {0x74, 0x50}, 1638 {0x75, 0x40}, 1639 {0x76, 0x38}, 1640 {0x77, 0x3c}, 1641 {0x78, 0x32}, 1642 {0x79, 0x1a}, 1643 {0x7a, 0x28}, 1644 {0x7b, 0x24}, 1645 {0x7c, 0x04}, /* gamma curve */ 1646 {0x7d, 0x12}, 1647 {0x7e, 0x26}, 1648 {0x7f, 0x46}, 1649 {0x80, 0x54}, 1650 {0x81, 0x64}, 1651 {0x82, 0x70}, 1652 {0x83, 0x7c}, 1653 {0x84, 0x86}, 1654 {0x85, 0x8e}, 1655 {0x86, 0x9c}, 1656 {0x87, 0xab}, 1657 {0x88, 0xc4}, 1658 {0x89, 0xd1}, 1659 {0x8a, 0xe5}, 1660 {OV7670_R14_COM9, 0x1e}, 1661 {OV7670_R24_AEW, 0x80}, 1662 {OV7670_R25_AEB, 0x72}, 1663 {OV7670_R26_VPT, 0xb3}, 1664 {0x62, 0x80}, /* LCC1 */ 1665 {0x63, 0x80}, /* LCC2 */ 1666 {0x64, 0x06}, /* LCC3 */ 1667 {0x65, 0x00}, /* LCC4 */ 1668 {0x66, 0x01}, /* LCC5 */ 1669 {0x94, 0x0e}, /* RSVD.. */ 1670 {0x95, 0x14}, 1671 {OV7670_R13_COM8, OV7670_COM8_FASTAEC 1672 | OV7670_COM8_AECSTEP 1673 | OV7670_COM8_BFILT 1674 | 0x10 1675 | OV7670_COM8_AGC 1676 | OV7670_COM8_AWB 1677 | OV7670_COM8_AEC}, 1678 {0xa1, 0xc8} 1679 }; 1680 static const struct ov_i2c_regvals norm_9600[] = { 1681 {0x12, 0x80}, 1682 {0x0c, 0x28}, 1683 {0x11, 0x80}, 1684 {0x13, 0xb5}, 1685 {0x14, 0x3e}, 1686 {0x1b, 0x04}, 1687 {0x24, 0xb0}, 1688 {0x25, 0x90}, 1689 {0x26, 0x94}, 1690 {0x35, 0x90}, 1691 {0x37, 0x07}, 1692 {0x38, 0x08}, 1693 {0x01, 0x8e}, 1694 {0x02, 0x85} 1695 }; 1696 1697 /* 7670. Defaults taken from OmniVision provided data, 1698 * as provided by Jonathan Corbet of OLPC */ 1699 static const struct ov_i2c_regvals norm_7670[] = { 1700 { OV7670_R12_COM7, OV7670_COM7_RESET }, 1701 { OV7670_R3A_TSLB, 0x04 }, /* OV */ 1702 { OV7670_R12_COM7, OV7670_COM7_FMT_VGA }, /* VGA */ 1703 { OV7670_R11_CLKRC, 0x01 }, 1704 /* 1705 * Set the hardware window. These values from OV don't entirely 1706 * make sense - hstop is less than hstart. But they work... 1707 */ 1708 { OV7670_R17_HSTART, 0x13 }, 1709 { OV7670_R18_HSTOP, 0x01 }, 1710 { OV7670_R32_HREF, 0xb6 }, 1711 { OV7670_R19_VSTART, 0x02 }, 1712 { OV7670_R1A_VSTOP, 0x7a }, 1713 { OV7670_R03_VREF, 0x0a }, 1714 1715 { OV7670_R0C_COM3, 0x00 }, 1716 { OV7670_R3E_COM14, 0x00 }, 1717 /* Mystery scaling numbers */ 1718 { 0x70, 0x3a }, 1719 { 0x71, 0x35 }, 1720 { 0x72, 0x11 }, 1721 { 0x73, 0xf0 }, 1722 { 0xa2, 0x02 }, 1723 /* { OV7670_R15_COM10, 0x0 }, */ 1724 1725 /* Gamma curve values */ 1726 { 0x7a, 0x20 }, 1727 { 0x7b, 0x10 }, 1728 { 0x7c, 0x1e }, 1729 { 0x7d, 0x35 }, 1730 { 0x7e, 0x5a }, 1731 { 0x7f, 0x69 }, 1732 { 0x80, 0x76 }, 1733 { 0x81, 0x80 }, 1734 { 0x82, 0x88 }, 1735 { 0x83, 0x8f }, 1736 { 0x84, 0x96 }, 1737 { 0x85, 0xa3 }, 1738 { 0x86, 0xaf }, 1739 { 0x87, 0xc4 }, 1740 { 0x88, 0xd7 }, 1741 { 0x89, 0xe8 }, 1742 1743 /* AGC and AEC parameters. Note we start by disabling those features, 1744 then turn them only after tweaking the values. */ 1745 { OV7670_R13_COM8, OV7670_COM8_FASTAEC 1746 | OV7670_COM8_AECSTEP 1747 | OV7670_COM8_BFILT }, 1748 { OV7670_R00_GAIN, 0x00 }, 1749 { OV7670_R10_AECH, 0x00 }, 1750 { OV7670_R0D_COM4, 0x40 }, /* magic reserved bit */ 1751 { OV7670_R14_COM9, 0x18 }, /* 4x gain + magic rsvd bit */ 1752 { OV7670_RA5_BD50MAX, 0x05 }, 1753 { OV7670_RAB_BD60MAX, 0x07 }, 1754 { OV7670_R24_AEW, 0x95 }, 1755 { OV7670_R25_AEB, 0x33 }, 1756 { OV7670_R26_VPT, 0xe3 }, 1757 { OV7670_R9F_HAECC1, 0x78 }, 1758 { OV7670_RA0_HAECC2, 0x68 }, 1759 { 0xa1, 0x03 }, /* magic */ 1760 { OV7670_RA6_HAECC3, 0xd8 }, 1761 { OV7670_RA7_HAECC4, 0xd8 }, 1762 { OV7670_RA8_HAECC5, 0xf0 }, 1763 { OV7670_RA9_HAECC6, 0x90 }, 1764 { OV7670_RAA_HAECC7, 0x94 }, 1765 { OV7670_R13_COM8, OV7670_COM8_FASTAEC 1766 | OV7670_COM8_AECSTEP 1767 | OV7670_COM8_BFILT 1768 | OV7670_COM8_AGC 1769 | OV7670_COM8_AEC }, 1770 1771 /* Almost all of these are magic "reserved" values. */ 1772 { OV7670_R0E_COM5, 0x61 }, 1773 { OV7670_R0F_COM6, 0x4b }, 1774 { 0x16, 0x02 }, 1775 { OV7670_R1E_MVFP, 0x07 }, 1776 { 0x21, 0x02 }, 1777 { 0x22, 0x91 }, 1778 { 0x29, 0x07 }, 1779 { 0x33, 0x0b }, 1780 { 0x35, 0x0b }, 1781 { 0x37, 0x1d }, 1782 { 0x38, 0x71 }, 1783 { 0x39, 0x2a }, 1784 { OV7670_R3C_COM12, 0x78 }, 1785 { 0x4d, 0x40 }, 1786 { 0x4e, 0x20 }, 1787 { OV7670_R69_GFIX, 0x00 }, 1788 { 0x6b, 0x4a }, 1789 { 0x74, 0x10 }, 1790 { 0x8d, 0x4f }, 1791 { 0x8e, 0x00 }, 1792 { 0x8f, 0x00 }, 1793 { 0x90, 0x00 }, 1794 { 0x91, 0x00 }, 1795 { 0x96, 0x00 }, 1796 { 0x9a, 0x00 }, 1797 { 0xb0, 0x84 }, 1798 { 0xb1, 0x0c }, 1799 { 0xb2, 0x0e }, 1800 { 0xb3, 0x82 }, 1801 { 0xb8, 0x0a }, 1802 1803 /* More reserved magic, some of which tweaks white balance */ 1804 { 0x43, 0x0a }, 1805 { 0x44, 0xf0 }, 1806 { 0x45, 0x34 }, 1807 { 0x46, 0x58 }, 1808 { 0x47, 0x28 }, 1809 { 0x48, 0x3a }, 1810 { 0x59, 0x88 }, 1811 { 0x5a, 0x88 }, 1812 { 0x5b, 0x44 }, 1813 { 0x5c, 0x67 }, 1814 { 0x5d, 0x49 }, 1815 { 0x5e, 0x0e }, 1816 { 0x6c, 0x0a }, 1817 { 0x6d, 0x55 }, 1818 { 0x6e, 0x11 }, 1819 { 0x6f, 0x9f }, /* "9e for advance AWB" */ 1820 { 0x6a, 0x40 }, 1821 { OV7670_R01_BLUE, 0x40 }, 1822 { OV7670_R02_RED, 0x60 }, 1823 { OV7670_R13_COM8, OV7670_COM8_FASTAEC 1824 | OV7670_COM8_AECSTEP 1825 | OV7670_COM8_BFILT 1826 | OV7670_COM8_AGC 1827 | OV7670_COM8_AEC 1828 | OV7670_COM8_AWB }, 1829 1830 /* Matrix coefficients */ 1831 { 0x4f, 0x80 }, 1832 { 0x50, 0x80 }, 1833 { 0x51, 0x00 }, 1834 { 0x52, 0x22 }, 1835 { 0x53, 0x5e }, 1836 { 0x54, 0x80 }, 1837 { 0x58, 0x9e }, 1838 1839 { OV7670_R41_COM16, OV7670_COM16_AWBGAIN }, 1840 { OV7670_R3F_EDGE, 0x00 }, 1841 { 0x75, 0x05 }, 1842 { 0x76, 0xe1 }, 1843 { 0x4c, 0x00 }, 1844 { 0x77, 0x01 }, 1845 { OV7670_R3D_COM13, OV7670_COM13_GAMMA 1846 | OV7670_COM13_UVSAT 1847 | 2}, /* was 3 */ 1848 { 0x4b, 0x09 }, 1849 { 0xc9, 0x60 }, 1850 { OV7670_R41_COM16, 0x38 }, 1851 { 0x56, 0x40 }, 1852 1853 { 0x34, 0x11 }, 1854 { OV7670_R3B_COM11, OV7670_COM11_EXP|OV7670_COM11_HZAUTO }, 1855 { 0xa4, 0x88 }, 1856 { 0x96, 0x00 }, 1857 { 0x97, 0x30 }, 1858 { 0x98, 0x20 }, 1859 { 0x99, 0x30 }, 1860 { 0x9a, 0x84 }, 1861 { 0x9b, 0x29 }, 1862 { 0x9c, 0x03 }, 1863 { 0x9d, 0x4c }, 1864 { 0x9e, 0x3f }, 1865 { 0x78, 0x04 }, 1866 1867 /* Extra-weird stuff. Some sort of multiplexor register */ 1868 { 0x79, 0x01 }, 1869 { 0xc8, 0xf0 }, 1870 { 0x79, 0x0f }, 1871 { 0xc8, 0x00 }, 1872 { 0x79, 0x10 }, 1873 { 0xc8, 0x7e }, 1874 { 0x79, 0x0a }, 1875 { 0xc8, 0x80 }, 1876 { 0x79, 0x0b }, 1877 { 0xc8, 0x01 }, 1878 { 0x79, 0x0c }, 1879 { 0xc8, 0x0f }, 1880 { 0x79, 0x0d }, 1881 { 0xc8, 0x20 }, 1882 { 0x79, 0x09 }, 1883 { 0xc8, 0x80 }, 1884 { 0x79, 0x02 }, 1885 { 0xc8, 0xc0 }, 1886 { 0x79, 0x03 }, 1887 { 0xc8, 0x40 }, 1888 { 0x79, 0x05 }, 1889 { 0xc8, 0x30 }, 1890 { 0x79, 0x26 }, 1891 }; 1892 1893 static const struct ov_i2c_regvals norm_8610[] = { 1894 { 0x12, 0x80 }, 1895 { 0x00, 0x00 }, 1896 { 0x01, 0x80 }, 1897 { 0x02, 0x80 }, 1898 { 0x03, 0xc0 }, 1899 { 0x04, 0x30 }, 1900 { 0x05, 0x30 }, /* was 0x10, new from windrv 090403 */ 1901 { 0x06, 0x70 }, /* was 0x80, new from windrv 090403 */ 1902 { 0x0a, 0x86 }, 1903 { 0x0b, 0xb0 }, 1904 { 0x0c, 0x20 }, 1905 { 0x0d, 0x20 }, 1906 { 0x11, 0x01 }, 1907 { 0x12, 0x25 }, 1908 { 0x13, 0x01 }, 1909 { 0x14, 0x04 }, 1910 { 0x15, 0x01 }, /* Lin and Win think different about UV order */ 1911 { 0x16, 0x03 }, 1912 { 0x17, 0x38 }, /* was 0x2f, new from windrv 090403 */ 1913 { 0x18, 0xea }, /* was 0xcf, new from windrv 090403 */ 1914 { 0x19, 0x02 }, /* was 0x06, new from windrv 090403 */ 1915 { 0x1a, 0xf5 }, 1916 { 0x1b, 0x00 }, 1917 { 0x20, 0xd0 }, /* was 0x90, new from windrv 090403 */ 1918 { 0x23, 0xc0 }, /* was 0x00, new from windrv 090403 */ 1919 { 0x24, 0x30 }, /* was 0x1d, new from windrv 090403 */ 1920 { 0x25, 0x50 }, /* was 0x57, new from windrv 090403 */ 1921 { 0x26, 0xa2 }, 1922 { 0x27, 0xea }, 1923 { 0x28, 0x00 }, 1924 { 0x29, 0x00 }, 1925 { 0x2a, 0x80 }, 1926 { 0x2b, 0xc8 }, /* was 0xcc, new from windrv 090403 */ 1927 { 0x2c, 0xac }, 1928 { 0x2d, 0x45 }, /* was 0xd5, new from windrv 090403 */ 1929 { 0x2e, 0x80 }, 1930 { 0x2f, 0x14 }, /* was 0x01, new from windrv 090403 */ 1931 { 0x4c, 0x00 }, 1932 { 0x4d, 0x30 }, /* was 0x10, new from windrv 090403 */ 1933 { 0x60, 0x02 }, /* was 0x01, new from windrv 090403 */ 1934 { 0x61, 0x00 }, /* was 0x09, new from windrv 090403 */ 1935 { 0x62, 0x5f }, /* was 0xd7, new from windrv 090403 */ 1936 { 0x63, 0xff }, 1937 { 0x64, 0x53 }, /* new windrv 090403 says 0x57, 1938 * maybe that's wrong */ 1939 { 0x65, 0x00 }, 1940 { 0x66, 0x55 }, 1941 { 0x67, 0xb0 }, 1942 { 0x68, 0xc0 }, /* was 0xaf, new from windrv 090403 */ 1943 { 0x69, 0x02 }, 1944 { 0x6a, 0x22 }, 1945 { 0x6b, 0x00 }, 1946 { 0x6c, 0x99 }, /* was 0x80, old windrv says 0x00, but 1947 * deleting bit7 colors the first images red */ 1948 { 0x6d, 0x11 }, /* was 0x00, new from windrv 090403 */ 1949 { 0x6e, 0x11 }, /* was 0x00, new from windrv 090403 */ 1950 { 0x6f, 0x01 }, 1951 { 0x70, 0x8b }, 1952 { 0x71, 0x00 }, 1953 { 0x72, 0x14 }, 1954 { 0x73, 0x54 }, 1955 { 0x74, 0x00 },/* 0x60? - was 0x00, new from windrv 090403 */ 1956 { 0x75, 0x0e }, 1957 { 0x76, 0x02 }, /* was 0x02, new from windrv 090403 */ 1958 { 0x77, 0xff }, 1959 { 0x78, 0x80 }, 1960 { 0x79, 0x80 }, 1961 { 0x7a, 0x80 }, 1962 { 0x7b, 0x10 }, /* was 0x13, new from windrv 090403 */ 1963 { 0x7c, 0x00 }, 1964 { 0x7d, 0x08 }, /* was 0x09, new from windrv 090403 */ 1965 { 0x7e, 0x08 }, /* was 0xc0, new from windrv 090403 */ 1966 { 0x7f, 0xfb }, 1967 { 0x80, 0x28 }, 1968 { 0x81, 0x00 }, 1969 { 0x82, 0x23 }, 1970 { 0x83, 0x0b }, 1971 { 0x84, 0x00 }, 1972 { 0x85, 0x62 }, /* was 0x61, new from windrv 090403 */ 1973 { 0x86, 0xc9 }, 1974 { 0x87, 0x00 }, 1975 { 0x88, 0x00 }, 1976 { 0x89, 0x01 }, 1977 { 0x12, 0x20 }, 1978 { 0x12, 0x25 }, /* was 0x24, new from windrv 090403 */ 1979 }; 1980 1981 static unsigned char ov7670_abs_to_sm(unsigned char v) 1982 { 1983 if (v > 127) 1984 return v & 0x7f; 1985 return (128 - v) | 0x80; 1986 } 1987 1988 /* Write a OV519 register */ 1989 static void reg_w(struct sd *sd, u16 index, u16 value) 1990 { 1991 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd; 1992 int ret, req = 0; 1993 1994 if (sd->gspca_dev.usb_err < 0) 1995 return; 1996 1997 /* Avoid things going to fast for the bridge with a xhci host */ 1998 udelay(150); 1999 2000 switch (sd->bridge) { 2001 case BRIDGE_OV511: 2002 case BRIDGE_OV511PLUS: 2003 req = 2; 2004 break; 2005 case BRIDGE_OVFX2: 2006 req = 0x0a; 2007 /* fall through */ 2008 case BRIDGE_W9968CF: 2009 gspca_dbg(gspca_dev, D_USBO, "SET %02x %04x %04x\n", 2010 req, value, index); 2011 ret = usb_control_msg(sd->gspca_dev.dev, 2012 usb_sndctrlpipe(sd->gspca_dev.dev, 0), 2013 req, 2014 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 2015 value, index, NULL, 0, 500); 2016 goto leave; 2017 default: 2018 req = 1; 2019 } 2020 2021 gspca_dbg(gspca_dev, D_USBO, "SET %02x 0000 %04x %02x\n", 2022 req, index, value); 2023 sd->gspca_dev.usb_buf[0] = value; 2024 ret = usb_control_msg(sd->gspca_dev.dev, 2025 usb_sndctrlpipe(sd->gspca_dev.dev, 0), 2026 req, 2027 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 2028 0, index, 2029 sd->gspca_dev.usb_buf, 1, 500); 2030 leave: 2031 if (ret < 0) { 2032 gspca_err(gspca_dev, "reg_w %02x failed %d\n", index, ret); 2033 sd->gspca_dev.usb_err = ret; 2034 return; 2035 } 2036 } 2037 2038 /* Read from a OV519 register, note not valid for the w9968cf!! */ 2039 /* returns: negative is error, pos or zero is data */ 2040 static int reg_r(struct sd *sd, u16 index) 2041 { 2042 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd; 2043 int ret; 2044 int req; 2045 2046 if (sd->gspca_dev.usb_err < 0) 2047 return -1; 2048 2049 switch (sd->bridge) { 2050 case BRIDGE_OV511: 2051 case BRIDGE_OV511PLUS: 2052 req = 3; 2053 break; 2054 case BRIDGE_OVFX2: 2055 req = 0x0b; 2056 break; 2057 default: 2058 req = 1; 2059 } 2060 2061 /* Avoid things going to fast for the bridge with a xhci host */ 2062 udelay(150); 2063 ret = usb_control_msg(sd->gspca_dev.dev, 2064 usb_rcvctrlpipe(sd->gspca_dev.dev, 0), 2065 req, 2066 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 2067 0, index, sd->gspca_dev.usb_buf, 1, 500); 2068 2069 if (ret >= 0) { 2070 ret = sd->gspca_dev.usb_buf[0]; 2071 gspca_dbg(gspca_dev, D_USBI, "GET %02x 0000 %04x %02x\n", 2072 req, index, ret); 2073 } else { 2074 gspca_err(gspca_dev, "reg_r %02x failed %d\n", index, ret); 2075 sd->gspca_dev.usb_err = ret; 2076 /* 2077 * Make sure the result is zeroed to avoid uninitialized 2078 * values. 2079 */ 2080 gspca_dev->usb_buf[0] = 0; 2081 } 2082 2083 return ret; 2084 } 2085 2086 /* Read 8 values from a OV519 register */ 2087 static int reg_r8(struct sd *sd, 2088 u16 index) 2089 { 2090 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd; 2091 int ret; 2092 2093 if (sd->gspca_dev.usb_err < 0) 2094 return -1; 2095 2096 /* Avoid things going to fast for the bridge with a xhci host */ 2097 udelay(150); 2098 ret = usb_control_msg(sd->gspca_dev.dev, 2099 usb_rcvctrlpipe(sd->gspca_dev.dev, 0), 2100 1, /* REQ_IO */ 2101 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 2102 0, index, sd->gspca_dev.usb_buf, 8, 500); 2103 2104 if (ret >= 0) { 2105 ret = sd->gspca_dev.usb_buf[0]; 2106 } else { 2107 gspca_err(gspca_dev, "reg_r8 %02x failed %d\n", index, ret); 2108 sd->gspca_dev.usb_err = ret; 2109 /* 2110 * Make sure the buffer is zeroed to avoid uninitialized 2111 * values. 2112 */ 2113 memset(gspca_dev->usb_buf, 0, 8); 2114 } 2115 2116 return ret; 2117 } 2118 2119 /* 2120 * Writes bits at positions specified by mask to an OV51x reg. Bits that are in 2121 * the same position as 1's in "mask" are cleared and set to "value". Bits 2122 * that are in the same position as 0's in "mask" are preserved, regardless 2123 * of their respective state in "value". 2124 */ 2125 static void reg_w_mask(struct sd *sd, 2126 u16 index, 2127 u8 value, 2128 u8 mask) 2129 { 2130 int ret; 2131 u8 oldval; 2132 2133 if (mask != 0xff) { 2134 value &= mask; /* Enforce mask on value */ 2135 ret = reg_r(sd, index); 2136 if (ret < 0) 2137 return; 2138 2139 oldval = ret & ~mask; /* Clear the masked bits */ 2140 value |= oldval; /* Set the desired bits */ 2141 } 2142 reg_w(sd, index, value); 2143 } 2144 2145 /* 2146 * Writes multiple (n) byte value to a single register. Only valid with certain 2147 * registers (0x30 and 0xc4 - 0xce). 2148 */ 2149 static void ov518_reg_w32(struct sd *sd, u16 index, u32 value, int n) 2150 { 2151 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd; 2152 int ret; 2153 2154 if (sd->gspca_dev.usb_err < 0) 2155 return; 2156 2157 *((__le32 *) sd->gspca_dev.usb_buf) = __cpu_to_le32(value); 2158 2159 /* Avoid things going to fast for the bridge with a xhci host */ 2160 udelay(150); 2161 ret = usb_control_msg(sd->gspca_dev.dev, 2162 usb_sndctrlpipe(sd->gspca_dev.dev, 0), 2163 1 /* REG_IO */, 2164 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 2165 0, index, 2166 sd->gspca_dev.usb_buf, n, 500); 2167 if (ret < 0) { 2168 gspca_err(gspca_dev, "reg_w32 %02x failed %d\n", index, ret); 2169 sd->gspca_dev.usb_err = ret; 2170 } 2171 } 2172 2173 static void ov511_i2c_w(struct sd *sd, u8 reg, u8 value) 2174 { 2175 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd; 2176 int rc, retries; 2177 2178 gspca_dbg(gspca_dev, D_USBO, "ov511_i2c_w %02x %02x\n", reg, value); 2179 2180 /* Three byte write cycle */ 2181 for (retries = 6; ; ) { 2182 /* Select camera register */ 2183 reg_w(sd, R51x_I2C_SADDR_3, reg); 2184 2185 /* Write "value" to I2C data port of OV511 */ 2186 reg_w(sd, R51x_I2C_DATA, value); 2187 2188 /* Initiate 3-byte write cycle */ 2189 reg_w(sd, R511_I2C_CTL, 0x01); 2190 2191 do { 2192 rc = reg_r(sd, R511_I2C_CTL); 2193 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */ 2194 2195 if (rc < 0) 2196 return; 2197 2198 if ((rc & 2) == 0) /* Ack? */ 2199 break; 2200 if (--retries < 0) { 2201 gspca_dbg(gspca_dev, D_USBO, "i2c write retries exhausted\n"); 2202 return; 2203 } 2204 } 2205 } 2206 2207 static int ov511_i2c_r(struct sd *sd, u8 reg) 2208 { 2209 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd; 2210 int rc, value, retries; 2211 2212 /* Two byte write cycle */ 2213 for (retries = 6; ; ) { 2214 /* Select camera register */ 2215 reg_w(sd, R51x_I2C_SADDR_2, reg); 2216 2217 /* Initiate 2-byte write cycle */ 2218 reg_w(sd, R511_I2C_CTL, 0x03); 2219 2220 do { 2221 rc = reg_r(sd, R511_I2C_CTL); 2222 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */ 2223 2224 if (rc < 0) 2225 return rc; 2226 2227 if ((rc & 2) == 0) /* Ack? */ 2228 break; 2229 2230 /* I2C abort */ 2231 reg_w(sd, R511_I2C_CTL, 0x10); 2232 2233 if (--retries < 0) { 2234 gspca_dbg(gspca_dev, D_USBI, "i2c write retries exhausted\n"); 2235 return -1; 2236 } 2237 } 2238 2239 /* Two byte read cycle */ 2240 for (retries = 6; ; ) { 2241 /* Initiate 2-byte read cycle */ 2242 reg_w(sd, R511_I2C_CTL, 0x05); 2243 2244 do { 2245 rc = reg_r(sd, R511_I2C_CTL); 2246 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */ 2247 2248 if (rc < 0) 2249 return rc; 2250 2251 if ((rc & 2) == 0) /* Ack? */ 2252 break; 2253 2254 /* I2C abort */ 2255 reg_w(sd, R511_I2C_CTL, 0x10); 2256 2257 if (--retries < 0) { 2258 gspca_dbg(gspca_dev, D_USBI, "i2c read retries exhausted\n"); 2259 return -1; 2260 } 2261 } 2262 2263 value = reg_r(sd, R51x_I2C_DATA); 2264 2265 gspca_dbg(gspca_dev, D_USBI, "ov511_i2c_r %02x %02x\n", reg, value); 2266 2267 /* This is needed to make i2c_w() work */ 2268 reg_w(sd, R511_I2C_CTL, 0x05); 2269 2270 return value; 2271 } 2272 2273 /* 2274 * The OV518 I2C I/O procedure is different, hence, this function. 2275 * This is normally only called from i2c_w(). Note that this function 2276 * always succeeds regardless of whether the sensor is present and working. 2277 */ 2278 static void ov518_i2c_w(struct sd *sd, 2279 u8 reg, 2280 u8 value) 2281 { 2282 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd; 2283 2284 gspca_dbg(gspca_dev, D_USBO, "ov518_i2c_w %02x %02x\n", reg, value); 2285 2286 /* Select camera register */ 2287 reg_w(sd, R51x_I2C_SADDR_3, reg); 2288 2289 /* Write "value" to I2C data port of OV511 */ 2290 reg_w(sd, R51x_I2C_DATA, value); 2291 2292 /* Initiate 3-byte write cycle */ 2293 reg_w(sd, R518_I2C_CTL, 0x01); 2294 2295 /* wait for write complete */ 2296 msleep(4); 2297 reg_r8(sd, R518_I2C_CTL); 2298 } 2299 2300 /* 2301 * returns: negative is error, pos or zero is data 2302 * 2303 * The OV518 I2C I/O procedure is different, hence, this function. 2304 * This is normally only called from i2c_r(). Note that this function 2305 * always succeeds regardless of whether the sensor is present and working. 2306 */ 2307 static int ov518_i2c_r(struct sd *sd, u8 reg) 2308 { 2309 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd; 2310 int value; 2311 2312 /* Select camera register */ 2313 reg_w(sd, R51x_I2C_SADDR_2, reg); 2314 2315 /* Initiate 2-byte write cycle */ 2316 reg_w(sd, R518_I2C_CTL, 0x03); 2317 reg_r8(sd, R518_I2C_CTL); 2318 2319 /* Initiate 2-byte read cycle */ 2320 reg_w(sd, R518_I2C_CTL, 0x05); 2321 reg_r8(sd, R518_I2C_CTL); 2322 2323 value = reg_r(sd, R51x_I2C_DATA); 2324 gspca_dbg(gspca_dev, D_USBI, "ov518_i2c_r %02x %02x\n", reg, value); 2325 return value; 2326 } 2327 2328 static void ovfx2_i2c_w(struct sd *sd, u8 reg, u8 value) 2329 { 2330 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd; 2331 int ret; 2332 2333 if (sd->gspca_dev.usb_err < 0) 2334 return; 2335 2336 ret = usb_control_msg(sd->gspca_dev.dev, 2337 usb_sndctrlpipe(sd->gspca_dev.dev, 0), 2338 0x02, 2339 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 2340 (u16) value, (u16) reg, NULL, 0, 500); 2341 2342 if (ret < 0) { 2343 gspca_err(gspca_dev, "ovfx2_i2c_w %02x failed %d\n", reg, ret); 2344 sd->gspca_dev.usb_err = ret; 2345 } 2346 2347 gspca_dbg(gspca_dev, D_USBO, "ovfx2_i2c_w %02x %02x\n", reg, value); 2348 } 2349 2350 static int ovfx2_i2c_r(struct sd *sd, u8 reg) 2351 { 2352 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd; 2353 int ret; 2354 2355 if (sd->gspca_dev.usb_err < 0) 2356 return -1; 2357 2358 ret = usb_control_msg(sd->gspca_dev.dev, 2359 usb_rcvctrlpipe(sd->gspca_dev.dev, 0), 2360 0x03, 2361 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 2362 0, (u16) reg, sd->gspca_dev.usb_buf, 1, 500); 2363 2364 if (ret >= 0) { 2365 ret = sd->gspca_dev.usb_buf[0]; 2366 gspca_dbg(gspca_dev, D_USBI, "ovfx2_i2c_r %02x %02x\n", 2367 reg, ret); 2368 } else { 2369 gspca_err(gspca_dev, "ovfx2_i2c_r %02x failed %d\n", reg, ret); 2370 sd->gspca_dev.usb_err = ret; 2371 } 2372 2373 return ret; 2374 } 2375 2376 static void i2c_w(struct sd *sd, u8 reg, u8 value) 2377 { 2378 if (sd->sensor_reg_cache[reg] == value) 2379 return; 2380 2381 switch (sd->bridge) { 2382 case BRIDGE_OV511: 2383 case BRIDGE_OV511PLUS: 2384 ov511_i2c_w(sd, reg, value); 2385 break; 2386 case BRIDGE_OV518: 2387 case BRIDGE_OV518PLUS: 2388 case BRIDGE_OV519: 2389 ov518_i2c_w(sd, reg, value); 2390 break; 2391 case BRIDGE_OVFX2: 2392 ovfx2_i2c_w(sd, reg, value); 2393 break; 2394 case BRIDGE_W9968CF: 2395 w9968cf_i2c_w(sd, reg, value); 2396 break; 2397 } 2398 2399 if (sd->gspca_dev.usb_err >= 0) { 2400 /* Up on sensor reset empty the register cache */ 2401 if (reg == 0x12 && (value & 0x80)) 2402 memset(sd->sensor_reg_cache, -1, 2403 sizeof(sd->sensor_reg_cache)); 2404 else 2405 sd->sensor_reg_cache[reg] = value; 2406 } 2407 } 2408 2409 static int i2c_r(struct sd *sd, u8 reg) 2410 { 2411 int ret = -1; 2412 2413 if (sd->sensor_reg_cache[reg] != -1) 2414 return sd->sensor_reg_cache[reg]; 2415 2416 switch (sd->bridge) { 2417 case BRIDGE_OV511: 2418 case BRIDGE_OV511PLUS: 2419 ret = ov511_i2c_r(sd, reg); 2420 break; 2421 case BRIDGE_OV518: 2422 case BRIDGE_OV518PLUS: 2423 case BRIDGE_OV519: 2424 ret = ov518_i2c_r(sd, reg); 2425 break; 2426 case BRIDGE_OVFX2: 2427 ret = ovfx2_i2c_r(sd, reg); 2428 break; 2429 case BRIDGE_W9968CF: 2430 ret = w9968cf_i2c_r(sd, reg); 2431 break; 2432 } 2433 2434 if (ret >= 0) 2435 sd->sensor_reg_cache[reg] = ret; 2436 2437 return ret; 2438 } 2439 2440 /* Writes bits at positions specified by mask to an I2C reg. Bits that are in 2441 * the same position as 1's in "mask" are cleared and set to "value". Bits 2442 * that are in the same position as 0's in "mask" are preserved, regardless 2443 * of their respective state in "value". 2444 */ 2445 static void i2c_w_mask(struct sd *sd, 2446 u8 reg, 2447 u8 value, 2448 u8 mask) 2449 { 2450 int rc; 2451 u8 oldval; 2452 2453 value &= mask; /* Enforce mask on value */ 2454 rc = i2c_r(sd, reg); 2455 if (rc < 0) 2456 return; 2457 oldval = rc & ~mask; /* Clear the masked bits */ 2458 value |= oldval; /* Set the desired bits */ 2459 i2c_w(sd, reg, value); 2460 } 2461 2462 /* Temporarily stops OV511 from functioning. Must do this before changing 2463 * registers while the camera is streaming */ 2464 static inline void ov51x_stop(struct sd *sd) 2465 { 2466 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd; 2467 2468 gspca_dbg(gspca_dev, D_STREAM, "stopping\n"); 2469 sd->stopped = 1; 2470 switch (sd->bridge) { 2471 case BRIDGE_OV511: 2472 case BRIDGE_OV511PLUS: 2473 reg_w(sd, R51x_SYS_RESET, 0x3d); 2474 break; 2475 case BRIDGE_OV518: 2476 case BRIDGE_OV518PLUS: 2477 reg_w_mask(sd, R51x_SYS_RESET, 0x3a, 0x3a); 2478 break; 2479 case BRIDGE_OV519: 2480 reg_w(sd, OV519_R51_RESET1, 0x0f); 2481 reg_w(sd, OV519_R51_RESET1, 0x00); 2482 reg_w(sd, 0x22, 0x00); /* FRAR */ 2483 break; 2484 case BRIDGE_OVFX2: 2485 reg_w_mask(sd, 0x0f, 0x00, 0x02); 2486 break; 2487 case BRIDGE_W9968CF: 2488 reg_w(sd, 0x3c, 0x0a05); /* stop USB transfer */ 2489 break; 2490 } 2491 } 2492 2493 /* Restarts OV511 after ov511_stop() is called. Has no effect if it is not 2494 * actually stopped (for performance). */ 2495 static inline void ov51x_restart(struct sd *sd) 2496 { 2497 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd; 2498 2499 gspca_dbg(gspca_dev, D_STREAM, "restarting\n"); 2500 if (!sd->stopped) 2501 return; 2502 sd->stopped = 0; 2503 2504 /* Reinitialize the stream */ 2505 switch (sd->bridge) { 2506 case BRIDGE_OV511: 2507 case BRIDGE_OV511PLUS: 2508 reg_w(sd, R51x_SYS_RESET, 0x00); 2509 break; 2510 case BRIDGE_OV518: 2511 case BRIDGE_OV518PLUS: 2512 reg_w(sd, 0x2f, 0x80); 2513 reg_w(sd, R51x_SYS_RESET, 0x00); 2514 break; 2515 case BRIDGE_OV519: 2516 reg_w(sd, OV519_R51_RESET1, 0x0f); 2517 reg_w(sd, OV519_R51_RESET1, 0x00); 2518 reg_w(sd, 0x22, 0x1d); /* FRAR */ 2519 break; 2520 case BRIDGE_OVFX2: 2521 reg_w_mask(sd, 0x0f, 0x02, 0x02); 2522 break; 2523 case BRIDGE_W9968CF: 2524 reg_w(sd, 0x3c, 0x8a05); /* USB FIFO enable */ 2525 break; 2526 } 2527 } 2528 2529 static void ov51x_set_slave_ids(struct sd *sd, u8 slave); 2530 2531 /* This does an initial reset of an OmniVision sensor and ensures that I2C 2532 * is synchronized. Returns <0 on failure. 2533 */ 2534 static int init_ov_sensor(struct sd *sd, u8 slave) 2535 { 2536 int i; 2537 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd; 2538 2539 ov51x_set_slave_ids(sd, slave); 2540 2541 /* Reset the sensor */ 2542 i2c_w(sd, 0x12, 0x80); 2543 2544 /* Wait for it to initialize */ 2545 msleep(150); 2546 2547 for (i = 0; i < i2c_detect_tries; i++) { 2548 if (i2c_r(sd, OV7610_REG_ID_HIGH) == 0x7f && 2549 i2c_r(sd, OV7610_REG_ID_LOW) == 0xa2) { 2550 gspca_dbg(gspca_dev, D_PROBE, "I2C synced in %d attempt(s)\n", 2551 i); 2552 return 0; 2553 } 2554 2555 /* Reset the sensor */ 2556 i2c_w(sd, 0x12, 0x80); 2557 2558 /* Wait for it to initialize */ 2559 msleep(150); 2560 2561 /* Dummy read to sync I2C */ 2562 if (i2c_r(sd, 0x00) < 0) 2563 return -1; 2564 } 2565 return -1; 2566 } 2567 2568 /* Set the read and write slave IDs. The "slave" argument is the write slave, 2569 * and the read slave will be set to (slave + 1). 2570 * This should not be called from outside the i2c I/O functions. 2571 * Sets I2C read and write slave IDs. Returns <0 for error 2572 */ 2573 static void ov51x_set_slave_ids(struct sd *sd, 2574 u8 slave) 2575 { 2576 switch (sd->bridge) { 2577 case BRIDGE_OVFX2: 2578 reg_w(sd, OVFX2_I2C_ADDR, slave); 2579 return; 2580 case BRIDGE_W9968CF: 2581 sd->sensor_addr = slave; 2582 return; 2583 } 2584 2585 reg_w(sd, R51x_I2C_W_SID, slave); 2586 reg_w(sd, R51x_I2C_R_SID, slave + 1); 2587 } 2588 2589 static void write_regvals(struct sd *sd, 2590 const struct ov_regvals *regvals, 2591 int n) 2592 { 2593 while (--n >= 0) { 2594 reg_w(sd, regvals->reg, regvals->val); 2595 regvals++; 2596 } 2597 } 2598 2599 static void write_i2c_regvals(struct sd *sd, 2600 const struct ov_i2c_regvals *regvals, 2601 int n) 2602 { 2603 while (--n >= 0) { 2604 i2c_w(sd, regvals->reg, regvals->val); 2605 regvals++; 2606 } 2607 } 2608 2609 /**************************************************************************** 2610 * 2611 * OV511 and sensor configuration 2612 * 2613 ***************************************************************************/ 2614 2615 /* This initializes the OV2x10 / OV3610 / OV3620 / OV9600 */ 2616 static void ov_hires_configure(struct sd *sd) 2617 { 2618 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd; 2619 int high, low; 2620 2621 if (sd->bridge != BRIDGE_OVFX2) { 2622 gspca_err(gspca_dev, "error hires sensors only supported with ovfx2\n"); 2623 return; 2624 } 2625 2626 gspca_dbg(gspca_dev, D_PROBE, "starting ov hires configuration\n"); 2627 2628 /* Detect sensor (sub)type */ 2629 high = i2c_r(sd, 0x0a); 2630 low = i2c_r(sd, 0x0b); 2631 /* info("%x, %x", high, low); */ 2632 switch (high) { 2633 case 0x96: 2634 switch (low) { 2635 case 0x40: 2636 gspca_dbg(gspca_dev, D_PROBE, "Sensor is a OV2610\n"); 2637 sd->sensor = SEN_OV2610; 2638 return; 2639 case 0x41: 2640 gspca_dbg(gspca_dev, D_PROBE, "Sensor is a OV2610AE\n"); 2641 sd->sensor = SEN_OV2610AE; 2642 return; 2643 case 0xb1: 2644 gspca_dbg(gspca_dev, D_PROBE, "Sensor is a OV9600\n"); 2645 sd->sensor = SEN_OV9600; 2646 return; 2647 } 2648 break; 2649 case 0x36: 2650 if ((low & 0x0f) == 0x00) { 2651 gspca_dbg(gspca_dev, D_PROBE, "Sensor is a OV3610\n"); 2652 sd->sensor = SEN_OV3610; 2653 return; 2654 } 2655 break; 2656 } 2657 gspca_err(gspca_dev, "Error unknown sensor type: %02x%02x\n", 2658 high, low); 2659 } 2660 2661 /* This initializes the OV8110, OV8610 sensor. The OV8110 uses 2662 * the same register settings as the OV8610, since they are very similar. 2663 */ 2664 static void ov8xx0_configure(struct sd *sd) 2665 { 2666 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd; 2667 int rc; 2668 2669 gspca_dbg(gspca_dev, D_PROBE, "starting ov8xx0 configuration\n"); 2670 2671 /* Detect sensor (sub)type */ 2672 rc = i2c_r(sd, OV7610_REG_COM_I); 2673 if (rc < 0) { 2674 gspca_err(gspca_dev, "Error detecting sensor type\n"); 2675 return; 2676 } 2677 if ((rc & 3) == 1) 2678 sd->sensor = SEN_OV8610; 2679 else 2680 gspca_err(gspca_dev, "Unknown image sensor version: %d\n", 2681 rc & 3); 2682 } 2683 2684 /* This initializes the OV7610, OV7620, or OV76BE sensor. The OV76BE uses 2685 * the same register settings as the OV7610, since they are very similar. 2686 */ 2687 static void ov7xx0_configure(struct sd *sd) 2688 { 2689 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd; 2690 int rc, high, low; 2691 2692 gspca_dbg(gspca_dev, D_PROBE, "starting OV7xx0 configuration\n"); 2693 2694 /* Detect sensor (sub)type */ 2695 rc = i2c_r(sd, OV7610_REG_COM_I); 2696 2697 /* add OV7670 here 2698 * it appears to be wrongly detected as a 7610 by default */ 2699 if (rc < 0) { 2700 gspca_err(gspca_dev, "Error detecting sensor type\n"); 2701 return; 2702 } 2703 if ((rc & 3) == 3) { 2704 /* quick hack to make OV7670s work */ 2705 high = i2c_r(sd, 0x0a); 2706 low = i2c_r(sd, 0x0b); 2707 /* info("%x, %x", high, low); */ 2708 if (high == 0x76 && (low & 0xf0) == 0x70) { 2709 gspca_dbg(gspca_dev, D_PROBE, "Sensor is an OV76%02x\n", 2710 low); 2711 sd->sensor = SEN_OV7670; 2712 } else { 2713 gspca_dbg(gspca_dev, D_PROBE, "Sensor is an OV7610\n"); 2714 sd->sensor = SEN_OV7610; 2715 } 2716 } else if ((rc & 3) == 1) { 2717 /* I don't know what's different about the 76BE yet. */ 2718 if (i2c_r(sd, 0x15) & 1) { 2719 gspca_dbg(gspca_dev, D_PROBE, "Sensor is an OV7620AE\n"); 2720 sd->sensor = SEN_OV7620AE; 2721 } else { 2722 gspca_dbg(gspca_dev, D_PROBE, "Sensor is an OV76BE\n"); 2723 sd->sensor = SEN_OV76BE; 2724 } 2725 } else if ((rc & 3) == 0) { 2726 /* try to read product id registers */ 2727 high = i2c_r(sd, 0x0a); 2728 if (high < 0) { 2729 gspca_err(gspca_dev, "Error detecting camera chip PID\n"); 2730 return; 2731 } 2732 low = i2c_r(sd, 0x0b); 2733 if (low < 0) { 2734 gspca_err(gspca_dev, "Error detecting camera chip VER\n"); 2735 return; 2736 } 2737 if (high == 0x76) { 2738 switch (low) { 2739 case 0x30: 2740 gspca_err(gspca_dev, "Sensor is an OV7630/OV7635\n"); 2741 gspca_err(gspca_dev, "7630 is not supported by this driver\n"); 2742 return; 2743 case 0x40: 2744 gspca_dbg(gspca_dev, D_PROBE, "Sensor is an OV7645\n"); 2745 sd->sensor = SEN_OV7640; /* FIXME */ 2746 break; 2747 case 0x45: 2748 gspca_dbg(gspca_dev, D_PROBE, "Sensor is an OV7645B\n"); 2749 sd->sensor = SEN_OV7640; /* FIXME */ 2750 break; 2751 case 0x48: 2752 gspca_dbg(gspca_dev, D_PROBE, "Sensor is an OV7648\n"); 2753 sd->sensor = SEN_OV7648; 2754 break; 2755 case 0x60: 2756 gspca_dbg(gspca_dev, D_PROBE, "Sensor is a OV7660\n"); 2757 sd->sensor = SEN_OV7660; 2758 break; 2759 default: 2760 gspca_err(gspca_dev, "Unknown sensor: 0x76%02x\n", 2761 low); 2762 return; 2763 } 2764 } else { 2765 gspca_dbg(gspca_dev, D_PROBE, "Sensor is an OV7620\n"); 2766 sd->sensor = SEN_OV7620; 2767 } 2768 } else { 2769 gspca_err(gspca_dev, "Unknown image sensor version: %d\n", 2770 rc & 3); 2771 } 2772 } 2773 2774 /* This initializes the OV6620, OV6630, OV6630AE, or OV6630AF sensor. */ 2775 static void ov6xx0_configure(struct sd *sd) 2776 { 2777 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd; 2778 int rc; 2779 2780 gspca_dbg(gspca_dev, D_PROBE, "starting OV6xx0 configuration\n"); 2781 2782 /* Detect sensor (sub)type */ 2783 rc = i2c_r(sd, OV7610_REG_COM_I); 2784 if (rc < 0) { 2785 gspca_err(gspca_dev, "Error detecting sensor type\n"); 2786 return; 2787 } 2788 2789 /* Ugh. The first two bits are the version bits, but 2790 * the entire register value must be used. I guess OVT 2791 * underestimated how many variants they would make. */ 2792 switch (rc) { 2793 case 0x00: 2794 sd->sensor = SEN_OV6630; 2795 pr_warn("WARNING: Sensor is an OV66308. Your camera may have been misdetected in previous driver versions.\n"); 2796 break; 2797 case 0x01: 2798 sd->sensor = SEN_OV6620; 2799 gspca_dbg(gspca_dev, D_PROBE, "Sensor is an OV6620\n"); 2800 break; 2801 case 0x02: 2802 sd->sensor = SEN_OV6630; 2803 gspca_dbg(gspca_dev, D_PROBE, "Sensor is an OV66308AE\n"); 2804 break; 2805 case 0x03: 2806 sd->sensor = SEN_OV66308AF; 2807 gspca_dbg(gspca_dev, D_PROBE, "Sensor is an OV66308AF\n"); 2808 break; 2809 case 0x90: 2810 sd->sensor = SEN_OV6630; 2811 pr_warn("WARNING: Sensor is an OV66307. Your camera may have been misdetected in previous driver versions.\n"); 2812 break; 2813 default: 2814 gspca_err(gspca_dev, "FATAL: Unknown sensor version: 0x%02x\n", 2815 rc); 2816 return; 2817 } 2818 2819 /* Set sensor-specific vars */ 2820 sd->sif = 1; 2821 } 2822 2823 /* Turns on or off the LED. Only has an effect with OV511+/OV518(+)/OV519 */ 2824 static void ov51x_led_control(struct sd *sd, int on) 2825 { 2826 if (sd->invert_led) 2827 on = !on; 2828 2829 switch (sd->bridge) { 2830 /* OV511 has no LED control */ 2831 case BRIDGE_OV511PLUS: 2832 reg_w(sd, R511_SYS_LED_CTL, on); 2833 break; 2834 case BRIDGE_OV518: 2835 case BRIDGE_OV518PLUS: 2836 reg_w_mask(sd, R518_GPIO_OUT, 0x02 * on, 0x02); 2837 break; 2838 case BRIDGE_OV519: 2839 reg_w_mask(sd, OV519_GPIO_DATA_OUT0, on, 1); 2840 break; 2841 } 2842 } 2843 2844 static void sd_reset_snapshot(struct gspca_dev *gspca_dev) 2845 { 2846 struct sd *sd = (struct sd *) gspca_dev; 2847 2848 if (!sd->snapshot_needs_reset) 2849 return; 2850 2851 /* Note it is important that we clear sd->snapshot_needs_reset, 2852 before actually clearing the snapshot state in the bridge 2853 otherwise we might race with the pkt_scan interrupt handler */ 2854 sd->snapshot_needs_reset = 0; 2855 2856 switch (sd->bridge) { 2857 case BRIDGE_OV511: 2858 case BRIDGE_OV511PLUS: 2859 reg_w(sd, R51x_SYS_SNAP, 0x02); 2860 reg_w(sd, R51x_SYS_SNAP, 0x00); 2861 break; 2862 case BRIDGE_OV518: 2863 case BRIDGE_OV518PLUS: 2864 reg_w(sd, R51x_SYS_SNAP, 0x02); /* Reset */ 2865 reg_w(sd, R51x_SYS_SNAP, 0x01); /* Enable */ 2866 break; 2867 case BRIDGE_OV519: 2868 reg_w(sd, R51x_SYS_RESET, 0x40); 2869 reg_w(sd, R51x_SYS_RESET, 0x00); 2870 break; 2871 } 2872 } 2873 2874 static void ov51x_upload_quan_tables(struct sd *sd) 2875 { 2876 static const unsigned char yQuanTable511[] = { 2877 0, 1, 1, 2, 2, 3, 3, 4, 2878 1, 1, 1, 2, 2, 3, 4, 4, 2879 1, 1, 2, 2, 3, 4, 4, 4, 2880 2, 2, 2, 3, 4, 4, 4, 4, 2881 2, 2, 3, 4, 4, 5, 5, 5, 2882 3, 3, 4, 4, 5, 5, 5, 5, 2883 3, 4, 4, 4, 5, 5, 5, 5, 2884 4, 4, 4, 4, 5, 5, 5, 5 2885 }; 2886 2887 static const unsigned char uvQuanTable511[] = { 2888 0, 2, 2, 3, 4, 4, 4, 4, 2889 2, 2, 2, 4, 4, 4, 4, 4, 2890 2, 2, 3, 4, 4, 4, 4, 4, 2891 3, 4, 4, 4, 4, 4, 4, 4, 2892 4, 4, 4, 4, 4, 4, 4, 4, 2893 4, 4, 4, 4, 4, 4, 4, 4, 2894 4, 4, 4, 4, 4, 4, 4, 4, 2895 4, 4, 4, 4, 4, 4, 4, 4 2896 }; 2897 2898 /* OV518 quantization tables are 8x4 (instead of 8x8) */ 2899 static const unsigned char yQuanTable518[] = { 2900 5, 4, 5, 6, 6, 7, 7, 7, 2901 5, 5, 5, 5, 6, 7, 7, 7, 2902 6, 6, 6, 6, 7, 7, 7, 8, 2903 7, 7, 6, 7, 7, 7, 8, 8 2904 }; 2905 static const unsigned char uvQuanTable518[] = { 2906 6, 6, 6, 7, 7, 7, 7, 7, 2907 6, 6, 6, 7, 7, 7, 7, 7, 2908 6, 6, 6, 7, 7, 7, 7, 8, 2909 7, 7, 7, 7, 7, 7, 8, 8 2910 }; 2911 2912 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd; 2913 const unsigned char *pYTable, *pUVTable; 2914 unsigned char val0, val1; 2915 int i, size, reg = R51x_COMP_LUT_BEGIN; 2916 2917 gspca_dbg(gspca_dev, D_PROBE, "Uploading quantization tables\n"); 2918 2919 if (sd->bridge == BRIDGE_OV511 || sd->bridge == BRIDGE_OV511PLUS) { 2920 pYTable = yQuanTable511; 2921 pUVTable = uvQuanTable511; 2922 size = 32; 2923 } else { 2924 pYTable = yQuanTable518; 2925 pUVTable = uvQuanTable518; 2926 size = 16; 2927 } 2928 2929 for (i = 0; i < size; i++) { 2930 val0 = *pYTable++; 2931 val1 = *pYTable++; 2932 val0 &= 0x0f; 2933 val1 &= 0x0f; 2934 val0 |= val1 << 4; 2935 reg_w(sd, reg, val0); 2936 2937 val0 = *pUVTable++; 2938 val1 = *pUVTable++; 2939 val0 &= 0x0f; 2940 val1 &= 0x0f; 2941 val0 |= val1 << 4; 2942 reg_w(sd, reg + size, val0); 2943 2944 reg++; 2945 } 2946 } 2947 2948 /* This initializes the OV511/OV511+ and the sensor */ 2949 static void ov511_configure(struct gspca_dev *gspca_dev) 2950 { 2951 struct sd *sd = (struct sd *) gspca_dev; 2952 2953 /* For 511 and 511+ */ 2954 static const struct ov_regvals init_511[] = { 2955 { R51x_SYS_RESET, 0x7f }, 2956 { R51x_SYS_INIT, 0x01 }, 2957 { R51x_SYS_RESET, 0x7f }, 2958 { R51x_SYS_INIT, 0x01 }, 2959 { R51x_SYS_RESET, 0x3f }, 2960 { R51x_SYS_INIT, 0x01 }, 2961 { R51x_SYS_RESET, 0x3d }, 2962 }; 2963 2964 static const struct ov_regvals norm_511[] = { 2965 { R511_DRAM_FLOW_CTL, 0x01 }, 2966 { R51x_SYS_SNAP, 0x00 }, 2967 { R51x_SYS_SNAP, 0x02 }, 2968 { R51x_SYS_SNAP, 0x00 }, 2969 { R511_FIFO_OPTS, 0x1f }, 2970 { R511_COMP_EN, 0x00 }, 2971 { R511_COMP_LUT_EN, 0x03 }, 2972 }; 2973 2974 static const struct ov_regvals norm_511_p[] = { 2975 { R511_DRAM_FLOW_CTL, 0xff }, 2976 { R51x_SYS_SNAP, 0x00 }, 2977 { R51x_SYS_SNAP, 0x02 }, 2978 { R51x_SYS_SNAP, 0x00 }, 2979 { R511_FIFO_OPTS, 0xff }, 2980 { R511_COMP_EN, 0x00 }, 2981 { R511_COMP_LUT_EN, 0x03 }, 2982 }; 2983 2984 static const struct ov_regvals compress_511[] = { 2985 { 0x70, 0x1f }, 2986 { 0x71, 0x05 }, 2987 { 0x72, 0x06 }, 2988 { 0x73, 0x06 }, 2989 { 0x74, 0x14 }, 2990 { 0x75, 0x03 }, 2991 { 0x76, 0x04 }, 2992 { 0x77, 0x04 }, 2993 }; 2994 2995 gspca_dbg(gspca_dev, D_PROBE, "Device custom id %x\n", 2996 reg_r(sd, R51x_SYS_CUST_ID)); 2997 2998 write_regvals(sd, init_511, ARRAY_SIZE(init_511)); 2999 3000 switch (sd->bridge) { 3001 case BRIDGE_OV511: 3002 write_regvals(sd, norm_511, ARRAY_SIZE(norm_511)); 3003 break; 3004 case BRIDGE_OV511PLUS: 3005 write_regvals(sd, norm_511_p, ARRAY_SIZE(norm_511_p)); 3006 break; 3007 } 3008 3009 /* Init compression */ 3010 write_regvals(sd, compress_511, ARRAY_SIZE(compress_511)); 3011 3012 ov51x_upload_quan_tables(sd); 3013 } 3014 3015 /* This initializes the OV518/OV518+ and the sensor */ 3016 static void ov518_configure(struct gspca_dev *gspca_dev) 3017 { 3018 struct sd *sd = (struct sd *) gspca_dev; 3019 3020 /* For 518 and 518+ */ 3021 static const struct ov_regvals init_518[] = { 3022 { R51x_SYS_RESET, 0x40 }, 3023 { R51x_SYS_INIT, 0xe1 }, 3024 { R51x_SYS_RESET, 0x3e }, 3025 { R51x_SYS_INIT, 0xe1 }, 3026 { R51x_SYS_RESET, 0x00 }, 3027 { R51x_SYS_INIT, 0xe1 }, 3028 { 0x46, 0x00 }, 3029 { 0x5d, 0x03 }, 3030 }; 3031 3032 static const struct ov_regvals norm_518[] = { 3033 { R51x_SYS_SNAP, 0x02 }, /* Reset */ 3034 { R51x_SYS_SNAP, 0x01 }, /* Enable */ 3035 { 0x31, 0x0f }, 3036 { 0x5d, 0x03 }, 3037 { 0x24, 0x9f }, 3038 { 0x25, 0x90 }, 3039 { 0x20, 0x00 }, 3040 { 0x51, 0x04 }, 3041 { 0x71, 0x19 }, 3042 { 0x2f, 0x80 }, 3043 }; 3044 3045 static const struct ov_regvals norm_518_p[] = { 3046 { R51x_SYS_SNAP, 0x02 }, /* Reset */ 3047 { R51x_SYS_SNAP, 0x01 }, /* Enable */ 3048 { 0x31, 0x0f }, 3049 { 0x5d, 0x03 }, 3050 { 0x24, 0x9f }, 3051 { 0x25, 0x90 }, 3052 { 0x20, 0x60 }, 3053 { 0x51, 0x02 }, 3054 { 0x71, 0x19 }, 3055 { 0x40, 0xff }, 3056 { 0x41, 0x42 }, 3057 { 0x46, 0x00 }, 3058 { 0x33, 0x04 }, 3059 { 0x21, 0x19 }, 3060 { 0x3f, 0x10 }, 3061 { 0x2f, 0x80 }, 3062 }; 3063 3064 /* First 5 bits of custom ID reg are a revision ID on OV518 */ 3065 sd->revision = reg_r(sd, R51x_SYS_CUST_ID) & 0x1f; 3066 gspca_dbg(gspca_dev, D_PROBE, "Device revision %d\n", sd->revision); 3067 3068 write_regvals(sd, init_518, ARRAY_SIZE(init_518)); 3069 3070 /* Set LED GPIO pin to output mode */ 3071 reg_w_mask(sd, R518_GPIO_CTL, 0x00, 0x02); 3072 3073 switch (sd->bridge) { 3074 case BRIDGE_OV518: 3075 write_regvals(sd, norm_518, ARRAY_SIZE(norm_518)); 3076 break; 3077 case BRIDGE_OV518PLUS: 3078 write_regvals(sd, norm_518_p, ARRAY_SIZE(norm_518_p)); 3079 break; 3080 } 3081 3082 ov51x_upload_quan_tables(sd); 3083 3084 reg_w(sd, 0x2f, 0x80); 3085 } 3086 3087 static void ov519_configure(struct sd *sd) 3088 { 3089 static const struct ov_regvals init_519[] = { 3090 { 0x5a, 0x6d }, /* EnableSystem */ 3091 { 0x53, 0x9b }, /* don't enable the microcontroller */ 3092 { OV519_R54_EN_CLK1, 0xff }, /* set bit2 to enable jpeg */ 3093 { 0x5d, 0x03 }, 3094 { 0x49, 0x01 }, 3095 { 0x48, 0x00 }, 3096 /* Set LED pin to output mode. Bit 4 must be cleared or sensor 3097 * detection will fail. This deserves further investigation. */ 3098 { OV519_GPIO_IO_CTRL0, 0xee }, 3099 { OV519_R51_RESET1, 0x0f }, 3100 { OV519_R51_RESET1, 0x00 }, 3101 { 0x22, 0x00 }, 3102 /* windows reads 0x55 at this point*/ 3103 }; 3104 3105 write_regvals(sd, init_519, ARRAY_SIZE(init_519)); 3106 } 3107 3108 static void ovfx2_configure(struct sd *sd) 3109 { 3110 static const struct ov_regvals init_fx2[] = { 3111 { 0x00, 0x60 }, 3112 { 0x02, 0x01 }, 3113 { 0x0f, 0x1d }, 3114 { 0xe9, 0x82 }, 3115 { 0xea, 0xc7 }, 3116 { 0xeb, 0x10 }, 3117 { 0xec, 0xf6 }, 3118 }; 3119 3120 sd->stopped = 1; 3121 3122 write_regvals(sd, init_fx2, ARRAY_SIZE(init_fx2)); 3123 } 3124 3125 /* set the mode */ 3126 /* This function works for ov7660 only */ 3127 static void ov519_set_mode(struct sd *sd) 3128 { 3129 static const struct ov_regvals bridge_ov7660[2][10] = { 3130 {{0x10, 0x14}, {0x11, 0x1e}, {0x12, 0x00}, {0x13, 0x00}, 3131 {0x14, 0x00}, {0x15, 0x00}, {0x16, 0x00}, {0x20, 0x0c}, 3132 {0x25, 0x01}, {0x26, 0x00}}, 3133 {{0x10, 0x28}, {0x11, 0x3c}, {0x12, 0x00}, {0x13, 0x00}, 3134 {0x14, 0x00}, {0x15, 0x00}, {0x16, 0x00}, {0x20, 0x0c}, 3135 {0x25, 0x03}, {0x26, 0x00}} 3136 }; 3137 static const struct ov_i2c_regvals sensor_ov7660[2][3] = { 3138 {{0x12, 0x00}, {0x24, 0x00}, {0x0c, 0x0c}}, 3139 {{0x12, 0x00}, {0x04, 0x00}, {0x0c, 0x00}} 3140 }; 3141 static const struct ov_i2c_regvals sensor_ov7660_2[] = { 3142 {OV7670_R17_HSTART, 0x13}, 3143 {OV7670_R18_HSTOP, 0x01}, 3144 {OV7670_R32_HREF, 0x92}, 3145 {OV7670_R19_VSTART, 0x02}, 3146 {OV7670_R1A_VSTOP, 0x7a}, 3147 {OV7670_R03_VREF, 0x00}, 3148 /* {0x33, 0x00}, */ 3149 /* {0x34, 0x07}, */ 3150 /* {0x36, 0x00}, */ 3151 /* {0x6b, 0x0a}, */ 3152 }; 3153 3154 write_regvals(sd, bridge_ov7660[sd->gspca_dev.curr_mode], 3155 ARRAY_SIZE(bridge_ov7660[0])); 3156 write_i2c_regvals(sd, sensor_ov7660[sd->gspca_dev.curr_mode], 3157 ARRAY_SIZE(sensor_ov7660[0])); 3158 write_i2c_regvals(sd, sensor_ov7660_2, 3159 ARRAY_SIZE(sensor_ov7660_2)); 3160 } 3161 3162 /* set the frame rate */ 3163 /* This function works for sensors ov7640, ov7648 ov7660 and ov7670 only */ 3164 static void ov519_set_fr(struct sd *sd) 3165 { 3166 int fr; 3167 u8 clock; 3168 /* frame rate table with indices: 3169 * - mode = 0: 320x240, 1: 640x480 3170 * - fr rate = 0: 30, 1: 25, 2: 20, 3: 15, 4: 10, 5: 5 3171 * - reg = 0: bridge a4, 1: bridge 23, 2: sensor 11 (clock) 3172 */ 3173 static const u8 fr_tb[2][6][3] = { 3174 {{0x04, 0xff, 0x00}, 3175 {0x04, 0x1f, 0x00}, 3176 {0x04, 0x1b, 0x00}, 3177 {0x04, 0x15, 0x00}, 3178 {0x04, 0x09, 0x00}, 3179 {0x04, 0x01, 0x00}}, 3180 {{0x0c, 0xff, 0x00}, 3181 {0x0c, 0x1f, 0x00}, 3182 {0x0c, 0x1b, 0x00}, 3183 {0x04, 0xff, 0x01}, 3184 {0x04, 0x1f, 0x01}, 3185 {0x04, 0x1b, 0x01}}, 3186 }; 3187 3188 if (frame_rate > 0) 3189 sd->frame_rate = frame_rate; 3190 if (sd->frame_rate >= 30) 3191 fr = 0; 3192 else if (sd->frame_rate >= 25) 3193 fr = 1; 3194 else if (sd->frame_rate >= 20) 3195 fr = 2; 3196 else if (sd->frame_rate >= 15) 3197 fr = 3; 3198 else if (sd->frame_rate >= 10) 3199 fr = 4; 3200 else 3201 fr = 5; 3202 reg_w(sd, 0xa4, fr_tb[sd->gspca_dev.curr_mode][fr][0]); 3203 reg_w(sd, 0x23, fr_tb[sd->gspca_dev.curr_mode][fr][1]); 3204 clock = fr_tb[sd->gspca_dev.curr_mode][fr][2]; 3205 if (sd->sensor == SEN_OV7660) 3206 clock |= 0x80; /* enable double clock */ 3207 ov518_i2c_w(sd, OV7670_R11_CLKRC, clock); 3208 } 3209 3210 static void setautogain(struct gspca_dev *gspca_dev, s32 val) 3211 { 3212 struct sd *sd = (struct sd *) gspca_dev; 3213 3214 i2c_w_mask(sd, 0x13, val ? 0x05 : 0x00, 0x05); 3215 } 3216 3217 /* this function is called at probe time */ 3218 static int sd_config(struct gspca_dev *gspca_dev, 3219 const struct usb_device_id *id) 3220 { 3221 struct sd *sd = (struct sd *) gspca_dev; 3222 struct cam *cam = &gspca_dev->cam; 3223 3224 sd->bridge = id->driver_info & BRIDGE_MASK; 3225 sd->invert_led = (id->driver_info & BRIDGE_INVERT_LED) != 0; 3226 3227 switch (sd->bridge) { 3228 case BRIDGE_OV511: 3229 case BRIDGE_OV511PLUS: 3230 cam->cam_mode = ov511_vga_mode; 3231 cam->nmodes = ARRAY_SIZE(ov511_vga_mode); 3232 break; 3233 case BRIDGE_OV518: 3234 case BRIDGE_OV518PLUS: 3235 cam->cam_mode = ov518_vga_mode; 3236 cam->nmodes = ARRAY_SIZE(ov518_vga_mode); 3237 break; 3238 case BRIDGE_OV519: 3239 cam->cam_mode = ov519_vga_mode; 3240 cam->nmodes = ARRAY_SIZE(ov519_vga_mode); 3241 break; 3242 case BRIDGE_OVFX2: 3243 cam->cam_mode = ov519_vga_mode; 3244 cam->nmodes = ARRAY_SIZE(ov519_vga_mode); 3245 cam->bulk_size = OVFX2_BULK_SIZE; 3246 cam->bulk_nurbs = MAX_NURBS; 3247 cam->bulk = 1; 3248 break; 3249 case BRIDGE_W9968CF: 3250 cam->cam_mode = w9968cf_vga_mode; 3251 cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode); 3252 break; 3253 } 3254 3255 sd->frame_rate = 15; 3256 3257 return 0; 3258 } 3259 3260 /* this function is called at probe and resume time */ 3261 static int sd_init(struct gspca_dev *gspca_dev) 3262 { 3263 struct sd *sd = (struct sd *) gspca_dev; 3264 struct cam *cam = &gspca_dev->cam; 3265 3266 switch (sd->bridge) { 3267 case BRIDGE_OV511: 3268 case BRIDGE_OV511PLUS: 3269 ov511_configure(gspca_dev); 3270 break; 3271 case BRIDGE_OV518: 3272 case BRIDGE_OV518PLUS: 3273 ov518_configure(gspca_dev); 3274 break; 3275 case BRIDGE_OV519: 3276 ov519_configure(sd); 3277 break; 3278 case BRIDGE_OVFX2: 3279 ovfx2_configure(sd); 3280 break; 3281 case BRIDGE_W9968CF: 3282 w9968cf_configure(sd); 3283 break; 3284 } 3285 3286 /* The OV519 must be more aggressive about sensor detection since 3287 * I2C write will never fail if the sensor is not present. We have 3288 * to try to initialize the sensor to detect its presence */ 3289 sd->sensor = -1; 3290 3291 /* Test for 76xx */ 3292 if (init_ov_sensor(sd, OV7xx0_SID) >= 0) { 3293 ov7xx0_configure(sd); 3294 3295 /* Test for 6xx0 */ 3296 } else if (init_ov_sensor(sd, OV6xx0_SID) >= 0) { 3297 ov6xx0_configure(sd); 3298 3299 /* Test for 8xx0 */ 3300 } else if (init_ov_sensor(sd, OV8xx0_SID) >= 0) { 3301 ov8xx0_configure(sd); 3302 3303 /* Test for 3xxx / 2xxx */ 3304 } else if (init_ov_sensor(sd, OV_HIRES_SID) >= 0) { 3305 ov_hires_configure(sd); 3306 } else { 3307 gspca_err(gspca_dev, "Can't determine sensor slave IDs\n"); 3308 goto error; 3309 } 3310 3311 if (sd->sensor < 0) 3312 goto error; 3313 3314 ov51x_led_control(sd, 0); /* turn LED off */ 3315 3316 switch (sd->bridge) { 3317 case BRIDGE_OV511: 3318 case BRIDGE_OV511PLUS: 3319 if (sd->sif) { 3320 cam->cam_mode = ov511_sif_mode; 3321 cam->nmodes = ARRAY_SIZE(ov511_sif_mode); 3322 } 3323 break; 3324 case BRIDGE_OV518: 3325 case BRIDGE_OV518PLUS: 3326 if (sd->sif) { 3327 cam->cam_mode = ov518_sif_mode; 3328 cam->nmodes = ARRAY_SIZE(ov518_sif_mode); 3329 } 3330 break; 3331 case BRIDGE_OV519: 3332 if (sd->sif) { 3333 cam->cam_mode = ov519_sif_mode; 3334 cam->nmodes = ARRAY_SIZE(ov519_sif_mode); 3335 } 3336 break; 3337 case BRIDGE_OVFX2: 3338 switch (sd->sensor) { 3339 case SEN_OV2610: 3340 case SEN_OV2610AE: 3341 cam->cam_mode = ovfx2_ov2610_mode; 3342 cam->nmodes = ARRAY_SIZE(ovfx2_ov2610_mode); 3343 break; 3344 case SEN_OV3610: 3345 cam->cam_mode = ovfx2_ov3610_mode; 3346 cam->nmodes = ARRAY_SIZE(ovfx2_ov3610_mode); 3347 break; 3348 case SEN_OV9600: 3349 cam->cam_mode = ovfx2_ov9600_mode; 3350 cam->nmodes = ARRAY_SIZE(ovfx2_ov9600_mode); 3351 break; 3352 default: 3353 if (sd->sif) { 3354 cam->cam_mode = ov519_sif_mode; 3355 cam->nmodes = ARRAY_SIZE(ov519_sif_mode); 3356 } 3357 break; 3358 } 3359 break; 3360 case BRIDGE_W9968CF: 3361 if (sd->sif) 3362 cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode) - 1; 3363 3364 /* w9968cf needs initialisation once the sensor is known */ 3365 w9968cf_init(sd); 3366 break; 3367 } 3368 3369 /* initialize the sensor */ 3370 switch (sd->sensor) { 3371 case SEN_OV2610: 3372 write_i2c_regvals(sd, norm_2610, ARRAY_SIZE(norm_2610)); 3373 3374 /* Enable autogain, autoexpo, awb, bandfilter */ 3375 i2c_w_mask(sd, 0x13, 0x27, 0x27); 3376 break; 3377 case SEN_OV2610AE: 3378 write_i2c_regvals(sd, norm_2610ae, ARRAY_SIZE(norm_2610ae)); 3379 3380 /* enable autoexpo */ 3381 i2c_w_mask(sd, 0x13, 0x05, 0x05); 3382 break; 3383 case SEN_OV3610: 3384 write_i2c_regvals(sd, norm_3620b, ARRAY_SIZE(norm_3620b)); 3385 3386 /* Enable autogain, autoexpo, awb, bandfilter */ 3387 i2c_w_mask(sd, 0x13, 0x27, 0x27); 3388 break; 3389 case SEN_OV6620: 3390 write_i2c_regvals(sd, norm_6x20, ARRAY_SIZE(norm_6x20)); 3391 break; 3392 case SEN_OV6630: 3393 case SEN_OV66308AF: 3394 write_i2c_regvals(sd, norm_6x30, ARRAY_SIZE(norm_6x30)); 3395 break; 3396 default: 3397 /* case SEN_OV7610: */ 3398 /* case SEN_OV76BE: */ 3399 write_i2c_regvals(sd, norm_7610, ARRAY_SIZE(norm_7610)); 3400 i2c_w_mask(sd, 0x0e, 0x00, 0x40); 3401 break; 3402 case SEN_OV7620: 3403 case SEN_OV7620AE: 3404 write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620)); 3405 break; 3406 case SEN_OV7640: 3407 case SEN_OV7648: 3408 write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640)); 3409 break; 3410 case SEN_OV7660: 3411 i2c_w(sd, OV7670_R12_COM7, OV7670_COM7_RESET); 3412 msleep(14); 3413 reg_w(sd, OV519_R57_SNAPSHOT, 0x23); 3414 write_regvals(sd, init_519_ov7660, 3415 ARRAY_SIZE(init_519_ov7660)); 3416 write_i2c_regvals(sd, norm_7660, ARRAY_SIZE(norm_7660)); 3417 sd->gspca_dev.curr_mode = 1; /* 640x480 */ 3418 ov519_set_mode(sd); 3419 ov519_set_fr(sd); 3420 sd_reset_snapshot(gspca_dev); 3421 ov51x_restart(sd); 3422 ov51x_stop(sd); /* not in win traces */ 3423 ov51x_led_control(sd, 0); 3424 break; 3425 case SEN_OV7670: 3426 write_i2c_regvals(sd, norm_7670, ARRAY_SIZE(norm_7670)); 3427 break; 3428 case SEN_OV8610: 3429 write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610)); 3430 break; 3431 case SEN_OV9600: 3432 write_i2c_regvals(sd, norm_9600, ARRAY_SIZE(norm_9600)); 3433 3434 /* enable autoexpo */ 3435 /* i2c_w_mask(sd, 0x13, 0x05, 0x05); */ 3436 break; 3437 } 3438 return gspca_dev->usb_err; 3439 error: 3440 gspca_err(gspca_dev, "OV519 Config failed\n"); 3441 return -EINVAL; 3442 } 3443 3444 /* function called at start time before URB creation */ 3445 static int sd_isoc_init(struct gspca_dev *gspca_dev) 3446 { 3447 struct sd *sd = (struct sd *) gspca_dev; 3448 3449 switch (sd->bridge) { 3450 case BRIDGE_OVFX2: 3451 if (gspca_dev->pixfmt.width != 800) 3452 gspca_dev->cam.bulk_size = OVFX2_BULK_SIZE; 3453 else 3454 gspca_dev->cam.bulk_size = 7 * 4096; 3455 break; 3456 } 3457 return 0; 3458 } 3459 3460 /* Set up the OV511/OV511+ with the given image parameters. 3461 * 3462 * Do not put any sensor-specific code in here (including I2C I/O functions) 3463 */ 3464 static void ov511_mode_init_regs(struct sd *sd) 3465 { 3466 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd; 3467 int hsegs, vsegs, packet_size, fps, needed; 3468 int interlaced = 0; 3469 struct usb_host_interface *alt; 3470 struct usb_interface *intf; 3471 3472 intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface); 3473 alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt); 3474 if (!alt) { 3475 gspca_err(gspca_dev, "Couldn't get altsetting\n"); 3476 sd->gspca_dev.usb_err = -EIO; 3477 return; 3478 } 3479 3480 if (alt->desc.bNumEndpoints < 1) { 3481 sd->gspca_dev.usb_err = -ENODEV; 3482 return; 3483 } 3484 3485 packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize); 3486 reg_w(sd, R51x_FIFO_PSIZE, packet_size >> 5); 3487 3488 reg_w(sd, R511_CAM_UV_EN, 0x01); 3489 reg_w(sd, R511_SNAP_UV_EN, 0x01); 3490 reg_w(sd, R511_SNAP_OPTS, 0x03); 3491 3492 /* Here I'm assuming that snapshot size == image size. 3493 * I hope that's always true. --claudio 3494 */ 3495 hsegs = (sd->gspca_dev.pixfmt.width >> 3) - 1; 3496 vsegs = (sd->gspca_dev.pixfmt.height >> 3) - 1; 3497 3498 reg_w(sd, R511_CAM_PXCNT, hsegs); 3499 reg_w(sd, R511_CAM_LNCNT, vsegs); 3500 reg_w(sd, R511_CAM_PXDIV, 0x00); 3501 reg_w(sd, R511_CAM_LNDIV, 0x00); 3502 3503 /* YUV420, low pass filter on */ 3504 reg_w(sd, R511_CAM_OPTS, 0x03); 3505 3506 /* Snapshot additions */ 3507 reg_w(sd, R511_SNAP_PXCNT, hsegs); 3508 reg_w(sd, R511_SNAP_LNCNT, vsegs); 3509 reg_w(sd, R511_SNAP_PXDIV, 0x00); 3510 reg_w(sd, R511_SNAP_LNDIV, 0x00); 3511 3512 /******** Set the framerate ********/ 3513 if (frame_rate > 0) 3514 sd->frame_rate = frame_rate; 3515 3516 switch (sd->sensor) { 3517 case SEN_OV6620: 3518 /* No framerate control, doesn't like higher rates yet */ 3519 sd->clockdiv = 3; 3520 break; 3521 3522 /* Note once the FIXME's in mode_init_ov_sensor_regs() are fixed 3523 for more sensors we need to do this for them too */ 3524 case SEN_OV7620: 3525 case SEN_OV7620AE: 3526 case SEN_OV7640: 3527 case SEN_OV7648: 3528 case SEN_OV76BE: 3529 if (sd->gspca_dev.pixfmt.width == 320) 3530 interlaced = 1; 3531 /* Fall through */ 3532 case SEN_OV6630: 3533 case SEN_OV7610: 3534 case SEN_OV7670: 3535 switch (sd->frame_rate) { 3536 case 30: 3537 case 25: 3538 /* Not enough bandwidth to do 640x480 @ 30 fps */ 3539 if (sd->gspca_dev.pixfmt.width != 640) { 3540 sd->clockdiv = 0; 3541 break; 3542 } 3543 /* For 640x480 case */ 3544 /* fall through */ 3545 default: 3546 /* case 20: */ 3547 /* case 15: */ 3548 sd->clockdiv = 1; 3549 break; 3550 case 10: 3551 sd->clockdiv = 2; 3552 break; 3553 case 5: 3554 sd->clockdiv = 5; 3555 break; 3556 } 3557 if (interlaced) { 3558 sd->clockdiv = (sd->clockdiv + 1) * 2 - 1; 3559 /* Higher then 10 does not work */ 3560 if (sd->clockdiv > 10) 3561 sd->clockdiv = 10; 3562 } 3563 break; 3564 3565 case SEN_OV8610: 3566 /* No framerate control ?? */ 3567 sd->clockdiv = 0; 3568 break; 3569 } 3570 3571 /* Check if we have enough bandwidth to disable compression */ 3572 fps = (interlaced ? 60 : 30) / (sd->clockdiv + 1) + 1; 3573 needed = fps * sd->gspca_dev.pixfmt.width * 3574 sd->gspca_dev.pixfmt.height * 3 / 2; 3575 /* 1000 isoc packets/sec */ 3576 if (needed > 1000 * packet_size) { 3577 /* Enable Y and UV quantization and compression */ 3578 reg_w(sd, R511_COMP_EN, 0x07); 3579 reg_w(sd, R511_COMP_LUT_EN, 0x03); 3580 } else { 3581 reg_w(sd, R511_COMP_EN, 0x06); 3582 reg_w(sd, R511_COMP_LUT_EN, 0x00); 3583 } 3584 3585 reg_w(sd, R51x_SYS_RESET, OV511_RESET_OMNICE); 3586 reg_w(sd, R51x_SYS_RESET, 0); 3587 } 3588 3589 /* Sets up the OV518/OV518+ with the given image parameters 3590 * 3591 * OV518 needs a completely different approach, until we can figure out what 3592 * the individual registers do. Also, only 15 FPS is supported now. 3593 * 3594 * Do not put any sensor-specific code in here (including I2C I/O functions) 3595 */ 3596 static void ov518_mode_init_regs(struct sd *sd) 3597 { 3598 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd; 3599 int hsegs, vsegs, packet_size; 3600 struct usb_host_interface *alt; 3601 struct usb_interface *intf; 3602 3603 intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface); 3604 alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt); 3605 if (!alt) { 3606 gspca_err(gspca_dev, "Couldn't get altsetting\n"); 3607 sd->gspca_dev.usb_err = -EIO; 3608 return; 3609 } 3610 3611 if (alt->desc.bNumEndpoints < 1) { 3612 sd->gspca_dev.usb_err = -ENODEV; 3613 return; 3614 } 3615 3616 packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize); 3617 ov518_reg_w32(sd, R51x_FIFO_PSIZE, packet_size & ~7, 2); 3618 3619 /******** Set the mode ********/ 3620 reg_w(sd, 0x2b, 0); 3621 reg_w(sd, 0x2c, 0); 3622 reg_w(sd, 0x2d, 0); 3623 reg_w(sd, 0x2e, 0); 3624 reg_w(sd, 0x3b, 0); 3625 reg_w(sd, 0x3c, 0); 3626 reg_w(sd, 0x3d, 0); 3627 reg_w(sd, 0x3e, 0); 3628 3629 if (sd->bridge == BRIDGE_OV518) { 3630 /* Set 8-bit (YVYU) input format */ 3631 reg_w_mask(sd, 0x20, 0x08, 0x08); 3632 3633 /* Set 12-bit (4:2:0) output format */ 3634 reg_w_mask(sd, 0x28, 0x80, 0xf0); 3635 reg_w_mask(sd, 0x38, 0x80, 0xf0); 3636 } else { 3637 reg_w(sd, 0x28, 0x80); 3638 reg_w(sd, 0x38, 0x80); 3639 } 3640 3641 hsegs = sd->gspca_dev.pixfmt.width / 16; 3642 vsegs = sd->gspca_dev.pixfmt.height / 4; 3643 3644 reg_w(sd, 0x29, hsegs); 3645 reg_w(sd, 0x2a, vsegs); 3646 3647 reg_w(sd, 0x39, hsegs); 3648 reg_w(sd, 0x3a, vsegs); 3649 3650 /* Windows driver does this here; who knows why */ 3651 reg_w(sd, 0x2f, 0x80); 3652 3653 /******** Set the framerate ********/ 3654 if (sd->bridge == BRIDGE_OV518PLUS && sd->revision == 0 && 3655 sd->sensor == SEN_OV7620AE) 3656 sd->clockdiv = 0; 3657 else 3658 sd->clockdiv = 1; 3659 3660 /* Mode independent, but framerate dependent, regs */ 3661 /* 0x51: Clock divider; Only works on some cams which use 2 crystals */ 3662 reg_w(sd, 0x51, 0x04); 3663 reg_w(sd, 0x22, 0x18); 3664 reg_w(sd, 0x23, 0xff); 3665 3666 if (sd->bridge == BRIDGE_OV518PLUS) { 3667 switch (sd->sensor) { 3668 case SEN_OV7620AE: 3669 /* 3670 * HdG: 640x480 needs special handling on device 3671 * revision 2, we check for device revision > 0 to 3672 * avoid regressions, as we don't know the correct 3673 * thing todo for revision 1. 3674 * 3675 * Also this likely means we don't need to 3676 * differentiate between the OV7620 and OV7620AE, 3677 * earlier testing hitting this same problem likely 3678 * happened to be with revision < 2 cams using an 3679 * OV7620 and revision 2 cams using an OV7620AE. 3680 */ 3681 if (sd->revision > 0 && 3682 sd->gspca_dev.pixfmt.width == 640) { 3683 reg_w(sd, 0x20, 0x60); 3684 reg_w(sd, 0x21, 0x1f); 3685 } else { 3686 reg_w(sd, 0x20, 0x00); 3687 reg_w(sd, 0x21, 0x19); 3688 } 3689 break; 3690 case SEN_OV7620: 3691 reg_w(sd, 0x20, 0x00); 3692 reg_w(sd, 0x21, 0x19); 3693 break; 3694 default: 3695 reg_w(sd, 0x21, 0x19); 3696 } 3697 } else 3698 reg_w(sd, 0x71, 0x17); /* Compression-related? */ 3699 3700 /* FIXME: Sensor-specific */ 3701 /* Bit 5 is what matters here. Of course, it is "reserved" */ 3702 i2c_w(sd, 0x54, 0x23); 3703 3704 reg_w(sd, 0x2f, 0x80); 3705 3706 if (sd->bridge == BRIDGE_OV518PLUS) { 3707 reg_w(sd, 0x24, 0x94); 3708 reg_w(sd, 0x25, 0x90); 3709 ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */ 3710 ov518_reg_w32(sd, 0xc6, 540, 2); /* 21ch */ 3711 ov518_reg_w32(sd, 0xc7, 540, 2); /* 21ch */ 3712 ov518_reg_w32(sd, 0xc8, 108, 2); /* 6ch */ 3713 ov518_reg_w32(sd, 0xca, 131098, 3); /* 2001ah */ 3714 ov518_reg_w32(sd, 0xcb, 532, 2); /* 214h */ 3715 ov518_reg_w32(sd, 0xcc, 2400, 2); /* 960h */ 3716 ov518_reg_w32(sd, 0xcd, 32, 2); /* 20h */ 3717 ov518_reg_w32(sd, 0xce, 608, 2); /* 260h */ 3718 } else { 3719 reg_w(sd, 0x24, 0x9f); 3720 reg_w(sd, 0x25, 0x90); 3721 ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */ 3722 ov518_reg_w32(sd, 0xc6, 381, 2); /* 17dh */ 3723 ov518_reg_w32(sd, 0xc7, 381, 2); /* 17dh */ 3724 ov518_reg_w32(sd, 0xc8, 128, 2); /* 80h */ 3725 ov518_reg_w32(sd, 0xca, 183331, 3); /* 2cc23h */ 3726 ov518_reg_w32(sd, 0xcb, 746, 2); /* 2eah */ 3727 ov518_reg_w32(sd, 0xcc, 1750, 2); /* 6d6h */ 3728 ov518_reg_w32(sd, 0xcd, 45, 2); /* 2dh */ 3729 ov518_reg_w32(sd, 0xce, 851, 2); /* 353h */ 3730 } 3731 3732 reg_w(sd, 0x2f, 0x80); 3733 } 3734 3735 /* Sets up the OV519 with the given image parameters 3736 * 3737 * OV519 needs a completely different approach, until we can figure out what 3738 * the individual registers do. 3739 * 3740 * Do not put any sensor-specific code in here (including I2C I/O functions) 3741 */ 3742 static void ov519_mode_init_regs(struct sd *sd) 3743 { 3744 static const struct ov_regvals mode_init_519_ov7670[] = { 3745 { 0x5d, 0x03 }, /* Turn off suspend mode */ 3746 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */ 3747 { OV519_R54_EN_CLK1, 0x0f }, /* bit2 (jpeg enable) */ 3748 { 0xa2, 0x20 }, /* a2-a5 are undocumented */ 3749 { 0xa3, 0x18 }, 3750 { 0xa4, 0x04 }, 3751 { 0xa5, 0x28 }, 3752 { 0x37, 0x00 }, /* SetUsbInit */ 3753 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */ 3754 /* Enable both fields, YUV Input, disable defect comp (why?) */ 3755 { 0x20, 0x0c }, 3756 { 0x21, 0x38 }, 3757 { 0x22, 0x1d }, 3758 { 0x17, 0x50 }, /* undocumented */ 3759 { 0x37, 0x00 }, /* undocumented */ 3760 { 0x40, 0xff }, /* I2C timeout counter */ 3761 { 0x46, 0x00 }, /* I2C clock prescaler */ 3762 { 0x59, 0x04 }, /* new from windrv 090403 */ 3763 { 0xff, 0x00 }, /* undocumented */ 3764 /* windows reads 0x55 at this point, why? */ 3765 }; 3766 3767 static const struct ov_regvals mode_init_519[] = { 3768 { 0x5d, 0x03 }, /* Turn off suspend mode */ 3769 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */ 3770 { OV519_R54_EN_CLK1, 0x0f }, /* bit2 (jpeg enable) */ 3771 { 0xa2, 0x20 }, /* a2-a5 are undocumented */ 3772 { 0xa3, 0x18 }, 3773 { 0xa4, 0x04 }, 3774 { 0xa5, 0x28 }, 3775 { 0x37, 0x00 }, /* SetUsbInit */ 3776 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */ 3777 /* Enable both fields, YUV Input, disable defect comp (why?) */ 3778 { 0x22, 0x1d }, 3779 { 0x17, 0x50 }, /* undocumented */ 3780 { 0x37, 0x00 }, /* undocumented */ 3781 { 0x40, 0xff }, /* I2C timeout counter */ 3782 { 0x46, 0x00 }, /* I2C clock prescaler */ 3783 { 0x59, 0x04 }, /* new from windrv 090403 */ 3784 { 0xff, 0x00 }, /* undocumented */ 3785 /* windows reads 0x55 at this point, why? */ 3786 }; 3787 3788 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd; 3789 3790 /******** Set the mode ********/ 3791 switch (sd->sensor) { 3792 default: 3793 write_regvals(sd, mode_init_519, ARRAY_SIZE(mode_init_519)); 3794 if (sd->sensor == SEN_OV7640 || 3795 sd->sensor == SEN_OV7648) { 3796 /* Select 8-bit input mode */ 3797 reg_w_mask(sd, OV519_R20_DFR, 0x10, 0x10); 3798 } 3799 break; 3800 case SEN_OV7660: 3801 return; /* done by ov519_set_mode/fr() */ 3802 case SEN_OV7670: 3803 write_regvals(sd, mode_init_519_ov7670, 3804 ARRAY_SIZE(mode_init_519_ov7670)); 3805 break; 3806 } 3807 3808 reg_w(sd, OV519_R10_H_SIZE, sd->gspca_dev.pixfmt.width >> 4); 3809 reg_w(sd, OV519_R11_V_SIZE, sd->gspca_dev.pixfmt.height >> 3); 3810 if (sd->sensor == SEN_OV7670 && 3811 sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv) 3812 reg_w(sd, OV519_R12_X_OFFSETL, 0x04); 3813 else if (sd->sensor == SEN_OV7648 && 3814 sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv) 3815 reg_w(sd, OV519_R12_X_OFFSETL, 0x01); 3816 else 3817 reg_w(sd, OV519_R12_X_OFFSETL, 0x00); 3818 reg_w(sd, OV519_R13_X_OFFSETH, 0x00); 3819 reg_w(sd, OV519_R14_Y_OFFSETL, 0x00); 3820 reg_w(sd, OV519_R15_Y_OFFSETH, 0x00); 3821 reg_w(sd, OV519_R16_DIVIDER, 0x00); 3822 reg_w(sd, OV519_R25_FORMAT, 0x03); /* YUV422 */ 3823 reg_w(sd, 0x26, 0x00); /* Undocumented */ 3824 3825 /******** Set the framerate ********/ 3826 if (frame_rate > 0) 3827 sd->frame_rate = frame_rate; 3828 3829 /* FIXME: These are only valid at the max resolution. */ 3830 sd->clockdiv = 0; 3831 switch (sd->sensor) { 3832 case SEN_OV7640: 3833 case SEN_OV7648: 3834 switch (sd->frame_rate) { 3835 default: 3836 /* case 30: */ 3837 reg_w(sd, 0xa4, 0x0c); 3838 reg_w(sd, 0x23, 0xff); 3839 break; 3840 case 25: 3841 reg_w(sd, 0xa4, 0x0c); 3842 reg_w(sd, 0x23, 0x1f); 3843 break; 3844 case 20: 3845 reg_w(sd, 0xa4, 0x0c); 3846 reg_w(sd, 0x23, 0x1b); 3847 break; 3848 case 15: 3849 reg_w(sd, 0xa4, 0x04); 3850 reg_w(sd, 0x23, 0xff); 3851 sd->clockdiv = 1; 3852 break; 3853 case 10: 3854 reg_w(sd, 0xa4, 0x04); 3855 reg_w(sd, 0x23, 0x1f); 3856 sd->clockdiv = 1; 3857 break; 3858 case 5: 3859 reg_w(sd, 0xa4, 0x04); 3860 reg_w(sd, 0x23, 0x1b); 3861 sd->clockdiv = 1; 3862 break; 3863 } 3864 break; 3865 case SEN_OV8610: 3866 switch (sd->frame_rate) { 3867 default: /* 15 fps */ 3868 /* case 15: */ 3869 reg_w(sd, 0xa4, 0x06); 3870 reg_w(sd, 0x23, 0xff); 3871 break; 3872 case 10: 3873 reg_w(sd, 0xa4, 0x06); 3874 reg_w(sd, 0x23, 0x1f); 3875 break; 3876 case 5: 3877 reg_w(sd, 0xa4, 0x06); 3878 reg_w(sd, 0x23, 0x1b); 3879 break; 3880 } 3881 break; 3882 case SEN_OV7670: /* guesses, based on 7640 */ 3883 gspca_dbg(gspca_dev, D_STREAM, "Setting framerate to %d fps\n", 3884 (sd->frame_rate == 0) ? 15 : sd->frame_rate); 3885 reg_w(sd, 0xa4, 0x10); 3886 switch (sd->frame_rate) { 3887 case 30: 3888 reg_w(sd, 0x23, 0xff); 3889 break; 3890 case 20: 3891 reg_w(sd, 0x23, 0x1b); 3892 break; 3893 default: 3894 /* case 15: */ 3895 reg_w(sd, 0x23, 0xff); 3896 sd->clockdiv = 1; 3897 break; 3898 } 3899 break; 3900 } 3901 } 3902 3903 static void mode_init_ov_sensor_regs(struct sd *sd) 3904 { 3905 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd; 3906 int qvga, xstart, xend, ystart, yend; 3907 u8 v; 3908 3909 qvga = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 1; 3910 3911 /******** Mode (VGA/QVGA) and sensor specific regs ********/ 3912 switch (sd->sensor) { 3913 case SEN_OV2610: 3914 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20); 3915 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20); 3916 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a); 3917 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60); 3918 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40); 3919 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0); 3920 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20); 3921 return; 3922 case SEN_OV2610AE: { 3923 u8 v; 3924 3925 /* frame rates: 3926 * 10fps / 5 fps for 1600x1200 3927 * 40fps / 20fps for 800x600 3928 */ 3929 v = 80; 3930 if (qvga) { 3931 if (sd->frame_rate < 25) 3932 v = 0x81; 3933 } else { 3934 if (sd->frame_rate < 10) 3935 v = 0x81; 3936 } 3937 i2c_w(sd, 0x11, v); 3938 i2c_w(sd, 0x12, qvga ? 0x60 : 0x20); 3939 return; 3940 } 3941 case SEN_OV3610: 3942 if (qvga) { 3943 xstart = (1040 - gspca_dev->pixfmt.width) / 2 + 3944 (0x1f << 4); 3945 ystart = (776 - gspca_dev->pixfmt.height) / 2; 3946 } else { 3947 xstart = (2076 - gspca_dev->pixfmt.width) / 2 + 3948 (0x10 << 4); 3949 ystart = (1544 - gspca_dev->pixfmt.height) / 2; 3950 } 3951 xend = xstart + gspca_dev->pixfmt.width; 3952 yend = ystart + gspca_dev->pixfmt.height; 3953 /* Writing to the COMH register resets the other windowing regs 3954 to their default values, so we must do this first. */ 3955 i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0xf0); 3956 i2c_w_mask(sd, 0x32, 3957 (((xend >> 1) & 7) << 3) | ((xstart >> 1) & 7), 3958 0x3f); 3959 i2c_w_mask(sd, 0x03, 3960 (((yend >> 1) & 3) << 2) | ((ystart >> 1) & 3), 3961 0x0f); 3962 i2c_w(sd, 0x17, xstart >> 4); 3963 i2c_w(sd, 0x18, xend >> 4); 3964 i2c_w(sd, 0x19, ystart >> 3); 3965 i2c_w(sd, 0x1a, yend >> 3); 3966 return; 3967 case SEN_OV8610: 3968 /* For OV8610 qvga means qsvga */ 3969 i2c_w_mask(sd, OV7610_REG_COM_C, qvga ? (1 << 5) : 0, 1 << 5); 3970 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */ 3971 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */ 3972 i2c_w_mask(sd, 0x2d, 0x00, 0x40); /* from windrv 090403 */ 3973 i2c_w_mask(sd, 0x28, 0x20, 0x20); /* progressive mode on */ 3974 break; 3975 case SEN_OV7610: 3976 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20); 3977 i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e); 3978 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */ 3979 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */ 3980 break; 3981 case SEN_OV7620: 3982 case SEN_OV7620AE: 3983 case SEN_OV76BE: 3984 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20); 3985 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20); 3986 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a); 3987 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60); 3988 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40); 3989 i2c_w_mask(sd, 0x67, qvga ? 0xb0 : 0x90, 0xf0); 3990 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20); 3991 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */ 3992 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */ 3993 if (sd->sensor == SEN_OV76BE) 3994 i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e); 3995 break; 3996 case SEN_OV7640: 3997 case SEN_OV7648: 3998 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20); 3999 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20); 4000 /* Setting this undocumented bit in qvga mode removes a very 4001 annoying vertical shaking of the image */ 4002 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40); 4003 /* Unknown */ 4004 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0); 4005 /* Allow higher automatic gain (to allow higher framerates) */ 4006 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20); 4007 i2c_w_mask(sd, 0x12, 0x04, 0x04); /* AWB: 1 */ 4008 break; 4009 case SEN_OV7670: 4010 /* set COM7_FMT_VGA or COM7_FMT_QVGA 4011 * do we need to set anything else? 4012 * HSTART etc are set in set_ov_sensor_window itself */ 4013 i2c_w_mask(sd, OV7670_R12_COM7, 4014 qvga ? OV7670_COM7_FMT_QVGA : OV7670_COM7_FMT_VGA, 4015 OV7670_COM7_FMT_MASK); 4016 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */ 4017 i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_AWB, 4018 OV7670_COM8_AWB); 4019 if (qvga) { /* QVGA from ov7670.c by 4020 * Jonathan Corbet */ 4021 xstart = 164; 4022 xend = 28; 4023 ystart = 14; 4024 yend = 494; 4025 } else { /* VGA */ 4026 xstart = 158; 4027 xend = 14; 4028 ystart = 10; 4029 yend = 490; 4030 } 4031 /* OV7670 hardware window registers are split across 4032 * multiple locations */ 4033 i2c_w(sd, OV7670_R17_HSTART, xstart >> 3); 4034 i2c_w(sd, OV7670_R18_HSTOP, xend >> 3); 4035 v = i2c_r(sd, OV7670_R32_HREF); 4036 v = (v & 0xc0) | ((xend & 0x7) << 3) | (xstart & 0x07); 4037 msleep(10); /* need to sleep between read and write to 4038 * same reg! */ 4039 i2c_w(sd, OV7670_R32_HREF, v); 4040 4041 i2c_w(sd, OV7670_R19_VSTART, ystart >> 2); 4042 i2c_w(sd, OV7670_R1A_VSTOP, yend >> 2); 4043 v = i2c_r(sd, OV7670_R03_VREF); 4044 v = (v & 0xc0) | ((yend & 0x3) << 2) | (ystart & 0x03); 4045 msleep(10); /* need to sleep between read and write to 4046 * same reg! */ 4047 i2c_w(sd, OV7670_R03_VREF, v); 4048 break; 4049 case SEN_OV6620: 4050 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20); 4051 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */ 4052 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */ 4053 break; 4054 case SEN_OV6630: 4055 case SEN_OV66308AF: 4056 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20); 4057 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */ 4058 break; 4059 case SEN_OV9600: { 4060 const struct ov_i2c_regvals *vals; 4061 static const struct ov_i2c_regvals sxga_15[] = { 4062 {0x11, 0x80}, {0x14, 0x3e}, {0x24, 0x85}, {0x25, 0x75} 4063 }; 4064 static const struct ov_i2c_regvals sxga_7_5[] = { 4065 {0x11, 0x81}, {0x14, 0x3e}, {0x24, 0x85}, {0x25, 0x75} 4066 }; 4067 static const struct ov_i2c_regvals vga_30[] = { 4068 {0x11, 0x81}, {0x14, 0x7e}, {0x24, 0x70}, {0x25, 0x60} 4069 }; 4070 static const struct ov_i2c_regvals vga_15[] = { 4071 {0x11, 0x83}, {0x14, 0x3e}, {0x24, 0x80}, {0x25, 0x70} 4072 }; 4073 4074 /* frame rates: 4075 * 15fps / 7.5 fps for 1280x1024 4076 * 30fps / 15fps for 640x480 4077 */ 4078 i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0x40); 4079 if (qvga) 4080 vals = sd->frame_rate < 30 ? vga_15 : vga_30; 4081 else 4082 vals = sd->frame_rate < 15 ? sxga_7_5 : sxga_15; 4083 write_i2c_regvals(sd, vals, ARRAY_SIZE(sxga_15)); 4084 return; 4085 } 4086 default: 4087 return; 4088 } 4089 4090 /******** Clock programming ********/ 4091 i2c_w(sd, 0x11, sd->clockdiv); 4092 } 4093 4094 /* this function works for bridge ov519 and sensors ov7660 and ov7670 only */ 4095 static void sethvflip(struct gspca_dev *gspca_dev, s32 hflip, s32 vflip) 4096 { 4097 struct sd *sd = (struct sd *) gspca_dev; 4098 4099 if (sd->gspca_dev.streaming) 4100 reg_w(sd, OV519_R51_RESET1, 0x0f); /* block stream */ 4101 i2c_w_mask(sd, OV7670_R1E_MVFP, 4102 OV7670_MVFP_MIRROR * hflip | OV7670_MVFP_VFLIP * vflip, 4103 OV7670_MVFP_MIRROR | OV7670_MVFP_VFLIP); 4104 if (sd->gspca_dev.streaming) 4105 reg_w(sd, OV519_R51_RESET1, 0x00); /* restart stream */ 4106 } 4107 4108 static void set_ov_sensor_window(struct sd *sd) 4109 { 4110 struct gspca_dev *gspca_dev; 4111 int qvga, crop; 4112 int hwsbase, hwebase, vwsbase, vwebase, hwscale, vwscale; 4113 4114 /* mode setup is fully handled in mode_init_ov_sensor_regs for these */ 4115 switch (sd->sensor) { 4116 case SEN_OV2610: 4117 case SEN_OV2610AE: 4118 case SEN_OV3610: 4119 case SEN_OV7670: 4120 case SEN_OV9600: 4121 mode_init_ov_sensor_regs(sd); 4122 return; 4123 case SEN_OV7660: 4124 ov519_set_mode(sd); 4125 ov519_set_fr(sd); 4126 return; 4127 } 4128 4129 gspca_dev = &sd->gspca_dev; 4130 qvga = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 1; 4131 crop = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 2; 4132 4133 /* The different sensor ICs handle setting up of window differently. 4134 * IF YOU SET IT WRONG, YOU WILL GET ALL ZERO ISOC DATA FROM OV51x!! */ 4135 switch (sd->sensor) { 4136 case SEN_OV8610: 4137 hwsbase = 0x1e; 4138 hwebase = 0x1e; 4139 vwsbase = 0x02; 4140 vwebase = 0x02; 4141 break; 4142 case SEN_OV7610: 4143 case SEN_OV76BE: 4144 hwsbase = 0x38; 4145 hwebase = 0x3a; 4146 vwsbase = vwebase = 0x05; 4147 break; 4148 case SEN_OV6620: 4149 case SEN_OV6630: 4150 case SEN_OV66308AF: 4151 hwsbase = 0x38; 4152 hwebase = 0x3a; 4153 vwsbase = 0x05; 4154 vwebase = 0x06; 4155 if (sd->sensor == SEN_OV66308AF && qvga) 4156 /* HDG: this fixes U and V getting swapped */ 4157 hwsbase++; 4158 if (crop) { 4159 hwsbase += 8; 4160 hwebase += 8; 4161 vwsbase += 11; 4162 vwebase += 11; 4163 } 4164 break; 4165 case SEN_OV7620: 4166 case SEN_OV7620AE: 4167 hwsbase = 0x2f; /* From 7620.SET (spec is wrong) */ 4168 hwebase = 0x2f; 4169 vwsbase = vwebase = 0x05; 4170 break; 4171 case SEN_OV7640: 4172 case SEN_OV7648: 4173 hwsbase = 0x1a; 4174 hwebase = 0x1a; 4175 vwsbase = vwebase = 0x03; 4176 break; 4177 default: 4178 return; 4179 } 4180 4181 switch (sd->sensor) { 4182 case SEN_OV6620: 4183 case SEN_OV6630: 4184 case SEN_OV66308AF: 4185 if (qvga) { /* QCIF */ 4186 hwscale = 0; 4187 vwscale = 0; 4188 } else { /* CIF */ 4189 hwscale = 1; 4190 vwscale = 1; /* The datasheet says 0; 4191 * it's wrong */ 4192 } 4193 break; 4194 case SEN_OV8610: 4195 if (qvga) { /* QSVGA */ 4196 hwscale = 1; 4197 vwscale = 1; 4198 } else { /* SVGA */ 4199 hwscale = 2; 4200 vwscale = 2; 4201 } 4202 break; 4203 default: /* SEN_OV7xx0 */ 4204 if (qvga) { /* QVGA */ 4205 hwscale = 1; 4206 vwscale = 0; 4207 } else { /* VGA */ 4208 hwscale = 2; 4209 vwscale = 1; 4210 } 4211 } 4212 4213 mode_init_ov_sensor_regs(sd); 4214 4215 i2c_w(sd, 0x17, hwsbase); 4216 i2c_w(sd, 0x18, hwebase + (sd->sensor_width >> hwscale)); 4217 i2c_w(sd, 0x19, vwsbase); 4218 i2c_w(sd, 0x1a, vwebase + (sd->sensor_height >> vwscale)); 4219 } 4220 4221 /* -- start the camera -- */ 4222 static int sd_start(struct gspca_dev *gspca_dev) 4223 { 4224 struct sd *sd = (struct sd *) gspca_dev; 4225 4226 /* Default for most bridges, allow bridge_mode_init_regs to override */ 4227 sd->sensor_width = sd->gspca_dev.pixfmt.width; 4228 sd->sensor_height = sd->gspca_dev.pixfmt.height; 4229 4230 switch (sd->bridge) { 4231 case BRIDGE_OV511: 4232 case BRIDGE_OV511PLUS: 4233 ov511_mode_init_regs(sd); 4234 break; 4235 case BRIDGE_OV518: 4236 case BRIDGE_OV518PLUS: 4237 ov518_mode_init_regs(sd); 4238 break; 4239 case BRIDGE_OV519: 4240 ov519_mode_init_regs(sd); 4241 break; 4242 /* case BRIDGE_OVFX2: nothing to do */ 4243 case BRIDGE_W9968CF: 4244 w9968cf_mode_init_regs(sd); 4245 break; 4246 } 4247 4248 set_ov_sensor_window(sd); 4249 4250 /* Force clear snapshot state in case the snapshot button was 4251 pressed while we weren't streaming */ 4252 sd->snapshot_needs_reset = 1; 4253 sd_reset_snapshot(gspca_dev); 4254 4255 sd->first_frame = 3; 4256 4257 ov51x_restart(sd); 4258 ov51x_led_control(sd, 1); 4259 return gspca_dev->usb_err; 4260 } 4261 4262 static void sd_stopN(struct gspca_dev *gspca_dev) 4263 { 4264 struct sd *sd = (struct sd *) gspca_dev; 4265 4266 ov51x_stop(sd); 4267 ov51x_led_control(sd, 0); 4268 } 4269 4270 static void sd_stop0(struct gspca_dev *gspca_dev) 4271 { 4272 struct sd *sd = (struct sd *) gspca_dev; 4273 4274 if (!sd->gspca_dev.present) 4275 return; 4276 if (sd->bridge == BRIDGE_W9968CF) 4277 w9968cf_stop0(sd); 4278 4279 #if IS_ENABLED(CONFIG_INPUT) 4280 /* If the last button state is pressed, release it now! */ 4281 if (sd->snapshot_pressed) { 4282 input_report_key(gspca_dev->input_dev, KEY_CAMERA, 0); 4283 input_sync(gspca_dev->input_dev); 4284 sd->snapshot_pressed = 0; 4285 } 4286 #endif 4287 if (sd->bridge == BRIDGE_OV519) 4288 reg_w(sd, OV519_R57_SNAPSHOT, 0x23); 4289 } 4290 4291 static void ov51x_handle_button(struct gspca_dev *gspca_dev, u8 state) 4292 { 4293 struct sd *sd = (struct sd *) gspca_dev; 4294 4295 if (sd->snapshot_pressed != state) { 4296 #if IS_ENABLED(CONFIG_INPUT) 4297 input_report_key(gspca_dev->input_dev, KEY_CAMERA, state); 4298 input_sync(gspca_dev->input_dev); 4299 #endif 4300 if (state) 4301 sd->snapshot_needs_reset = 1; 4302 4303 sd->snapshot_pressed = state; 4304 } else { 4305 /* On the ov511 / ov519 we need to reset the button state 4306 multiple times, as resetting does not work as long as the 4307 button stays pressed */ 4308 switch (sd->bridge) { 4309 case BRIDGE_OV511: 4310 case BRIDGE_OV511PLUS: 4311 case BRIDGE_OV519: 4312 if (state) 4313 sd->snapshot_needs_reset = 1; 4314 break; 4315 } 4316 } 4317 } 4318 4319 static void ov511_pkt_scan(struct gspca_dev *gspca_dev, 4320 u8 *in, /* isoc packet */ 4321 int len) /* iso packet length */ 4322 { 4323 struct sd *sd = (struct sd *) gspca_dev; 4324 4325 /* SOF/EOF packets have 1st to 8th bytes zeroed and the 9th 4326 * byte non-zero. The EOF packet has image width/height in the 4327 * 10th and 11th bytes. The 9th byte is given as follows: 4328 * 4329 * bit 7: EOF 4330 * 6: compression enabled 4331 * 5: 422/420/400 modes 4332 * 4: 422/420/400 modes 4333 * 3: 1 4334 * 2: snapshot button on 4335 * 1: snapshot frame 4336 * 0: even/odd field 4337 */ 4338 if (!(in[0] | in[1] | in[2] | in[3] | in[4] | in[5] | in[6] | in[7]) && 4339 (in[8] & 0x08)) { 4340 ov51x_handle_button(gspca_dev, (in[8] >> 2) & 1); 4341 if (in[8] & 0x80) { 4342 /* Frame end */ 4343 if ((in[9] + 1) * 8 != gspca_dev->pixfmt.width || 4344 (in[10] + 1) * 8 != gspca_dev->pixfmt.height) { 4345 gspca_err(gspca_dev, "Invalid frame size, got: %dx%d, requested: %dx%d\n", 4346 (in[9] + 1) * 8, (in[10] + 1) * 8, 4347 gspca_dev->pixfmt.width, 4348 gspca_dev->pixfmt.height); 4349 gspca_dev->last_packet_type = DISCARD_PACKET; 4350 return; 4351 } 4352 /* Add 11 byte footer to frame, might be useful */ 4353 gspca_frame_add(gspca_dev, LAST_PACKET, in, 11); 4354 return; 4355 } else { 4356 /* Frame start */ 4357 gspca_frame_add(gspca_dev, FIRST_PACKET, in, 0); 4358 sd->packet_nr = 0; 4359 } 4360 } 4361 4362 /* Ignore the packet number */ 4363 len--; 4364 4365 /* intermediate packet */ 4366 gspca_frame_add(gspca_dev, INTER_PACKET, in, len); 4367 } 4368 4369 static void ov518_pkt_scan(struct gspca_dev *gspca_dev, 4370 u8 *data, /* isoc packet */ 4371 int len) /* iso packet length */ 4372 { 4373 struct sd *sd = (struct sd *) gspca_dev; 4374 4375 /* A false positive here is likely, until OVT gives me 4376 * the definitive SOF/EOF format */ 4377 if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) { 4378 ov51x_handle_button(gspca_dev, (data[6] >> 1) & 1); 4379 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0); 4380 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0); 4381 sd->packet_nr = 0; 4382 } 4383 4384 if (gspca_dev->last_packet_type == DISCARD_PACKET) 4385 return; 4386 4387 /* Does this device use packet numbers ? */ 4388 if (len & 7) { 4389 len--; 4390 if (sd->packet_nr == data[len]) 4391 sd->packet_nr++; 4392 /* The last few packets of the frame (which are all 0's 4393 except that they may contain part of the footer), are 4394 numbered 0 */ 4395 else if (sd->packet_nr == 0 || data[len]) { 4396 gspca_err(gspca_dev, "Invalid packet nr: %d (expect: %d)\n", 4397 (int)data[len], (int)sd->packet_nr); 4398 gspca_dev->last_packet_type = DISCARD_PACKET; 4399 return; 4400 } 4401 } 4402 4403 /* intermediate packet */ 4404 gspca_frame_add(gspca_dev, INTER_PACKET, data, len); 4405 } 4406 4407 static void ov519_pkt_scan(struct gspca_dev *gspca_dev, 4408 u8 *data, /* isoc packet */ 4409 int len) /* iso packet length */ 4410 { 4411 /* Header of ov519 is 16 bytes: 4412 * Byte Value Description 4413 * 0 0xff magic 4414 * 1 0xff magic 4415 * 2 0xff magic 4416 * 3 0xXX 0x50 = SOF, 0x51 = EOF 4417 * 9 0xXX 0x01 initial frame without data, 4418 * 0x00 standard frame with image 4419 * 14 Lo in EOF: length of image data / 8 4420 * 15 Hi 4421 */ 4422 4423 if (data[0] == 0xff && data[1] == 0xff && data[2] == 0xff) { 4424 switch (data[3]) { 4425 case 0x50: /* start of frame */ 4426 /* Don't check the button state here, as the state 4427 usually (always ?) changes at EOF and checking it 4428 here leads to unnecessary snapshot state resets. */ 4429 #define HDRSZ 16 4430 data += HDRSZ; 4431 len -= HDRSZ; 4432 #undef HDRSZ 4433 if (data[0] == 0xff || data[1] == 0xd8) 4434 gspca_frame_add(gspca_dev, FIRST_PACKET, 4435 data, len); 4436 else 4437 gspca_dev->last_packet_type = DISCARD_PACKET; 4438 return; 4439 case 0x51: /* end of frame */ 4440 ov51x_handle_button(gspca_dev, data[11] & 1); 4441 if (data[9] != 0) 4442 gspca_dev->last_packet_type = DISCARD_PACKET; 4443 gspca_frame_add(gspca_dev, LAST_PACKET, 4444 NULL, 0); 4445 return; 4446 } 4447 } 4448 4449 /* intermediate packet */ 4450 gspca_frame_add(gspca_dev, INTER_PACKET, data, len); 4451 } 4452 4453 static void ovfx2_pkt_scan(struct gspca_dev *gspca_dev, 4454 u8 *data, /* isoc packet */ 4455 int len) /* iso packet length */ 4456 { 4457 struct sd *sd = (struct sd *) gspca_dev; 4458 4459 gspca_frame_add(gspca_dev, INTER_PACKET, data, len); 4460 4461 /* A short read signals EOF */ 4462 if (len < gspca_dev->cam.bulk_size) { 4463 /* If the frame is short, and it is one of the first ones 4464 the sensor and bridge are still syncing, so drop it. */ 4465 if (sd->first_frame) { 4466 sd->first_frame--; 4467 if (gspca_dev->image_len < 4468 sd->gspca_dev.pixfmt.width * 4469 sd->gspca_dev.pixfmt.height) 4470 gspca_dev->last_packet_type = DISCARD_PACKET; 4471 } 4472 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0); 4473 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0); 4474 } 4475 } 4476 4477 static void sd_pkt_scan(struct gspca_dev *gspca_dev, 4478 u8 *data, /* isoc packet */ 4479 int len) /* iso packet length */ 4480 { 4481 struct sd *sd = (struct sd *) gspca_dev; 4482 4483 switch (sd->bridge) { 4484 case BRIDGE_OV511: 4485 case BRIDGE_OV511PLUS: 4486 ov511_pkt_scan(gspca_dev, data, len); 4487 break; 4488 case BRIDGE_OV518: 4489 case BRIDGE_OV518PLUS: 4490 ov518_pkt_scan(gspca_dev, data, len); 4491 break; 4492 case BRIDGE_OV519: 4493 ov519_pkt_scan(gspca_dev, data, len); 4494 break; 4495 case BRIDGE_OVFX2: 4496 ovfx2_pkt_scan(gspca_dev, data, len); 4497 break; 4498 case BRIDGE_W9968CF: 4499 w9968cf_pkt_scan(gspca_dev, data, len); 4500 break; 4501 } 4502 } 4503 4504 /* -- management routines -- */ 4505 4506 static void setbrightness(struct gspca_dev *gspca_dev, s32 val) 4507 { 4508 struct sd *sd = (struct sd *) gspca_dev; 4509 static const struct ov_i2c_regvals brit_7660[][7] = { 4510 {{0x0f, 0x6a}, {0x24, 0x40}, {0x25, 0x2b}, {0x26, 0x90}, 4511 {0x27, 0xe0}, {0x28, 0xe0}, {0x2c, 0xe0}}, 4512 {{0x0f, 0x6a}, {0x24, 0x50}, {0x25, 0x40}, {0x26, 0xa1}, 4513 {0x27, 0xc0}, {0x28, 0xc0}, {0x2c, 0xc0}}, 4514 {{0x0f, 0x6a}, {0x24, 0x68}, {0x25, 0x58}, {0x26, 0xc2}, 4515 {0x27, 0xa0}, {0x28, 0xa0}, {0x2c, 0xa0}}, 4516 {{0x0f, 0x6a}, {0x24, 0x70}, {0x25, 0x68}, {0x26, 0xd3}, 4517 {0x27, 0x80}, {0x28, 0x80}, {0x2c, 0x80}}, 4518 {{0x0f, 0x6a}, {0x24, 0x80}, {0x25, 0x70}, {0x26, 0xd3}, 4519 {0x27, 0x20}, {0x28, 0x20}, {0x2c, 0x20}}, 4520 {{0x0f, 0x6a}, {0x24, 0x88}, {0x25, 0x78}, {0x26, 0xd3}, 4521 {0x27, 0x40}, {0x28, 0x40}, {0x2c, 0x40}}, 4522 {{0x0f, 0x6a}, {0x24, 0x90}, {0x25, 0x80}, {0x26, 0xd4}, 4523 {0x27, 0x60}, {0x28, 0x60}, {0x2c, 0x60}} 4524 }; 4525 4526 switch (sd->sensor) { 4527 case SEN_OV8610: 4528 case SEN_OV7610: 4529 case SEN_OV76BE: 4530 case SEN_OV6620: 4531 case SEN_OV6630: 4532 case SEN_OV66308AF: 4533 case SEN_OV7640: 4534 case SEN_OV7648: 4535 i2c_w(sd, OV7610_REG_BRT, val); 4536 break; 4537 case SEN_OV7620: 4538 case SEN_OV7620AE: 4539 i2c_w(sd, OV7610_REG_BRT, val); 4540 break; 4541 case SEN_OV7660: 4542 write_i2c_regvals(sd, brit_7660[val], 4543 ARRAY_SIZE(brit_7660[0])); 4544 break; 4545 case SEN_OV7670: 4546 /*win trace 4547 * i2c_w_mask(sd, OV7670_R13_COM8, 0, OV7670_COM8_AEC); */ 4548 i2c_w(sd, OV7670_R55_BRIGHT, ov7670_abs_to_sm(val)); 4549 break; 4550 } 4551 } 4552 4553 static void setcontrast(struct gspca_dev *gspca_dev, s32 val) 4554 { 4555 struct sd *sd = (struct sd *) gspca_dev; 4556 static const struct ov_i2c_regvals contrast_7660[][31] = { 4557 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf8}, {0x6f, 0xa0}, 4558 {0x70, 0x58}, {0x71, 0x38}, {0x72, 0x30}, {0x73, 0x30}, 4559 {0x74, 0x28}, {0x75, 0x28}, {0x76, 0x24}, {0x77, 0x24}, 4560 {0x78, 0x22}, {0x79, 0x28}, {0x7a, 0x2a}, {0x7b, 0x34}, 4561 {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3d}, {0x7f, 0x65}, 4562 {0x80, 0x70}, {0x81, 0x77}, {0x82, 0x7d}, {0x83, 0x83}, 4563 {0x84, 0x88}, {0x85, 0x8d}, {0x86, 0x96}, {0x87, 0x9f}, 4564 {0x88, 0xb0}, {0x89, 0xc4}, {0x8a, 0xd9}}, 4565 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf8}, {0x6f, 0x94}, 4566 {0x70, 0x58}, {0x71, 0x40}, {0x72, 0x30}, {0x73, 0x30}, 4567 {0x74, 0x30}, {0x75, 0x30}, {0x76, 0x2c}, {0x77, 0x24}, 4568 {0x78, 0x22}, {0x79, 0x28}, {0x7a, 0x2a}, {0x7b, 0x31}, 4569 {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3d}, {0x7f, 0x62}, 4570 {0x80, 0x6d}, {0x81, 0x75}, {0x82, 0x7b}, {0x83, 0x81}, 4571 {0x84, 0x87}, {0x85, 0x8d}, {0x86, 0x98}, {0x87, 0xa1}, 4572 {0x88, 0xb2}, {0x89, 0xc6}, {0x8a, 0xdb}}, 4573 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf0}, {0x6f, 0x84}, 4574 {0x70, 0x58}, {0x71, 0x48}, {0x72, 0x40}, {0x73, 0x40}, 4575 {0x74, 0x28}, {0x75, 0x28}, {0x76, 0x28}, {0x77, 0x24}, 4576 {0x78, 0x26}, {0x79, 0x28}, {0x7a, 0x28}, {0x7b, 0x34}, 4577 {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3c}, {0x7f, 0x5d}, 4578 {0x80, 0x68}, {0x81, 0x71}, {0x82, 0x79}, {0x83, 0x81}, 4579 {0x84, 0x86}, {0x85, 0x8b}, {0x86, 0x95}, {0x87, 0x9e}, 4580 {0x88, 0xb1}, {0x89, 0xc5}, {0x8a, 0xd9}}, 4581 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf0}, {0x6f, 0x70}, 4582 {0x70, 0x58}, {0x71, 0x58}, {0x72, 0x48}, {0x73, 0x48}, 4583 {0x74, 0x38}, {0x75, 0x40}, {0x76, 0x34}, {0x77, 0x34}, 4584 {0x78, 0x2e}, {0x79, 0x28}, {0x7a, 0x24}, {0x7b, 0x22}, 4585 {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3c}, {0x7f, 0x58}, 4586 {0x80, 0x63}, {0x81, 0x6e}, {0x82, 0x77}, {0x83, 0x80}, 4587 {0x84, 0x87}, {0x85, 0x8f}, {0x86, 0x9c}, {0x87, 0xa9}, 4588 {0x88, 0xc0}, {0x89, 0xd4}, {0x8a, 0xe6}}, 4589 {{0x6c, 0xa0}, {0x6d, 0xf0}, {0x6e, 0x90}, {0x6f, 0x80}, 4590 {0x70, 0x70}, {0x71, 0x80}, {0x72, 0x60}, {0x73, 0x60}, 4591 {0x74, 0x58}, {0x75, 0x60}, {0x76, 0x4c}, {0x77, 0x38}, 4592 {0x78, 0x38}, {0x79, 0x2a}, {0x7a, 0x20}, {0x7b, 0x0e}, 4593 {0x7c, 0x0a}, {0x7d, 0x14}, {0x7e, 0x26}, {0x7f, 0x46}, 4594 {0x80, 0x54}, {0x81, 0x64}, {0x82, 0x70}, {0x83, 0x7c}, 4595 {0x84, 0x87}, {0x85, 0x93}, {0x86, 0xa6}, {0x87, 0xb4}, 4596 {0x88, 0xd0}, {0x89, 0xe5}, {0x8a, 0xf5}}, 4597 {{0x6c, 0x60}, {0x6d, 0x80}, {0x6e, 0x60}, {0x6f, 0x80}, 4598 {0x70, 0x80}, {0x71, 0x80}, {0x72, 0x88}, {0x73, 0x30}, 4599 {0x74, 0x70}, {0x75, 0x68}, {0x76, 0x64}, {0x77, 0x50}, 4600 {0x78, 0x3c}, {0x79, 0x22}, {0x7a, 0x10}, {0x7b, 0x08}, 4601 {0x7c, 0x06}, {0x7d, 0x0e}, {0x7e, 0x1a}, {0x7f, 0x3a}, 4602 {0x80, 0x4a}, {0x81, 0x5a}, {0x82, 0x6b}, {0x83, 0x7b}, 4603 {0x84, 0x89}, {0x85, 0x96}, {0x86, 0xaf}, {0x87, 0xc3}, 4604 {0x88, 0xe1}, {0x89, 0xf2}, {0x8a, 0xfa}}, 4605 {{0x6c, 0x20}, {0x6d, 0x40}, {0x6e, 0x20}, {0x6f, 0x60}, 4606 {0x70, 0x88}, {0x71, 0xc8}, {0x72, 0xc0}, {0x73, 0xb8}, 4607 {0x74, 0xa8}, {0x75, 0xb8}, {0x76, 0x80}, {0x77, 0x5c}, 4608 {0x78, 0x26}, {0x79, 0x10}, {0x7a, 0x08}, {0x7b, 0x04}, 4609 {0x7c, 0x02}, {0x7d, 0x06}, {0x7e, 0x0a}, {0x7f, 0x22}, 4610 {0x80, 0x33}, {0x81, 0x4c}, {0x82, 0x64}, {0x83, 0x7b}, 4611 {0x84, 0x90}, {0x85, 0xa7}, {0x86, 0xc7}, {0x87, 0xde}, 4612 {0x88, 0xf1}, {0x89, 0xf9}, {0x8a, 0xfd}}, 4613 }; 4614 4615 switch (sd->sensor) { 4616 case SEN_OV7610: 4617 case SEN_OV6620: 4618 i2c_w(sd, OV7610_REG_CNT, val); 4619 break; 4620 case SEN_OV6630: 4621 case SEN_OV66308AF: 4622 i2c_w_mask(sd, OV7610_REG_CNT, val >> 4, 0x0f); 4623 break; 4624 case SEN_OV8610: { 4625 static const u8 ctab[] = { 4626 0x03, 0x09, 0x0b, 0x0f, 0x53, 0x6f, 0x35, 0x7f 4627 }; 4628 4629 /* Use Y gamma control instead. Bit 0 enables it. */ 4630 i2c_w(sd, 0x64, ctab[val >> 5]); 4631 break; 4632 } 4633 case SEN_OV7620: 4634 case SEN_OV7620AE: { 4635 static const u8 ctab[] = { 4636 0x01, 0x05, 0x09, 0x11, 0x15, 0x35, 0x37, 0x57, 4637 0x5b, 0xa5, 0xa7, 0xc7, 0xc9, 0xcf, 0xef, 0xff 4638 }; 4639 4640 /* Use Y gamma control instead. Bit 0 enables it. */ 4641 i2c_w(sd, 0x64, ctab[val >> 4]); 4642 break; 4643 } 4644 case SEN_OV7660: 4645 write_i2c_regvals(sd, contrast_7660[val], 4646 ARRAY_SIZE(contrast_7660[0])); 4647 break; 4648 case SEN_OV7670: 4649 /* check that this isn't just the same as ov7610 */ 4650 i2c_w(sd, OV7670_R56_CONTRAS, val >> 1); 4651 break; 4652 } 4653 } 4654 4655 static void setexposure(struct gspca_dev *gspca_dev, s32 val) 4656 { 4657 struct sd *sd = (struct sd *) gspca_dev; 4658 4659 i2c_w(sd, 0x10, val); 4660 } 4661 4662 static void setcolors(struct gspca_dev *gspca_dev, s32 val) 4663 { 4664 struct sd *sd = (struct sd *) gspca_dev; 4665 static const struct ov_i2c_regvals colors_7660[][6] = { 4666 {{0x4f, 0x28}, {0x50, 0x2a}, {0x51, 0x02}, {0x52, 0x0a}, 4667 {0x53, 0x19}, {0x54, 0x23}}, 4668 {{0x4f, 0x47}, {0x50, 0x4a}, {0x51, 0x03}, {0x52, 0x11}, 4669 {0x53, 0x2c}, {0x54, 0x3e}}, 4670 {{0x4f, 0x66}, {0x50, 0x6b}, {0x51, 0x05}, {0x52, 0x19}, 4671 {0x53, 0x40}, {0x54, 0x59}}, 4672 {{0x4f, 0x84}, {0x50, 0x8b}, {0x51, 0x06}, {0x52, 0x20}, 4673 {0x53, 0x53}, {0x54, 0x73}}, 4674 {{0x4f, 0xa3}, {0x50, 0xab}, {0x51, 0x08}, {0x52, 0x28}, 4675 {0x53, 0x66}, {0x54, 0x8e}}, 4676 }; 4677 4678 switch (sd->sensor) { 4679 case SEN_OV8610: 4680 case SEN_OV7610: 4681 case SEN_OV76BE: 4682 case SEN_OV6620: 4683 case SEN_OV6630: 4684 case SEN_OV66308AF: 4685 i2c_w(sd, OV7610_REG_SAT, val); 4686 break; 4687 case SEN_OV7620: 4688 case SEN_OV7620AE: 4689 /* Use UV gamma control instead. Bits 0 & 7 are reserved. */ 4690 /* rc = ov_i2c_write(sd->dev, 0x62, (val >> 9) & 0x7e); 4691 if (rc < 0) 4692 goto out; */ 4693 i2c_w(sd, OV7610_REG_SAT, val); 4694 break; 4695 case SEN_OV7640: 4696 case SEN_OV7648: 4697 i2c_w(sd, OV7610_REG_SAT, val & 0xf0); 4698 break; 4699 case SEN_OV7660: 4700 write_i2c_regvals(sd, colors_7660[val], 4701 ARRAY_SIZE(colors_7660[0])); 4702 break; 4703 case SEN_OV7670: 4704 /* supported later once I work out how to do it 4705 * transparently fail now! */ 4706 /* set REG_COM13 values for UV sat auto mode */ 4707 break; 4708 } 4709 } 4710 4711 static void setautobright(struct gspca_dev *gspca_dev, s32 val) 4712 { 4713 struct sd *sd = (struct sd *) gspca_dev; 4714 4715 i2c_w_mask(sd, 0x2d, val ? 0x10 : 0x00, 0x10); 4716 } 4717 4718 static void setfreq_i(struct sd *sd, s32 val) 4719 { 4720 if (sd->sensor == SEN_OV7660 4721 || sd->sensor == SEN_OV7670) { 4722 switch (val) { 4723 case 0: /* Banding filter disabled */ 4724 i2c_w_mask(sd, OV7670_R13_COM8, 0, OV7670_COM8_BFILT); 4725 break; 4726 case 1: /* 50 hz */ 4727 i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT, 4728 OV7670_COM8_BFILT); 4729 i2c_w_mask(sd, OV7670_R3B_COM11, 0x08, 0x18); 4730 break; 4731 case 2: /* 60 hz */ 4732 i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT, 4733 OV7670_COM8_BFILT); 4734 i2c_w_mask(sd, OV7670_R3B_COM11, 0x00, 0x18); 4735 break; 4736 case 3: /* Auto hz - ov7670 only */ 4737 i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT, 4738 OV7670_COM8_BFILT); 4739 i2c_w_mask(sd, OV7670_R3B_COM11, OV7670_COM11_HZAUTO, 4740 0x18); 4741 break; 4742 } 4743 } else { 4744 switch (val) { 4745 case 0: /* Banding filter disabled */ 4746 i2c_w_mask(sd, 0x2d, 0x00, 0x04); 4747 i2c_w_mask(sd, 0x2a, 0x00, 0x80); 4748 break; 4749 case 1: /* 50 hz (filter on and framerate adj) */ 4750 i2c_w_mask(sd, 0x2d, 0x04, 0x04); 4751 i2c_w_mask(sd, 0x2a, 0x80, 0x80); 4752 /* 20 fps -> 16.667 fps */ 4753 if (sd->sensor == SEN_OV6620 || 4754 sd->sensor == SEN_OV6630 || 4755 sd->sensor == SEN_OV66308AF) 4756 i2c_w(sd, 0x2b, 0x5e); 4757 else 4758 i2c_w(sd, 0x2b, 0xac); 4759 break; 4760 case 2: /* 60 hz (filter on, ...) */ 4761 i2c_w_mask(sd, 0x2d, 0x04, 0x04); 4762 if (sd->sensor == SEN_OV6620 || 4763 sd->sensor == SEN_OV6630 || 4764 sd->sensor == SEN_OV66308AF) { 4765 /* 20 fps -> 15 fps */ 4766 i2c_w_mask(sd, 0x2a, 0x80, 0x80); 4767 i2c_w(sd, 0x2b, 0xa8); 4768 } else { 4769 /* no framerate adj. */ 4770 i2c_w_mask(sd, 0x2a, 0x00, 0x80); 4771 } 4772 break; 4773 } 4774 } 4775 } 4776 4777 static void setfreq(struct gspca_dev *gspca_dev, s32 val) 4778 { 4779 struct sd *sd = (struct sd *) gspca_dev; 4780 4781 setfreq_i(sd, val); 4782 4783 /* Ugly but necessary */ 4784 if (sd->bridge == BRIDGE_W9968CF) 4785 w9968cf_set_crop_window(sd); 4786 } 4787 4788 static int sd_get_jcomp(struct gspca_dev *gspca_dev, 4789 struct v4l2_jpegcompression *jcomp) 4790 { 4791 struct sd *sd = (struct sd *) gspca_dev; 4792 4793 if (sd->bridge != BRIDGE_W9968CF) 4794 return -ENOTTY; 4795 4796 memset(jcomp, 0, sizeof *jcomp); 4797 jcomp->quality = v4l2_ctrl_g_ctrl(sd->jpegqual); 4798 jcomp->jpeg_markers = V4L2_JPEG_MARKER_DHT | V4L2_JPEG_MARKER_DQT | 4799 V4L2_JPEG_MARKER_DRI; 4800 return 0; 4801 } 4802 4803 static int sd_set_jcomp(struct gspca_dev *gspca_dev, 4804 const struct v4l2_jpegcompression *jcomp) 4805 { 4806 struct sd *sd = (struct sd *) gspca_dev; 4807 4808 if (sd->bridge != BRIDGE_W9968CF) 4809 return -ENOTTY; 4810 4811 v4l2_ctrl_s_ctrl(sd->jpegqual, jcomp->quality); 4812 return 0; 4813 } 4814 4815 static int sd_g_volatile_ctrl(struct v4l2_ctrl *ctrl) 4816 { 4817 struct gspca_dev *gspca_dev = 4818 container_of(ctrl->handler, struct gspca_dev, ctrl_handler); 4819 struct sd *sd = (struct sd *)gspca_dev; 4820 4821 gspca_dev->usb_err = 0; 4822 4823 switch (ctrl->id) { 4824 case V4L2_CID_AUTOGAIN: 4825 gspca_dev->exposure->val = i2c_r(sd, 0x10); 4826 break; 4827 } 4828 return 0; 4829 } 4830 4831 static int sd_s_ctrl(struct v4l2_ctrl *ctrl) 4832 { 4833 struct gspca_dev *gspca_dev = 4834 container_of(ctrl->handler, struct gspca_dev, ctrl_handler); 4835 struct sd *sd = (struct sd *)gspca_dev; 4836 4837 gspca_dev->usb_err = 0; 4838 4839 if (!gspca_dev->streaming) 4840 return 0; 4841 4842 switch (ctrl->id) { 4843 case V4L2_CID_BRIGHTNESS: 4844 setbrightness(gspca_dev, ctrl->val); 4845 break; 4846 case V4L2_CID_CONTRAST: 4847 setcontrast(gspca_dev, ctrl->val); 4848 break; 4849 case V4L2_CID_POWER_LINE_FREQUENCY: 4850 setfreq(gspca_dev, ctrl->val); 4851 break; 4852 case V4L2_CID_AUTOBRIGHTNESS: 4853 if (ctrl->is_new) 4854 setautobright(gspca_dev, ctrl->val); 4855 if (!ctrl->val && sd->brightness->is_new) 4856 setbrightness(gspca_dev, sd->brightness->val); 4857 break; 4858 case V4L2_CID_SATURATION: 4859 setcolors(gspca_dev, ctrl->val); 4860 break; 4861 case V4L2_CID_HFLIP: 4862 sethvflip(gspca_dev, ctrl->val, sd->vflip->val); 4863 break; 4864 case V4L2_CID_AUTOGAIN: 4865 if (ctrl->is_new) 4866 setautogain(gspca_dev, ctrl->val); 4867 if (!ctrl->val && gspca_dev->exposure->is_new) 4868 setexposure(gspca_dev, gspca_dev->exposure->val); 4869 break; 4870 case V4L2_CID_JPEG_COMPRESSION_QUALITY: 4871 return -EBUSY; /* Should never happen, as we grab the ctrl */ 4872 } 4873 return gspca_dev->usb_err; 4874 } 4875 4876 static const struct v4l2_ctrl_ops sd_ctrl_ops = { 4877 .g_volatile_ctrl = sd_g_volatile_ctrl, 4878 .s_ctrl = sd_s_ctrl, 4879 }; 4880 4881 static int sd_init_controls(struct gspca_dev *gspca_dev) 4882 { 4883 struct sd *sd = (struct sd *)gspca_dev; 4884 struct v4l2_ctrl_handler *hdl = &gspca_dev->ctrl_handler; 4885 4886 gspca_dev->vdev.ctrl_handler = hdl; 4887 v4l2_ctrl_handler_init(hdl, 10); 4888 if (valid_controls[sd->sensor].has_brightness) 4889 sd->brightness = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops, 4890 V4L2_CID_BRIGHTNESS, 0, 4891 sd->sensor == SEN_OV7660 ? 6 : 255, 1, 4892 sd->sensor == SEN_OV7660 ? 3 : 127); 4893 if (valid_controls[sd->sensor].has_contrast) { 4894 if (sd->sensor == SEN_OV7660) 4895 v4l2_ctrl_new_std(hdl, &sd_ctrl_ops, 4896 V4L2_CID_CONTRAST, 0, 6, 1, 3); 4897 else 4898 v4l2_ctrl_new_std(hdl, &sd_ctrl_ops, 4899 V4L2_CID_CONTRAST, 0, 255, 1, 4900 (sd->sensor == SEN_OV6630 || 4901 sd->sensor == SEN_OV66308AF) ? 200 : 127); 4902 } 4903 if (valid_controls[sd->sensor].has_sat) 4904 v4l2_ctrl_new_std(hdl, &sd_ctrl_ops, 4905 V4L2_CID_SATURATION, 0, 4906 sd->sensor == SEN_OV7660 ? 4 : 255, 1, 4907 sd->sensor == SEN_OV7660 ? 2 : 127); 4908 if (valid_controls[sd->sensor].has_exposure) 4909 gspca_dev->exposure = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops, 4910 V4L2_CID_EXPOSURE, 0, 255, 1, 127); 4911 if (valid_controls[sd->sensor].has_hvflip) { 4912 sd->hflip = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops, 4913 V4L2_CID_HFLIP, 0, 1, 1, 0); 4914 sd->vflip = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops, 4915 V4L2_CID_VFLIP, 0, 1, 1, 0); 4916 } 4917 if (valid_controls[sd->sensor].has_autobright) 4918 sd->autobright = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops, 4919 V4L2_CID_AUTOBRIGHTNESS, 0, 1, 1, 1); 4920 if (valid_controls[sd->sensor].has_autogain) 4921 gspca_dev->autogain = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops, 4922 V4L2_CID_AUTOGAIN, 0, 1, 1, 1); 4923 if (valid_controls[sd->sensor].has_freq) { 4924 if (sd->sensor == SEN_OV7670) 4925 sd->freq = v4l2_ctrl_new_std_menu(hdl, &sd_ctrl_ops, 4926 V4L2_CID_POWER_LINE_FREQUENCY, 4927 V4L2_CID_POWER_LINE_FREQUENCY_AUTO, 0, 4928 V4L2_CID_POWER_LINE_FREQUENCY_AUTO); 4929 else 4930 sd->freq = v4l2_ctrl_new_std_menu(hdl, &sd_ctrl_ops, 4931 V4L2_CID_POWER_LINE_FREQUENCY, 4932 V4L2_CID_POWER_LINE_FREQUENCY_60HZ, 0, 0); 4933 } 4934 if (sd->bridge == BRIDGE_W9968CF) 4935 sd->jpegqual = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops, 4936 V4L2_CID_JPEG_COMPRESSION_QUALITY, 4937 QUALITY_MIN, QUALITY_MAX, 1, QUALITY_DEF); 4938 4939 if (hdl->error) { 4940 gspca_err(gspca_dev, "Could not initialize controls\n"); 4941 return hdl->error; 4942 } 4943 if (gspca_dev->autogain) 4944 v4l2_ctrl_auto_cluster(3, &gspca_dev->autogain, 0, true); 4945 if (sd->autobright) 4946 v4l2_ctrl_auto_cluster(2, &sd->autobright, 0, false); 4947 if (sd->hflip) 4948 v4l2_ctrl_cluster(2, &sd->hflip); 4949 return 0; 4950 } 4951 4952 /* sub-driver description */ 4953 static const struct sd_desc sd_desc = { 4954 .name = MODULE_NAME, 4955 .config = sd_config, 4956 .init = sd_init, 4957 .init_controls = sd_init_controls, 4958 .isoc_init = sd_isoc_init, 4959 .start = sd_start, 4960 .stopN = sd_stopN, 4961 .stop0 = sd_stop0, 4962 .pkt_scan = sd_pkt_scan, 4963 .dq_callback = sd_reset_snapshot, 4964 .get_jcomp = sd_get_jcomp, 4965 .set_jcomp = sd_set_jcomp, 4966 #if IS_ENABLED(CONFIG_INPUT) 4967 .other_input = 1, 4968 #endif 4969 }; 4970 4971 /* -- module initialisation -- */ 4972 static const struct usb_device_id device_table[] = { 4973 {USB_DEVICE(0x041e, 0x4003), .driver_info = BRIDGE_W9968CF }, 4974 {USB_DEVICE(0x041e, 0x4052), 4975 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED }, 4976 {USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 }, 4977 {USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 }, 4978 {USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 }, 4979 {USB_DEVICE(0x041e, 0x4064), .driver_info = BRIDGE_OV519 }, 4980 {USB_DEVICE(0x041e, 0x4067), .driver_info = BRIDGE_OV519 }, 4981 {USB_DEVICE(0x041e, 0x4068), .driver_info = BRIDGE_OV519 }, 4982 {USB_DEVICE(0x045e, 0x028c), 4983 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED }, 4984 {USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 }, 4985 {USB_DEVICE(0x054c, 0x0155), .driver_info = BRIDGE_OV519 }, 4986 {USB_DEVICE(0x05a9, 0x0511), .driver_info = BRIDGE_OV511 }, 4987 {USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 }, 4988 {USB_DEVICE(0x05a9, 0x0519), 4989 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED }, 4990 {USB_DEVICE(0x05a9, 0x0530), 4991 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED }, 4992 {USB_DEVICE(0x05a9, 0x2800), .driver_info = BRIDGE_OVFX2 }, 4993 {USB_DEVICE(0x05a9, 0x4519), .driver_info = BRIDGE_OV519 }, 4994 {USB_DEVICE(0x05a9, 0x8519), .driver_info = BRIDGE_OV519 }, 4995 {USB_DEVICE(0x05a9, 0xa511), .driver_info = BRIDGE_OV511PLUS }, 4996 {USB_DEVICE(0x05a9, 0xa518), .driver_info = BRIDGE_OV518PLUS }, 4997 {USB_DEVICE(0x0813, 0x0002), .driver_info = BRIDGE_OV511PLUS }, 4998 {USB_DEVICE(0x0b62, 0x0059), .driver_info = BRIDGE_OVFX2 }, 4999 {USB_DEVICE(0x0e96, 0xc001), .driver_info = BRIDGE_OVFX2 }, 5000 {USB_DEVICE(0x1046, 0x9967), .driver_info = BRIDGE_W9968CF }, 5001 {USB_DEVICE(0x8020, 0xef04), .driver_info = BRIDGE_OVFX2 }, 5002 {} 5003 }; 5004 5005 MODULE_DEVICE_TABLE(usb, device_table); 5006 5007 /* -- device connect -- */ 5008 static int sd_probe(struct usb_interface *intf, 5009 const struct usb_device_id *id) 5010 { 5011 return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd), 5012 THIS_MODULE); 5013 } 5014 5015 static struct usb_driver sd_driver = { 5016 .name = MODULE_NAME, 5017 .id_table = device_table, 5018 .probe = sd_probe, 5019 .disconnect = gspca_disconnect, 5020 #ifdef CONFIG_PM 5021 .suspend = gspca_suspend, 5022 .resume = gspca_resume, 5023 .reset_resume = gspca_resume, 5024 #endif 5025 }; 5026 5027 module_usb_driver(sd_driver); 5028 5029 module_param(frame_rate, int, 0644); 5030 MODULE_PARM_DESC(frame_rate, "Frame rate (5, 10, 15, 20 or 30 fps)"); 5031