1 /* 2 * Etoms Et61x151 GPL Linux driver by Michel Xhaard (09/09/2004) 3 * 4 * V4L2 by Jean-Francois Moine <http://moinejf.free.fr> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 */ 16 17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 18 19 #define MODULE_NAME "etoms" 20 21 #include "gspca.h" 22 23 MODULE_AUTHOR("Michel Xhaard <mxhaard@users.sourceforge.net>"); 24 MODULE_DESCRIPTION("Etoms USB Camera Driver"); 25 MODULE_LICENSE("GPL"); 26 27 /* specific webcam descriptor */ 28 struct sd { 29 struct gspca_dev gspca_dev; /* !! must be the first item */ 30 31 unsigned char autogain; 32 33 char sensor; 34 #define SENSOR_PAS106 0 35 #define SENSOR_TAS5130CXX 1 36 signed char ag_cnt; 37 #define AG_CNT_START 13 38 }; 39 40 static const struct v4l2_pix_format vga_mode[] = { 41 {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, 42 .bytesperline = 320, 43 .sizeimage = 320 * 240, 44 .colorspace = V4L2_COLORSPACE_SRGB, 45 .priv = 1}, 46 /* {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, 47 .bytesperline = 640, 48 .sizeimage = 640 * 480, 49 .colorspace = V4L2_COLORSPACE_SRGB, 50 .priv = 0}, */ 51 }; 52 53 static const struct v4l2_pix_format sif_mode[] = { 54 {176, 144, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, 55 .bytesperline = 176, 56 .sizeimage = 176 * 144, 57 .colorspace = V4L2_COLORSPACE_SRGB, 58 .priv = 1}, 59 {352, 288, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, 60 .bytesperline = 352, 61 .sizeimage = 352 * 288, 62 .colorspace = V4L2_COLORSPACE_SRGB, 63 .priv = 0}, 64 }; 65 66 #define ETOMS_ALT_SIZE_1000 12 67 68 #define ET_GPIO_DIR_CTRL 0x04 /* Control IO bit[0..5] (0 in 1 out) */ 69 #define ET_GPIO_OUT 0x05 /* Only IO data */ 70 #define ET_GPIO_IN 0x06 /* Read Only IO data */ 71 #define ET_RESET_ALL 0x03 72 #define ET_ClCK 0x01 73 #define ET_CTRL 0x02 /* enable i2c OutClck Powerdown mode */ 74 75 #define ET_COMP 0x12 /* Compression register */ 76 #define ET_MAXQt 0x13 77 #define ET_MINQt 0x14 78 #define ET_COMP_VAL0 0x02 79 #define ET_COMP_VAL1 0x03 80 81 #define ET_REG1d 0x1d 82 #define ET_REG1e 0x1e 83 #define ET_REG1f 0x1f 84 #define ET_REG20 0x20 85 #define ET_REG21 0x21 86 #define ET_REG22 0x22 87 #define ET_REG23 0x23 88 #define ET_REG24 0x24 89 #define ET_REG25 0x25 90 /* base registers for luma calculation */ 91 #define ET_LUMA_CENTER 0x39 92 93 #define ET_G_RED 0x4d 94 #define ET_G_GREEN1 0x4e 95 #define ET_G_BLUE 0x4f 96 #define ET_G_GREEN2 0x50 97 #define ET_G_GR_H 0x51 98 #define ET_G_GB_H 0x52 99 100 #define ET_O_RED 0x34 101 #define ET_O_GREEN1 0x35 102 #define ET_O_BLUE 0x36 103 #define ET_O_GREEN2 0x37 104 105 #define ET_SYNCHRO 0x68 106 #define ET_STARTX 0x69 107 #define ET_STARTY 0x6a 108 #define ET_WIDTH_LOW 0x6b 109 #define ET_HEIGTH_LOW 0x6c 110 #define ET_W_H_HEIGTH 0x6d 111 112 #define ET_REG6e 0x6e /* OBW */ 113 #define ET_REG6f 0x6f /* OBW */ 114 #define ET_REG70 0x70 /* OBW_AWB */ 115 #define ET_REG71 0x71 /* OBW_AWB */ 116 #define ET_REG72 0x72 /* OBW_AWB */ 117 #define ET_REG73 0x73 /* Clkdelay ns */ 118 #define ET_REG74 0x74 /* test pattern */ 119 #define ET_REG75 0x75 /* test pattern */ 120 121 #define ET_I2C_CLK 0x8c 122 #define ET_PXL_CLK 0x60 123 124 #define ET_I2C_BASE 0x89 125 #define ET_I2C_COUNT 0x8a 126 #define ET_I2C_PREFETCH 0x8b 127 #define ET_I2C_REG 0x88 128 #define ET_I2C_DATA7 0x87 129 #define ET_I2C_DATA6 0x86 130 #define ET_I2C_DATA5 0x85 131 #define ET_I2C_DATA4 0x84 132 #define ET_I2C_DATA3 0x83 133 #define ET_I2C_DATA2 0x82 134 #define ET_I2C_DATA1 0x81 135 #define ET_I2C_DATA0 0x80 136 137 #define PAS106_REG2 0x02 /* pxlClk = systemClk/(reg2) */ 138 #define PAS106_REG3 0x03 /* line/frame H [11..4] */ 139 #define PAS106_REG4 0x04 /* line/frame L [3..0] */ 140 #define PAS106_REG5 0x05 /* exposure time line offset(default 5) */ 141 #define PAS106_REG6 0x06 /* exposure time pixel offset(default 6) */ 142 #define PAS106_REG7 0x07 /* signbit Dac (default 0) */ 143 #define PAS106_REG9 0x09 144 #define PAS106_REG0e 0x0e /* global gain [4..0](default 0x0e) */ 145 #define PAS106_REG13 0x13 /* end i2c write */ 146 147 static const __u8 GainRGBG[] = { 0x80, 0x80, 0x80, 0x80, 0x00, 0x00 }; 148 149 static const __u8 I2c2[] = { 0x08, 0x08, 0x08, 0x08, 0x0d }; 150 151 static const __u8 I2c3[] = { 0x12, 0x05 }; 152 153 static const __u8 I2c4[] = { 0x41, 0x08 }; 154 155 /* read 'len' bytes to gspca_dev->usb_buf */ 156 static void reg_r(struct gspca_dev *gspca_dev, 157 __u16 index, 158 __u16 len) 159 { 160 struct usb_device *dev = gspca_dev->dev; 161 162 if (len > USB_BUF_SZ) { 163 PERR("reg_r: buffer overflow\n"); 164 return; 165 } 166 167 usb_control_msg(dev, 168 usb_rcvctrlpipe(dev, 0), 169 0, 170 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_INTERFACE, 171 0, 172 index, gspca_dev->usb_buf, len, 500); 173 PDEBUG(D_USBI, "reg read [%02x] -> %02x ..", 174 index, gspca_dev->usb_buf[0]); 175 } 176 177 static void reg_w_val(struct gspca_dev *gspca_dev, 178 __u16 index, 179 __u8 val) 180 { 181 struct usb_device *dev = gspca_dev->dev; 182 183 gspca_dev->usb_buf[0] = val; 184 usb_control_msg(dev, 185 usb_sndctrlpipe(dev, 0), 186 0, 187 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_INTERFACE, 188 0, 189 index, gspca_dev->usb_buf, 1, 500); 190 } 191 192 static void reg_w(struct gspca_dev *gspca_dev, 193 __u16 index, 194 const __u8 *buffer, 195 __u16 len) 196 { 197 struct usb_device *dev = gspca_dev->dev; 198 199 if (len > USB_BUF_SZ) { 200 pr_err("reg_w: buffer overflow\n"); 201 return; 202 } 203 PDEBUG(D_USBO, "reg write [%02x] = %02x..", index, *buffer); 204 205 memcpy(gspca_dev->usb_buf, buffer, len); 206 usb_control_msg(dev, 207 usb_sndctrlpipe(dev, 0), 208 0, 209 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_INTERFACE, 210 0, index, gspca_dev->usb_buf, len, 500); 211 } 212 213 static int i2c_w(struct gspca_dev *gspca_dev, 214 __u8 reg, 215 const __u8 *buffer, 216 int len, __u8 mode) 217 { 218 /* buffer should be [D0..D7] */ 219 __u8 ptchcount; 220 221 /* set the base address */ 222 reg_w_val(gspca_dev, ET_I2C_BASE, 0x40); 223 /* sensor base for the pas106 */ 224 /* set count and prefetch */ 225 ptchcount = ((len & 0x07) << 4) | (mode & 0x03); 226 reg_w_val(gspca_dev, ET_I2C_COUNT, ptchcount); 227 /* set the register base */ 228 reg_w_val(gspca_dev, ET_I2C_REG, reg); 229 while (--len >= 0) 230 reg_w_val(gspca_dev, ET_I2C_DATA0 + len, buffer[len]); 231 return 0; 232 } 233 234 static int i2c_r(struct gspca_dev *gspca_dev, 235 __u8 reg) 236 { 237 /* set the base address */ 238 reg_w_val(gspca_dev, ET_I2C_BASE, 0x40); 239 /* sensor base for the pas106 */ 240 /* set count and prefetch (cnd: 4 bits - mode: 4 bits) */ 241 reg_w_val(gspca_dev, ET_I2C_COUNT, 0x11); 242 reg_w_val(gspca_dev, ET_I2C_REG, reg); /* set the register base */ 243 reg_w_val(gspca_dev, ET_I2C_PREFETCH, 0x02); /* prefetch */ 244 reg_w_val(gspca_dev, ET_I2C_PREFETCH, 0x00); 245 reg_r(gspca_dev, ET_I2C_DATA0, 1); /* read one byte */ 246 return 0; 247 } 248 249 static int Et_WaitStatus(struct gspca_dev *gspca_dev) 250 { 251 int retry = 10; 252 253 while (retry--) { 254 reg_r(gspca_dev, ET_ClCK, 1); 255 if (gspca_dev->usb_buf[0] != 0) 256 return 1; 257 } 258 return 0; 259 } 260 261 static int et_video(struct gspca_dev *gspca_dev, 262 int on) 263 { 264 int ret; 265 266 reg_w_val(gspca_dev, ET_GPIO_OUT, 267 on ? 0x10 /* startvideo - set Bit5 */ 268 : 0); /* stopvideo */ 269 ret = Et_WaitStatus(gspca_dev); 270 if (ret != 0) 271 PERR("timeout video on/off"); 272 return ret; 273 } 274 275 static void Et_init2(struct gspca_dev *gspca_dev) 276 { 277 __u8 value; 278 static const __u8 FormLine[] = { 0x84, 0x03, 0x14, 0xf4, 0x01, 0x05 }; 279 280 PDEBUG(D_STREAM, "Open Init2 ET"); 281 reg_w_val(gspca_dev, ET_GPIO_DIR_CTRL, 0x2f); 282 reg_w_val(gspca_dev, ET_GPIO_OUT, 0x10); 283 reg_r(gspca_dev, ET_GPIO_IN, 1); 284 reg_w_val(gspca_dev, ET_ClCK, 0x14); /* 0x14 // 0x16 enabled pattern */ 285 reg_w_val(gspca_dev, ET_CTRL, 0x1b); 286 287 /* compression et subsampling */ 288 if (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv) 289 value = ET_COMP_VAL1; /* 320 */ 290 else 291 value = ET_COMP_VAL0; /* 640 */ 292 reg_w_val(gspca_dev, ET_COMP, value); 293 reg_w_val(gspca_dev, ET_MAXQt, 0x1f); 294 reg_w_val(gspca_dev, ET_MINQt, 0x04); 295 /* undocumented registers */ 296 reg_w_val(gspca_dev, ET_REG1d, 0xff); 297 reg_w_val(gspca_dev, ET_REG1e, 0xff); 298 reg_w_val(gspca_dev, ET_REG1f, 0xff); 299 reg_w_val(gspca_dev, ET_REG20, 0x35); 300 reg_w_val(gspca_dev, ET_REG21, 0x01); 301 reg_w_val(gspca_dev, ET_REG22, 0x00); 302 reg_w_val(gspca_dev, ET_REG23, 0xff); 303 reg_w_val(gspca_dev, ET_REG24, 0xff); 304 reg_w_val(gspca_dev, ET_REG25, 0x0f); 305 /* colors setting */ 306 reg_w_val(gspca_dev, 0x30, 0x11); /* 0x30 */ 307 reg_w_val(gspca_dev, 0x31, 0x40); 308 reg_w_val(gspca_dev, 0x32, 0x00); 309 reg_w_val(gspca_dev, ET_O_RED, 0x00); /* 0x34 */ 310 reg_w_val(gspca_dev, ET_O_GREEN1, 0x00); 311 reg_w_val(gspca_dev, ET_O_BLUE, 0x00); 312 reg_w_val(gspca_dev, ET_O_GREEN2, 0x00); 313 /*************/ 314 reg_w_val(gspca_dev, ET_G_RED, 0x80); /* 0x4d */ 315 reg_w_val(gspca_dev, ET_G_GREEN1, 0x80); 316 reg_w_val(gspca_dev, ET_G_BLUE, 0x80); 317 reg_w_val(gspca_dev, ET_G_GREEN2, 0x80); 318 reg_w_val(gspca_dev, ET_G_GR_H, 0x00); 319 reg_w_val(gspca_dev, ET_G_GB_H, 0x00); /* 0x52 */ 320 /* Window control registers */ 321 reg_w_val(gspca_dev, 0x61, 0x80); /* use cmc_out */ 322 reg_w_val(gspca_dev, 0x62, 0x02); 323 reg_w_val(gspca_dev, 0x63, 0x03); 324 reg_w_val(gspca_dev, 0x64, 0x14); 325 reg_w_val(gspca_dev, 0x65, 0x0e); 326 reg_w_val(gspca_dev, 0x66, 0x02); 327 reg_w_val(gspca_dev, 0x67, 0x02); 328 329 /**************************************/ 330 reg_w_val(gspca_dev, ET_SYNCHRO, 0x8f); /* 0x68 */ 331 reg_w_val(gspca_dev, ET_STARTX, 0x69); /* 0x6a //0x69 */ 332 reg_w_val(gspca_dev, ET_STARTY, 0x0d); /* 0x0d //0x0c */ 333 reg_w_val(gspca_dev, ET_WIDTH_LOW, 0x80); 334 reg_w_val(gspca_dev, ET_HEIGTH_LOW, 0xe0); 335 reg_w_val(gspca_dev, ET_W_H_HEIGTH, 0x60); /* 6d */ 336 reg_w_val(gspca_dev, ET_REG6e, 0x86); 337 reg_w_val(gspca_dev, ET_REG6f, 0x01); 338 reg_w_val(gspca_dev, ET_REG70, 0x26); 339 reg_w_val(gspca_dev, ET_REG71, 0x7a); 340 reg_w_val(gspca_dev, ET_REG72, 0x01); 341 /* Clock Pattern registers ***************** */ 342 reg_w_val(gspca_dev, ET_REG73, 0x00); 343 reg_w_val(gspca_dev, ET_REG74, 0x18); /* 0x28 */ 344 reg_w_val(gspca_dev, ET_REG75, 0x0f); /* 0x01 */ 345 /**********************************************/ 346 reg_w_val(gspca_dev, 0x8a, 0x20); 347 reg_w_val(gspca_dev, 0x8d, 0x0f); 348 reg_w_val(gspca_dev, 0x8e, 0x08); 349 /**************************************/ 350 reg_w_val(gspca_dev, 0x03, 0x08); 351 reg_w_val(gspca_dev, ET_PXL_CLK, 0x03); 352 reg_w_val(gspca_dev, 0x81, 0xff); 353 reg_w_val(gspca_dev, 0x80, 0x00); 354 reg_w_val(gspca_dev, 0x81, 0xff); 355 reg_w_val(gspca_dev, 0x80, 0x20); 356 reg_w_val(gspca_dev, 0x03, 0x01); 357 reg_w_val(gspca_dev, 0x03, 0x00); 358 reg_w_val(gspca_dev, 0x03, 0x08); 359 /********************************************/ 360 361 /* reg_r(gspca_dev, ET_I2C_BASE, 1); 362 always 0x40 as the pas106 ??? */ 363 /* set the sensor */ 364 if (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv) 365 value = 0x04; /* 320 */ 366 else /* 640 */ 367 value = 0x1e; /* 0x17 * setting PixelClock 368 * 0x03 mean 24/(3+1) = 6 Mhz 369 * 0x05 -> 24/(5+1) = 4 Mhz 370 * 0x0b -> 24/(11+1) = 2 Mhz 371 * 0x17 -> 24/(23+1) = 1 Mhz 372 */ 373 reg_w_val(gspca_dev, ET_PXL_CLK, value); 374 /* now set by fifo the FormatLine setting */ 375 reg_w(gspca_dev, 0x62, FormLine, 6); 376 377 /* set exposure times [ 0..0x78] 0->longvalue 0x78->shortvalue */ 378 reg_w_val(gspca_dev, 0x81, 0x47); /* 0x47; */ 379 reg_w_val(gspca_dev, 0x80, 0x40); /* 0x40; */ 380 /* Pedro change */ 381 /* Brightness change Brith+ decrease value */ 382 /* Brigth- increase value */ 383 /* original value = 0x70; */ 384 reg_w_val(gspca_dev, 0x81, 0x30); /* 0x20; - set brightness */ 385 reg_w_val(gspca_dev, 0x80, 0x20); /* 0x20; */ 386 } 387 388 static void setbrightness(struct gspca_dev *gspca_dev, s32 val) 389 { 390 int i; 391 392 for (i = 0; i < 4; i++) 393 reg_w_val(gspca_dev, ET_O_RED + i, val); 394 } 395 396 static void setcontrast(struct gspca_dev *gspca_dev, s32 val) 397 { 398 __u8 RGBG[] = { 0x80, 0x80, 0x80, 0x80, 0x00, 0x00 }; 399 400 memset(RGBG, val, sizeof(RGBG) - 2); 401 reg_w(gspca_dev, ET_G_RED, RGBG, 6); 402 } 403 404 static void setcolors(struct gspca_dev *gspca_dev, s32 val) 405 { 406 struct sd *sd = (struct sd *) gspca_dev; 407 __u8 I2cc[] = { 0x05, 0x02, 0x02, 0x05, 0x0d }; 408 __u8 i2cflags = 0x01; 409 /* __u8 green = 0; */ 410 411 I2cc[3] = val; /* red */ 412 I2cc[0] = 15 - val; /* blue */ 413 /* green = 15 - ((((7*I2cc[0]) >> 2 ) + I2cc[3]) >> 1); */ 414 /* I2cc[1] = I2cc[2] = green; */ 415 if (sd->sensor == SENSOR_PAS106) { 416 i2c_w(gspca_dev, PAS106_REG13, &i2cflags, 1, 3); 417 i2c_w(gspca_dev, PAS106_REG9, I2cc, sizeof I2cc, 1); 418 } 419 /* PDEBUG(D_CONF , "Etoms red %d blue %d green %d", 420 I2cc[3], I2cc[0], green); */ 421 } 422 423 static s32 getcolors(struct gspca_dev *gspca_dev) 424 { 425 struct sd *sd = (struct sd *) gspca_dev; 426 427 if (sd->sensor == SENSOR_PAS106) { 428 /* i2c_r(gspca_dev, PAS106_REG9); * blue */ 429 i2c_r(gspca_dev, PAS106_REG9 + 3); /* red */ 430 return gspca_dev->usb_buf[0] & 0x0f; 431 } 432 return 0; 433 } 434 435 static void setautogain(struct gspca_dev *gspca_dev) 436 { 437 struct sd *sd = (struct sd *) gspca_dev; 438 439 if (sd->autogain) 440 sd->ag_cnt = AG_CNT_START; 441 else 442 sd->ag_cnt = -1; 443 } 444 445 static void Et_init1(struct gspca_dev *gspca_dev) 446 { 447 __u8 value; 448 /* __u8 I2c0 [] = {0x0a, 0x12, 0x05, 0x22, 0xac, 0x00, 0x01, 0x00}; */ 449 __u8 I2c0[] = { 0x0a, 0x12, 0x05, 0x6d, 0xcd, 0x00, 0x01, 0x00 }; 450 /* try 1/120 0x6d 0xcd 0x40 */ 451 /* __u8 I2c0 [] = {0x0a, 0x12, 0x05, 0xfe, 0xfe, 0xc0, 0x01, 0x00}; 452 * 1/60000 hmm ?? */ 453 454 PDEBUG(D_STREAM, "Open Init1 ET"); 455 reg_w_val(gspca_dev, ET_GPIO_DIR_CTRL, 7); 456 reg_r(gspca_dev, ET_GPIO_IN, 1); 457 reg_w_val(gspca_dev, ET_RESET_ALL, 1); 458 reg_w_val(gspca_dev, ET_RESET_ALL, 0); 459 reg_w_val(gspca_dev, ET_ClCK, 0x10); 460 reg_w_val(gspca_dev, ET_CTRL, 0x19); 461 /* compression et subsampling */ 462 if (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv) 463 value = ET_COMP_VAL1; 464 else 465 value = ET_COMP_VAL0; 466 PDEBUG(D_STREAM, "Open mode %d Compression %d", 467 gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv, 468 value); 469 reg_w_val(gspca_dev, ET_COMP, value); 470 reg_w_val(gspca_dev, ET_MAXQt, 0x1d); 471 reg_w_val(gspca_dev, ET_MINQt, 0x02); 472 /* undocumented registers */ 473 reg_w_val(gspca_dev, ET_REG1d, 0xff); 474 reg_w_val(gspca_dev, ET_REG1e, 0xff); 475 reg_w_val(gspca_dev, ET_REG1f, 0xff); 476 reg_w_val(gspca_dev, ET_REG20, 0x35); 477 reg_w_val(gspca_dev, ET_REG21, 0x01); 478 reg_w_val(gspca_dev, ET_REG22, 0x00); 479 reg_w_val(gspca_dev, ET_REG23, 0xf7); 480 reg_w_val(gspca_dev, ET_REG24, 0xff); 481 reg_w_val(gspca_dev, ET_REG25, 0x07); 482 /* colors setting */ 483 reg_w_val(gspca_dev, ET_G_RED, 0x80); 484 reg_w_val(gspca_dev, ET_G_GREEN1, 0x80); 485 reg_w_val(gspca_dev, ET_G_BLUE, 0x80); 486 reg_w_val(gspca_dev, ET_G_GREEN2, 0x80); 487 reg_w_val(gspca_dev, ET_G_GR_H, 0x00); 488 reg_w_val(gspca_dev, ET_G_GB_H, 0x00); 489 /* Window control registers */ 490 reg_w_val(gspca_dev, ET_SYNCHRO, 0xf0); 491 reg_w_val(gspca_dev, ET_STARTX, 0x56); /* 0x56 */ 492 reg_w_val(gspca_dev, ET_STARTY, 0x05); /* 0x04 */ 493 reg_w_val(gspca_dev, ET_WIDTH_LOW, 0x60); 494 reg_w_val(gspca_dev, ET_HEIGTH_LOW, 0x20); 495 reg_w_val(gspca_dev, ET_W_H_HEIGTH, 0x50); 496 reg_w_val(gspca_dev, ET_REG6e, 0x86); 497 reg_w_val(gspca_dev, ET_REG6f, 0x01); 498 reg_w_val(gspca_dev, ET_REG70, 0x86); 499 reg_w_val(gspca_dev, ET_REG71, 0x14); 500 reg_w_val(gspca_dev, ET_REG72, 0x00); 501 /* Clock Pattern registers */ 502 reg_w_val(gspca_dev, ET_REG73, 0x00); 503 reg_w_val(gspca_dev, ET_REG74, 0x00); 504 reg_w_val(gspca_dev, ET_REG75, 0x0a); 505 reg_w_val(gspca_dev, ET_I2C_CLK, 0x04); 506 reg_w_val(gspca_dev, ET_PXL_CLK, 0x01); 507 /* set the sensor */ 508 if (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv) { 509 I2c0[0] = 0x06; 510 i2c_w(gspca_dev, PAS106_REG2, I2c0, sizeof I2c0, 1); 511 i2c_w(gspca_dev, PAS106_REG9, I2c2, sizeof I2c2, 1); 512 value = 0x06; 513 i2c_w(gspca_dev, PAS106_REG2, &value, 1, 1); 514 i2c_w(gspca_dev, PAS106_REG3, I2c3, sizeof I2c3, 1); 515 /* value = 0x1f; */ 516 value = 0x04; 517 i2c_w(gspca_dev, PAS106_REG0e, &value, 1, 1); 518 } else { 519 I2c0[0] = 0x0a; 520 521 i2c_w(gspca_dev, PAS106_REG2, I2c0, sizeof I2c0, 1); 522 i2c_w(gspca_dev, PAS106_REG9, I2c2, sizeof I2c2, 1); 523 value = 0x0a; 524 i2c_w(gspca_dev, PAS106_REG2, &value, 1, 1); 525 i2c_w(gspca_dev, PAS106_REG3, I2c3, sizeof I2c3, 1); 526 value = 0x04; 527 /* value = 0x10; */ 528 i2c_w(gspca_dev, PAS106_REG0e, &value, 1, 1); 529 /* bit 2 enable bit 1:2 select 0 1 2 3 530 value = 0x07; * curve 0 * 531 i2c_w(gspca_dev, PAS106_REG0f, &value, 1, 1); 532 */ 533 } 534 535 /* value = 0x01; */ 536 /* value = 0x22; */ 537 /* i2c_w(gspca_dev, PAS106_REG5, &value, 1, 1); */ 538 /* magnetude and sign bit for DAC */ 539 i2c_w(gspca_dev, PAS106_REG7, I2c4, sizeof I2c4, 1); 540 /* now set by fifo the whole colors setting */ 541 reg_w(gspca_dev, ET_G_RED, GainRGBG, 6); 542 setcolors(gspca_dev, getcolors(gspca_dev)); 543 } 544 545 /* this function is called at probe time */ 546 static int sd_config(struct gspca_dev *gspca_dev, 547 const struct usb_device_id *id) 548 { 549 struct sd *sd = (struct sd *) gspca_dev; 550 struct cam *cam; 551 552 cam = &gspca_dev->cam; 553 sd->sensor = id->driver_info; 554 if (sd->sensor == SENSOR_PAS106) { 555 cam->cam_mode = sif_mode; 556 cam->nmodes = ARRAY_SIZE(sif_mode); 557 } else { 558 cam->cam_mode = vga_mode; 559 cam->nmodes = ARRAY_SIZE(vga_mode); 560 } 561 sd->ag_cnt = -1; 562 return 0; 563 } 564 565 /* this function is called at probe and resume time */ 566 static int sd_init(struct gspca_dev *gspca_dev) 567 { 568 struct sd *sd = (struct sd *) gspca_dev; 569 570 if (sd->sensor == SENSOR_PAS106) 571 Et_init1(gspca_dev); 572 else 573 Et_init2(gspca_dev); 574 reg_w_val(gspca_dev, ET_RESET_ALL, 0x08); 575 et_video(gspca_dev, 0); /* video off */ 576 return 0; 577 } 578 579 /* -- start the camera -- */ 580 static int sd_start(struct gspca_dev *gspca_dev) 581 { 582 struct sd *sd = (struct sd *) gspca_dev; 583 584 if (sd->sensor == SENSOR_PAS106) 585 Et_init1(gspca_dev); 586 else 587 Et_init2(gspca_dev); 588 589 setautogain(gspca_dev); 590 591 reg_w_val(gspca_dev, ET_RESET_ALL, 0x08); 592 et_video(gspca_dev, 1); /* video on */ 593 return 0; 594 } 595 596 static void sd_stopN(struct gspca_dev *gspca_dev) 597 { 598 et_video(gspca_dev, 0); /* video off */ 599 } 600 601 static __u8 Et_getgainG(struct gspca_dev *gspca_dev) 602 { 603 struct sd *sd = (struct sd *) gspca_dev; 604 605 if (sd->sensor == SENSOR_PAS106) { 606 i2c_r(gspca_dev, PAS106_REG0e); 607 PDEBUG(D_CONF, "Etoms gain G %d", gspca_dev->usb_buf[0]); 608 return gspca_dev->usb_buf[0]; 609 } 610 return 0x1f; 611 } 612 613 static void Et_setgainG(struct gspca_dev *gspca_dev, __u8 gain) 614 { 615 struct sd *sd = (struct sd *) gspca_dev; 616 617 if (sd->sensor == SENSOR_PAS106) { 618 __u8 i2cflags = 0x01; 619 620 i2c_w(gspca_dev, PAS106_REG13, &i2cflags, 1, 3); 621 i2c_w(gspca_dev, PAS106_REG0e, &gain, 1, 1); 622 } 623 } 624 625 #define BLIMIT(bright) \ 626 (u8)((bright > 0x1f) ? 0x1f : ((bright < 4) ? 3 : bright)) 627 #define LIMIT(color) \ 628 (u8)((color > 0xff) ? 0xff : ((color < 0) ? 0 : color)) 629 630 static void do_autogain(struct gspca_dev *gspca_dev) 631 { 632 struct sd *sd = (struct sd *) gspca_dev; 633 __u8 luma; 634 __u8 luma_mean = 128; 635 __u8 luma_delta = 20; 636 __u8 spring = 4; 637 int Gbright; 638 __u8 r, g, b; 639 640 if (sd->ag_cnt < 0) 641 return; 642 if (--sd->ag_cnt >= 0) 643 return; 644 sd->ag_cnt = AG_CNT_START; 645 646 Gbright = Et_getgainG(gspca_dev); 647 reg_r(gspca_dev, ET_LUMA_CENTER, 4); 648 g = (gspca_dev->usb_buf[0] + gspca_dev->usb_buf[3]) >> 1; 649 r = gspca_dev->usb_buf[1]; 650 b = gspca_dev->usb_buf[2]; 651 r = ((r << 8) - (r << 4) - (r << 3)) >> 10; 652 b = ((b << 7) >> 10); 653 g = ((g << 9) + (g << 7) + (g << 5)) >> 10; 654 luma = LIMIT(r + g + b); 655 PDEBUG(D_FRAM, "Etoms luma G %d", luma); 656 if (luma < luma_mean - luma_delta || luma > luma_mean + luma_delta) { 657 Gbright += (luma_mean - luma) >> spring; 658 Gbright = BLIMIT(Gbright); 659 PDEBUG(D_FRAM, "Etoms Gbright %d", Gbright); 660 Et_setgainG(gspca_dev, (__u8) Gbright); 661 } 662 } 663 664 #undef BLIMIT 665 #undef LIMIT 666 667 static void sd_pkt_scan(struct gspca_dev *gspca_dev, 668 u8 *data, /* isoc packet */ 669 int len) /* iso packet length */ 670 { 671 int seqframe; 672 673 seqframe = data[0] & 0x3f; 674 len = (int) (((data[0] & 0xc0) << 2) | data[1]); 675 if (seqframe == 0x3f) { 676 PDEBUG(D_FRAM, 677 "header packet found datalength %d !!", len); 678 PDEBUG(D_FRAM, "G %d R %d G %d B %d", 679 data[2], data[3], data[4], data[5]); 680 data += 30; 681 /* don't change datalength as the chips provided it */ 682 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0); 683 gspca_frame_add(gspca_dev, FIRST_PACKET, data, len); 684 return; 685 } 686 if (len) { 687 data += 8; 688 gspca_frame_add(gspca_dev, INTER_PACKET, data, len); 689 } else { /* Drop Packet */ 690 gspca_dev->last_packet_type = DISCARD_PACKET; 691 } 692 } 693 694 static int sd_s_ctrl(struct v4l2_ctrl *ctrl) 695 { 696 struct gspca_dev *gspca_dev = 697 container_of(ctrl->handler, struct gspca_dev, ctrl_handler); 698 struct sd *sd = (struct sd *)gspca_dev; 699 700 gspca_dev->usb_err = 0; 701 702 if (!gspca_dev->streaming) 703 return 0; 704 705 switch (ctrl->id) { 706 case V4L2_CID_BRIGHTNESS: 707 setbrightness(gspca_dev, ctrl->val); 708 break; 709 case V4L2_CID_CONTRAST: 710 setcontrast(gspca_dev, ctrl->val); 711 break; 712 case V4L2_CID_SATURATION: 713 setcolors(gspca_dev, ctrl->val); 714 break; 715 case V4L2_CID_AUTOGAIN: 716 sd->autogain = ctrl->val; 717 setautogain(gspca_dev); 718 break; 719 } 720 return gspca_dev->usb_err; 721 } 722 723 static const struct v4l2_ctrl_ops sd_ctrl_ops = { 724 .s_ctrl = sd_s_ctrl, 725 }; 726 727 static int sd_init_controls(struct gspca_dev *gspca_dev) 728 { 729 struct sd *sd = (struct sd *)gspca_dev; 730 struct v4l2_ctrl_handler *hdl = &gspca_dev->ctrl_handler; 731 732 gspca_dev->vdev.ctrl_handler = hdl; 733 v4l2_ctrl_handler_init(hdl, 4); 734 v4l2_ctrl_new_std(hdl, &sd_ctrl_ops, 735 V4L2_CID_BRIGHTNESS, 1, 127, 1, 63); 736 v4l2_ctrl_new_std(hdl, &sd_ctrl_ops, 737 V4L2_CID_CONTRAST, 0, 255, 1, 127); 738 if (sd->sensor == SENSOR_PAS106) 739 v4l2_ctrl_new_std(hdl, &sd_ctrl_ops, 740 V4L2_CID_SATURATION, 0, 15, 1, 7); 741 v4l2_ctrl_new_std(hdl, &sd_ctrl_ops, 742 V4L2_CID_AUTOGAIN, 0, 1, 1, 1); 743 if (hdl->error) { 744 pr_err("Could not initialize controls\n"); 745 return hdl->error; 746 } 747 return 0; 748 } 749 750 /* sub-driver description */ 751 static const struct sd_desc sd_desc = { 752 .name = MODULE_NAME, 753 .config = sd_config, 754 .init = sd_init, 755 .init_controls = sd_init_controls, 756 .start = sd_start, 757 .stopN = sd_stopN, 758 .pkt_scan = sd_pkt_scan, 759 .dq_callback = do_autogain, 760 }; 761 762 /* -- module initialisation -- */ 763 static const struct usb_device_id device_table[] = { 764 {USB_DEVICE(0x102c, 0x6151), .driver_info = SENSOR_PAS106}, 765 {USB_DEVICE(0x102c, 0x6251), .driver_info = SENSOR_TAS5130CXX}, 766 {} 767 }; 768 769 MODULE_DEVICE_TABLE(usb, device_table); 770 771 /* -- device connect -- */ 772 static int sd_probe(struct usb_interface *intf, 773 const struct usb_device_id *id) 774 { 775 return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd), 776 THIS_MODULE); 777 } 778 779 static struct usb_driver sd_driver = { 780 .name = MODULE_NAME, 781 .id_table = device_table, 782 .probe = sd_probe, 783 .disconnect = gspca_disconnect, 784 #ifdef CONFIG_PM 785 .suspend = gspca_suspend, 786 .resume = gspca_resume, 787 .reset_resume = gspca_resume, 788 #endif 789 }; 790 791 module_usb_driver(sd_driver); 792