1 /* 2 * Etoms Et61x151 GPL Linux driver by Michel Xhaard (09/09/2004) 3 * 4 * V4L2 by Jean-Francois Moine <http://moinejf.free.fr> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 */ 16 17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 18 19 #define MODULE_NAME "etoms" 20 21 #include "gspca.h" 22 23 MODULE_AUTHOR("Michel Xhaard <mxhaard@users.sourceforge.net>"); 24 MODULE_DESCRIPTION("Etoms USB Camera Driver"); 25 MODULE_LICENSE("GPL"); 26 27 /* specific webcam descriptor */ 28 struct sd { 29 struct gspca_dev gspca_dev; /* !! must be the first item */ 30 31 unsigned char autogain; 32 33 char sensor; 34 #define SENSOR_PAS106 0 35 #define SENSOR_TAS5130CXX 1 36 signed char ag_cnt; 37 #define AG_CNT_START 13 38 }; 39 40 static const struct v4l2_pix_format vga_mode[] = { 41 {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, 42 .bytesperline = 320, 43 .sizeimage = 320 * 240, 44 .colorspace = V4L2_COLORSPACE_SRGB, 45 .priv = 1}, 46 /* {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, 47 .bytesperline = 640, 48 .sizeimage = 640 * 480, 49 .colorspace = V4L2_COLORSPACE_SRGB, 50 .priv = 0}, */ 51 }; 52 53 static const struct v4l2_pix_format sif_mode[] = { 54 {176, 144, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, 55 .bytesperline = 176, 56 .sizeimage = 176 * 144, 57 .colorspace = V4L2_COLORSPACE_SRGB, 58 .priv = 1}, 59 {352, 288, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, 60 .bytesperline = 352, 61 .sizeimage = 352 * 288, 62 .colorspace = V4L2_COLORSPACE_SRGB, 63 .priv = 0}, 64 }; 65 66 #define ETOMS_ALT_SIZE_1000 12 67 68 #define ET_GPIO_DIR_CTRL 0x04 /* Control IO bit[0..5] (0 in 1 out) */ 69 #define ET_GPIO_OUT 0x05 /* Only IO data */ 70 #define ET_GPIO_IN 0x06 /* Read Only IO data */ 71 #define ET_RESET_ALL 0x03 72 #define ET_ClCK 0x01 73 #define ET_CTRL 0x02 /* enable i2c OutClck Powerdown mode */ 74 75 #define ET_COMP 0x12 /* Compression register */ 76 #define ET_MAXQt 0x13 77 #define ET_MINQt 0x14 78 #define ET_COMP_VAL0 0x02 79 #define ET_COMP_VAL1 0x03 80 81 #define ET_REG1d 0x1d 82 #define ET_REG1e 0x1e 83 #define ET_REG1f 0x1f 84 #define ET_REG20 0x20 85 #define ET_REG21 0x21 86 #define ET_REG22 0x22 87 #define ET_REG23 0x23 88 #define ET_REG24 0x24 89 #define ET_REG25 0x25 90 /* base registers for luma calculation */ 91 #define ET_LUMA_CENTER 0x39 92 93 #define ET_G_RED 0x4d 94 #define ET_G_GREEN1 0x4e 95 #define ET_G_BLUE 0x4f 96 #define ET_G_GREEN2 0x50 97 #define ET_G_GR_H 0x51 98 #define ET_G_GB_H 0x52 99 100 #define ET_O_RED 0x34 101 #define ET_O_GREEN1 0x35 102 #define ET_O_BLUE 0x36 103 #define ET_O_GREEN2 0x37 104 105 #define ET_SYNCHRO 0x68 106 #define ET_STARTX 0x69 107 #define ET_STARTY 0x6a 108 #define ET_WIDTH_LOW 0x6b 109 #define ET_HEIGTH_LOW 0x6c 110 #define ET_W_H_HEIGTH 0x6d 111 112 #define ET_REG6e 0x6e /* OBW */ 113 #define ET_REG6f 0x6f /* OBW */ 114 #define ET_REG70 0x70 /* OBW_AWB */ 115 #define ET_REG71 0x71 /* OBW_AWB */ 116 #define ET_REG72 0x72 /* OBW_AWB */ 117 #define ET_REG73 0x73 /* Clkdelay ns */ 118 #define ET_REG74 0x74 /* test pattern */ 119 #define ET_REG75 0x75 /* test pattern */ 120 121 #define ET_I2C_CLK 0x8c 122 #define ET_PXL_CLK 0x60 123 124 #define ET_I2C_BASE 0x89 125 #define ET_I2C_COUNT 0x8a 126 #define ET_I2C_PREFETCH 0x8b 127 #define ET_I2C_REG 0x88 128 #define ET_I2C_DATA7 0x87 129 #define ET_I2C_DATA6 0x86 130 #define ET_I2C_DATA5 0x85 131 #define ET_I2C_DATA4 0x84 132 #define ET_I2C_DATA3 0x83 133 #define ET_I2C_DATA2 0x82 134 #define ET_I2C_DATA1 0x81 135 #define ET_I2C_DATA0 0x80 136 137 #define PAS106_REG2 0x02 /* pxlClk = systemClk/(reg2) */ 138 #define PAS106_REG3 0x03 /* line/frame H [11..4] */ 139 #define PAS106_REG4 0x04 /* line/frame L [3..0] */ 140 #define PAS106_REG5 0x05 /* exposure time line offset(default 5) */ 141 #define PAS106_REG6 0x06 /* exposure time pixel offset(default 6) */ 142 #define PAS106_REG7 0x07 /* signbit Dac (default 0) */ 143 #define PAS106_REG9 0x09 144 #define PAS106_REG0e 0x0e /* global gain [4..0](default 0x0e) */ 145 #define PAS106_REG13 0x13 /* end i2c write */ 146 147 static const __u8 GainRGBG[] = { 0x80, 0x80, 0x80, 0x80, 0x00, 0x00 }; 148 149 static const __u8 I2c2[] = { 0x08, 0x08, 0x08, 0x08, 0x0d }; 150 151 static const __u8 I2c3[] = { 0x12, 0x05 }; 152 153 static const __u8 I2c4[] = { 0x41, 0x08 }; 154 155 /* read 'len' bytes to gspca_dev->usb_buf */ 156 static void reg_r(struct gspca_dev *gspca_dev, 157 __u16 index, 158 __u16 len) 159 { 160 struct usb_device *dev = gspca_dev->dev; 161 162 if (len > USB_BUF_SZ) { 163 gspca_err(gspca_dev, "reg_r: buffer overflow\n"); 164 return; 165 } 166 167 usb_control_msg(dev, 168 usb_rcvctrlpipe(dev, 0), 169 0, 170 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_INTERFACE, 171 0, 172 index, gspca_dev->usb_buf, len, 500); 173 gspca_dbg(gspca_dev, D_USBI, "reg read [%02x] -> %02x ..\n", 174 index, gspca_dev->usb_buf[0]); 175 } 176 177 static void reg_w_val(struct gspca_dev *gspca_dev, 178 __u16 index, 179 __u8 val) 180 { 181 struct usb_device *dev = gspca_dev->dev; 182 183 gspca_dev->usb_buf[0] = val; 184 usb_control_msg(dev, 185 usb_sndctrlpipe(dev, 0), 186 0, 187 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_INTERFACE, 188 0, 189 index, gspca_dev->usb_buf, 1, 500); 190 } 191 192 static void reg_w(struct gspca_dev *gspca_dev, 193 __u16 index, 194 const __u8 *buffer, 195 __u16 len) 196 { 197 struct usb_device *dev = gspca_dev->dev; 198 199 if (len > USB_BUF_SZ) { 200 pr_err("reg_w: buffer overflow\n"); 201 return; 202 } 203 gspca_dbg(gspca_dev, D_USBO, "reg write [%02x] = %02x..\n", 204 index, *buffer); 205 206 memcpy(gspca_dev->usb_buf, buffer, len); 207 usb_control_msg(dev, 208 usb_sndctrlpipe(dev, 0), 209 0, 210 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_INTERFACE, 211 0, index, gspca_dev->usb_buf, len, 500); 212 } 213 214 static int i2c_w(struct gspca_dev *gspca_dev, 215 __u8 reg, 216 const __u8 *buffer, 217 int len, __u8 mode) 218 { 219 /* buffer should be [D0..D7] */ 220 __u8 ptchcount; 221 222 /* set the base address */ 223 reg_w_val(gspca_dev, ET_I2C_BASE, 0x40); 224 /* sensor base for the pas106 */ 225 /* set count and prefetch */ 226 ptchcount = ((len & 0x07) << 4) | (mode & 0x03); 227 reg_w_val(gspca_dev, ET_I2C_COUNT, ptchcount); 228 /* set the register base */ 229 reg_w_val(gspca_dev, ET_I2C_REG, reg); 230 while (--len >= 0) 231 reg_w_val(gspca_dev, ET_I2C_DATA0 + len, buffer[len]); 232 return 0; 233 } 234 235 static int i2c_r(struct gspca_dev *gspca_dev, 236 __u8 reg) 237 { 238 /* set the base address */ 239 reg_w_val(gspca_dev, ET_I2C_BASE, 0x40); 240 /* sensor base for the pas106 */ 241 /* set count and prefetch (cnd: 4 bits - mode: 4 bits) */ 242 reg_w_val(gspca_dev, ET_I2C_COUNT, 0x11); 243 reg_w_val(gspca_dev, ET_I2C_REG, reg); /* set the register base */ 244 reg_w_val(gspca_dev, ET_I2C_PREFETCH, 0x02); /* prefetch */ 245 reg_w_val(gspca_dev, ET_I2C_PREFETCH, 0x00); 246 reg_r(gspca_dev, ET_I2C_DATA0, 1); /* read one byte */ 247 return 0; 248 } 249 250 static int Et_WaitStatus(struct gspca_dev *gspca_dev) 251 { 252 int retry = 10; 253 254 while (retry--) { 255 reg_r(gspca_dev, ET_ClCK, 1); 256 if (gspca_dev->usb_buf[0] != 0) 257 return 1; 258 } 259 return 0; 260 } 261 262 static int et_video(struct gspca_dev *gspca_dev, 263 int on) 264 { 265 int ret; 266 267 reg_w_val(gspca_dev, ET_GPIO_OUT, 268 on ? 0x10 /* startvideo - set Bit5 */ 269 : 0); /* stopvideo */ 270 ret = Et_WaitStatus(gspca_dev); 271 if (ret != 0) 272 gspca_err(gspca_dev, "timeout video on/off\n"); 273 return ret; 274 } 275 276 static void Et_init2(struct gspca_dev *gspca_dev) 277 { 278 __u8 value; 279 static const __u8 FormLine[] = { 0x84, 0x03, 0x14, 0xf4, 0x01, 0x05 }; 280 281 gspca_dbg(gspca_dev, D_STREAM, "Open Init2 ET\n"); 282 reg_w_val(gspca_dev, ET_GPIO_DIR_CTRL, 0x2f); 283 reg_w_val(gspca_dev, ET_GPIO_OUT, 0x10); 284 reg_r(gspca_dev, ET_GPIO_IN, 1); 285 reg_w_val(gspca_dev, ET_ClCK, 0x14); /* 0x14 // 0x16 enabled pattern */ 286 reg_w_val(gspca_dev, ET_CTRL, 0x1b); 287 288 /* compression et subsampling */ 289 if (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv) 290 value = ET_COMP_VAL1; /* 320 */ 291 else 292 value = ET_COMP_VAL0; /* 640 */ 293 reg_w_val(gspca_dev, ET_COMP, value); 294 reg_w_val(gspca_dev, ET_MAXQt, 0x1f); 295 reg_w_val(gspca_dev, ET_MINQt, 0x04); 296 /* undocumented registers */ 297 reg_w_val(gspca_dev, ET_REG1d, 0xff); 298 reg_w_val(gspca_dev, ET_REG1e, 0xff); 299 reg_w_val(gspca_dev, ET_REG1f, 0xff); 300 reg_w_val(gspca_dev, ET_REG20, 0x35); 301 reg_w_val(gspca_dev, ET_REG21, 0x01); 302 reg_w_val(gspca_dev, ET_REG22, 0x00); 303 reg_w_val(gspca_dev, ET_REG23, 0xff); 304 reg_w_val(gspca_dev, ET_REG24, 0xff); 305 reg_w_val(gspca_dev, ET_REG25, 0x0f); 306 /* colors setting */ 307 reg_w_val(gspca_dev, 0x30, 0x11); /* 0x30 */ 308 reg_w_val(gspca_dev, 0x31, 0x40); 309 reg_w_val(gspca_dev, 0x32, 0x00); 310 reg_w_val(gspca_dev, ET_O_RED, 0x00); /* 0x34 */ 311 reg_w_val(gspca_dev, ET_O_GREEN1, 0x00); 312 reg_w_val(gspca_dev, ET_O_BLUE, 0x00); 313 reg_w_val(gspca_dev, ET_O_GREEN2, 0x00); 314 /*************/ 315 reg_w_val(gspca_dev, ET_G_RED, 0x80); /* 0x4d */ 316 reg_w_val(gspca_dev, ET_G_GREEN1, 0x80); 317 reg_w_val(gspca_dev, ET_G_BLUE, 0x80); 318 reg_w_val(gspca_dev, ET_G_GREEN2, 0x80); 319 reg_w_val(gspca_dev, ET_G_GR_H, 0x00); 320 reg_w_val(gspca_dev, ET_G_GB_H, 0x00); /* 0x52 */ 321 /* Window control registers */ 322 reg_w_val(gspca_dev, 0x61, 0x80); /* use cmc_out */ 323 reg_w_val(gspca_dev, 0x62, 0x02); 324 reg_w_val(gspca_dev, 0x63, 0x03); 325 reg_w_val(gspca_dev, 0x64, 0x14); 326 reg_w_val(gspca_dev, 0x65, 0x0e); 327 reg_w_val(gspca_dev, 0x66, 0x02); 328 reg_w_val(gspca_dev, 0x67, 0x02); 329 330 /**************************************/ 331 reg_w_val(gspca_dev, ET_SYNCHRO, 0x8f); /* 0x68 */ 332 reg_w_val(gspca_dev, ET_STARTX, 0x69); /* 0x6a //0x69 */ 333 reg_w_val(gspca_dev, ET_STARTY, 0x0d); /* 0x0d //0x0c */ 334 reg_w_val(gspca_dev, ET_WIDTH_LOW, 0x80); 335 reg_w_val(gspca_dev, ET_HEIGTH_LOW, 0xe0); 336 reg_w_val(gspca_dev, ET_W_H_HEIGTH, 0x60); /* 6d */ 337 reg_w_val(gspca_dev, ET_REG6e, 0x86); 338 reg_w_val(gspca_dev, ET_REG6f, 0x01); 339 reg_w_val(gspca_dev, ET_REG70, 0x26); 340 reg_w_val(gspca_dev, ET_REG71, 0x7a); 341 reg_w_val(gspca_dev, ET_REG72, 0x01); 342 /* Clock Pattern registers ***************** */ 343 reg_w_val(gspca_dev, ET_REG73, 0x00); 344 reg_w_val(gspca_dev, ET_REG74, 0x18); /* 0x28 */ 345 reg_w_val(gspca_dev, ET_REG75, 0x0f); /* 0x01 */ 346 /**********************************************/ 347 reg_w_val(gspca_dev, 0x8a, 0x20); 348 reg_w_val(gspca_dev, 0x8d, 0x0f); 349 reg_w_val(gspca_dev, 0x8e, 0x08); 350 /**************************************/ 351 reg_w_val(gspca_dev, 0x03, 0x08); 352 reg_w_val(gspca_dev, ET_PXL_CLK, 0x03); 353 reg_w_val(gspca_dev, 0x81, 0xff); 354 reg_w_val(gspca_dev, 0x80, 0x00); 355 reg_w_val(gspca_dev, 0x81, 0xff); 356 reg_w_val(gspca_dev, 0x80, 0x20); 357 reg_w_val(gspca_dev, 0x03, 0x01); 358 reg_w_val(gspca_dev, 0x03, 0x00); 359 reg_w_val(gspca_dev, 0x03, 0x08); 360 /********************************************/ 361 362 /* reg_r(gspca_dev, ET_I2C_BASE, 1); 363 always 0x40 as the pas106 ??? */ 364 /* set the sensor */ 365 if (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv) 366 value = 0x04; /* 320 */ 367 else /* 640 */ 368 value = 0x1e; /* 0x17 * setting PixelClock 369 * 0x03 mean 24/(3+1) = 6 Mhz 370 * 0x05 -> 24/(5+1) = 4 Mhz 371 * 0x0b -> 24/(11+1) = 2 Mhz 372 * 0x17 -> 24/(23+1) = 1 Mhz 373 */ 374 reg_w_val(gspca_dev, ET_PXL_CLK, value); 375 /* now set by fifo the FormatLine setting */ 376 reg_w(gspca_dev, 0x62, FormLine, 6); 377 378 /* set exposure times [ 0..0x78] 0->longvalue 0x78->shortvalue */ 379 reg_w_val(gspca_dev, 0x81, 0x47); /* 0x47; */ 380 reg_w_val(gspca_dev, 0x80, 0x40); /* 0x40; */ 381 /* Pedro change */ 382 /* Brightness change Brith+ decrease value */ 383 /* Brigth- increase value */ 384 /* original value = 0x70; */ 385 reg_w_val(gspca_dev, 0x81, 0x30); /* 0x20; - set brightness */ 386 reg_w_val(gspca_dev, 0x80, 0x20); /* 0x20; */ 387 } 388 389 static void setbrightness(struct gspca_dev *gspca_dev, s32 val) 390 { 391 int i; 392 393 for (i = 0; i < 4; i++) 394 reg_w_val(gspca_dev, ET_O_RED + i, val); 395 } 396 397 static void setcontrast(struct gspca_dev *gspca_dev, s32 val) 398 { 399 __u8 RGBG[] = { 0x80, 0x80, 0x80, 0x80, 0x00, 0x00 }; 400 401 memset(RGBG, val, sizeof(RGBG) - 2); 402 reg_w(gspca_dev, ET_G_RED, RGBG, 6); 403 } 404 405 static void setcolors(struct gspca_dev *gspca_dev, s32 val) 406 { 407 struct sd *sd = (struct sd *) gspca_dev; 408 __u8 I2cc[] = { 0x05, 0x02, 0x02, 0x05, 0x0d }; 409 __u8 i2cflags = 0x01; 410 /* __u8 green = 0; */ 411 412 I2cc[3] = val; /* red */ 413 I2cc[0] = 15 - val; /* blue */ 414 /* green = 15 - ((((7*I2cc[0]) >> 2 ) + I2cc[3]) >> 1); */ 415 /* I2cc[1] = I2cc[2] = green; */ 416 if (sd->sensor == SENSOR_PAS106) { 417 i2c_w(gspca_dev, PAS106_REG13, &i2cflags, 1, 3); 418 i2c_w(gspca_dev, PAS106_REG9, I2cc, sizeof I2cc, 1); 419 } 420 } 421 422 static s32 getcolors(struct gspca_dev *gspca_dev) 423 { 424 struct sd *sd = (struct sd *) gspca_dev; 425 426 if (sd->sensor == SENSOR_PAS106) { 427 /* i2c_r(gspca_dev, PAS106_REG9); * blue */ 428 i2c_r(gspca_dev, PAS106_REG9 + 3); /* red */ 429 return gspca_dev->usb_buf[0] & 0x0f; 430 } 431 return 0; 432 } 433 434 static void setautogain(struct gspca_dev *gspca_dev) 435 { 436 struct sd *sd = (struct sd *) gspca_dev; 437 438 if (sd->autogain) 439 sd->ag_cnt = AG_CNT_START; 440 else 441 sd->ag_cnt = -1; 442 } 443 444 static void Et_init1(struct gspca_dev *gspca_dev) 445 { 446 __u8 value; 447 /* __u8 I2c0 [] = {0x0a, 0x12, 0x05, 0x22, 0xac, 0x00, 0x01, 0x00}; */ 448 __u8 I2c0[] = { 0x0a, 0x12, 0x05, 0x6d, 0xcd, 0x00, 0x01, 0x00 }; 449 /* try 1/120 0x6d 0xcd 0x40 */ 450 /* __u8 I2c0 [] = {0x0a, 0x12, 0x05, 0xfe, 0xfe, 0xc0, 0x01, 0x00}; 451 * 1/60000 hmm ?? */ 452 453 gspca_dbg(gspca_dev, D_STREAM, "Open Init1 ET\n\n"); 454 reg_w_val(gspca_dev, ET_GPIO_DIR_CTRL, 7); 455 reg_r(gspca_dev, ET_GPIO_IN, 1); 456 reg_w_val(gspca_dev, ET_RESET_ALL, 1); 457 reg_w_val(gspca_dev, ET_RESET_ALL, 0); 458 reg_w_val(gspca_dev, ET_ClCK, 0x10); 459 reg_w_val(gspca_dev, ET_CTRL, 0x19); 460 /* compression et subsampling */ 461 if (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv) 462 value = ET_COMP_VAL1; 463 else 464 value = ET_COMP_VAL0; 465 gspca_dbg(gspca_dev, D_STREAM, "Open mode %d Compression %d\n", 466 gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv, 467 value); 468 reg_w_val(gspca_dev, ET_COMP, value); 469 reg_w_val(gspca_dev, ET_MAXQt, 0x1d); 470 reg_w_val(gspca_dev, ET_MINQt, 0x02); 471 /* undocumented registers */ 472 reg_w_val(gspca_dev, ET_REG1d, 0xff); 473 reg_w_val(gspca_dev, ET_REG1e, 0xff); 474 reg_w_val(gspca_dev, ET_REG1f, 0xff); 475 reg_w_val(gspca_dev, ET_REG20, 0x35); 476 reg_w_val(gspca_dev, ET_REG21, 0x01); 477 reg_w_val(gspca_dev, ET_REG22, 0x00); 478 reg_w_val(gspca_dev, ET_REG23, 0xf7); 479 reg_w_val(gspca_dev, ET_REG24, 0xff); 480 reg_w_val(gspca_dev, ET_REG25, 0x07); 481 /* colors setting */ 482 reg_w_val(gspca_dev, ET_G_RED, 0x80); 483 reg_w_val(gspca_dev, ET_G_GREEN1, 0x80); 484 reg_w_val(gspca_dev, ET_G_BLUE, 0x80); 485 reg_w_val(gspca_dev, ET_G_GREEN2, 0x80); 486 reg_w_val(gspca_dev, ET_G_GR_H, 0x00); 487 reg_w_val(gspca_dev, ET_G_GB_H, 0x00); 488 /* Window control registers */ 489 reg_w_val(gspca_dev, ET_SYNCHRO, 0xf0); 490 reg_w_val(gspca_dev, ET_STARTX, 0x56); /* 0x56 */ 491 reg_w_val(gspca_dev, ET_STARTY, 0x05); /* 0x04 */ 492 reg_w_val(gspca_dev, ET_WIDTH_LOW, 0x60); 493 reg_w_val(gspca_dev, ET_HEIGTH_LOW, 0x20); 494 reg_w_val(gspca_dev, ET_W_H_HEIGTH, 0x50); 495 reg_w_val(gspca_dev, ET_REG6e, 0x86); 496 reg_w_val(gspca_dev, ET_REG6f, 0x01); 497 reg_w_val(gspca_dev, ET_REG70, 0x86); 498 reg_w_val(gspca_dev, ET_REG71, 0x14); 499 reg_w_val(gspca_dev, ET_REG72, 0x00); 500 /* Clock Pattern registers */ 501 reg_w_val(gspca_dev, ET_REG73, 0x00); 502 reg_w_val(gspca_dev, ET_REG74, 0x00); 503 reg_w_val(gspca_dev, ET_REG75, 0x0a); 504 reg_w_val(gspca_dev, ET_I2C_CLK, 0x04); 505 reg_w_val(gspca_dev, ET_PXL_CLK, 0x01); 506 /* set the sensor */ 507 if (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv) { 508 I2c0[0] = 0x06; 509 i2c_w(gspca_dev, PAS106_REG2, I2c0, sizeof I2c0, 1); 510 i2c_w(gspca_dev, PAS106_REG9, I2c2, sizeof I2c2, 1); 511 value = 0x06; 512 i2c_w(gspca_dev, PAS106_REG2, &value, 1, 1); 513 i2c_w(gspca_dev, PAS106_REG3, I2c3, sizeof I2c3, 1); 514 /* value = 0x1f; */ 515 value = 0x04; 516 i2c_w(gspca_dev, PAS106_REG0e, &value, 1, 1); 517 } else { 518 I2c0[0] = 0x0a; 519 520 i2c_w(gspca_dev, PAS106_REG2, I2c0, sizeof I2c0, 1); 521 i2c_w(gspca_dev, PAS106_REG9, I2c2, sizeof I2c2, 1); 522 value = 0x0a; 523 i2c_w(gspca_dev, PAS106_REG2, &value, 1, 1); 524 i2c_w(gspca_dev, PAS106_REG3, I2c3, sizeof I2c3, 1); 525 value = 0x04; 526 /* value = 0x10; */ 527 i2c_w(gspca_dev, PAS106_REG0e, &value, 1, 1); 528 /* bit 2 enable bit 1:2 select 0 1 2 3 529 value = 0x07; * curve 0 * 530 i2c_w(gspca_dev, PAS106_REG0f, &value, 1, 1); 531 */ 532 } 533 534 /* value = 0x01; */ 535 /* value = 0x22; */ 536 /* i2c_w(gspca_dev, PAS106_REG5, &value, 1, 1); */ 537 /* magnetude and sign bit for DAC */ 538 i2c_w(gspca_dev, PAS106_REG7, I2c4, sizeof I2c4, 1); 539 /* now set by fifo the whole colors setting */ 540 reg_w(gspca_dev, ET_G_RED, GainRGBG, 6); 541 setcolors(gspca_dev, getcolors(gspca_dev)); 542 } 543 544 /* this function is called at probe time */ 545 static int sd_config(struct gspca_dev *gspca_dev, 546 const struct usb_device_id *id) 547 { 548 struct sd *sd = (struct sd *) gspca_dev; 549 struct cam *cam; 550 551 cam = &gspca_dev->cam; 552 sd->sensor = id->driver_info; 553 if (sd->sensor == SENSOR_PAS106) { 554 cam->cam_mode = sif_mode; 555 cam->nmodes = ARRAY_SIZE(sif_mode); 556 } else { 557 cam->cam_mode = vga_mode; 558 cam->nmodes = ARRAY_SIZE(vga_mode); 559 } 560 sd->ag_cnt = -1; 561 return 0; 562 } 563 564 /* this function is called at probe and resume time */ 565 static int sd_init(struct gspca_dev *gspca_dev) 566 { 567 struct sd *sd = (struct sd *) gspca_dev; 568 569 if (sd->sensor == SENSOR_PAS106) 570 Et_init1(gspca_dev); 571 else 572 Et_init2(gspca_dev); 573 reg_w_val(gspca_dev, ET_RESET_ALL, 0x08); 574 et_video(gspca_dev, 0); /* video off */ 575 return 0; 576 } 577 578 /* -- start the camera -- */ 579 static int sd_start(struct gspca_dev *gspca_dev) 580 { 581 struct sd *sd = (struct sd *) gspca_dev; 582 583 if (sd->sensor == SENSOR_PAS106) 584 Et_init1(gspca_dev); 585 else 586 Et_init2(gspca_dev); 587 588 setautogain(gspca_dev); 589 590 reg_w_val(gspca_dev, ET_RESET_ALL, 0x08); 591 et_video(gspca_dev, 1); /* video on */ 592 return 0; 593 } 594 595 static void sd_stopN(struct gspca_dev *gspca_dev) 596 { 597 et_video(gspca_dev, 0); /* video off */ 598 } 599 600 static __u8 Et_getgainG(struct gspca_dev *gspca_dev) 601 { 602 struct sd *sd = (struct sd *) gspca_dev; 603 604 if (sd->sensor == SENSOR_PAS106) { 605 i2c_r(gspca_dev, PAS106_REG0e); 606 gspca_dbg(gspca_dev, D_CONF, "Etoms gain G %d\n", 607 gspca_dev->usb_buf[0]); 608 return gspca_dev->usb_buf[0]; 609 } 610 return 0x1f; 611 } 612 613 static void Et_setgainG(struct gspca_dev *gspca_dev, __u8 gain) 614 { 615 struct sd *sd = (struct sd *) gspca_dev; 616 617 if (sd->sensor == SENSOR_PAS106) { 618 __u8 i2cflags = 0x01; 619 620 i2c_w(gspca_dev, PAS106_REG13, &i2cflags, 1, 3); 621 i2c_w(gspca_dev, PAS106_REG0e, &gain, 1, 1); 622 } 623 } 624 625 #define BLIMIT(bright) \ 626 (u8)((bright > 0x1f) ? 0x1f : ((bright < 4) ? 3 : bright)) 627 #define LIMIT(color) \ 628 (u8)((color > 0xff) ? 0xff : ((color < 0) ? 0 : color)) 629 630 static void do_autogain(struct gspca_dev *gspca_dev) 631 { 632 struct sd *sd = (struct sd *) gspca_dev; 633 __u8 luma; 634 __u8 luma_mean = 128; 635 __u8 luma_delta = 20; 636 __u8 spring = 4; 637 int Gbright; 638 __u8 r, g, b; 639 640 if (sd->ag_cnt < 0) 641 return; 642 if (--sd->ag_cnt >= 0) 643 return; 644 sd->ag_cnt = AG_CNT_START; 645 646 Gbright = Et_getgainG(gspca_dev); 647 reg_r(gspca_dev, ET_LUMA_CENTER, 4); 648 g = (gspca_dev->usb_buf[0] + gspca_dev->usb_buf[3]) >> 1; 649 r = gspca_dev->usb_buf[1]; 650 b = gspca_dev->usb_buf[2]; 651 r = ((r << 8) - (r << 4) - (r << 3)) >> 10; 652 b = ((b << 7) >> 10); 653 g = ((g << 9) + (g << 7) + (g << 5)) >> 10; 654 luma = LIMIT(r + g + b); 655 gspca_dbg(gspca_dev, D_FRAM, "Etoms luma G %d\n", luma); 656 if (luma < luma_mean - luma_delta || luma > luma_mean + luma_delta) { 657 Gbright += (luma_mean - luma) >> spring; 658 Gbright = BLIMIT(Gbright); 659 gspca_dbg(gspca_dev, D_FRAM, "Etoms Gbright %d\n", Gbright); 660 Et_setgainG(gspca_dev, (__u8) Gbright); 661 } 662 } 663 664 #undef BLIMIT 665 #undef LIMIT 666 667 static void sd_pkt_scan(struct gspca_dev *gspca_dev, 668 u8 *data, /* isoc packet */ 669 int len) /* iso packet length */ 670 { 671 int seqframe; 672 673 seqframe = data[0] & 0x3f; 674 len = (int) (((data[0] & 0xc0) << 2) | data[1]); 675 if (seqframe == 0x3f) { 676 gspca_dbg(gspca_dev, D_FRAM, 677 "header packet found datalength %d !!\n", len); 678 gspca_dbg(gspca_dev, D_FRAM, "G %d R %d G %d B %d", 679 data[2], data[3], data[4], data[5]); 680 data += 30; 681 /* don't change datalength as the chips provided it */ 682 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0); 683 gspca_frame_add(gspca_dev, FIRST_PACKET, data, len); 684 return; 685 } 686 if (len) { 687 data += 8; 688 gspca_frame_add(gspca_dev, INTER_PACKET, data, len); 689 } else { /* Drop Packet */ 690 gspca_dev->last_packet_type = DISCARD_PACKET; 691 } 692 } 693 694 static int sd_s_ctrl(struct v4l2_ctrl *ctrl) 695 { 696 struct gspca_dev *gspca_dev = 697 container_of(ctrl->handler, struct gspca_dev, ctrl_handler); 698 struct sd *sd = (struct sd *)gspca_dev; 699 700 gspca_dev->usb_err = 0; 701 702 if (!gspca_dev->streaming) 703 return 0; 704 705 switch (ctrl->id) { 706 case V4L2_CID_BRIGHTNESS: 707 setbrightness(gspca_dev, ctrl->val); 708 break; 709 case V4L2_CID_CONTRAST: 710 setcontrast(gspca_dev, ctrl->val); 711 break; 712 case V4L2_CID_SATURATION: 713 setcolors(gspca_dev, ctrl->val); 714 break; 715 case V4L2_CID_AUTOGAIN: 716 sd->autogain = ctrl->val; 717 setautogain(gspca_dev); 718 break; 719 } 720 return gspca_dev->usb_err; 721 } 722 723 static const struct v4l2_ctrl_ops sd_ctrl_ops = { 724 .s_ctrl = sd_s_ctrl, 725 }; 726 727 static int sd_init_controls(struct gspca_dev *gspca_dev) 728 { 729 struct sd *sd = (struct sd *)gspca_dev; 730 struct v4l2_ctrl_handler *hdl = &gspca_dev->ctrl_handler; 731 732 gspca_dev->vdev.ctrl_handler = hdl; 733 v4l2_ctrl_handler_init(hdl, 4); 734 v4l2_ctrl_new_std(hdl, &sd_ctrl_ops, 735 V4L2_CID_BRIGHTNESS, 1, 127, 1, 63); 736 v4l2_ctrl_new_std(hdl, &sd_ctrl_ops, 737 V4L2_CID_CONTRAST, 0, 255, 1, 127); 738 if (sd->sensor == SENSOR_PAS106) 739 v4l2_ctrl_new_std(hdl, &sd_ctrl_ops, 740 V4L2_CID_SATURATION, 0, 15, 1, 7); 741 v4l2_ctrl_new_std(hdl, &sd_ctrl_ops, 742 V4L2_CID_AUTOGAIN, 0, 1, 1, 1); 743 if (hdl->error) { 744 pr_err("Could not initialize controls\n"); 745 return hdl->error; 746 } 747 return 0; 748 } 749 750 /* sub-driver description */ 751 static const struct sd_desc sd_desc = { 752 .name = MODULE_NAME, 753 .config = sd_config, 754 .init = sd_init, 755 .init_controls = sd_init_controls, 756 .start = sd_start, 757 .stopN = sd_stopN, 758 .pkt_scan = sd_pkt_scan, 759 .dq_callback = do_autogain, 760 }; 761 762 /* -- module initialisation -- */ 763 static const struct usb_device_id device_table[] = { 764 {USB_DEVICE(0x102c, 0x6151), .driver_info = SENSOR_PAS106}, 765 {USB_DEVICE(0x102c, 0x6251), .driver_info = SENSOR_TAS5130CXX}, 766 {} 767 }; 768 769 MODULE_DEVICE_TABLE(usb, device_table); 770 771 /* -- device connect -- */ 772 static int sd_probe(struct usb_interface *intf, 773 const struct usb_device_id *id) 774 { 775 return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd), 776 THIS_MODULE); 777 } 778 779 static struct usb_driver sd_driver = { 780 .name = MODULE_NAME, 781 .id_table = device_table, 782 .probe = sd_probe, 783 .disconnect = gspca_disconnect, 784 #ifdef CONFIG_PM 785 .suspend = gspca_suspend, 786 .resume = gspca_resume, 787 .reset_resume = gspca_resume, 788 #endif 789 }; 790 791 module_usb_driver(sd_driver); 792