1 /* 2 em28xx-core.c - driver for Empia EM2800/EM2820/2840 USB video capture devices 3 4 Copyright (C) 2005 Ludovico Cavedon <cavedon@sssup.it> 5 Markus Rechberger <mrechberger@gmail.com> 6 Mauro Carvalho Chehab <mchehab@infradead.org> 7 Sascha Sommer <saschasommer@freenet.de> 8 Copyright (C) 2012 Frank Schäfer <fschaefer.oss@googlemail.com> 9 10 This program is free software; you can redistribute it and/or modify 11 it under the terms of the GNU General Public License as published by 12 the Free Software Foundation; either version 2 of the License, or 13 (at your option) any later version. 14 15 This program is distributed in the hope that it will be useful, 16 but WITHOUT ANY WARRANTY; without even the implied warranty of 17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 GNU General Public License for more details. 19 20 You should have received a copy of the GNU General Public License 21 along with this program; if not, write to the Free Software 22 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 23 */ 24 25 #include <linux/init.h> 26 #include <linux/list.h> 27 #include <linux/module.h> 28 #include <linux/slab.h> 29 #include <linux/usb.h> 30 #include <linux/vmalloc.h> 31 #include <sound/ac97_codec.h> 32 #include <media/v4l2-common.h> 33 34 #include "em28xx.h" 35 36 /* #define ENABLE_DEBUG_ISOC_FRAMES */ 37 38 static unsigned int core_debug; 39 module_param(core_debug, int, 0644); 40 MODULE_PARM_DESC(core_debug, "enable debug messages [core]"); 41 42 #define em28xx_coredbg(fmt, arg...) do {\ 43 if (core_debug) \ 44 printk(KERN_INFO "%s %s :"fmt, \ 45 dev->name, __func__ , ##arg); } while (0) 46 47 static unsigned int reg_debug; 48 module_param(reg_debug, int, 0644); 49 MODULE_PARM_DESC(reg_debug, "enable debug messages [URB reg]"); 50 51 #define em28xx_regdbg(fmt, arg...) do {\ 52 if (reg_debug) \ 53 printk(KERN_INFO "%s %s :"fmt, \ 54 dev->name, __func__ , ##arg); } while (0) 55 56 static int alt; 57 module_param(alt, int, 0644); 58 MODULE_PARM_DESC(alt, "alternate setting to use for video endpoint"); 59 60 static unsigned int disable_vbi; 61 module_param(disable_vbi, int, 0644); 62 MODULE_PARM_DESC(disable_vbi, "disable vbi support"); 63 64 /* FIXME */ 65 #define em28xx_isocdbg(fmt, arg...) do {\ 66 if (core_debug) \ 67 printk(KERN_INFO "%s %s :"fmt, \ 68 dev->name, __func__ , ##arg); } while (0) 69 70 /* 71 * em28xx_read_reg_req() 72 * reads data from the usb device specifying bRequest 73 */ 74 int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg, 75 char *buf, int len) 76 { 77 int ret; 78 int pipe = usb_rcvctrlpipe(dev->udev, 0); 79 80 if (dev->disconnected) 81 return -ENODEV; 82 83 if (len > URB_MAX_CTRL_SIZE) 84 return -EINVAL; 85 86 if (reg_debug) { 87 printk(KERN_DEBUG "(pipe 0x%08x): " 88 "IN: %02x %02x %02x %02x %02x %02x %02x %02x ", 89 pipe, 90 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 91 req, 0, 0, 92 reg & 0xff, reg >> 8, 93 len & 0xff, len >> 8); 94 } 95 96 mutex_lock(&dev->ctrl_urb_lock); 97 ret = usb_control_msg(dev->udev, pipe, req, 98 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 99 0x0000, reg, dev->urb_buf, len, HZ); 100 if (ret < 0) { 101 if (reg_debug) 102 printk(" failed!\n"); 103 mutex_unlock(&dev->ctrl_urb_lock); 104 return usb_translate_errors(ret); 105 } 106 107 if (len) 108 memcpy(buf, dev->urb_buf, len); 109 110 mutex_unlock(&dev->ctrl_urb_lock); 111 112 if (reg_debug) { 113 int byte; 114 115 printk("<<<"); 116 for (byte = 0; byte < len; byte++) 117 printk(" %02x", (unsigned char)buf[byte]); 118 printk("\n"); 119 } 120 121 return ret; 122 } 123 124 /* 125 * em28xx_read_reg_req() 126 * reads data from the usb device specifying bRequest 127 */ 128 int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg) 129 { 130 int ret; 131 u8 val; 132 133 ret = em28xx_read_reg_req_len(dev, req, reg, &val, 1); 134 if (ret < 0) 135 return ret; 136 137 return val; 138 } 139 140 int em28xx_read_reg(struct em28xx *dev, u16 reg) 141 { 142 return em28xx_read_reg_req(dev, USB_REQ_GET_STATUS, reg); 143 } 144 EXPORT_SYMBOL_GPL(em28xx_read_reg); 145 146 /* 147 * em28xx_write_regs_req() 148 * sends data to the usb device, specifying bRequest 149 */ 150 int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf, 151 int len) 152 { 153 int ret; 154 int pipe = usb_sndctrlpipe(dev->udev, 0); 155 156 if (dev->disconnected) 157 return -ENODEV; 158 159 if ((len < 1) || (len > URB_MAX_CTRL_SIZE)) 160 return -EINVAL; 161 162 if (reg_debug) { 163 int byte; 164 165 printk(KERN_DEBUG "(pipe 0x%08x): " 166 "OUT: %02x %02x %02x %02x %02x %02x %02x %02x >>>", 167 pipe, 168 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 169 req, 0, 0, 170 reg & 0xff, reg >> 8, 171 len & 0xff, len >> 8); 172 173 for (byte = 0; byte < len; byte++) 174 printk(" %02x", (unsigned char)buf[byte]); 175 printk("\n"); 176 } 177 178 mutex_lock(&dev->ctrl_urb_lock); 179 memcpy(dev->urb_buf, buf, len); 180 ret = usb_control_msg(dev->udev, pipe, req, 181 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 182 0x0000, reg, dev->urb_buf, len, HZ); 183 mutex_unlock(&dev->ctrl_urb_lock); 184 185 if (ret < 0) 186 return usb_translate_errors(ret); 187 188 if (dev->wait_after_write) 189 msleep(dev->wait_after_write); 190 191 return ret; 192 } 193 194 int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len) 195 { 196 int rc; 197 198 rc = em28xx_write_regs_req(dev, USB_REQ_GET_STATUS, reg, buf, len); 199 200 /* Stores GPO/GPIO values at the cache, if changed 201 Only write values should be stored, since input on a GPIO 202 register will return the input bits. 203 Not sure what happens on reading GPO register. 204 */ 205 if (rc >= 0) { 206 if (reg == dev->reg_gpo_num) 207 dev->reg_gpo = buf[0]; 208 else if (reg == dev->reg_gpio_num) 209 dev->reg_gpio = buf[0]; 210 } 211 212 return rc; 213 } 214 EXPORT_SYMBOL_GPL(em28xx_write_regs); 215 216 /* Write a single register */ 217 int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val) 218 { 219 return em28xx_write_regs(dev, reg, &val, 1); 220 } 221 EXPORT_SYMBOL_GPL(em28xx_write_reg); 222 223 /* 224 * em28xx_write_reg_bits() 225 * sets only some bits (specified by bitmask) of a register, by first reading 226 * the actual value 227 */ 228 int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val, 229 u8 bitmask) 230 { 231 int oldval; 232 u8 newval; 233 234 /* Uses cache for gpo/gpio registers */ 235 if (reg == dev->reg_gpo_num) 236 oldval = dev->reg_gpo; 237 else if (reg == dev->reg_gpio_num) 238 oldval = dev->reg_gpio; 239 else 240 oldval = em28xx_read_reg(dev, reg); 241 242 if (oldval < 0) 243 return oldval; 244 245 newval = (((u8) oldval) & ~bitmask) | (val & bitmask); 246 247 return em28xx_write_regs(dev, reg, &newval, 1); 248 } 249 EXPORT_SYMBOL_GPL(em28xx_write_reg_bits); 250 251 /* 252 * em28xx_is_ac97_ready() 253 * Checks if ac97 is ready 254 */ 255 static int em28xx_is_ac97_ready(struct em28xx *dev) 256 { 257 int ret, i; 258 259 /* Wait up to 50 ms for AC97 command to complete */ 260 for (i = 0; i < 10; i++, msleep(5)) { 261 ret = em28xx_read_reg(dev, EM28XX_R43_AC97BUSY); 262 if (ret < 0) 263 return ret; 264 265 if (!(ret & 0x01)) 266 return 0; 267 } 268 269 em28xx_warn("AC97 command still being executed: not handled properly!\n"); 270 return -EBUSY; 271 } 272 273 /* 274 * em28xx_read_ac97() 275 * write a 16 bit value to the specified AC97 address (LSB first!) 276 */ 277 int em28xx_read_ac97(struct em28xx *dev, u8 reg) 278 { 279 int ret; 280 u8 addr = (reg & 0x7f) | 0x80; 281 u16 val; 282 283 ret = em28xx_is_ac97_ready(dev); 284 if (ret < 0) 285 return ret; 286 287 ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1); 288 if (ret < 0) 289 return ret; 290 291 ret = dev->em28xx_read_reg_req_len(dev, 0, EM28XX_R40_AC97LSB, 292 (u8 *)&val, sizeof(val)); 293 294 if (ret < 0) 295 return ret; 296 return le16_to_cpu(val); 297 } 298 EXPORT_SYMBOL_GPL(em28xx_read_ac97); 299 300 /* 301 * em28xx_write_ac97() 302 * write a 16 bit value to the specified AC97 address (LSB first!) 303 */ 304 int em28xx_write_ac97(struct em28xx *dev, u8 reg, u16 val) 305 { 306 int ret; 307 u8 addr = reg & 0x7f; 308 __le16 value; 309 310 value = cpu_to_le16(val); 311 312 ret = em28xx_is_ac97_ready(dev); 313 if (ret < 0) 314 return ret; 315 316 ret = em28xx_write_regs(dev, EM28XX_R40_AC97LSB, (u8 *) &value, 2); 317 if (ret < 0) 318 return ret; 319 320 ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1); 321 if (ret < 0) 322 return ret; 323 324 return 0; 325 } 326 EXPORT_SYMBOL_GPL(em28xx_write_ac97); 327 328 struct em28xx_vol_itable { 329 enum em28xx_amux mux; 330 u8 reg; 331 }; 332 333 static struct em28xx_vol_itable inputs[] = { 334 { EM28XX_AMUX_VIDEO, AC97_VIDEO }, 335 { EM28XX_AMUX_LINE_IN, AC97_LINE }, 336 { EM28XX_AMUX_PHONE, AC97_PHONE }, 337 { EM28XX_AMUX_MIC, AC97_MIC }, 338 { EM28XX_AMUX_CD, AC97_CD }, 339 { EM28XX_AMUX_AUX, AC97_AUX }, 340 { EM28XX_AMUX_PCM_OUT, AC97_PCM }, 341 }; 342 343 static int set_ac97_input(struct em28xx *dev) 344 { 345 int ret, i; 346 enum em28xx_amux amux = dev->ctl_ainput; 347 348 /* EM28XX_AMUX_VIDEO2 is a special case used to indicate that 349 em28xx should point to LINE IN, while AC97 should use VIDEO 350 */ 351 if (amux == EM28XX_AMUX_VIDEO2) 352 amux = EM28XX_AMUX_VIDEO; 353 354 /* Mute all entres but the one that were selected */ 355 for (i = 0; i < ARRAY_SIZE(inputs); i++) { 356 if (amux == inputs[i].mux) 357 ret = em28xx_write_ac97(dev, inputs[i].reg, 0x0808); 358 else 359 ret = em28xx_write_ac97(dev, inputs[i].reg, 0x8000); 360 361 if (ret < 0) 362 em28xx_warn("couldn't setup AC97 register %d\n", 363 inputs[i].reg); 364 } 365 return 0; 366 } 367 368 static int em28xx_set_audio_source(struct em28xx *dev) 369 { 370 int ret; 371 u8 input; 372 373 if (dev->board.is_em2800) { 374 if (dev->ctl_ainput == EM28XX_AMUX_VIDEO) 375 input = EM2800_AUDIO_SRC_TUNER; 376 else 377 input = EM2800_AUDIO_SRC_LINE; 378 379 ret = em28xx_write_regs(dev, EM2800_R08_AUDIOSRC, &input, 1); 380 if (ret < 0) 381 return ret; 382 } 383 384 if (dev->board.has_msp34xx) 385 input = EM28XX_AUDIO_SRC_TUNER; 386 else { 387 switch (dev->ctl_ainput) { 388 case EM28XX_AMUX_VIDEO: 389 input = EM28XX_AUDIO_SRC_TUNER; 390 break; 391 default: 392 input = EM28XX_AUDIO_SRC_LINE; 393 break; 394 } 395 } 396 397 if (dev->board.mute_gpio && dev->mute) 398 em28xx_gpio_set(dev, dev->board.mute_gpio); 399 else 400 em28xx_gpio_set(dev, INPUT(dev->ctl_input)->gpio); 401 402 ret = em28xx_write_reg_bits(dev, EM28XX_R0E_AUDIOSRC, input, 0xc0); 403 if (ret < 0) 404 return ret; 405 msleep(5); 406 407 switch (dev->audio_mode.ac97) { 408 case EM28XX_NO_AC97: 409 break; 410 default: 411 ret = set_ac97_input(dev); 412 } 413 414 return ret; 415 } 416 417 struct em28xx_vol_otable { 418 enum em28xx_aout mux; 419 u8 reg; 420 }; 421 422 static const struct em28xx_vol_otable outputs[] = { 423 { EM28XX_AOUT_MASTER, AC97_MASTER }, 424 { EM28XX_AOUT_LINE, AC97_HEADPHONE }, 425 { EM28XX_AOUT_MONO, AC97_MASTER_MONO }, 426 { EM28XX_AOUT_LFE, AC97_CENTER_LFE_MASTER }, 427 { EM28XX_AOUT_SURR, AC97_SURROUND_MASTER }, 428 }; 429 430 int em28xx_audio_analog_set(struct em28xx *dev) 431 { 432 int ret, i; 433 u8 xclk; 434 435 if (!dev->audio_mode.has_audio) 436 return 0; 437 438 /* It is assumed that all devices use master volume for output. 439 It would be possible to use also line output. 440 */ 441 if (dev->audio_mode.ac97 != EM28XX_NO_AC97) { 442 /* Mute all outputs */ 443 for (i = 0; i < ARRAY_SIZE(outputs); i++) { 444 ret = em28xx_write_ac97(dev, outputs[i].reg, 0x8000); 445 if (ret < 0) 446 em28xx_warn("couldn't setup AC97 register %d\n", 447 outputs[i].reg); 448 } 449 } 450 451 xclk = dev->board.xclk & 0x7f; 452 if (!dev->mute) 453 xclk |= EM28XX_XCLK_AUDIO_UNMUTE; 454 455 ret = em28xx_write_reg(dev, EM28XX_R0F_XCLK, xclk); 456 if (ret < 0) 457 return ret; 458 msleep(10); 459 460 /* Selects the proper audio input */ 461 ret = em28xx_set_audio_source(dev); 462 463 /* Sets volume */ 464 if (dev->audio_mode.ac97 != EM28XX_NO_AC97) { 465 int vol; 466 467 em28xx_write_ac97(dev, AC97_POWERDOWN, 0x4200); 468 em28xx_write_ac97(dev, AC97_EXTENDED_STATUS, 0x0031); 469 em28xx_write_ac97(dev, AC97_PCM_LR_ADC_RATE, 0xbb80); 470 471 /* LSB: left channel - both channels with the same level */ 472 vol = (0x1f - dev->volume) | ((0x1f - dev->volume) << 8); 473 474 /* Mute device, if needed */ 475 if (dev->mute) 476 vol |= 0x8000; 477 478 /* Sets volume */ 479 for (i = 0; i < ARRAY_SIZE(outputs); i++) { 480 if (dev->ctl_aoutput & outputs[i].mux) 481 ret = em28xx_write_ac97(dev, outputs[i].reg, 482 vol); 483 if (ret < 0) 484 em28xx_warn("couldn't setup AC97 register %d\n", 485 outputs[i].reg); 486 } 487 488 if (dev->ctl_aoutput & EM28XX_AOUT_PCM_IN) { 489 int sel = ac97_return_record_select(dev->ctl_aoutput); 490 491 /* Use the same input for both left and right 492 channels */ 493 sel |= (sel << 8); 494 495 em28xx_write_ac97(dev, AC97_REC_SEL, sel); 496 } 497 } 498 499 return ret; 500 } 501 EXPORT_SYMBOL_GPL(em28xx_audio_analog_set); 502 503 int em28xx_audio_setup(struct em28xx *dev) 504 { 505 int vid1, vid2, feat, cfg; 506 u32 vid; 507 508 if (dev->chip_id == CHIP_ID_EM2870 || dev->chip_id == CHIP_ID_EM2874 509 || dev->chip_id == CHIP_ID_EM28174) { 510 /* Digital only device - don't load any alsa module */ 511 dev->audio_mode.has_audio = false; 512 dev->has_audio_class = false; 513 dev->has_alsa_audio = false; 514 return 0; 515 } 516 517 dev->audio_mode.has_audio = true; 518 519 /* See how this device is configured */ 520 cfg = em28xx_read_reg(dev, EM28XX_R00_CHIPCFG); 521 em28xx_info("Config register raw data: 0x%02x\n", cfg); 522 if (cfg < 0) { 523 /* Register read error? */ 524 cfg = EM28XX_CHIPCFG_AC97; /* Be conservative */ 525 } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) == 0x00) { 526 /* The device doesn't have vendor audio at all */ 527 dev->has_alsa_audio = false; 528 dev->audio_mode.has_audio = false; 529 return 0; 530 } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) == 531 EM28XX_CHIPCFG_I2S_3_SAMPRATES) { 532 em28xx_info("I2S Audio (3 sample rates)\n"); 533 dev->audio_mode.i2s_3rates = 1; 534 } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) == 535 EM28XX_CHIPCFG_I2S_5_SAMPRATES) { 536 em28xx_info("I2S Audio (5 sample rates)\n"); 537 dev->audio_mode.i2s_5rates = 1; 538 } 539 540 if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) != EM28XX_CHIPCFG_AC97) { 541 /* Skip the code that does AC97 vendor detection */ 542 dev->audio_mode.ac97 = EM28XX_NO_AC97; 543 goto init_audio; 544 } 545 546 dev->audio_mode.ac97 = EM28XX_AC97_OTHER; 547 548 vid1 = em28xx_read_ac97(dev, AC97_VENDOR_ID1); 549 if (vid1 < 0) { 550 /* 551 * Device likely doesn't support AC97 552 * Note: (some) em2800 devices without eeprom reports 0x91 on 553 * CHIPCFG register, even not having an AC97 chip 554 */ 555 em28xx_warn("AC97 chip type couldn't be determined\n"); 556 dev->audio_mode.ac97 = EM28XX_NO_AC97; 557 dev->has_alsa_audio = false; 558 dev->audio_mode.has_audio = false; 559 goto init_audio; 560 } 561 562 vid2 = em28xx_read_ac97(dev, AC97_VENDOR_ID2); 563 if (vid2 < 0) 564 goto init_audio; 565 566 vid = vid1 << 16 | vid2; 567 568 dev->audio_mode.ac97_vendor_id = vid; 569 em28xx_warn("AC97 vendor ID = 0x%08x\n", vid); 570 571 feat = em28xx_read_ac97(dev, AC97_RESET); 572 if (feat < 0) 573 goto init_audio; 574 575 dev->audio_mode.ac97_feat = feat; 576 em28xx_warn("AC97 features = 0x%04x\n", feat); 577 578 /* Try to identify what audio processor we have */ 579 if (((vid == 0xffffffff) || (vid == 0x83847650)) && (feat == 0x6a90)) 580 dev->audio_mode.ac97 = EM28XX_AC97_EM202; 581 else if ((vid >> 8) == 0x838476) 582 dev->audio_mode.ac97 = EM28XX_AC97_SIGMATEL; 583 584 init_audio: 585 /* Reports detected AC97 processor */ 586 switch (dev->audio_mode.ac97) { 587 case EM28XX_NO_AC97: 588 em28xx_info("No AC97 audio processor\n"); 589 break; 590 case EM28XX_AC97_EM202: 591 em28xx_info("Empia 202 AC97 audio processor detected\n"); 592 break; 593 case EM28XX_AC97_SIGMATEL: 594 em28xx_info("Sigmatel audio processor detected(stac 97%02x)\n", 595 dev->audio_mode.ac97_vendor_id & 0xff); 596 break; 597 case EM28XX_AC97_OTHER: 598 em28xx_warn("Unknown AC97 audio processor detected!\n"); 599 break; 600 default: 601 break; 602 } 603 604 return em28xx_audio_analog_set(dev); 605 } 606 EXPORT_SYMBOL_GPL(em28xx_audio_setup); 607 608 int em28xx_colorlevels_set_default(struct em28xx *dev) 609 { 610 em28xx_write_reg(dev, EM28XX_R20_YGAIN, CONTRAST_DEFAULT); 611 em28xx_write_reg(dev, EM28XX_R21_YOFFSET, BRIGHTNESS_DEFAULT); 612 em28xx_write_reg(dev, EM28XX_R22_UVGAIN, SATURATION_DEFAULT); 613 em28xx_write_reg(dev, EM28XX_R23_UOFFSET, BLUE_BALANCE_DEFAULT); 614 em28xx_write_reg(dev, EM28XX_R24_VOFFSET, RED_BALANCE_DEFAULT); 615 em28xx_write_reg(dev, EM28XX_R25_SHARPNESS, SHARPNESS_DEFAULT); 616 617 em28xx_write_reg(dev, EM28XX_R14_GAMMA, 0x20); 618 em28xx_write_reg(dev, EM28XX_R15_RGAIN, 0x20); 619 em28xx_write_reg(dev, EM28XX_R16_GGAIN, 0x20); 620 em28xx_write_reg(dev, EM28XX_R17_BGAIN, 0x20); 621 em28xx_write_reg(dev, EM28XX_R18_ROFFSET, 0x00); 622 em28xx_write_reg(dev, EM28XX_R19_GOFFSET, 0x00); 623 return em28xx_write_reg(dev, EM28XX_R1A_BOFFSET, 0x00); 624 } 625 626 int em28xx_capture_start(struct em28xx *dev, int start) 627 { 628 int rc; 629 630 if (dev->chip_id == CHIP_ID_EM2874 || 631 dev->chip_id == CHIP_ID_EM2884 || 632 dev->chip_id == CHIP_ID_EM28174) { 633 /* The Transport Stream Enable Register moved in em2874 */ 634 if (!start) { 635 rc = em28xx_write_reg_bits(dev, EM2874_R5F_TS_ENABLE, 636 0x00, 637 EM2874_TS1_CAPTURE_ENABLE); 638 return rc; 639 } 640 641 /* Enable Transport Stream */ 642 rc = em28xx_write_reg_bits(dev, EM2874_R5F_TS_ENABLE, 643 EM2874_TS1_CAPTURE_ENABLE, 644 EM2874_TS1_CAPTURE_ENABLE); 645 return rc; 646 } 647 648 649 /* FIXME: which is the best order? */ 650 /* video registers are sampled by VREF */ 651 rc = em28xx_write_reg_bits(dev, EM28XX_R0C_USBSUSP, 652 start ? 0x10 : 0x00, 0x10); 653 if (rc < 0) 654 return rc; 655 656 if (!start) { 657 /* disable video capture */ 658 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x27); 659 return rc; 660 } 661 662 if (dev->board.is_webcam) 663 rc = em28xx_write_reg(dev, 0x13, 0x0c); 664 665 /* enable video capture */ 666 rc = em28xx_write_reg(dev, 0x48, 0x00); 667 668 if (dev->mode == EM28XX_ANALOG_MODE) 669 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x67); 670 else 671 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x37); 672 673 msleep(6); 674 675 return rc; 676 } 677 678 int em28xx_vbi_supported(struct em28xx *dev) 679 { 680 /* Modprobe option to manually disable */ 681 if (disable_vbi == 1) 682 return 0; 683 684 if (dev->board.is_webcam) 685 return 0; 686 687 /* FIXME: check subdevices for VBI support */ 688 689 if (dev->chip_id == CHIP_ID_EM2860 || 690 dev->chip_id == CHIP_ID_EM2883) 691 return 1; 692 693 /* Version of em28xx that does not support VBI */ 694 return 0; 695 } 696 697 int em28xx_set_outfmt(struct em28xx *dev) 698 { 699 int ret; 700 u8 fmt, vinctrl; 701 702 fmt = dev->format->reg; 703 if (!dev->is_em25xx) 704 fmt |= 0x20; 705 /* 706 * NOTE: it's not clear if this is really needed ! 707 * The datasheets say bit 5 is a reserved bit and devices seem to work 708 * fine without it. But the Windows driver sets it for em2710/50+em28xx 709 * devices and we've always been setting it, too. 710 * 711 * em2765 (em25xx, em276x/7x/8x) devices do NOT work with this bit set, 712 * it's likely used for an additional (compressed ?) format there. 713 */ 714 ret = em28xx_write_reg(dev, EM28XX_R27_OUTFMT, fmt); 715 if (ret < 0) 716 return ret; 717 718 ret = em28xx_write_reg(dev, EM28XX_R10_VINMODE, dev->vinmode); 719 if (ret < 0) 720 return ret; 721 722 vinctrl = dev->vinctl; 723 if (em28xx_vbi_supported(dev) == 1) { 724 vinctrl |= EM28XX_VINCTRL_VBI_RAW; 725 em28xx_write_reg(dev, EM28XX_R34_VBI_START_H, 0x00); 726 em28xx_write_reg(dev, EM28XX_R36_VBI_WIDTH, dev->vbi_width/4); 727 em28xx_write_reg(dev, EM28XX_R37_VBI_HEIGHT, dev->vbi_height); 728 if (dev->norm & V4L2_STD_525_60) { 729 /* NTSC */ 730 em28xx_write_reg(dev, EM28XX_R35_VBI_START_V, 0x09); 731 } else if (dev->norm & V4L2_STD_625_50) { 732 /* PAL */ 733 em28xx_write_reg(dev, EM28XX_R35_VBI_START_V, 0x07); 734 } 735 } 736 737 return em28xx_write_reg(dev, EM28XX_R11_VINCTRL, vinctrl); 738 } 739 740 static int em28xx_accumulator_set(struct em28xx *dev, u8 xmin, u8 xmax, 741 u8 ymin, u8 ymax) 742 { 743 em28xx_coredbg("em28xx Scale: (%d,%d)-(%d,%d)\n", 744 xmin, ymin, xmax, ymax); 745 746 em28xx_write_regs(dev, EM28XX_R28_XMIN, &xmin, 1); 747 em28xx_write_regs(dev, EM28XX_R29_XMAX, &xmax, 1); 748 em28xx_write_regs(dev, EM28XX_R2A_YMIN, &ymin, 1); 749 return em28xx_write_regs(dev, EM28XX_R2B_YMAX, &ymax, 1); 750 } 751 752 static void em28xx_capture_area_set(struct em28xx *dev, u8 hstart, u8 vstart, 753 u16 width, u16 height) 754 { 755 u8 cwidth = width >> 2; 756 u8 cheight = height >> 2; 757 u8 overflow = (height >> 9 & 0x02) | (width >> 10 & 0x01); 758 /* NOTE: size limit: 2047x1023 = 2MPix */ 759 760 em28xx_coredbg("capture area set to (%d,%d): %dx%d\n", 761 hstart, vstart, 762 ((overflow & 2) << 9 | cwidth << 2), 763 ((overflow & 1) << 10 | cheight << 2)); 764 765 em28xx_write_regs(dev, EM28XX_R1C_HSTART, &hstart, 1); 766 em28xx_write_regs(dev, EM28XX_R1D_VSTART, &vstart, 1); 767 em28xx_write_regs(dev, EM28XX_R1E_CWIDTH, &cwidth, 1); 768 em28xx_write_regs(dev, EM28XX_R1F_CHEIGHT, &cheight, 1); 769 em28xx_write_regs(dev, EM28XX_R1B_OFLOW, &overflow, 1); 770 771 /* FIXME: function/meaning of these registers ? */ 772 /* FIXME: align width+height to multiples of 4 ?! */ 773 if (dev->is_em25xx) { 774 em28xx_write_reg(dev, 0x34, width >> 4); 775 em28xx_write_reg(dev, 0x35, height >> 4); 776 } 777 } 778 779 static int em28xx_scaler_set(struct em28xx *dev, u16 h, u16 v) 780 { 781 u8 mode; 782 /* the em2800 scaler only supports scaling down to 50% */ 783 784 if (dev->board.is_em2800) { 785 mode = (v ? 0x20 : 0x00) | (h ? 0x10 : 0x00); 786 } else { 787 u8 buf[2]; 788 789 buf[0] = h; 790 buf[1] = h >> 8; 791 em28xx_write_regs(dev, EM28XX_R30_HSCALELOW, (char *)buf, 2); 792 793 buf[0] = v; 794 buf[1] = v >> 8; 795 em28xx_write_regs(dev, EM28XX_R32_VSCALELOW, (char *)buf, 2); 796 /* it seems that both H and V scalers must be active 797 to work correctly */ 798 mode = (h || v) ? 0x30 : 0x00; 799 } 800 return em28xx_write_reg_bits(dev, EM28XX_R26_COMPR, mode, 0x30); 801 } 802 803 /* FIXME: this only function read values from dev */ 804 int em28xx_resolution_set(struct em28xx *dev) 805 { 806 int width, height; 807 width = norm_maxw(dev); 808 height = norm_maxh(dev); 809 810 /* Properly setup VBI */ 811 dev->vbi_width = 720; 812 if (dev->norm & V4L2_STD_525_60) 813 dev->vbi_height = 12; 814 else 815 dev->vbi_height = 18; 816 817 em28xx_set_outfmt(dev); 818 819 em28xx_accumulator_set(dev, 1, (width - 4) >> 2, 1, (height - 4) >> 2); 820 821 /* If we don't set the start position to 2 in VBI mode, we end up 822 with line 20/21 being YUYV encoded instead of being in 8-bit 823 greyscale. The core of the issue is that line 21 (and line 23 for 824 PAL WSS) are inside of active video region, and as a result they 825 get the pixelformatting associated with that area. So by cropping 826 it out, we end up with the same format as the rest of the VBI 827 region */ 828 if (em28xx_vbi_supported(dev) == 1) 829 em28xx_capture_area_set(dev, 0, 2, width, height); 830 else 831 em28xx_capture_area_set(dev, 0, 0, width, height); 832 833 return em28xx_scaler_set(dev, dev->hscale, dev->vscale); 834 } 835 836 /* Set USB alternate setting for analog video */ 837 int em28xx_set_alternate(struct em28xx *dev) 838 { 839 int errCode; 840 int i; 841 unsigned int min_pkt_size = dev->width * 2 + 4; 842 843 /* NOTE: for isoc transfers, only alt settings > 0 are allowed 844 bulk transfers seem to work only with alt=0 ! */ 845 dev->alt = 0; 846 if ((alt > 0) && (alt < dev->num_alt)) { 847 em28xx_coredbg("alternate forced to %d\n", dev->alt); 848 dev->alt = alt; 849 goto set_alt; 850 } 851 if (dev->analog_xfer_bulk) 852 goto set_alt; 853 854 /* When image size is bigger than a certain value, 855 the frame size should be increased, otherwise, only 856 green screen will be received. 857 */ 858 if (dev->width * 2 * dev->height > 720 * 240 * 2) 859 min_pkt_size *= 2; 860 861 for (i = 0; i < dev->num_alt; i++) { 862 /* stop when the selected alt setting offers enough bandwidth */ 863 if (dev->alt_max_pkt_size_isoc[i] >= min_pkt_size) { 864 dev->alt = i; 865 break; 866 /* otherwise make sure that we end up with the maximum bandwidth 867 because the min_pkt_size equation might be wrong... 868 */ 869 } else if (dev->alt_max_pkt_size_isoc[i] > 870 dev->alt_max_pkt_size_isoc[dev->alt]) 871 dev->alt = i; 872 } 873 874 set_alt: 875 /* NOTE: for bulk transfers, we need to call usb_set_interface() 876 * even if the previous settings were the same. Otherwise streaming 877 * fails with all urbs having status = -EOVERFLOW ! */ 878 if (dev->analog_xfer_bulk) { 879 dev->max_pkt_size = 512; /* USB 2.0 spec */ 880 dev->packet_multiplier = EM28XX_BULK_PACKET_MULTIPLIER; 881 } else { /* isoc */ 882 em28xx_coredbg("minimum isoc packet size: %u (alt=%d)\n", 883 min_pkt_size, dev->alt); 884 dev->max_pkt_size = 885 dev->alt_max_pkt_size_isoc[dev->alt]; 886 dev->packet_multiplier = EM28XX_NUM_ISOC_PACKETS; 887 } 888 em28xx_coredbg("setting alternate %d with wMaxPacketSize=%u\n", 889 dev->alt, dev->max_pkt_size); 890 errCode = usb_set_interface(dev->udev, 0, dev->alt); 891 if (errCode < 0) { 892 em28xx_errdev("cannot change alternate number to %d (error=%i)\n", 893 dev->alt, errCode); 894 return errCode; 895 } 896 return 0; 897 } 898 899 int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio) 900 { 901 int rc = 0; 902 903 if (!gpio) 904 return rc; 905 906 if (dev->mode != EM28XX_SUSPEND) { 907 em28xx_write_reg(dev, 0x48, 0x00); 908 if (dev->mode == EM28XX_ANALOG_MODE) 909 em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x67); 910 else 911 em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x37); 912 msleep(6); 913 } 914 915 /* Send GPIO reset sequences specified at board entry */ 916 while (gpio->sleep >= 0) { 917 if (gpio->reg >= 0) { 918 rc = em28xx_write_reg_bits(dev, 919 gpio->reg, 920 gpio->val, 921 gpio->mask); 922 if (rc < 0) 923 return rc; 924 } 925 if (gpio->sleep > 0) 926 msleep(gpio->sleep); 927 928 gpio++; 929 } 930 return rc; 931 } 932 EXPORT_SYMBOL_GPL(em28xx_gpio_set); 933 934 int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode) 935 { 936 if (dev->mode == set_mode) 937 return 0; 938 939 if (set_mode == EM28XX_SUSPEND) { 940 dev->mode = set_mode; 941 942 /* FIXME: add suspend support for ac97 */ 943 944 return em28xx_gpio_set(dev, dev->board.suspend_gpio); 945 } 946 947 dev->mode = set_mode; 948 949 if (dev->mode == EM28XX_DIGITAL_MODE) 950 return em28xx_gpio_set(dev, dev->board.dvb_gpio); 951 else 952 return em28xx_gpio_set(dev, INPUT(dev->ctl_input)->gpio); 953 } 954 EXPORT_SYMBOL_GPL(em28xx_set_mode); 955 956 /* ------------------------------------------------------------------ 957 URB control 958 ------------------------------------------------------------------*/ 959 960 /* 961 * URB completion handler for isoc/bulk transfers 962 */ 963 static void em28xx_irq_callback(struct urb *urb) 964 { 965 struct em28xx *dev = urb->context; 966 int i; 967 968 switch (urb->status) { 969 case 0: /* success */ 970 case -ETIMEDOUT: /* NAK */ 971 break; 972 case -ECONNRESET: /* kill */ 973 case -ENOENT: 974 case -ESHUTDOWN: 975 return; 976 default: /* error */ 977 em28xx_isocdbg("urb completition error %d.\n", urb->status); 978 break; 979 } 980 981 /* Copy data from URB */ 982 spin_lock(&dev->slock); 983 dev->usb_ctl.urb_data_copy(dev, urb); 984 spin_unlock(&dev->slock); 985 986 /* Reset urb buffers */ 987 for (i = 0; i < urb->number_of_packets; i++) { 988 /* isoc only (bulk: number_of_packets = 0) */ 989 urb->iso_frame_desc[i].status = 0; 990 urb->iso_frame_desc[i].actual_length = 0; 991 } 992 urb->status = 0; 993 994 urb->status = usb_submit_urb(urb, GFP_ATOMIC); 995 if (urb->status) { 996 em28xx_isocdbg("urb resubmit failed (error=%i)\n", 997 urb->status); 998 } 999 } 1000 1001 /* 1002 * Stop and Deallocate URBs 1003 */ 1004 void em28xx_uninit_usb_xfer(struct em28xx *dev, enum em28xx_mode mode) 1005 { 1006 struct urb *urb; 1007 struct em28xx_usb_bufs *usb_bufs; 1008 int i; 1009 1010 em28xx_isocdbg("em28xx: called em28xx_uninit_usb_xfer in mode %d\n", 1011 mode); 1012 1013 if (mode == EM28XX_DIGITAL_MODE) 1014 usb_bufs = &dev->usb_ctl.digital_bufs; 1015 else 1016 usb_bufs = &dev->usb_ctl.analog_bufs; 1017 1018 for (i = 0; i < usb_bufs->num_bufs; i++) { 1019 urb = usb_bufs->urb[i]; 1020 if (urb) { 1021 if (!irqs_disabled()) 1022 usb_kill_urb(urb); 1023 else 1024 usb_unlink_urb(urb); 1025 1026 if (usb_bufs->transfer_buffer[i]) { 1027 usb_free_coherent(dev->udev, 1028 urb->transfer_buffer_length, 1029 usb_bufs->transfer_buffer[i], 1030 urb->transfer_dma); 1031 } 1032 usb_free_urb(urb); 1033 usb_bufs->urb[i] = NULL; 1034 } 1035 usb_bufs->transfer_buffer[i] = NULL; 1036 } 1037 1038 kfree(usb_bufs->urb); 1039 kfree(usb_bufs->transfer_buffer); 1040 1041 usb_bufs->urb = NULL; 1042 usb_bufs->transfer_buffer = NULL; 1043 usb_bufs->num_bufs = 0; 1044 1045 em28xx_capture_start(dev, 0); 1046 } 1047 EXPORT_SYMBOL_GPL(em28xx_uninit_usb_xfer); 1048 1049 /* 1050 * Stop URBs 1051 */ 1052 void em28xx_stop_urbs(struct em28xx *dev) 1053 { 1054 int i; 1055 struct urb *urb; 1056 struct em28xx_usb_bufs *isoc_bufs = &dev->usb_ctl.digital_bufs; 1057 1058 em28xx_isocdbg("em28xx: called em28xx_stop_urbs\n"); 1059 1060 for (i = 0; i < isoc_bufs->num_bufs; i++) { 1061 urb = isoc_bufs->urb[i]; 1062 if (urb) { 1063 if (!irqs_disabled()) 1064 usb_kill_urb(urb); 1065 else 1066 usb_unlink_urb(urb); 1067 } 1068 } 1069 1070 em28xx_capture_start(dev, 0); 1071 } 1072 EXPORT_SYMBOL_GPL(em28xx_stop_urbs); 1073 1074 /* 1075 * Allocate URBs 1076 */ 1077 int em28xx_alloc_urbs(struct em28xx *dev, enum em28xx_mode mode, int xfer_bulk, 1078 int num_bufs, int max_pkt_size, int packet_multiplier) 1079 { 1080 struct em28xx_usb_bufs *usb_bufs; 1081 int i; 1082 int sb_size, pipe; 1083 struct urb *urb; 1084 int j, k; 1085 1086 em28xx_isocdbg("em28xx: called em28xx_alloc_isoc in mode %d\n", mode); 1087 1088 /* Check mode and if we have an endpoint for the selected 1089 transfer type, select buffer */ 1090 if (mode == EM28XX_DIGITAL_MODE) { 1091 if ((xfer_bulk && !dev->dvb_ep_bulk) || 1092 (!xfer_bulk && !dev->dvb_ep_isoc)) { 1093 em28xx_errdev("no endpoint for DVB mode and transfer type %d\n", 1094 xfer_bulk > 0); 1095 return -EINVAL; 1096 } 1097 usb_bufs = &dev->usb_ctl.digital_bufs; 1098 } else if (mode == EM28XX_ANALOG_MODE) { 1099 if ((xfer_bulk && !dev->analog_ep_bulk) || 1100 (!xfer_bulk && !dev->analog_ep_isoc)) { 1101 em28xx_errdev("no endpoint for analog mode and transfer type %d\n", 1102 xfer_bulk > 0); 1103 return -EINVAL; 1104 } 1105 usb_bufs = &dev->usb_ctl.analog_bufs; 1106 } else { 1107 em28xx_errdev("invalid mode selected\n"); 1108 return -EINVAL; 1109 } 1110 1111 /* De-allocates all pending stuff */ 1112 em28xx_uninit_usb_xfer(dev, mode); 1113 1114 usb_bufs->num_bufs = num_bufs; 1115 1116 usb_bufs->urb = kzalloc(sizeof(void *)*num_bufs, GFP_KERNEL); 1117 if (!usb_bufs->urb) { 1118 em28xx_errdev("cannot alloc memory for usb buffers\n"); 1119 return -ENOMEM; 1120 } 1121 1122 usb_bufs->transfer_buffer = kzalloc(sizeof(void *)*num_bufs, 1123 GFP_KERNEL); 1124 if (!usb_bufs->transfer_buffer) { 1125 em28xx_errdev("cannot allocate memory for usb transfer\n"); 1126 kfree(usb_bufs->urb); 1127 return -ENOMEM; 1128 } 1129 1130 usb_bufs->max_pkt_size = max_pkt_size; 1131 if (xfer_bulk) 1132 usb_bufs->num_packets = 0; 1133 else 1134 usb_bufs->num_packets = packet_multiplier; 1135 dev->usb_ctl.vid_buf = NULL; 1136 dev->usb_ctl.vbi_buf = NULL; 1137 1138 sb_size = packet_multiplier * usb_bufs->max_pkt_size; 1139 1140 /* allocate urbs and transfer buffers */ 1141 for (i = 0; i < usb_bufs->num_bufs; i++) { 1142 urb = usb_alloc_urb(usb_bufs->num_packets, GFP_KERNEL); 1143 if (!urb) { 1144 em28xx_err("cannot alloc usb_ctl.urb %i\n", i); 1145 em28xx_uninit_usb_xfer(dev, mode); 1146 return -ENOMEM; 1147 } 1148 usb_bufs->urb[i] = urb; 1149 1150 usb_bufs->transfer_buffer[i] = usb_alloc_coherent(dev->udev, 1151 sb_size, GFP_KERNEL, &urb->transfer_dma); 1152 if (!usb_bufs->transfer_buffer[i]) { 1153 em28xx_err("unable to allocate %i bytes for transfer" 1154 " buffer %i%s\n", 1155 sb_size, i, 1156 in_interrupt() ? " while in int" : ""); 1157 em28xx_uninit_usb_xfer(dev, mode); 1158 return -ENOMEM; 1159 } 1160 memset(usb_bufs->transfer_buffer[i], 0, sb_size); 1161 1162 if (xfer_bulk) { /* bulk */ 1163 pipe = usb_rcvbulkpipe(dev->udev, 1164 mode == EM28XX_ANALOG_MODE ? 1165 dev->analog_ep_bulk : 1166 dev->dvb_ep_bulk); 1167 usb_fill_bulk_urb(urb, dev->udev, pipe, 1168 usb_bufs->transfer_buffer[i], sb_size, 1169 em28xx_irq_callback, dev); 1170 urb->transfer_flags = URB_NO_TRANSFER_DMA_MAP; 1171 } else { /* isoc */ 1172 pipe = usb_rcvisocpipe(dev->udev, 1173 mode == EM28XX_ANALOG_MODE ? 1174 dev->analog_ep_isoc : 1175 dev->dvb_ep_isoc); 1176 usb_fill_int_urb(urb, dev->udev, pipe, 1177 usb_bufs->transfer_buffer[i], sb_size, 1178 em28xx_irq_callback, dev, 1); 1179 urb->transfer_flags = URB_ISO_ASAP | 1180 URB_NO_TRANSFER_DMA_MAP; 1181 k = 0; 1182 for (j = 0; j < usb_bufs->num_packets; j++) { 1183 urb->iso_frame_desc[j].offset = k; 1184 urb->iso_frame_desc[j].length = 1185 usb_bufs->max_pkt_size; 1186 k += usb_bufs->max_pkt_size; 1187 } 1188 } 1189 1190 urb->number_of_packets = usb_bufs->num_packets; 1191 } 1192 1193 return 0; 1194 } 1195 EXPORT_SYMBOL_GPL(em28xx_alloc_urbs); 1196 1197 /* 1198 * Allocate URBs and start IRQ 1199 */ 1200 int em28xx_init_usb_xfer(struct em28xx *dev, enum em28xx_mode mode, 1201 int xfer_bulk, int num_bufs, int max_pkt_size, 1202 int packet_multiplier, 1203 int (*urb_data_copy) (struct em28xx *dev, struct urb *urb)) 1204 { 1205 struct em28xx_dmaqueue *dma_q = &dev->vidq; 1206 struct em28xx_dmaqueue *vbi_dma_q = &dev->vbiq; 1207 struct em28xx_usb_bufs *usb_bufs; 1208 int i; 1209 int rc; 1210 int alloc; 1211 1212 em28xx_isocdbg("em28xx: called em28xx_init_usb_xfer in mode %d\n", 1213 mode); 1214 1215 dev->usb_ctl.urb_data_copy = urb_data_copy; 1216 1217 if (mode == EM28XX_DIGITAL_MODE) { 1218 usb_bufs = &dev->usb_ctl.digital_bufs; 1219 /* no need to free/alloc usb buffers in digital mode */ 1220 alloc = 0; 1221 } else { 1222 usb_bufs = &dev->usb_ctl.analog_bufs; 1223 alloc = 1; 1224 } 1225 1226 if (alloc) { 1227 rc = em28xx_alloc_urbs(dev, mode, xfer_bulk, num_bufs, 1228 max_pkt_size, packet_multiplier); 1229 if (rc) 1230 return rc; 1231 } 1232 1233 if (xfer_bulk) { 1234 rc = usb_clear_halt(dev->udev, usb_bufs->urb[0]->pipe); 1235 if (rc < 0) { 1236 em28xx_err("failed to clear USB bulk endpoint stall/halt condition (error=%i)\n", 1237 rc); 1238 em28xx_uninit_usb_xfer(dev, mode); 1239 return rc; 1240 } 1241 } 1242 1243 init_waitqueue_head(&dma_q->wq); 1244 init_waitqueue_head(&vbi_dma_q->wq); 1245 1246 em28xx_capture_start(dev, 1); 1247 1248 /* submit urbs and enables IRQ */ 1249 for (i = 0; i < usb_bufs->num_bufs; i++) { 1250 rc = usb_submit_urb(usb_bufs->urb[i], GFP_ATOMIC); 1251 if (rc) { 1252 em28xx_err("submit of urb %i failed (error=%i)\n", i, 1253 rc); 1254 em28xx_uninit_usb_xfer(dev, mode); 1255 return rc; 1256 } 1257 } 1258 1259 return 0; 1260 } 1261 EXPORT_SYMBOL_GPL(em28xx_init_usb_xfer); 1262 1263 /* 1264 * em28xx_wake_i2c() 1265 * configure i2c attached devices 1266 */ 1267 void em28xx_wake_i2c(struct em28xx *dev) 1268 { 1269 v4l2_device_call_all(&dev->v4l2_dev, 0, core, reset, 0); 1270 v4l2_device_call_all(&dev->v4l2_dev, 0, video, s_routing, 1271 INPUT(dev->ctl_input)->vmux, 0, 0); 1272 v4l2_device_call_all(&dev->v4l2_dev, 0, video, s_stream, 0); 1273 } 1274 1275 /* 1276 * Device control list 1277 */ 1278 1279 static LIST_HEAD(em28xx_devlist); 1280 static DEFINE_MUTEX(em28xx_devlist_mutex); 1281 1282 /* 1283 * Extension interface 1284 */ 1285 1286 static LIST_HEAD(em28xx_extension_devlist); 1287 1288 int em28xx_register_extension(struct em28xx_ops *ops) 1289 { 1290 struct em28xx *dev = NULL; 1291 1292 mutex_lock(&em28xx_devlist_mutex); 1293 list_add_tail(&ops->next, &em28xx_extension_devlist); 1294 list_for_each_entry(dev, &em28xx_devlist, devlist) { 1295 ops->init(dev); 1296 } 1297 mutex_unlock(&em28xx_devlist_mutex); 1298 printk(KERN_INFO "Em28xx: Initialized (%s) extension\n", ops->name); 1299 return 0; 1300 } 1301 EXPORT_SYMBOL(em28xx_register_extension); 1302 1303 void em28xx_unregister_extension(struct em28xx_ops *ops) 1304 { 1305 struct em28xx *dev = NULL; 1306 1307 mutex_lock(&em28xx_devlist_mutex); 1308 list_for_each_entry(dev, &em28xx_devlist, devlist) { 1309 ops->fini(dev); 1310 } 1311 list_del(&ops->next); 1312 mutex_unlock(&em28xx_devlist_mutex); 1313 printk(KERN_INFO "Em28xx: Removed (%s) extension\n", ops->name); 1314 } 1315 EXPORT_SYMBOL(em28xx_unregister_extension); 1316 1317 void em28xx_init_extension(struct em28xx *dev) 1318 { 1319 const struct em28xx_ops *ops = NULL; 1320 1321 mutex_lock(&em28xx_devlist_mutex); 1322 list_add_tail(&dev->devlist, &em28xx_devlist); 1323 list_for_each_entry(ops, &em28xx_extension_devlist, next) { 1324 if (ops->init) 1325 ops->init(dev); 1326 } 1327 mutex_unlock(&em28xx_devlist_mutex); 1328 } 1329 1330 void em28xx_close_extension(struct em28xx *dev) 1331 { 1332 const struct em28xx_ops *ops = NULL; 1333 1334 mutex_lock(&em28xx_devlist_mutex); 1335 list_for_each_entry(ops, &em28xx_extension_devlist, next) { 1336 if (ops->fini) 1337 ops->fini(dev); 1338 } 1339 list_del(&dev->devlist); 1340 mutex_unlock(&em28xx_devlist_mutex); 1341 } 1342