1 /* 2 em28xx-core.c - driver for Empia EM2800/EM2820/2840 USB video capture devices 3 4 Copyright (C) 2005 Ludovico Cavedon <cavedon@sssup.it> 5 Markus Rechberger <mrechberger@gmail.com> 6 Mauro Carvalho Chehab <mchehab@infradead.org> 7 Sascha Sommer <saschasommer@freenet.de> 8 Copyright (C) 2012 Frank Schäfer <fschaefer.oss@googlemail.com> 9 10 This program is free software; you can redistribute it and/or modify 11 it under the terms of the GNU General Public License as published by 12 the Free Software Foundation; either version 2 of the License, or 13 (at your option) any later version. 14 15 This program is distributed in the hope that it will be useful, 16 but WITHOUT ANY WARRANTY; without even the implied warranty of 17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 GNU General Public License for more details. 19 20 You should have received a copy of the GNU General Public License 21 along with this program; if not, write to the Free Software 22 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 23 */ 24 25 #include <linux/init.h> 26 #include <linux/jiffies.h> 27 #include <linux/list.h> 28 #include <linux/module.h> 29 #include <linux/slab.h> 30 #include <linux/usb.h> 31 #include <linux/vmalloc.h> 32 #include <sound/ac97_codec.h> 33 #include <media/v4l2-common.h> 34 35 #include "em28xx.h" 36 37 #define DRIVER_AUTHOR "Ludovico Cavedon <cavedon@sssup.it>, " \ 38 "Markus Rechberger <mrechberger@gmail.com>, " \ 39 "Mauro Carvalho Chehab <mchehab@infradead.org>, " \ 40 "Sascha Sommer <saschasommer@freenet.de>" 41 42 MODULE_AUTHOR(DRIVER_AUTHOR); 43 MODULE_DESCRIPTION(DRIVER_DESC); 44 MODULE_LICENSE("GPL"); 45 MODULE_VERSION(EM28XX_VERSION); 46 47 /* #define ENABLE_DEBUG_ISOC_FRAMES */ 48 49 static unsigned int core_debug; 50 module_param(core_debug, int, 0644); 51 MODULE_PARM_DESC(core_debug, "enable debug messages [core]"); 52 53 #define em28xx_coredbg(fmt, arg...) do {\ 54 if (core_debug) \ 55 printk(KERN_INFO "%s %s :"fmt, \ 56 dev->name, __func__ , ##arg); } while (0) 57 58 static unsigned int reg_debug; 59 module_param(reg_debug, int, 0644); 60 MODULE_PARM_DESC(reg_debug, "enable debug messages [URB reg]"); 61 62 #define em28xx_regdbg(fmt, arg...) do {\ 63 if (reg_debug) \ 64 printk(KERN_INFO "%s %s :"fmt, \ 65 dev->name, __func__ , ##arg); } while (0) 66 67 /* FIXME */ 68 #define em28xx_isocdbg(fmt, arg...) do {\ 69 if (core_debug) \ 70 printk(KERN_INFO "%s %s :"fmt, \ 71 dev->name, __func__ , ##arg); } while (0) 72 73 /* 74 * em28xx_read_reg_req() 75 * reads data from the usb device specifying bRequest 76 */ 77 int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg, 78 char *buf, int len) 79 { 80 int ret; 81 int pipe = usb_rcvctrlpipe(dev->udev, 0); 82 83 if (dev->disconnected) 84 return -ENODEV; 85 86 if (len > URB_MAX_CTRL_SIZE) 87 return -EINVAL; 88 89 if (reg_debug) { 90 printk(KERN_DEBUG "(pipe 0x%08x): " 91 "IN: %02x %02x %02x %02x %02x %02x %02x %02x ", 92 pipe, 93 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 94 req, 0, 0, 95 reg & 0xff, reg >> 8, 96 len & 0xff, len >> 8); 97 } 98 99 mutex_lock(&dev->ctrl_urb_lock); 100 ret = usb_control_msg(dev->udev, pipe, req, 101 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 102 0x0000, reg, dev->urb_buf, len, HZ); 103 if (ret < 0) { 104 if (reg_debug) 105 printk(" failed!\n"); 106 mutex_unlock(&dev->ctrl_urb_lock); 107 return usb_translate_errors(ret); 108 } 109 110 if (len) 111 memcpy(buf, dev->urb_buf, len); 112 113 mutex_unlock(&dev->ctrl_urb_lock); 114 115 if (reg_debug) { 116 int byte; 117 118 printk("<<<"); 119 for (byte = 0; byte < len; byte++) 120 printk(" %02x", (unsigned char)buf[byte]); 121 printk("\n"); 122 } 123 124 return ret; 125 } 126 127 /* 128 * em28xx_read_reg_req() 129 * reads data from the usb device specifying bRequest 130 */ 131 int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg) 132 { 133 int ret; 134 u8 val; 135 136 ret = em28xx_read_reg_req_len(dev, req, reg, &val, 1); 137 if (ret < 0) 138 return ret; 139 140 return val; 141 } 142 143 int em28xx_read_reg(struct em28xx *dev, u16 reg) 144 { 145 return em28xx_read_reg_req(dev, USB_REQ_GET_STATUS, reg); 146 } 147 EXPORT_SYMBOL_GPL(em28xx_read_reg); 148 149 /* 150 * em28xx_write_regs_req() 151 * sends data to the usb device, specifying bRequest 152 */ 153 int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf, 154 int len) 155 { 156 int ret; 157 int pipe = usb_sndctrlpipe(dev->udev, 0); 158 159 if (dev->disconnected) 160 return -ENODEV; 161 162 if ((len < 1) || (len > URB_MAX_CTRL_SIZE)) 163 return -EINVAL; 164 165 if (reg_debug) { 166 int byte; 167 168 printk(KERN_DEBUG "(pipe 0x%08x): " 169 "OUT: %02x %02x %02x %02x %02x %02x %02x %02x >>>", 170 pipe, 171 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 172 req, 0, 0, 173 reg & 0xff, reg >> 8, 174 len & 0xff, len >> 8); 175 176 for (byte = 0; byte < len; byte++) 177 printk(" %02x", (unsigned char)buf[byte]); 178 printk("\n"); 179 } 180 181 mutex_lock(&dev->ctrl_urb_lock); 182 memcpy(dev->urb_buf, buf, len); 183 ret = usb_control_msg(dev->udev, pipe, req, 184 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 185 0x0000, reg, dev->urb_buf, len, HZ); 186 mutex_unlock(&dev->ctrl_urb_lock); 187 188 if (ret < 0) 189 return usb_translate_errors(ret); 190 191 if (dev->wait_after_write) 192 msleep(dev->wait_after_write); 193 194 return ret; 195 } 196 197 int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len) 198 { 199 return em28xx_write_regs_req(dev, USB_REQ_GET_STATUS, reg, buf, len); 200 } 201 EXPORT_SYMBOL_GPL(em28xx_write_regs); 202 203 /* Write a single register */ 204 int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val) 205 { 206 return em28xx_write_regs(dev, reg, &val, 1); 207 } 208 EXPORT_SYMBOL_GPL(em28xx_write_reg); 209 210 /* 211 * em28xx_write_reg_bits() 212 * sets only some bits (specified by bitmask) of a register, by first reading 213 * the actual value 214 */ 215 int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val, 216 u8 bitmask) 217 { 218 int oldval; 219 u8 newval; 220 221 oldval = em28xx_read_reg(dev, reg); 222 if (oldval < 0) 223 return oldval; 224 225 newval = (((u8) oldval) & ~bitmask) | (val & bitmask); 226 227 return em28xx_write_regs(dev, reg, &newval, 1); 228 } 229 EXPORT_SYMBOL_GPL(em28xx_write_reg_bits); 230 231 /* 232 * em28xx_toggle_reg_bits() 233 * toggles/inverts the bits (specified by bitmask) of a register 234 */ 235 int em28xx_toggle_reg_bits(struct em28xx *dev, u16 reg, u8 bitmask) 236 { 237 int oldval; 238 u8 newval; 239 240 oldval = em28xx_read_reg(dev, reg); 241 if (oldval < 0) 242 return oldval; 243 244 newval = (~oldval & bitmask) | (oldval & ~bitmask); 245 246 return em28xx_write_reg(dev, reg, newval); 247 } 248 EXPORT_SYMBOL_GPL(em28xx_toggle_reg_bits); 249 250 /* 251 * em28xx_is_ac97_ready() 252 * Checks if ac97 is ready 253 */ 254 static int em28xx_is_ac97_ready(struct em28xx *dev) 255 { 256 unsigned long timeout = jiffies + msecs_to_jiffies(EM28XX_AC97_XFER_TIMEOUT); 257 int ret; 258 259 /* Wait up to 50 ms for AC97 command to complete */ 260 while (time_is_after_jiffies(timeout)) { 261 ret = em28xx_read_reg(dev, EM28XX_R43_AC97BUSY); 262 if (ret < 0) 263 return ret; 264 265 if (!(ret & 0x01)) 266 return 0; 267 msleep(5); 268 } 269 270 em28xx_warn("AC97 command still being executed: not handled properly!\n"); 271 return -EBUSY; 272 } 273 274 /* 275 * em28xx_read_ac97() 276 * write a 16 bit value to the specified AC97 address (LSB first!) 277 */ 278 int em28xx_read_ac97(struct em28xx *dev, u8 reg) 279 { 280 int ret; 281 u8 addr = (reg & 0x7f) | 0x80; 282 u16 val; 283 284 ret = em28xx_is_ac97_ready(dev); 285 if (ret < 0) 286 return ret; 287 288 ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1); 289 if (ret < 0) 290 return ret; 291 292 ret = dev->em28xx_read_reg_req_len(dev, 0, EM28XX_R40_AC97LSB, 293 (u8 *)&val, sizeof(val)); 294 295 if (ret < 0) 296 return ret; 297 return le16_to_cpu(val); 298 } 299 EXPORT_SYMBOL_GPL(em28xx_read_ac97); 300 301 /* 302 * em28xx_write_ac97() 303 * write a 16 bit value to the specified AC97 address (LSB first!) 304 */ 305 int em28xx_write_ac97(struct em28xx *dev, u8 reg, u16 val) 306 { 307 int ret; 308 u8 addr = reg & 0x7f; 309 __le16 value; 310 311 value = cpu_to_le16(val); 312 313 ret = em28xx_is_ac97_ready(dev); 314 if (ret < 0) 315 return ret; 316 317 ret = em28xx_write_regs(dev, EM28XX_R40_AC97LSB, (u8 *) &value, 2); 318 if (ret < 0) 319 return ret; 320 321 ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1); 322 if (ret < 0) 323 return ret; 324 325 return 0; 326 } 327 EXPORT_SYMBOL_GPL(em28xx_write_ac97); 328 329 struct em28xx_vol_itable { 330 enum em28xx_amux mux; 331 u8 reg; 332 }; 333 334 static struct em28xx_vol_itable inputs[] = { 335 { EM28XX_AMUX_VIDEO, AC97_VIDEO }, 336 { EM28XX_AMUX_LINE_IN, AC97_LINE }, 337 { EM28XX_AMUX_PHONE, AC97_PHONE }, 338 { EM28XX_AMUX_MIC, AC97_MIC }, 339 { EM28XX_AMUX_CD, AC97_CD }, 340 { EM28XX_AMUX_AUX, AC97_AUX }, 341 { EM28XX_AMUX_PCM_OUT, AC97_PCM }, 342 }; 343 344 static int set_ac97_input(struct em28xx *dev) 345 { 346 int ret, i; 347 enum em28xx_amux amux = dev->ctl_ainput; 348 349 /* EM28XX_AMUX_VIDEO2 is a special case used to indicate that 350 em28xx should point to LINE IN, while AC97 should use VIDEO 351 */ 352 if (amux == EM28XX_AMUX_VIDEO2) 353 amux = EM28XX_AMUX_VIDEO; 354 355 /* Mute all entres but the one that were selected */ 356 for (i = 0; i < ARRAY_SIZE(inputs); i++) { 357 if (amux == inputs[i].mux) 358 ret = em28xx_write_ac97(dev, inputs[i].reg, 0x0808); 359 else 360 ret = em28xx_write_ac97(dev, inputs[i].reg, 0x8000); 361 362 if (ret < 0) 363 em28xx_warn("couldn't setup AC97 register %d\n", 364 inputs[i].reg); 365 } 366 return 0; 367 } 368 369 static int em28xx_set_audio_source(struct em28xx *dev) 370 { 371 int ret; 372 u8 input; 373 374 if (dev->board.is_em2800) { 375 if (dev->ctl_ainput == EM28XX_AMUX_VIDEO) 376 input = EM2800_AUDIO_SRC_TUNER; 377 else 378 input = EM2800_AUDIO_SRC_LINE; 379 380 ret = em28xx_write_regs(dev, EM2800_R08_AUDIOSRC, &input, 1); 381 if (ret < 0) 382 return ret; 383 } 384 385 if (dev->board.has_msp34xx) 386 input = EM28XX_AUDIO_SRC_TUNER; 387 else { 388 switch (dev->ctl_ainput) { 389 case EM28XX_AMUX_VIDEO: 390 input = EM28XX_AUDIO_SRC_TUNER; 391 break; 392 default: 393 input = EM28XX_AUDIO_SRC_LINE; 394 break; 395 } 396 } 397 398 if (dev->board.mute_gpio && dev->mute) 399 em28xx_gpio_set(dev, dev->board.mute_gpio); 400 else 401 em28xx_gpio_set(dev, INPUT(dev->ctl_input)->gpio); 402 403 ret = em28xx_write_reg_bits(dev, EM28XX_R0E_AUDIOSRC, input, 0xc0); 404 if (ret < 0) 405 return ret; 406 msleep(5); 407 408 switch (dev->audio_mode.ac97) { 409 case EM28XX_NO_AC97: 410 break; 411 default: 412 ret = set_ac97_input(dev); 413 } 414 415 return ret; 416 } 417 418 struct em28xx_vol_otable { 419 enum em28xx_aout mux; 420 u8 reg; 421 }; 422 423 static const struct em28xx_vol_otable outputs[] = { 424 { EM28XX_AOUT_MASTER, AC97_MASTER }, 425 { EM28XX_AOUT_LINE, AC97_HEADPHONE }, 426 { EM28XX_AOUT_MONO, AC97_MASTER_MONO }, 427 { EM28XX_AOUT_LFE, AC97_CENTER_LFE_MASTER }, 428 { EM28XX_AOUT_SURR, AC97_SURROUND_MASTER }, 429 }; 430 431 int em28xx_audio_analog_set(struct em28xx *dev) 432 { 433 int ret, i; 434 u8 xclk; 435 436 if (!dev->audio_mode.has_audio) 437 return 0; 438 439 /* It is assumed that all devices use master volume for output. 440 It would be possible to use also line output. 441 */ 442 if (dev->audio_mode.ac97 != EM28XX_NO_AC97) { 443 /* Mute all outputs */ 444 for (i = 0; i < ARRAY_SIZE(outputs); i++) { 445 ret = em28xx_write_ac97(dev, outputs[i].reg, 0x8000); 446 if (ret < 0) 447 em28xx_warn("couldn't setup AC97 register %d\n", 448 outputs[i].reg); 449 } 450 } 451 452 xclk = dev->board.xclk & 0x7f; 453 if (!dev->mute) 454 xclk |= EM28XX_XCLK_AUDIO_UNMUTE; 455 456 ret = em28xx_write_reg(dev, EM28XX_R0F_XCLK, xclk); 457 if (ret < 0) 458 return ret; 459 msleep(10); 460 461 /* Selects the proper audio input */ 462 ret = em28xx_set_audio_source(dev); 463 464 /* Sets volume */ 465 if (dev->audio_mode.ac97 != EM28XX_NO_AC97) { 466 int vol; 467 468 em28xx_write_ac97(dev, AC97_POWERDOWN, 0x4200); 469 em28xx_write_ac97(dev, AC97_EXTENDED_STATUS, 0x0031); 470 em28xx_write_ac97(dev, AC97_PCM_LR_ADC_RATE, 0xbb80); 471 472 /* LSB: left channel - both channels with the same level */ 473 vol = (0x1f - dev->volume) | ((0x1f - dev->volume) << 8); 474 475 /* Mute device, if needed */ 476 if (dev->mute) 477 vol |= 0x8000; 478 479 /* Sets volume */ 480 for (i = 0; i < ARRAY_SIZE(outputs); i++) { 481 if (dev->ctl_aoutput & outputs[i].mux) 482 ret = em28xx_write_ac97(dev, outputs[i].reg, 483 vol); 484 if (ret < 0) 485 em28xx_warn("couldn't setup AC97 register %d\n", 486 outputs[i].reg); 487 } 488 489 if (dev->ctl_aoutput & EM28XX_AOUT_PCM_IN) { 490 int sel = ac97_return_record_select(dev->ctl_aoutput); 491 492 /* Use the same input for both left and right 493 channels */ 494 sel |= (sel << 8); 495 496 em28xx_write_ac97(dev, AC97_REC_SEL, sel); 497 } 498 } 499 500 return ret; 501 } 502 EXPORT_SYMBOL_GPL(em28xx_audio_analog_set); 503 504 int em28xx_audio_setup(struct em28xx *dev) 505 { 506 int vid1, vid2, feat, cfg; 507 u32 vid; 508 509 if (!dev->audio_mode.has_audio) 510 return 0; 511 512 /* See how this device is configured */ 513 cfg = em28xx_read_reg(dev, EM28XX_R00_CHIPCFG); 514 em28xx_info("Config register raw data: 0x%02x\n", cfg); 515 if (cfg < 0) { 516 /* Register read error? */ 517 cfg = EM28XX_CHIPCFG_AC97; /* Be conservative */ 518 } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) == 0x00) { 519 /* The device doesn't have vendor audio at all */ 520 dev->has_alsa_audio = false; 521 dev->audio_mode.has_audio = false; 522 return 0; 523 } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) != EM28XX_CHIPCFG_AC97) { 524 if (dev->chip_id < CHIP_ID_EM2860 && 525 (cfg & EM28XX_CHIPCFG_AUDIOMASK) == 526 EM2820_CHIPCFG_I2S_1_SAMPRATE) 527 dev->audio_mode.i2s_samplerates = 1; 528 else if (dev->chip_id >= CHIP_ID_EM2860 && 529 (cfg & EM28XX_CHIPCFG_AUDIOMASK) == 530 EM2860_CHIPCFG_I2S_5_SAMPRATES) 531 dev->audio_mode.i2s_samplerates = 5; 532 else 533 dev->audio_mode.i2s_samplerates = 3; 534 em28xx_info("I2S Audio (%d sample rate(s))\n", 535 dev->audio_mode.i2s_samplerates); 536 /* Skip the code that does AC97 vendor detection */ 537 dev->audio_mode.ac97 = EM28XX_NO_AC97; 538 goto init_audio; 539 } 540 541 dev->audio_mode.ac97 = EM28XX_AC97_OTHER; 542 543 vid1 = em28xx_read_ac97(dev, AC97_VENDOR_ID1); 544 if (vid1 < 0) { 545 /* 546 * Device likely doesn't support AC97 547 * Note: (some) em2800 devices without eeprom reports 0x91 on 548 * CHIPCFG register, even not having an AC97 chip 549 */ 550 em28xx_warn("AC97 chip type couldn't be determined\n"); 551 dev->audio_mode.ac97 = EM28XX_NO_AC97; 552 dev->has_alsa_audio = false; 553 dev->audio_mode.has_audio = false; 554 goto init_audio; 555 } 556 557 vid2 = em28xx_read_ac97(dev, AC97_VENDOR_ID2); 558 if (vid2 < 0) 559 goto init_audio; 560 561 vid = vid1 << 16 | vid2; 562 563 dev->audio_mode.ac97_vendor_id = vid; 564 em28xx_warn("AC97 vendor ID = 0x%08x\n", vid); 565 566 feat = em28xx_read_ac97(dev, AC97_RESET); 567 if (feat < 0) 568 goto init_audio; 569 570 dev->audio_mode.ac97_feat = feat; 571 em28xx_warn("AC97 features = 0x%04x\n", feat); 572 573 /* Try to identify what audio processor we have */ 574 if (((vid == 0xffffffff) || (vid == 0x83847650)) && (feat == 0x6a90)) 575 dev->audio_mode.ac97 = EM28XX_AC97_EM202; 576 else if ((vid >> 8) == 0x838476) 577 dev->audio_mode.ac97 = EM28XX_AC97_SIGMATEL; 578 579 init_audio: 580 /* Reports detected AC97 processor */ 581 switch (dev->audio_mode.ac97) { 582 case EM28XX_NO_AC97: 583 em28xx_info("No AC97 audio processor\n"); 584 break; 585 case EM28XX_AC97_EM202: 586 em28xx_info("Empia 202 AC97 audio processor detected\n"); 587 break; 588 case EM28XX_AC97_SIGMATEL: 589 em28xx_info("Sigmatel audio processor detected(stac 97%02x)\n", 590 dev->audio_mode.ac97_vendor_id & 0xff); 591 break; 592 case EM28XX_AC97_OTHER: 593 em28xx_warn("Unknown AC97 audio processor detected!\n"); 594 break; 595 default: 596 break; 597 } 598 599 return em28xx_audio_analog_set(dev); 600 } 601 EXPORT_SYMBOL_GPL(em28xx_audio_setup); 602 603 const struct em28xx_led *em28xx_find_led(struct em28xx *dev, 604 enum em28xx_led_role role) 605 { 606 if (dev->board.leds) { 607 u8 k = 0; 608 while (dev->board.leds[k].role >= 0 && 609 dev->board.leds[k].role < EM28XX_NUM_LED_ROLES) { 610 if (dev->board.leds[k].role == role) 611 return &dev->board.leds[k]; 612 k++; 613 } 614 } 615 return NULL; 616 } 617 EXPORT_SYMBOL_GPL(em28xx_find_led); 618 619 int em28xx_capture_start(struct em28xx *dev, int start) 620 { 621 int rc; 622 const struct em28xx_led *led = NULL; 623 624 if (dev->chip_id == CHIP_ID_EM2874 || 625 dev->chip_id == CHIP_ID_EM2884 || 626 dev->chip_id == CHIP_ID_EM28174 || 627 dev->chip_id == CHIP_ID_EM28178) { 628 /* The Transport Stream Enable Register moved in em2874 */ 629 rc = em28xx_write_reg_bits(dev, EM2874_R5F_TS_ENABLE, 630 start ? 631 EM2874_TS1_CAPTURE_ENABLE : 0x00, 632 EM2874_TS1_CAPTURE_ENABLE); 633 } else { 634 /* FIXME: which is the best order? */ 635 /* video registers are sampled by VREF */ 636 rc = em28xx_write_reg_bits(dev, EM28XX_R0C_USBSUSP, 637 start ? 0x10 : 0x00, 0x10); 638 if (rc < 0) 639 return rc; 640 641 if (start) { 642 if (dev->board.is_webcam) 643 rc = em28xx_write_reg(dev, 0x13, 0x0c); 644 645 /* Enable video capture */ 646 rc = em28xx_write_reg(dev, 0x48, 0x00); 647 if (rc < 0) 648 return rc; 649 650 if (dev->mode == EM28XX_ANALOG_MODE) 651 rc = em28xx_write_reg(dev, 652 EM28XX_R12_VINENABLE, 0x67); 653 else 654 rc = em28xx_write_reg(dev, 655 EM28XX_R12_VINENABLE, 0x37); 656 if (rc < 0) 657 return rc; 658 659 msleep(6); 660 } else { 661 /* disable video capture */ 662 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x27); 663 } 664 } 665 666 if (dev->mode == EM28XX_ANALOG_MODE) 667 led = em28xx_find_led(dev, EM28XX_LED_ANALOG_CAPTURING); 668 else 669 led = em28xx_find_led(dev, EM28XX_LED_DIGITAL_CAPTURING); 670 671 if (led) 672 em28xx_write_reg_bits(dev, led->gpio_reg, 673 (!start ^ led->inverted) ? 674 ~led->gpio_mask : led->gpio_mask, 675 led->gpio_mask); 676 677 return rc; 678 } 679 680 int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio) 681 { 682 int rc = 0; 683 684 if (!gpio) 685 return rc; 686 687 if (dev->mode != EM28XX_SUSPEND) { 688 em28xx_write_reg(dev, 0x48, 0x00); 689 if (dev->mode == EM28XX_ANALOG_MODE) 690 em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x67); 691 else 692 em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x37); 693 msleep(6); 694 } 695 696 /* Send GPIO reset sequences specified at board entry */ 697 while (gpio->sleep >= 0) { 698 if (gpio->reg >= 0) { 699 rc = em28xx_write_reg_bits(dev, 700 gpio->reg, 701 gpio->val, 702 gpio->mask); 703 if (rc < 0) 704 return rc; 705 } 706 if (gpio->sleep > 0) 707 msleep(gpio->sleep); 708 709 gpio++; 710 } 711 return rc; 712 } 713 EXPORT_SYMBOL_GPL(em28xx_gpio_set); 714 715 int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode) 716 { 717 if (dev->mode == set_mode) 718 return 0; 719 720 if (set_mode == EM28XX_SUSPEND) { 721 dev->mode = set_mode; 722 723 /* FIXME: add suspend support for ac97 */ 724 725 return em28xx_gpio_set(dev, dev->board.suspend_gpio); 726 } 727 728 dev->mode = set_mode; 729 730 if (dev->mode == EM28XX_DIGITAL_MODE) 731 return em28xx_gpio_set(dev, dev->board.dvb_gpio); 732 else 733 return em28xx_gpio_set(dev, INPUT(dev->ctl_input)->gpio); 734 } 735 EXPORT_SYMBOL_GPL(em28xx_set_mode); 736 737 /* ------------------------------------------------------------------ 738 URB control 739 ------------------------------------------------------------------*/ 740 741 /* 742 * URB completion handler for isoc/bulk transfers 743 */ 744 static void em28xx_irq_callback(struct urb *urb) 745 { 746 struct em28xx *dev = urb->context; 747 int i; 748 749 switch (urb->status) { 750 case 0: /* success */ 751 case -ETIMEDOUT: /* NAK */ 752 break; 753 case -ECONNRESET: /* kill */ 754 case -ENOENT: 755 case -ESHUTDOWN: 756 return; 757 default: /* error */ 758 em28xx_isocdbg("urb completition error %d.\n", urb->status); 759 break; 760 } 761 762 /* Copy data from URB */ 763 spin_lock(&dev->slock); 764 dev->usb_ctl.urb_data_copy(dev, urb); 765 spin_unlock(&dev->slock); 766 767 /* Reset urb buffers */ 768 for (i = 0; i < urb->number_of_packets; i++) { 769 /* isoc only (bulk: number_of_packets = 0) */ 770 urb->iso_frame_desc[i].status = 0; 771 urb->iso_frame_desc[i].actual_length = 0; 772 } 773 urb->status = 0; 774 775 urb->status = usb_submit_urb(urb, GFP_ATOMIC); 776 if (urb->status) { 777 em28xx_isocdbg("urb resubmit failed (error=%i)\n", 778 urb->status); 779 } 780 } 781 782 /* 783 * Stop and Deallocate URBs 784 */ 785 void em28xx_uninit_usb_xfer(struct em28xx *dev, enum em28xx_mode mode) 786 { 787 struct urb *urb; 788 struct em28xx_usb_bufs *usb_bufs; 789 int i; 790 791 em28xx_isocdbg("em28xx: called em28xx_uninit_usb_xfer in mode %d\n", 792 mode); 793 794 if (mode == EM28XX_DIGITAL_MODE) 795 usb_bufs = &dev->usb_ctl.digital_bufs; 796 else 797 usb_bufs = &dev->usb_ctl.analog_bufs; 798 799 for (i = 0; i < usb_bufs->num_bufs; i++) { 800 urb = usb_bufs->urb[i]; 801 if (urb) { 802 if (!irqs_disabled()) 803 usb_kill_urb(urb); 804 else 805 usb_unlink_urb(urb); 806 807 if (usb_bufs->transfer_buffer[i]) { 808 usb_free_coherent(dev->udev, 809 urb->transfer_buffer_length, 810 usb_bufs->transfer_buffer[i], 811 urb->transfer_dma); 812 } 813 usb_free_urb(urb); 814 usb_bufs->urb[i] = NULL; 815 } 816 usb_bufs->transfer_buffer[i] = NULL; 817 } 818 819 kfree(usb_bufs->urb); 820 kfree(usb_bufs->transfer_buffer); 821 822 usb_bufs->urb = NULL; 823 usb_bufs->transfer_buffer = NULL; 824 usb_bufs->num_bufs = 0; 825 826 em28xx_capture_start(dev, 0); 827 } 828 EXPORT_SYMBOL_GPL(em28xx_uninit_usb_xfer); 829 830 /* 831 * Stop URBs 832 */ 833 void em28xx_stop_urbs(struct em28xx *dev) 834 { 835 int i; 836 struct urb *urb; 837 struct em28xx_usb_bufs *isoc_bufs = &dev->usb_ctl.digital_bufs; 838 839 em28xx_isocdbg("em28xx: called em28xx_stop_urbs\n"); 840 841 for (i = 0; i < isoc_bufs->num_bufs; i++) { 842 urb = isoc_bufs->urb[i]; 843 if (urb) { 844 if (!irqs_disabled()) 845 usb_kill_urb(urb); 846 else 847 usb_unlink_urb(urb); 848 } 849 } 850 851 em28xx_capture_start(dev, 0); 852 } 853 EXPORT_SYMBOL_GPL(em28xx_stop_urbs); 854 855 /* 856 * Allocate URBs 857 */ 858 int em28xx_alloc_urbs(struct em28xx *dev, enum em28xx_mode mode, int xfer_bulk, 859 int num_bufs, int max_pkt_size, int packet_multiplier) 860 { 861 struct em28xx_usb_bufs *usb_bufs; 862 int i; 863 int sb_size, pipe; 864 struct urb *urb; 865 int j, k; 866 867 em28xx_isocdbg("em28xx: called em28xx_alloc_isoc in mode %d\n", mode); 868 869 /* Check mode and if we have an endpoint for the selected 870 transfer type, select buffer */ 871 if (mode == EM28XX_DIGITAL_MODE) { 872 if ((xfer_bulk && !dev->dvb_ep_bulk) || 873 (!xfer_bulk && !dev->dvb_ep_isoc)) { 874 em28xx_errdev("no endpoint for DVB mode and transfer type %d\n", 875 xfer_bulk > 0); 876 return -EINVAL; 877 } 878 usb_bufs = &dev->usb_ctl.digital_bufs; 879 } else if (mode == EM28XX_ANALOG_MODE) { 880 if ((xfer_bulk && !dev->analog_ep_bulk) || 881 (!xfer_bulk && !dev->analog_ep_isoc)) { 882 em28xx_errdev("no endpoint for analog mode and transfer type %d\n", 883 xfer_bulk > 0); 884 return -EINVAL; 885 } 886 usb_bufs = &dev->usb_ctl.analog_bufs; 887 } else { 888 em28xx_errdev("invalid mode selected\n"); 889 return -EINVAL; 890 } 891 892 /* De-allocates all pending stuff */ 893 em28xx_uninit_usb_xfer(dev, mode); 894 895 usb_bufs->num_bufs = num_bufs; 896 897 usb_bufs->urb = kzalloc(sizeof(void *)*num_bufs, GFP_KERNEL); 898 if (!usb_bufs->urb) { 899 em28xx_errdev("cannot alloc memory for usb buffers\n"); 900 return -ENOMEM; 901 } 902 903 usb_bufs->transfer_buffer = kzalloc(sizeof(void *)*num_bufs, 904 GFP_KERNEL); 905 if (!usb_bufs->transfer_buffer) { 906 em28xx_errdev("cannot allocate memory for usb transfer\n"); 907 kfree(usb_bufs->urb); 908 return -ENOMEM; 909 } 910 911 usb_bufs->max_pkt_size = max_pkt_size; 912 if (xfer_bulk) 913 usb_bufs->num_packets = 0; 914 else 915 usb_bufs->num_packets = packet_multiplier; 916 dev->usb_ctl.vid_buf = NULL; 917 dev->usb_ctl.vbi_buf = NULL; 918 919 sb_size = packet_multiplier * usb_bufs->max_pkt_size; 920 921 /* allocate urbs and transfer buffers */ 922 for (i = 0; i < usb_bufs->num_bufs; i++) { 923 urb = usb_alloc_urb(usb_bufs->num_packets, GFP_KERNEL); 924 if (!urb) { 925 em28xx_err("cannot alloc usb_ctl.urb %i\n", i); 926 em28xx_uninit_usb_xfer(dev, mode); 927 return -ENOMEM; 928 } 929 usb_bufs->urb[i] = urb; 930 931 usb_bufs->transfer_buffer[i] = usb_alloc_coherent(dev->udev, 932 sb_size, GFP_KERNEL, &urb->transfer_dma); 933 if (!usb_bufs->transfer_buffer[i]) { 934 em28xx_err("unable to allocate %i bytes for transfer" 935 " buffer %i%s\n", 936 sb_size, i, 937 in_interrupt() ? " while in int" : ""); 938 em28xx_uninit_usb_xfer(dev, mode); 939 return -ENOMEM; 940 } 941 memset(usb_bufs->transfer_buffer[i], 0, sb_size); 942 943 if (xfer_bulk) { /* bulk */ 944 pipe = usb_rcvbulkpipe(dev->udev, 945 mode == EM28XX_ANALOG_MODE ? 946 dev->analog_ep_bulk : 947 dev->dvb_ep_bulk); 948 usb_fill_bulk_urb(urb, dev->udev, pipe, 949 usb_bufs->transfer_buffer[i], sb_size, 950 em28xx_irq_callback, dev); 951 urb->transfer_flags = URB_NO_TRANSFER_DMA_MAP; 952 } else { /* isoc */ 953 pipe = usb_rcvisocpipe(dev->udev, 954 mode == EM28XX_ANALOG_MODE ? 955 dev->analog_ep_isoc : 956 dev->dvb_ep_isoc); 957 usb_fill_int_urb(urb, dev->udev, pipe, 958 usb_bufs->transfer_buffer[i], sb_size, 959 em28xx_irq_callback, dev, 1); 960 urb->transfer_flags = URB_ISO_ASAP | 961 URB_NO_TRANSFER_DMA_MAP; 962 k = 0; 963 for (j = 0; j < usb_bufs->num_packets; j++) { 964 urb->iso_frame_desc[j].offset = k; 965 urb->iso_frame_desc[j].length = 966 usb_bufs->max_pkt_size; 967 k += usb_bufs->max_pkt_size; 968 } 969 } 970 971 urb->number_of_packets = usb_bufs->num_packets; 972 } 973 974 return 0; 975 } 976 EXPORT_SYMBOL_GPL(em28xx_alloc_urbs); 977 978 /* 979 * Allocate URBs and start IRQ 980 */ 981 int em28xx_init_usb_xfer(struct em28xx *dev, enum em28xx_mode mode, 982 int xfer_bulk, int num_bufs, int max_pkt_size, 983 int packet_multiplier, 984 int (*urb_data_copy) (struct em28xx *dev, struct urb *urb)) 985 { 986 struct em28xx_dmaqueue *dma_q = &dev->vidq; 987 struct em28xx_dmaqueue *vbi_dma_q = &dev->vbiq; 988 struct em28xx_usb_bufs *usb_bufs; 989 int i; 990 int rc; 991 int alloc; 992 993 em28xx_isocdbg("em28xx: called em28xx_init_usb_xfer in mode %d\n", 994 mode); 995 996 dev->usb_ctl.urb_data_copy = urb_data_copy; 997 998 if (mode == EM28XX_DIGITAL_MODE) { 999 usb_bufs = &dev->usb_ctl.digital_bufs; 1000 /* no need to free/alloc usb buffers in digital mode */ 1001 alloc = 0; 1002 } else { 1003 usb_bufs = &dev->usb_ctl.analog_bufs; 1004 alloc = 1; 1005 } 1006 1007 if (alloc) { 1008 rc = em28xx_alloc_urbs(dev, mode, xfer_bulk, num_bufs, 1009 max_pkt_size, packet_multiplier); 1010 if (rc) 1011 return rc; 1012 } 1013 1014 if (xfer_bulk) { 1015 rc = usb_clear_halt(dev->udev, usb_bufs->urb[0]->pipe); 1016 if (rc < 0) { 1017 em28xx_err("failed to clear USB bulk endpoint stall/halt condition (error=%i)\n", 1018 rc); 1019 em28xx_uninit_usb_xfer(dev, mode); 1020 return rc; 1021 } 1022 } 1023 1024 init_waitqueue_head(&dma_q->wq); 1025 init_waitqueue_head(&vbi_dma_q->wq); 1026 1027 em28xx_capture_start(dev, 1); 1028 1029 /* submit urbs and enables IRQ */ 1030 for (i = 0; i < usb_bufs->num_bufs; i++) { 1031 rc = usb_submit_urb(usb_bufs->urb[i], GFP_ATOMIC); 1032 if (rc) { 1033 em28xx_err("submit of urb %i failed (error=%i)\n", i, 1034 rc); 1035 em28xx_uninit_usb_xfer(dev, mode); 1036 return rc; 1037 } 1038 } 1039 1040 return 0; 1041 } 1042 EXPORT_SYMBOL_GPL(em28xx_init_usb_xfer); 1043 1044 /* 1045 * Device control list 1046 */ 1047 1048 static LIST_HEAD(em28xx_devlist); 1049 static DEFINE_MUTEX(em28xx_devlist_mutex); 1050 1051 /* 1052 * Extension interface 1053 */ 1054 1055 static LIST_HEAD(em28xx_extension_devlist); 1056 1057 int em28xx_register_extension(struct em28xx_ops *ops) 1058 { 1059 struct em28xx *dev = NULL; 1060 1061 mutex_lock(&em28xx_devlist_mutex); 1062 list_add_tail(&ops->next, &em28xx_extension_devlist); 1063 list_for_each_entry(dev, &em28xx_devlist, devlist) { 1064 ops->init(dev); 1065 } 1066 mutex_unlock(&em28xx_devlist_mutex); 1067 printk(KERN_INFO "em28xx: Registered (%s) extension\n", ops->name); 1068 return 0; 1069 } 1070 EXPORT_SYMBOL(em28xx_register_extension); 1071 1072 void em28xx_unregister_extension(struct em28xx_ops *ops) 1073 { 1074 struct em28xx *dev = NULL; 1075 1076 mutex_lock(&em28xx_devlist_mutex); 1077 list_for_each_entry(dev, &em28xx_devlist, devlist) { 1078 ops->fini(dev); 1079 } 1080 list_del(&ops->next); 1081 mutex_unlock(&em28xx_devlist_mutex); 1082 printk(KERN_INFO "Em28xx: Removed (%s) extension\n", ops->name); 1083 } 1084 EXPORT_SYMBOL(em28xx_unregister_extension); 1085 1086 void em28xx_init_extension(struct em28xx *dev) 1087 { 1088 const struct em28xx_ops *ops = NULL; 1089 1090 mutex_lock(&em28xx_devlist_mutex); 1091 list_add_tail(&dev->devlist, &em28xx_devlist); 1092 list_for_each_entry(ops, &em28xx_extension_devlist, next) { 1093 if (ops->init) 1094 ops->init(dev); 1095 } 1096 mutex_unlock(&em28xx_devlist_mutex); 1097 } 1098 1099 void em28xx_close_extension(struct em28xx *dev) 1100 { 1101 const struct em28xx_ops *ops = NULL; 1102 1103 mutex_lock(&em28xx_devlist_mutex); 1104 list_for_each_entry(ops, &em28xx_extension_devlist, next) { 1105 if (ops->fini) 1106 ops->fini(dev); 1107 } 1108 list_del(&dev->devlist); 1109 mutex_unlock(&em28xx_devlist_mutex); 1110 } 1111 1112 int em28xx_suspend_extension(struct em28xx *dev) 1113 { 1114 const struct em28xx_ops *ops = NULL; 1115 1116 em28xx_info("Suspending extensions"); 1117 mutex_lock(&em28xx_devlist_mutex); 1118 list_for_each_entry(ops, &em28xx_extension_devlist, next) { 1119 if (ops->suspend) 1120 ops->suspend(dev); 1121 } 1122 mutex_unlock(&em28xx_devlist_mutex); 1123 return 0; 1124 } 1125 1126 int em28xx_resume_extension(struct em28xx *dev) 1127 { 1128 const struct em28xx_ops *ops = NULL; 1129 1130 em28xx_info("Resuming extensions"); 1131 mutex_lock(&em28xx_devlist_mutex); 1132 list_for_each_entry(ops, &em28xx_extension_devlist, next) { 1133 if (ops->resume) 1134 ops->resume(dev); 1135 } 1136 mutex_unlock(&em28xx_devlist_mutex); 1137 return 0; 1138 } 1139