1 /* 2 em28xx-core.c - driver for Empia EM2800/EM2820/2840 USB video capture devices 3 4 Copyright (C) 2005 Ludovico Cavedon <cavedon@sssup.it> 5 Markus Rechberger <mrechberger@gmail.com> 6 Mauro Carvalho Chehab <mchehab@infradead.org> 7 Sascha Sommer <saschasommer@freenet.de> 8 Copyright (C) 2012 Frank Schäfer <fschaefer.oss@googlemail.com> 9 10 This program is free software; you can redistribute it and/or modify 11 it under the terms of the GNU General Public License as published by 12 the Free Software Foundation; either version 2 of the License, or 13 (at your option) any later version. 14 15 This program is distributed in the hope that it will be useful, 16 but WITHOUT ANY WARRANTY; without even the implied warranty of 17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 GNU General Public License for more details. 19 20 You should have received a copy of the GNU General Public License 21 along with this program; if not, write to the Free Software 22 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 23 */ 24 25 #include "em28xx.h" 26 27 #include <linux/init.h> 28 #include <linux/jiffies.h> 29 #include <linux/list.h> 30 #include <linux/module.h> 31 #include <linux/slab.h> 32 #include <linux/usb.h> 33 #include <linux/vmalloc.h> 34 #include <sound/ac97_codec.h> 35 #include <media/v4l2-common.h> 36 37 #define DRIVER_AUTHOR "Ludovico Cavedon <cavedon@sssup.it>, " \ 38 "Markus Rechberger <mrechberger@gmail.com>, " \ 39 "Mauro Carvalho Chehab <mchehab@infradead.org>, " \ 40 "Sascha Sommer <saschasommer@freenet.de>" 41 42 MODULE_AUTHOR(DRIVER_AUTHOR); 43 MODULE_DESCRIPTION(DRIVER_DESC); 44 MODULE_LICENSE("GPL"); 45 MODULE_VERSION(EM28XX_VERSION); 46 47 /* #define ENABLE_DEBUG_ISOC_FRAMES */ 48 49 static unsigned int core_debug; 50 module_param(core_debug, int, 0644); 51 MODULE_PARM_DESC(core_debug, "enable debug messages [core and isoc]"); 52 53 #define em28xx_coredbg(fmt, arg...) do {\ 54 if (core_debug) \ 55 printk(KERN_DEBUG pr_fmt("core: %s: " fmt), \ 56 __func__, ##arg); } while (0) 57 58 static unsigned int reg_debug; 59 module_param(reg_debug, int, 0644); 60 MODULE_PARM_DESC(reg_debug, "enable debug messages [URB reg]"); 61 62 #define em28xx_regdbg(fmt, arg...) do {\ 63 if (reg_debug) \ 64 printk(KERN_DEBUG pr_fmt("reg: %s: " fmt), \ 65 __func__, ##arg); } while (0) 66 67 /* FIXME */ 68 #define em28xx_isocdbg(fmt, arg...) do {\ 69 if (core_debug) \ 70 printk(KERN_DEBUG pr_fmt("isoc: %s: " fmt), \ 71 __func__, ##arg); } while (0) 72 73 /* 74 * em28xx_read_reg_req() 75 * reads data from the usb device specifying bRequest 76 */ 77 int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg, 78 char *buf, int len) 79 { 80 int ret; 81 int pipe = usb_rcvctrlpipe(dev->udev, 0); 82 83 if (dev->disconnected) 84 return -ENODEV; 85 86 if (len > URB_MAX_CTRL_SIZE) 87 return -EINVAL; 88 89 if (reg_debug) { 90 printk(KERN_DEBUG 91 "(pipe 0x%08x): IN: %02x %02x %02x %02x %02x %02x %02x %02x ", 92 pipe, 93 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 94 req, 0, 0, 95 reg & 0xff, reg >> 8, 96 len & 0xff, len >> 8); 97 } 98 99 mutex_lock(&dev->ctrl_urb_lock); 100 ret = usb_control_msg(dev->udev, pipe, req, 101 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 102 0x0000, reg, dev->urb_buf, len, HZ); 103 if (ret < 0) { 104 if (reg_debug) 105 pr_cont(" failed!\n"); 106 mutex_unlock(&dev->ctrl_urb_lock); 107 return usb_translate_errors(ret); 108 } 109 110 if (len) 111 memcpy(buf, dev->urb_buf, len); 112 113 mutex_unlock(&dev->ctrl_urb_lock); 114 115 if (reg_debug) { 116 int byte; 117 118 pr_cont("<<<"); 119 for (byte = 0; byte < len; byte++) 120 pr_cont(" %02x", (unsigned char)buf[byte]); 121 pr_cont("\n"); 122 } 123 124 return ret; 125 } 126 127 /* 128 * em28xx_read_reg_req() 129 * reads data from the usb device specifying bRequest 130 */ 131 int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg) 132 { 133 int ret; 134 u8 val; 135 136 ret = em28xx_read_reg_req_len(dev, req, reg, &val, 1); 137 if (ret < 0) 138 return ret; 139 140 return val; 141 } 142 143 int em28xx_read_reg(struct em28xx *dev, u16 reg) 144 { 145 return em28xx_read_reg_req(dev, USB_REQ_GET_STATUS, reg); 146 } 147 EXPORT_SYMBOL_GPL(em28xx_read_reg); 148 149 /* 150 * em28xx_write_regs_req() 151 * sends data to the usb device, specifying bRequest 152 */ 153 int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf, 154 int len) 155 { 156 int ret; 157 int pipe = usb_sndctrlpipe(dev->udev, 0); 158 159 if (dev->disconnected) 160 return -ENODEV; 161 162 if ((len < 1) || (len > URB_MAX_CTRL_SIZE)) 163 return -EINVAL; 164 165 if (reg_debug) { 166 int byte; 167 168 printk(KERN_DEBUG 169 "(pipe 0x%08x): OUT: %02x %02x %02x %02x %02x %02x %02x %02x >>>", 170 pipe, 171 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 172 req, 0, 0, 173 reg & 0xff, reg >> 8, 174 len & 0xff, len >> 8); 175 176 for (byte = 0; byte < len; byte++) 177 pr_cont(" %02x", (unsigned char)buf[byte]); 178 pr_cont("\n"); 179 } 180 181 mutex_lock(&dev->ctrl_urb_lock); 182 memcpy(dev->urb_buf, buf, len); 183 ret = usb_control_msg(dev->udev, pipe, req, 184 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 185 0x0000, reg, dev->urb_buf, len, HZ); 186 mutex_unlock(&dev->ctrl_urb_lock); 187 188 if (ret < 0) 189 return usb_translate_errors(ret); 190 191 if (dev->wait_after_write) 192 msleep(dev->wait_after_write); 193 194 return ret; 195 } 196 197 int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len) 198 { 199 return em28xx_write_regs_req(dev, USB_REQ_GET_STATUS, reg, buf, len); 200 } 201 EXPORT_SYMBOL_GPL(em28xx_write_regs); 202 203 /* Write a single register */ 204 int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val) 205 { 206 return em28xx_write_regs(dev, reg, &val, 1); 207 } 208 EXPORT_SYMBOL_GPL(em28xx_write_reg); 209 210 /* 211 * em28xx_write_reg_bits() 212 * sets only some bits (specified by bitmask) of a register, by first reading 213 * the actual value 214 */ 215 int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val, 216 u8 bitmask) 217 { 218 int oldval; 219 u8 newval; 220 221 oldval = em28xx_read_reg(dev, reg); 222 if (oldval < 0) 223 return oldval; 224 225 newval = (((u8)oldval) & ~bitmask) | (val & bitmask); 226 227 return em28xx_write_regs(dev, reg, &newval, 1); 228 } 229 EXPORT_SYMBOL_GPL(em28xx_write_reg_bits); 230 231 /* 232 * em28xx_toggle_reg_bits() 233 * toggles/inverts the bits (specified by bitmask) of a register 234 */ 235 int em28xx_toggle_reg_bits(struct em28xx *dev, u16 reg, u8 bitmask) 236 { 237 int oldval; 238 u8 newval; 239 240 oldval = em28xx_read_reg(dev, reg); 241 if (oldval < 0) 242 return oldval; 243 244 newval = (~oldval & bitmask) | (oldval & ~bitmask); 245 246 return em28xx_write_reg(dev, reg, newval); 247 } 248 EXPORT_SYMBOL_GPL(em28xx_toggle_reg_bits); 249 250 /* 251 * em28xx_is_ac97_ready() 252 * Checks if ac97 is ready 253 */ 254 static int em28xx_is_ac97_ready(struct em28xx *dev) 255 { 256 unsigned long timeout = jiffies + msecs_to_jiffies(EM28XX_AC97_XFER_TIMEOUT); 257 int ret; 258 259 /* Wait up to 50 ms for AC97 command to complete */ 260 while (time_is_after_jiffies(timeout)) { 261 ret = em28xx_read_reg(dev, EM28XX_R43_AC97BUSY); 262 if (ret < 0) 263 return ret; 264 265 if (!(ret & 0x01)) 266 return 0; 267 msleep(5); 268 } 269 270 pr_warn("AC97 command still being executed: not handled properly!\n"); 271 return -EBUSY; 272 } 273 274 /* 275 * em28xx_read_ac97() 276 * write a 16 bit value to the specified AC97 address (LSB first!) 277 */ 278 int em28xx_read_ac97(struct em28xx *dev, u8 reg) 279 { 280 int ret; 281 u8 addr = (reg & 0x7f) | 0x80; 282 __le16 val; 283 284 ret = em28xx_is_ac97_ready(dev); 285 if (ret < 0) 286 return ret; 287 288 ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1); 289 if (ret < 0) 290 return ret; 291 292 ret = dev->em28xx_read_reg_req_len(dev, 0, EM28XX_R40_AC97LSB, 293 (u8 *)&val, sizeof(val)); 294 295 if (ret < 0) 296 return ret; 297 return le16_to_cpu(val); 298 } 299 EXPORT_SYMBOL_GPL(em28xx_read_ac97); 300 301 /* 302 * em28xx_write_ac97() 303 * write a 16 bit value to the specified AC97 address (LSB first!) 304 */ 305 int em28xx_write_ac97(struct em28xx *dev, u8 reg, u16 val) 306 { 307 int ret; 308 u8 addr = reg & 0x7f; 309 __le16 value; 310 311 value = cpu_to_le16(val); 312 313 ret = em28xx_is_ac97_ready(dev); 314 if (ret < 0) 315 return ret; 316 317 ret = em28xx_write_regs(dev, EM28XX_R40_AC97LSB, (u8 *)&value, 2); 318 if (ret < 0) 319 return ret; 320 321 ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1); 322 if (ret < 0) 323 return ret; 324 325 return 0; 326 } 327 EXPORT_SYMBOL_GPL(em28xx_write_ac97); 328 329 struct em28xx_vol_itable { 330 enum em28xx_amux mux; 331 u8 reg; 332 }; 333 334 static struct em28xx_vol_itable inputs[] = { 335 { EM28XX_AMUX_VIDEO, AC97_VIDEO }, 336 { EM28XX_AMUX_LINE_IN, AC97_LINE }, 337 { EM28XX_AMUX_PHONE, AC97_PHONE }, 338 { EM28XX_AMUX_MIC, AC97_MIC }, 339 { EM28XX_AMUX_CD, AC97_CD }, 340 { EM28XX_AMUX_AUX, AC97_AUX }, 341 { EM28XX_AMUX_PCM_OUT, AC97_PCM }, 342 }; 343 344 static int set_ac97_input(struct em28xx *dev) 345 { 346 int ret, i; 347 enum em28xx_amux amux = dev->ctl_ainput; 348 349 /* EM28XX_AMUX_VIDEO2 is a special case used to indicate that 350 em28xx should point to LINE IN, while AC97 should use VIDEO 351 */ 352 if (amux == EM28XX_AMUX_VIDEO2) 353 amux = EM28XX_AMUX_VIDEO; 354 355 /* Mute all entres but the one that were selected */ 356 for (i = 0; i < ARRAY_SIZE(inputs); i++) { 357 if (amux == inputs[i].mux) 358 ret = em28xx_write_ac97(dev, inputs[i].reg, 0x0808); 359 else 360 ret = em28xx_write_ac97(dev, inputs[i].reg, 0x8000); 361 362 if (ret < 0) 363 pr_warn("couldn't setup AC97 register %d\n", 364 inputs[i].reg); 365 } 366 return 0; 367 } 368 369 static int em28xx_set_audio_source(struct em28xx *dev) 370 { 371 int ret; 372 u8 input; 373 374 if (dev->board.is_em2800) { 375 if (dev->ctl_ainput == EM28XX_AMUX_VIDEO) 376 input = EM2800_AUDIO_SRC_TUNER; 377 else 378 input = EM2800_AUDIO_SRC_LINE; 379 380 ret = em28xx_write_regs(dev, EM2800_R08_AUDIOSRC, &input, 1); 381 if (ret < 0) 382 return ret; 383 } 384 385 if (dev->board.has_msp34xx) 386 input = EM28XX_AUDIO_SRC_TUNER; 387 else { 388 switch (dev->ctl_ainput) { 389 case EM28XX_AMUX_VIDEO: 390 input = EM28XX_AUDIO_SRC_TUNER; 391 break; 392 default: 393 input = EM28XX_AUDIO_SRC_LINE; 394 break; 395 } 396 } 397 398 if (dev->board.mute_gpio && dev->mute) 399 em28xx_gpio_set(dev, dev->board.mute_gpio); 400 else 401 em28xx_gpio_set(dev, INPUT(dev->ctl_input)->gpio); 402 403 ret = em28xx_write_reg_bits(dev, EM28XX_R0E_AUDIOSRC, input, 0xc0); 404 if (ret < 0) 405 return ret; 406 msleep(5); 407 408 switch (dev->audio_mode.ac97) { 409 case EM28XX_NO_AC97: 410 break; 411 default: 412 ret = set_ac97_input(dev); 413 } 414 415 return ret; 416 } 417 418 struct em28xx_vol_otable { 419 enum em28xx_aout mux; 420 u8 reg; 421 }; 422 423 static const struct em28xx_vol_otable outputs[] = { 424 { EM28XX_AOUT_MASTER, AC97_MASTER }, 425 { EM28XX_AOUT_LINE, AC97_HEADPHONE }, 426 { EM28XX_AOUT_MONO, AC97_MASTER_MONO }, 427 { EM28XX_AOUT_LFE, AC97_CENTER_LFE_MASTER }, 428 { EM28XX_AOUT_SURR, AC97_SURROUND_MASTER }, 429 }; 430 431 int em28xx_audio_analog_set(struct em28xx *dev) 432 { 433 int ret, i; 434 u8 xclk; 435 436 if (dev->int_audio_type == EM28XX_INT_AUDIO_NONE) 437 return 0; 438 439 /* It is assumed that all devices use master volume for output. 440 It would be possible to use also line output. 441 */ 442 if (dev->audio_mode.ac97 != EM28XX_NO_AC97) { 443 /* Mute all outputs */ 444 for (i = 0; i < ARRAY_SIZE(outputs); i++) { 445 ret = em28xx_write_ac97(dev, outputs[i].reg, 0x8000); 446 if (ret < 0) 447 pr_warn("couldn't setup AC97 register %d\n", 448 outputs[i].reg); 449 } 450 } 451 452 xclk = dev->board.xclk & 0x7f; 453 if (!dev->mute) 454 xclk |= EM28XX_XCLK_AUDIO_UNMUTE; 455 456 ret = em28xx_write_reg(dev, EM28XX_R0F_XCLK, xclk); 457 if (ret < 0) 458 return ret; 459 msleep(10); 460 461 /* Selects the proper audio input */ 462 ret = em28xx_set_audio_source(dev); 463 464 /* Sets volume */ 465 if (dev->audio_mode.ac97 != EM28XX_NO_AC97) { 466 int vol; 467 468 em28xx_write_ac97(dev, AC97_POWERDOWN, 0x4200); 469 em28xx_write_ac97(dev, AC97_EXTENDED_STATUS, 0x0031); 470 em28xx_write_ac97(dev, AC97_PCM_LR_ADC_RATE, 0xbb80); 471 472 /* LSB: left channel - both channels with the same level */ 473 vol = (0x1f - dev->volume) | ((0x1f - dev->volume) << 8); 474 475 /* Mute device, if needed */ 476 if (dev->mute) 477 vol |= 0x8000; 478 479 /* Sets volume */ 480 for (i = 0; i < ARRAY_SIZE(outputs); i++) { 481 if (dev->ctl_aoutput & outputs[i].mux) 482 ret = em28xx_write_ac97(dev, outputs[i].reg, 483 vol); 484 if (ret < 0) 485 pr_warn("couldn't setup AC97 register %d\n", 486 outputs[i].reg); 487 } 488 489 if (dev->ctl_aoutput & EM28XX_AOUT_PCM_IN) { 490 int sel = ac97_return_record_select(dev->ctl_aoutput); 491 492 /* Use the same input for both left and right 493 channels */ 494 sel |= (sel << 8); 495 496 em28xx_write_ac97(dev, AC97_REC_SEL, sel); 497 } 498 } 499 500 return ret; 501 } 502 EXPORT_SYMBOL_GPL(em28xx_audio_analog_set); 503 504 int em28xx_audio_setup(struct em28xx *dev) 505 { 506 int vid1, vid2, feat, cfg; 507 u32 vid = 0; 508 u8 i2s_samplerates; 509 510 if (dev->chip_id == CHIP_ID_EM2870 || 511 dev->chip_id == CHIP_ID_EM2874 || 512 dev->chip_id == CHIP_ID_EM28174 || 513 dev->chip_id == CHIP_ID_EM28178) { 514 /* Digital only device - don't load any alsa module */ 515 dev->int_audio_type = EM28XX_INT_AUDIO_NONE; 516 dev->usb_audio_type = EM28XX_USB_AUDIO_NONE; 517 return 0; 518 } 519 520 /* See how this device is configured */ 521 cfg = em28xx_read_reg(dev, EM28XX_R00_CHIPCFG); 522 pr_info("Config register raw data: 0x%02x\n", cfg); 523 if (cfg < 0) { /* Register read error */ 524 /* Be conservative */ 525 dev->int_audio_type = EM28XX_INT_AUDIO_AC97; 526 } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) == 0x00) { 527 /* The device doesn't have vendor audio at all */ 528 dev->int_audio_type = EM28XX_INT_AUDIO_NONE; 529 dev->usb_audio_type = EM28XX_USB_AUDIO_NONE; 530 return 0; 531 } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) != EM28XX_CHIPCFG_AC97) { 532 dev->int_audio_type = EM28XX_INT_AUDIO_I2S; 533 if (dev->chip_id < CHIP_ID_EM2860 && 534 (cfg & EM28XX_CHIPCFG_AUDIOMASK) == 535 EM2820_CHIPCFG_I2S_1_SAMPRATE) 536 i2s_samplerates = 1; 537 else if (dev->chip_id >= CHIP_ID_EM2860 && 538 (cfg & EM28XX_CHIPCFG_AUDIOMASK) == 539 EM2860_CHIPCFG_I2S_5_SAMPRATES) 540 i2s_samplerates = 5; 541 else 542 i2s_samplerates = 3; 543 pr_info("I2S Audio (%d sample rate(s))\n", 544 i2s_samplerates); 545 /* Skip the code that does AC97 vendor detection */ 546 dev->audio_mode.ac97 = EM28XX_NO_AC97; 547 goto init_audio; 548 } else { 549 dev->int_audio_type = EM28XX_INT_AUDIO_AC97; 550 } 551 552 dev->audio_mode.ac97 = EM28XX_AC97_OTHER; 553 554 vid1 = em28xx_read_ac97(dev, AC97_VENDOR_ID1); 555 if (vid1 < 0) { 556 /* 557 * Device likely doesn't support AC97 558 * Note: (some) em2800 devices without eeprom reports 0x91 on 559 * CHIPCFG register, even not having an AC97 chip 560 */ 561 pr_warn("AC97 chip type couldn't be determined\n"); 562 dev->audio_mode.ac97 = EM28XX_NO_AC97; 563 if (dev->usb_audio_type == EM28XX_USB_AUDIO_VENDOR) 564 dev->usb_audio_type = EM28XX_USB_AUDIO_NONE; 565 dev->int_audio_type = EM28XX_INT_AUDIO_NONE; 566 goto init_audio; 567 } 568 569 vid2 = em28xx_read_ac97(dev, AC97_VENDOR_ID2); 570 if (vid2 < 0) 571 goto init_audio; 572 573 vid = vid1 << 16 | vid2; 574 pr_warn("AC97 vendor ID = 0x%08x\n", vid); 575 576 feat = em28xx_read_ac97(dev, AC97_RESET); 577 if (feat < 0) 578 goto init_audio; 579 580 pr_warn("AC97 features = 0x%04x\n", feat); 581 582 /* Try to identify what audio processor we have */ 583 if (((vid == 0xffffffff) || (vid == 0x83847650)) && (feat == 0x6a90)) 584 dev->audio_mode.ac97 = EM28XX_AC97_EM202; 585 else if ((vid >> 8) == 0x838476) 586 dev->audio_mode.ac97 = EM28XX_AC97_SIGMATEL; 587 588 init_audio: 589 /* Reports detected AC97 processor */ 590 switch (dev->audio_mode.ac97) { 591 case EM28XX_NO_AC97: 592 pr_info("No AC97 audio processor\n"); 593 break; 594 case EM28XX_AC97_EM202: 595 pr_info("Empia 202 AC97 audio processor detected\n"); 596 break; 597 case EM28XX_AC97_SIGMATEL: 598 pr_info("Sigmatel audio processor detected (stac 97%02x)\n", 599 vid & 0xff); 600 break; 601 case EM28XX_AC97_OTHER: 602 pr_warn("Unknown AC97 audio processor detected!\n"); 603 break; 604 default: 605 break; 606 } 607 608 return em28xx_audio_analog_set(dev); 609 } 610 EXPORT_SYMBOL_GPL(em28xx_audio_setup); 611 612 const struct em28xx_led *em28xx_find_led(struct em28xx *dev, 613 enum em28xx_led_role role) 614 { 615 if (dev->board.leds) { 616 u8 k = 0; 617 618 while (dev->board.leds[k].role >= 0 && 619 dev->board.leds[k].role < EM28XX_NUM_LED_ROLES) { 620 if (dev->board.leds[k].role == role) 621 return &dev->board.leds[k]; 622 k++; 623 } 624 } 625 return NULL; 626 } 627 EXPORT_SYMBOL_GPL(em28xx_find_led); 628 629 int em28xx_capture_start(struct em28xx *dev, int start) 630 { 631 int rc; 632 const struct em28xx_led *led = NULL; 633 634 if (dev->chip_id == CHIP_ID_EM2874 || 635 dev->chip_id == CHIP_ID_EM2884 || 636 dev->chip_id == CHIP_ID_EM28174 || 637 dev->chip_id == CHIP_ID_EM28178) { 638 /* The Transport Stream Enable Register moved in em2874 */ 639 rc = em28xx_write_reg_bits(dev, EM2874_R5F_TS_ENABLE, 640 start ? 641 EM2874_TS1_CAPTURE_ENABLE : 0x00, 642 EM2874_TS1_CAPTURE_ENABLE); 643 } else { 644 /* FIXME: which is the best order? */ 645 /* video registers are sampled by VREF */ 646 rc = em28xx_write_reg_bits(dev, EM28XX_R0C_USBSUSP, 647 start ? 0x10 : 0x00, 0x10); 648 if (rc < 0) 649 return rc; 650 651 if (start) { 652 if (dev->board.is_webcam) 653 rc = em28xx_write_reg(dev, 0x13, 0x0c); 654 655 /* Enable video capture */ 656 rc = em28xx_write_reg(dev, 0x48, 0x00); 657 if (rc < 0) 658 return rc; 659 660 if (dev->mode == EM28XX_ANALOG_MODE) 661 rc = em28xx_write_reg(dev, 662 EM28XX_R12_VINENABLE, 663 0x67); 664 else 665 rc = em28xx_write_reg(dev, 666 EM28XX_R12_VINENABLE, 667 0x37); 668 if (rc < 0) 669 return rc; 670 671 msleep(6); 672 } else { 673 /* disable video capture */ 674 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x27); 675 } 676 } 677 678 if (dev->mode == EM28XX_ANALOG_MODE) 679 led = em28xx_find_led(dev, EM28XX_LED_ANALOG_CAPTURING); 680 else 681 led = em28xx_find_led(dev, EM28XX_LED_DIGITAL_CAPTURING); 682 683 if (led) 684 em28xx_write_reg_bits(dev, led->gpio_reg, 685 (!start ^ led->inverted) ? 686 ~led->gpio_mask : led->gpio_mask, 687 led->gpio_mask); 688 689 return rc; 690 } 691 692 int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio) 693 { 694 int rc = 0; 695 696 if (!gpio) 697 return rc; 698 699 if (dev->mode != EM28XX_SUSPEND) { 700 em28xx_write_reg(dev, 0x48, 0x00); 701 if (dev->mode == EM28XX_ANALOG_MODE) 702 em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x67); 703 else 704 em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x37); 705 msleep(6); 706 } 707 708 /* Send GPIO reset sequences specified at board entry */ 709 while (gpio->sleep >= 0) { 710 if (gpio->reg >= 0) { 711 rc = em28xx_write_reg_bits(dev, 712 gpio->reg, 713 gpio->val, 714 gpio->mask); 715 if (rc < 0) 716 return rc; 717 } 718 if (gpio->sleep > 0) 719 msleep(gpio->sleep); 720 721 gpio++; 722 } 723 return rc; 724 } 725 EXPORT_SYMBOL_GPL(em28xx_gpio_set); 726 727 int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode) 728 { 729 if (dev->mode == set_mode) 730 return 0; 731 732 if (set_mode == EM28XX_SUSPEND) { 733 dev->mode = set_mode; 734 735 /* FIXME: add suspend support for ac97 */ 736 737 return em28xx_gpio_set(dev, dev->board.suspend_gpio); 738 } 739 740 dev->mode = set_mode; 741 742 if (dev->mode == EM28XX_DIGITAL_MODE) 743 return em28xx_gpio_set(dev, dev->board.dvb_gpio); 744 else 745 return em28xx_gpio_set(dev, INPUT(dev->ctl_input)->gpio); 746 } 747 EXPORT_SYMBOL_GPL(em28xx_set_mode); 748 749 /* ------------------------------------------------------------------ 750 URB control 751 ------------------------------------------------------------------*/ 752 753 /* 754 * URB completion handler for isoc/bulk transfers 755 */ 756 static void em28xx_irq_callback(struct urb *urb) 757 { 758 struct em28xx *dev = urb->context; 759 int i; 760 761 switch (urb->status) { 762 case 0: /* success */ 763 case -ETIMEDOUT: /* NAK */ 764 break; 765 case -ECONNRESET: /* kill */ 766 case -ENOENT: 767 case -ESHUTDOWN: 768 return; 769 default: /* error */ 770 em28xx_isocdbg("urb completition error %d.\n", urb->status); 771 break; 772 } 773 774 /* Copy data from URB */ 775 spin_lock(&dev->slock); 776 dev->usb_ctl.urb_data_copy(dev, urb); 777 spin_unlock(&dev->slock); 778 779 /* Reset urb buffers */ 780 for (i = 0; i < urb->number_of_packets; i++) { 781 /* isoc only (bulk: number_of_packets = 0) */ 782 urb->iso_frame_desc[i].status = 0; 783 urb->iso_frame_desc[i].actual_length = 0; 784 } 785 urb->status = 0; 786 787 urb->status = usb_submit_urb(urb, GFP_ATOMIC); 788 if (urb->status) { 789 em28xx_isocdbg("urb resubmit failed (error=%i)\n", 790 urb->status); 791 } 792 } 793 794 /* 795 * Stop and Deallocate URBs 796 */ 797 void em28xx_uninit_usb_xfer(struct em28xx *dev, enum em28xx_mode mode) 798 { 799 struct urb *urb; 800 struct em28xx_usb_bufs *usb_bufs; 801 int i; 802 803 em28xx_isocdbg("em28xx: called em28xx_uninit_usb_xfer in mode %d\n", 804 mode); 805 806 if (mode == EM28XX_DIGITAL_MODE) 807 usb_bufs = &dev->usb_ctl.digital_bufs; 808 else 809 usb_bufs = &dev->usb_ctl.analog_bufs; 810 811 for (i = 0; i < usb_bufs->num_bufs; i++) { 812 urb = usb_bufs->urb[i]; 813 if (urb) { 814 if (!irqs_disabled()) 815 usb_kill_urb(urb); 816 else 817 usb_unlink_urb(urb); 818 819 if (usb_bufs->transfer_buffer[i]) { 820 usb_free_coherent(dev->udev, 821 urb->transfer_buffer_length, 822 usb_bufs->transfer_buffer[i], 823 urb->transfer_dma); 824 } 825 usb_free_urb(urb); 826 usb_bufs->urb[i] = NULL; 827 } 828 usb_bufs->transfer_buffer[i] = NULL; 829 } 830 831 kfree(usb_bufs->urb); 832 kfree(usb_bufs->transfer_buffer); 833 834 usb_bufs->urb = NULL; 835 usb_bufs->transfer_buffer = NULL; 836 usb_bufs->num_bufs = 0; 837 838 em28xx_capture_start(dev, 0); 839 } 840 EXPORT_SYMBOL_GPL(em28xx_uninit_usb_xfer); 841 842 /* 843 * Stop URBs 844 */ 845 void em28xx_stop_urbs(struct em28xx *dev) 846 { 847 int i; 848 struct urb *urb; 849 struct em28xx_usb_bufs *isoc_bufs = &dev->usb_ctl.digital_bufs; 850 851 em28xx_isocdbg("em28xx: called em28xx_stop_urbs\n"); 852 853 for (i = 0; i < isoc_bufs->num_bufs; i++) { 854 urb = isoc_bufs->urb[i]; 855 if (urb) { 856 if (!irqs_disabled()) 857 usb_kill_urb(urb); 858 else 859 usb_unlink_urb(urb); 860 } 861 } 862 863 em28xx_capture_start(dev, 0); 864 } 865 EXPORT_SYMBOL_GPL(em28xx_stop_urbs); 866 867 /* 868 * Allocate URBs 869 */ 870 int em28xx_alloc_urbs(struct em28xx *dev, enum em28xx_mode mode, int xfer_bulk, 871 int num_bufs, int max_pkt_size, int packet_multiplier) 872 { 873 struct em28xx_usb_bufs *usb_bufs; 874 int i; 875 int sb_size, pipe; 876 struct urb *urb; 877 int j, k; 878 879 em28xx_isocdbg("em28xx: called em28xx_alloc_isoc in mode %d\n", mode); 880 881 /* Check mode and if we have an endpoint for the selected 882 transfer type, select buffer */ 883 if (mode == EM28XX_DIGITAL_MODE) { 884 if ((xfer_bulk && !dev->dvb_ep_bulk) || 885 (!xfer_bulk && !dev->dvb_ep_isoc)) { 886 pr_err("no endpoint for DVB mode and transfer type %d\n", 887 xfer_bulk > 0); 888 return -EINVAL; 889 } 890 usb_bufs = &dev->usb_ctl.digital_bufs; 891 } else if (mode == EM28XX_ANALOG_MODE) { 892 if ((xfer_bulk && !dev->analog_ep_bulk) || 893 (!xfer_bulk && !dev->analog_ep_isoc)) { 894 pr_err("no endpoint for analog mode and transfer type %d\n", 895 xfer_bulk > 0); 896 return -EINVAL; 897 } 898 usb_bufs = &dev->usb_ctl.analog_bufs; 899 } else { 900 pr_err("invalid mode selected\n"); 901 return -EINVAL; 902 } 903 904 /* De-allocates all pending stuff */ 905 em28xx_uninit_usb_xfer(dev, mode); 906 907 usb_bufs->num_bufs = num_bufs; 908 909 usb_bufs->urb = kzalloc(sizeof(void *)*num_bufs, GFP_KERNEL); 910 if (!usb_bufs->urb) 911 return -ENOMEM; 912 913 usb_bufs->transfer_buffer = kzalloc(sizeof(void *)*num_bufs, 914 GFP_KERNEL); 915 if (!usb_bufs->transfer_buffer) { 916 kfree(usb_bufs->urb); 917 return -ENOMEM; 918 } 919 920 usb_bufs->max_pkt_size = max_pkt_size; 921 if (xfer_bulk) 922 usb_bufs->num_packets = 0; 923 else 924 usb_bufs->num_packets = packet_multiplier; 925 dev->usb_ctl.vid_buf = NULL; 926 dev->usb_ctl.vbi_buf = NULL; 927 928 sb_size = packet_multiplier * usb_bufs->max_pkt_size; 929 930 /* allocate urbs and transfer buffers */ 931 for (i = 0; i < usb_bufs->num_bufs; i++) { 932 urb = usb_alloc_urb(usb_bufs->num_packets, GFP_KERNEL); 933 if (!urb) { 934 em28xx_uninit_usb_xfer(dev, mode); 935 return -ENOMEM; 936 } 937 usb_bufs->urb[i] = urb; 938 939 usb_bufs->transfer_buffer[i] = usb_alloc_coherent(dev->udev, 940 sb_size, GFP_KERNEL, &urb->transfer_dma); 941 if (!usb_bufs->transfer_buffer[i]) { 942 pr_err("unable to allocate %i bytes for transfer buffer %i%s\n", 943 sb_size, i, 944 in_interrupt() ? " while in int" : ""); 945 em28xx_uninit_usb_xfer(dev, mode); 946 return -ENOMEM; 947 } 948 memset(usb_bufs->transfer_buffer[i], 0, sb_size); 949 950 if (xfer_bulk) { /* bulk */ 951 pipe = usb_rcvbulkpipe(dev->udev, 952 mode == EM28XX_ANALOG_MODE ? 953 dev->analog_ep_bulk : 954 dev->dvb_ep_bulk); 955 usb_fill_bulk_urb(urb, dev->udev, pipe, 956 usb_bufs->transfer_buffer[i], sb_size, 957 em28xx_irq_callback, dev); 958 urb->transfer_flags = URB_NO_TRANSFER_DMA_MAP; 959 } else { /* isoc */ 960 pipe = usb_rcvisocpipe(dev->udev, 961 mode == EM28XX_ANALOG_MODE ? 962 dev->analog_ep_isoc : 963 dev->dvb_ep_isoc); 964 usb_fill_int_urb(urb, dev->udev, pipe, 965 usb_bufs->transfer_buffer[i], sb_size, 966 em28xx_irq_callback, dev, 1); 967 urb->transfer_flags = URB_ISO_ASAP | 968 URB_NO_TRANSFER_DMA_MAP; 969 k = 0; 970 for (j = 0; j < usb_bufs->num_packets; j++) { 971 urb->iso_frame_desc[j].offset = k; 972 urb->iso_frame_desc[j].length = 973 usb_bufs->max_pkt_size; 974 k += usb_bufs->max_pkt_size; 975 } 976 } 977 978 urb->number_of_packets = usb_bufs->num_packets; 979 } 980 981 return 0; 982 } 983 EXPORT_SYMBOL_GPL(em28xx_alloc_urbs); 984 985 /* 986 * Allocate URBs and start IRQ 987 */ 988 int em28xx_init_usb_xfer(struct em28xx *dev, enum em28xx_mode mode, 989 int xfer_bulk, int num_bufs, int max_pkt_size, 990 int packet_multiplier, 991 int (*urb_data_copy)(struct em28xx *dev, struct urb *urb)) 992 { 993 struct em28xx_dmaqueue *dma_q = &dev->vidq; 994 struct em28xx_dmaqueue *vbi_dma_q = &dev->vbiq; 995 struct em28xx_usb_bufs *usb_bufs; 996 int i; 997 int rc; 998 int alloc; 999 1000 em28xx_isocdbg("em28xx: called em28xx_init_usb_xfer in mode %d\n", 1001 mode); 1002 1003 dev->usb_ctl.urb_data_copy = urb_data_copy; 1004 1005 if (mode == EM28XX_DIGITAL_MODE) { 1006 usb_bufs = &dev->usb_ctl.digital_bufs; 1007 /* no need to free/alloc usb buffers in digital mode */ 1008 alloc = 0; 1009 } else { 1010 usb_bufs = &dev->usb_ctl.analog_bufs; 1011 alloc = 1; 1012 } 1013 1014 if (alloc) { 1015 rc = em28xx_alloc_urbs(dev, mode, xfer_bulk, num_bufs, 1016 max_pkt_size, packet_multiplier); 1017 if (rc) 1018 return rc; 1019 } 1020 1021 if (xfer_bulk) { 1022 rc = usb_clear_halt(dev->udev, usb_bufs->urb[0]->pipe); 1023 if (rc < 0) { 1024 pr_err("failed to clear USB bulk endpoint stall/halt condition (error=%i)\n", 1025 rc); 1026 em28xx_uninit_usb_xfer(dev, mode); 1027 return rc; 1028 } 1029 } 1030 1031 init_waitqueue_head(&dma_q->wq); 1032 init_waitqueue_head(&vbi_dma_q->wq); 1033 1034 em28xx_capture_start(dev, 1); 1035 1036 /* submit urbs and enables IRQ */ 1037 for (i = 0; i < usb_bufs->num_bufs; i++) { 1038 rc = usb_submit_urb(usb_bufs->urb[i], GFP_ATOMIC); 1039 if (rc) { 1040 pr_err("submit of urb %i failed (error=%i)\n", i, rc); 1041 em28xx_uninit_usb_xfer(dev, mode); 1042 return rc; 1043 } 1044 } 1045 1046 return 0; 1047 } 1048 EXPORT_SYMBOL_GPL(em28xx_init_usb_xfer); 1049 1050 /* 1051 * Device control list 1052 */ 1053 1054 static LIST_HEAD(em28xx_devlist); 1055 static DEFINE_MUTEX(em28xx_devlist_mutex); 1056 1057 /* 1058 * Extension interface 1059 */ 1060 1061 static LIST_HEAD(em28xx_extension_devlist); 1062 1063 int em28xx_register_extension(struct em28xx_ops *ops) 1064 { 1065 struct em28xx *dev = NULL; 1066 1067 mutex_lock(&em28xx_devlist_mutex); 1068 list_add_tail(&ops->next, &em28xx_extension_devlist); 1069 list_for_each_entry(dev, &em28xx_devlist, devlist) { 1070 ops->init(dev); 1071 } 1072 mutex_unlock(&em28xx_devlist_mutex); 1073 pr_info("em28xx: Registered (%s) extension\n", ops->name); 1074 return 0; 1075 } 1076 EXPORT_SYMBOL(em28xx_register_extension); 1077 1078 void em28xx_unregister_extension(struct em28xx_ops *ops) 1079 { 1080 struct em28xx *dev = NULL; 1081 1082 mutex_lock(&em28xx_devlist_mutex); 1083 list_for_each_entry(dev, &em28xx_devlist, devlist) { 1084 ops->fini(dev); 1085 } 1086 list_del(&ops->next); 1087 mutex_unlock(&em28xx_devlist_mutex); 1088 pr_info("Em28xx: Removed (%s) extension\n", ops->name); 1089 } 1090 EXPORT_SYMBOL(em28xx_unregister_extension); 1091 1092 void em28xx_init_extension(struct em28xx *dev) 1093 { 1094 const struct em28xx_ops *ops = NULL; 1095 1096 mutex_lock(&em28xx_devlist_mutex); 1097 list_add_tail(&dev->devlist, &em28xx_devlist); 1098 list_for_each_entry(ops, &em28xx_extension_devlist, next) { 1099 if (ops->init) 1100 ops->init(dev); 1101 } 1102 mutex_unlock(&em28xx_devlist_mutex); 1103 } 1104 1105 void em28xx_close_extension(struct em28xx *dev) 1106 { 1107 const struct em28xx_ops *ops = NULL; 1108 1109 mutex_lock(&em28xx_devlist_mutex); 1110 list_for_each_entry(ops, &em28xx_extension_devlist, next) { 1111 if (ops->fini) 1112 ops->fini(dev); 1113 } 1114 list_del(&dev->devlist); 1115 mutex_unlock(&em28xx_devlist_mutex); 1116 } 1117 1118 int em28xx_suspend_extension(struct em28xx *dev) 1119 { 1120 const struct em28xx_ops *ops = NULL; 1121 1122 pr_info("Suspending extensions\n"); 1123 mutex_lock(&em28xx_devlist_mutex); 1124 list_for_each_entry(ops, &em28xx_extension_devlist, next) { 1125 if (ops->suspend) 1126 ops->suspend(dev); 1127 } 1128 mutex_unlock(&em28xx_devlist_mutex); 1129 return 0; 1130 } 1131 1132 int em28xx_resume_extension(struct em28xx *dev) 1133 { 1134 const struct em28xx_ops *ops = NULL; 1135 1136 pr_info("Resuming extensions\n"); 1137 mutex_lock(&em28xx_devlist_mutex); 1138 list_for_each_entry(ops, &em28xx_extension_devlist, next) { 1139 if (ops->resume) 1140 ops->resume(dev); 1141 } 1142 mutex_unlock(&em28xx_devlist_mutex); 1143 return 0; 1144 } 1145