1 /* Linux driver for devices based on the DiBcom DiB0700 USB bridge 2 * 3 * This program is free software; you can redistribute it and/or modify it 4 * under the terms of the GNU General Public License as published by the Free 5 * Software Foundation, version 2. 6 * 7 * Copyright (C) 2005-9 DiBcom, SA et al 8 */ 9 #include "dib0700.h" 10 11 #include "dib3000mc.h" 12 #include "dib7000m.h" 13 #include "dib7000p.h" 14 #include "dib8000.h" 15 #include "dib9000.h" 16 #include "mt2060.h" 17 #include "mt2266.h" 18 #include "tuner-xc2028.h" 19 #include "xc5000.h" 20 #include "xc4000.h" 21 #include "s5h1411.h" 22 #include "dib0070.h" 23 #include "dib0090.h" 24 #include "lgdt3305.h" 25 #include "mxl5007t.h" 26 27 static int force_lna_activation; 28 module_param(force_lna_activation, int, 0644); 29 MODULE_PARM_DESC(force_lna_activation, "force the activation of Low-Noise-Amplifyer(s) (LNA), " 30 "if applicable for the device (default: 0=automatic/off)."); 31 32 struct dib0700_adapter_state { 33 int (*set_param_save) (struct dvb_frontend *); 34 const struct firmware *frontend_firmware; 35 struct dib7000p_ops dib7000p_ops; 36 struct dib8000_ops dib8000_ops; 37 }; 38 39 /* Hauppauge Nova-T 500 (aka Bristol) 40 * has a LNA on GPIO0 which is enabled by setting 1 */ 41 static struct mt2060_config bristol_mt2060_config[2] = { 42 { 43 .i2c_address = 0x60, 44 .clock_out = 3, 45 }, { 46 .i2c_address = 0x61, 47 } 48 }; 49 50 51 static struct dibx000_agc_config bristol_dib3000p_mt2060_agc_config = { 52 .band_caps = BAND_VHF | BAND_UHF, 53 .setup = (1 << 8) | (5 << 5) | (0 << 4) | (0 << 3) | (0 << 2) | (2 << 0), 54 55 .agc1_max = 42598, 56 .agc1_min = 17694, 57 .agc2_max = 45875, 58 .agc2_min = 0, 59 60 .agc1_pt1 = 0, 61 .agc1_pt2 = 59, 62 63 .agc1_slope1 = 0, 64 .agc1_slope2 = 69, 65 66 .agc2_pt1 = 0, 67 .agc2_pt2 = 59, 68 69 .agc2_slope1 = 111, 70 .agc2_slope2 = 28, 71 }; 72 73 static struct dib3000mc_config bristol_dib3000mc_config[2] = { 74 { .agc = &bristol_dib3000p_mt2060_agc_config, 75 .max_time = 0x196, 76 .ln_adc_level = 0x1cc7, 77 .output_mpeg2_in_188_bytes = 1, 78 }, 79 { .agc = &bristol_dib3000p_mt2060_agc_config, 80 .max_time = 0x196, 81 .ln_adc_level = 0x1cc7, 82 .output_mpeg2_in_188_bytes = 1, 83 } 84 }; 85 86 static int bristol_frontend_attach(struct dvb_usb_adapter *adap) 87 { 88 struct dib0700_state *st = adap->dev->priv; 89 if (adap->id == 0) { 90 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); msleep(10); 91 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); msleep(10); 92 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); msleep(10); 93 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); msleep(10); 94 95 if (force_lna_activation) 96 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1); 97 else 98 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 0); 99 100 if (dib3000mc_i2c_enumeration(&adap->dev->i2c_adap, 2, DEFAULT_DIB3000P_I2C_ADDRESS, bristol_dib3000mc_config) != 0) { 101 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); msleep(10); 102 return -ENODEV; 103 } 104 } 105 st->mt2060_if1[adap->id] = 1220; 106 return (adap->fe_adap[0].fe = dvb_attach(dib3000mc_attach, &adap->dev->i2c_adap, 107 (10 + adap->id) << 1, &bristol_dib3000mc_config[adap->id])) == NULL ? -ENODEV : 0; 108 } 109 110 static int eeprom_read(struct i2c_adapter *adap,u8 adrs,u8 *pval) 111 { 112 struct i2c_msg msg[2] = { 113 { .addr = 0x50, .flags = 0, .buf = &adrs, .len = 1 }, 114 { .addr = 0x50, .flags = I2C_M_RD, .buf = pval, .len = 1 }, 115 }; 116 if (i2c_transfer(adap, msg, 2) != 2) return -EREMOTEIO; 117 return 0; 118 } 119 120 static int bristol_tuner_attach(struct dvb_usb_adapter *adap) 121 { 122 struct i2c_adapter *prim_i2c = &adap->dev->i2c_adap; 123 struct i2c_adapter *tun_i2c = dib3000mc_get_tuner_i2c_master(adap->fe_adap[0].fe, 1); 124 s8 a; 125 int if1=1220; 126 if (adap->dev->udev->descriptor.idVendor == cpu_to_le16(USB_VID_HAUPPAUGE) && 127 adap->dev->udev->descriptor.idProduct == cpu_to_le16(USB_PID_HAUPPAUGE_NOVA_T_500_2)) { 128 if (!eeprom_read(prim_i2c,0x59 + adap->id,&a)) if1=1220+a; 129 } 130 return dvb_attach(mt2060_attach, adap->fe_adap[0].fe, tun_i2c, 131 &bristol_mt2060_config[adap->id], if1) == NULL ? 132 -ENODEV : 0; 133 } 134 135 /* STK7700D: Pinnacle/Terratec/Hauppauge Dual DVB-T Diversity */ 136 137 /* MT226x */ 138 static struct dibx000_agc_config stk7700d_7000p_mt2266_agc_config[2] = { 139 { 140 BAND_UHF, 141 142 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=1, P_agc_inv_pwm2=1, 143 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */ 144 (0 << 15) | (0 << 14) | (1 << 11) | (1 << 10) | (1 << 9) | (0 << 8) 145 | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0), 146 147 1130, 148 21, 149 150 0, 151 118, 152 153 0, 154 3530, 155 1, 156 0, 157 158 65535, 159 33770, 160 65535, 161 23592, 162 163 0, 164 62, 165 255, 166 64, 167 64, 168 132, 169 192, 170 80, 171 80, 172 173 17, 174 27, 175 23, 176 51, 177 178 1, 179 }, { 180 BAND_VHF | BAND_LBAND, 181 182 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=1, P_agc_inv_pwm2=1, 183 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */ 184 (0 << 15) | (0 << 14) | (1 << 11) | (1 << 10) | (1 << 9) | (0 << 8) 185 | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), 186 187 2372, 188 21, 189 190 0, 191 118, 192 193 0, 194 3530, 195 1, 196 0, 197 198 65535, 199 0, 200 65535, 201 23592, 202 203 0, 204 128, 205 128, 206 128, 207 0, 208 128, 209 253, 210 81, 211 0, 212 213 17, 214 27, 215 23, 216 51, 217 218 1, 219 } 220 }; 221 222 static struct dibx000_bandwidth_config stk7700d_mt2266_pll_config = { 223 .internal = 60000, 224 .sampling = 30000, 225 .pll_prediv = 1, 226 .pll_ratio = 8, 227 .pll_range = 3, 228 .pll_reset = 1, 229 .pll_bypass = 0, 230 .enable_refdiv = 0, 231 .bypclk_div = 0, 232 .IO_CLK_en_core = 1, 233 .ADClkSrc = 1, 234 .modulo = 2, 235 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0), 236 .ifreq = 0, 237 .timf = 20452225, 238 }; 239 240 static struct dib7000p_config stk7700d_dib7000p_mt2266_config[] = { 241 { .output_mpeg2_in_188_bytes = 1, 242 .hostbus_diversity = 1, 243 .tuner_is_baseband = 1, 244 245 .agc_config_count = 2, 246 .agc = stk7700d_7000p_mt2266_agc_config, 247 .bw = &stk7700d_mt2266_pll_config, 248 249 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS, 250 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES, 251 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS, 252 }, 253 { .output_mpeg2_in_188_bytes = 1, 254 .hostbus_diversity = 1, 255 .tuner_is_baseband = 1, 256 257 .agc_config_count = 2, 258 .agc = stk7700d_7000p_mt2266_agc_config, 259 .bw = &stk7700d_mt2266_pll_config, 260 261 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS, 262 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES, 263 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS, 264 } 265 }; 266 267 static struct mt2266_config stk7700d_mt2266_config[2] = { 268 { .i2c_address = 0x60 269 }, 270 { .i2c_address = 0x60 271 } 272 }; 273 274 static int stk7700P2_frontend_attach(struct dvb_usb_adapter *adap) 275 { 276 struct dib0700_adapter_state *state = adap->priv; 277 278 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops)) 279 return -ENODEV; 280 281 if (adap->id == 0) { 282 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); 283 msleep(10); 284 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1); 285 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1); 286 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1); 287 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); 288 msleep(10); 289 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); 290 msleep(10); 291 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18, 292 stk7700d_dib7000p_mt2266_config) 293 != 0) { 294 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__); 295 dvb_detach(&state->dib7000p_ops); 296 return -ENODEV; 297 } 298 } 299 300 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 301 0x80 + (adap->id << 1), 302 &stk7700d_dib7000p_mt2266_config[adap->id]); 303 304 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0; 305 } 306 307 static int stk7700d_frontend_attach(struct dvb_usb_adapter *adap) 308 { 309 struct dib0700_adapter_state *state = adap->priv; 310 311 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops)) 312 return -ENODEV; 313 314 if (adap->id == 0) { 315 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); 316 msleep(10); 317 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1); 318 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1); 319 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1); 320 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); 321 msleep(10); 322 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); 323 msleep(10); 324 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1); 325 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 2, 18, 326 stk7700d_dib7000p_mt2266_config) 327 != 0) { 328 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__); 329 dvb_detach(&state->dib7000p_ops); 330 return -ENODEV; 331 } 332 } 333 334 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 335 0x80 + (adap->id << 1), 336 &stk7700d_dib7000p_mt2266_config[adap->id]); 337 338 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0; 339 } 340 341 static int stk7700d_tuner_attach(struct dvb_usb_adapter *adap) 342 { 343 struct i2c_adapter *tun_i2c; 344 struct dib0700_adapter_state *state = adap->priv; 345 346 tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe, 347 DIBX000_I2C_INTERFACE_TUNER, 1); 348 return dvb_attach(mt2266_attach, adap->fe_adap[0].fe, tun_i2c, 349 &stk7700d_mt2266_config[adap->id]) == NULL ? -ENODEV : 0; 350 } 351 352 /* STK7700-PH: Digital/Analog Hybrid Tuner, e.h. Cinergy HT USB HE */ 353 static struct dibx000_agc_config xc3028_agc_config = { 354 .band_caps = BAND_VHF | BAND_UHF, 355 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0, 356 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0, 357 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */ 358 .setup = (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), 359 .inv_gain = 712, 360 .time_stabiliz = 21, 361 .alpha_level = 0, 362 .thlock = 118, 363 .wbd_inv = 0, 364 .wbd_ref = 2867, 365 .wbd_sel = 0, 366 .wbd_alpha = 2, 367 .agc1_max = 0, 368 .agc1_min = 0, 369 .agc2_max = 39718, 370 .agc2_min = 9930, 371 .agc1_pt1 = 0, 372 .agc1_pt2 = 0, 373 .agc1_pt3 = 0, 374 .agc1_slope1 = 0, 375 .agc1_slope2 = 0, 376 .agc2_pt1 = 0, 377 .agc2_pt2 = 128, 378 .agc2_slope1 = 29, 379 .agc2_slope2 = 29, 380 .alpha_mant = 17, 381 .alpha_exp = 27, 382 .beta_mant = 23, 383 .beta_exp = 51, 384 .perform_agc_softsplit = 1, 385 }; 386 387 /* PLL Configuration for COFDM BW_MHz = 8.00 with external clock = 30.00 */ 388 static struct dibx000_bandwidth_config xc3028_bw_config = { 389 .internal = 60000, 390 .sampling = 30000, 391 .pll_prediv = 1, 392 .pll_ratio = 8, 393 .pll_range = 3, 394 .pll_reset = 1, 395 .pll_bypass = 0, 396 .enable_refdiv = 0, 397 .bypclk_div = 0, 398 .IO_CLK_en_core = 1, 399 .ADClkSrc = 1, 400 .modulo = 0, 401 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */ 402 .ifreq = (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */ 403 .timf = 20452225, 404 .xtal_hz = 30000000, 405 }; 406 407 static struct dib7000p_config stk7700ph_dib7700_xc3028_config = { 408 .output_mpeg2_in_188_bytes = 1, 409 .tuner_is_baseband = 1, 410 411 .agc_config_count = 1, 412 .agc = &xc3028_agc_config, 413 .bw = &xc3028_bw_config, 414 415 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS, 416 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES, 417 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS, 418 }; 419 420 static int stk7700ph_xc3028_callback(void *ptr, int component, 421 int command, int arg) 422 { 423 struct dvb_usb_adapter *adap = ptr; 424 struct dib0700_adapter_state *state = adap->priv; 425 426 switch (command) { 427 case XC2028_TUNER_RESET: 428 /* Send the tuner in then out of reset */ 429 state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 0); 430 msleep(10); 431 state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1); 432 break; 433 case XC2028_RESET_CLK: 434 break; 435 default: 436 err("%s: unknown command %d, arg %d\n", __func__, 437 command, arg); 438 return -EINVAL; 439 } 440 return 0; 441 } 442 443 static struct xc2028_ctrl stk7700ph_xc3028_ctrl = { 444 .fname = XC2028_DEFAULT_FIRMWARE, 445 .max_len = 64, 446 .demod = XC3028_FE_DIBCOM52, 447 }; 448 449 static struct xc2028_config stk7700ph_xc3028_config = { 450 .i2c_addr = 0x61, 451 .ctrl = &stk7700ph_xc3028_ctrl, 452 }; 453 454 static int stk7700ph_frontend_attach(struct dvb_usb_adapter *adap) 455 { 456 struct usb_device_descriptor *desc = &adap->dev->udev->descriptor; 457 struct dib0700_adapter_state *state = adap->priv; 458 459 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops)) 460 return -ENODEV; 461 462 if (desc->idVendor == cpu_to_le16(USB_VID_PINNACLE) && 463 desc->idProduct == cpu_to_le16(USB_PID_PINNACLE_EXPRESSCARD_320CX)) 464 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); 465 else 466 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); 467 msleep(20); 468 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1); 469 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1); 470 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1); 471 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); 472 msleep(10); 473 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); 474 msleep(20); 475 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1); 476 msleep(10); 477 478 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18, 479 &stk7700ph_dib7700_xc3028_config) != 0) { 480 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", 481 __func__); 482 dvb_detach(&state->dib7000p_ops); 483 return -ENODEV; 484 } 485 486 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80, 487 &stk7700ph_dib7700_xc3028_config); 488 489 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0; 490 } 491 492 static int stk7700ph_tuner_attach(struct dvb_usb_adapter *adap) 493 { 494 struct i2c_adapter *tun_i2c; 495 struct dib0700_adapter_state *state = adap->priv; 496 497 tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe, 498 DIBX000_I2C_INTERFACE_TUNER, 1); 499 500 stk7700ph_xc3028_config.i2c_adap = tun_i2c; 501 502 /* FIXME: generalize & move to common area */ 503 adap->fe_adap[0].fe->callback = stk7700ph_xc3028_callback; 504 505 return dvb_attach(xc2028_attach, adap->fe_adap[0].fe, &stk7700ph_xc3028_config) 506 == NULL ? -ENODEV : 0; 507 } 508 509 #define DEFAULT_RC_INTERVAL 50 510 511 static u8 rc_request[] = { REQUEST_POLL_RC, 0 }; 512 513 /* Number of keypresses to ignore before start repeating */ 514 #define RC_REPEAT_DELAY 6 515 516 /* 517 * This function is used only when firmware is < 1.20 version. Newer 518 * firmwares use bulk mode, with functions implemented at dib0700_core, 519 * at dib0700_rc_urb_completion() 520 */ 521 static int dib0700_rc_query_old_firmware(struct dvb_usb_device *d) 522 { 523 u8 key[4]; 524 enum rc_type protocol; 525 u32 scancode; 526 u8 toggle; 527 int i; 528 struct dib0700_state *st = d->priv; 529 530 if (st->fw_version >= 0x10200) { 531 /* For 1.20 firmware , We need to keep the RC polling 532 callback so we can reuse the input device setup in 533 dvb-usb-remote.c. However, the actual work is being done 534 in the bulk URB completion handler. */ 535 return 0; 536 } 537 538 i = dib0700_ctrl_rd(d, rc_request, 2, key, 4); 539 if (i <= 0) { 540 err("RC Query Failed"); 541 return -1; 542 } 543 544 /* losing half of KEY_0 events from Philipps rc5 remotes.. */ 545 if (key[0] == 0 && key[1] == 0 && key[2] == 0 && key[3] == 0) 546 return 0; 547 548 /* info("%d: %2X %2X %2X %2X",dvb_usb_dib0700_ir_proto,(int)key[3-2],(int)key[3-3],(int)key[3-1],(int)key[3]); */ 549 550 dib0700_rc_setup(d, NULL); /* reset ir sensor data to prevent false events */ 551 552 switch (d->props.rc.core.protocol) { 553 case RC_BIT_NEC: 554 /* NEC protocol sends repeat code as 0 0 0 FF */ 555 if ((key[3-2] == 0x00) && (key[3-3] == 0x00) && 556 (key[3] == 0xff)) { 557 rc_repeat(d->rc_dev); 558 return 0; 559 } 560 561 protocol = RC_TYPE_NEC; 562 scancode = RC_SCANCODE_NEC(key[3-2], key[3-3]); 563 toggle = 0; 564 break; 565 566 default: 567 /* RC-5 protocol changes toggle bit on new keypress */ 568 protocol = RC_TYPE_RC5; 569 scancode = RC_SCANCODE_RC5(key[3-2], key[3-3]); 570 toggle = key[3-1]; 571 break; 572 } 573 574 rc_keydown(d->rc_dev, protocol, scancode, toggle); 575 return 0; 576 } 577 578 /* STK7700P: Hauppauge Nova-T Stick, AVerMedia Volar */ 579 static struct dibx000_agc_config stk7700p_7000m_mt2060_agc_config = { 580 BAND_UHF | BAND_VHF, 581 582 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, 583 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */ 584 (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) 585 | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), 586 587 712, 588 41, 589 590 0, 591 118, 592 593 0, 594 4095, 595 0, 596 0, 597 598 42598, 599 17694, 600 45875, 601 2621, 602 0, 603 76, 604 139, 605 52, 606 59, 607 107, 608 172, 609 57, 610 70, 611 612 21, 613 25, 614 28, 615 48, 616 617 1, 618 { 0, 619 107, 620 51800, 621 24700 622 }, 623 }; 624 625 static struct dibx000_agc_config stk7700p_7000p_mt2060_agc_config = { 626 .band_caps = BAND_UHF | BAND_VHF, 627 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, 628 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */ 629 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), 630 .inv_gain = 712, 631 .time_stabiliz = 41, 632 .alpha_level = 0, 633 .thlock = 118, 634 .wbd_inv = 0, 635 .wbd_ref = 4095, 636 .wbd_sel = 0, 637 .wbd_alpha = 0, 638 .agc1_max = 42598, 639 .agc1_min = 16384, 640 .agc2_max = 42598, 641 .agc2_min = 0, 642 .agc1_pt1 = 0, 643 .agc1_pt2 = 137, 644 .agc1_pt3 = 255, 645 .agc1_slope1 = 0, 646 .agc1_slope2 = 255, 647 .agc2_pt1 = 0, 648 .agc2_pt2 = 0, 649 .agc2_slope1 = 0, 650 .agc2_slope2 = 41, 651 .alpha_mant = 15, 652 .alpha_exp = 25, 653 .beta_mant = 28, 654 .beta_exp = 48, 655 .perform_agc_softsplit = 0, 656 }; 657 658 static struct dibx000_bandwidth_config stk7700p_pll_config = { 659 .internal = 60000, 660 .sampling = 30000, 661 .pll_prediv = 1, 662 .pll_ratio = 8, 663 .pll_range = 3, 664 .pll_reset = 1, 665 .pll_bypass = 0, 666 .enable_refdiv = 0, 667 .bypclk_div = 0, 668 .IO_CLK_en_core = 1, 669 .ADClkSrc = 1, 670 .modulo = 0, 671 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0), 672 .ifreq = 60258167, 673 .timf = 20452225, 674 .xtal_hz = 30000000, 675 }; 676 677 static struct dib7000m_config stk7700p_dib7000m_config = { 678 .dvbt_mode = 1, 679 .output_mpeg2_in_188_bytes = 1, 680 .quartz_direct = 1, 681 682 .agc_config_count = 1, 683 .agc = &stk7700p_7000m_mt2060_agc_config, 684 .bw = &stk7700p_pll_config, 685 686 .gpio_dir = DIB7000M_GPIO_DEFAULT_DIRECTIONS, 687 .gpio_val = DIB7000M_GPIO_DEFAULT_VALUES, 688 .gpio_pwm_pos = DIB7000M_GPIO_DEFAULT_PWM_POS, 689 }; 690 691 static struct dib7000p_config stk7700p_dib7000p_config = { 692 .output_mpeg2_in_188_bytes = 1, 693 694 .agc_config_count = 1, 695 .agc = &stk7700p_7000p_mt2060_agc_config, 696 .bw = &stk7700p_pll_config, 697 698 .gpio_dir = DIB7000M_GPIO_DEFAULT_DIRECTIONS, 699 .gpio_val = DIB7000M_GPIO_DEFAULT_VALUES, 700 .gpio_pwm_pos = DIB7000M_GPIO_DEFAULT_PWM_POS, 701 }; 702 703 static int stk7700p_frontend_attach(struct dvb_usb_adapter *adap) 704 { 705 struct dib0700_state *st = adap->dev->priv; 706 struct dib0700_adapter_state *state = adap->priv; 707 708 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops)) 709 return -ENODEV; 710 711 /* unless there is no real power management in DVB - we leave the device on GPIO6 */ 712 713 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); 714 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); msleep(50); 715 716 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); msleep(10); 717 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1); 718 719 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); msleep(10); 720 dib0700_ctrl_clock(adap->dev, 72, 1); 721 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); msleep(100); 722 723 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1); 724 725 st->mt2060_if1[0] = 1220; 726 727 if (state->dib7000p_ops.dib7000pc_detection(&adap->dev->i2c_adap)) { 728 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 18, &stk7700p_dib7000p_config); 729 st->is_dib7000pc = 1; 730 } else { 731 memset(&state->dib7000p_ops, 0, sizeof(state->dib7000p_ops)); 732 adap->fe_adap[0].fe = dvb_attach(dib7000m_attach, &adap->dev->i2c_adap, 18, &stk7700p_dib7000m_config); 733 } 734 735 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0; 736 } 737 738 static struct mt2060_config stk7700p_mt2060_config = { 739 0x60 740 }; 741 742 static int stk7700p_tuner_attach(struct dvb_usb_adapter *adap) 743 { 744 struct i2c_adapter *prim_i2c = &adap->dev->i2c_adap; 745 struct dib0700_state *st = adap->dev->priv; 746 struct i2c_adapter *tun_i2c; 747 struct dib0700_adapter_state *state = adap->priv; 748 s8 a; 749 int if1=1220; 750 751 if (adap->dev->udev->descriptor.idVendor == cpu_to_le16(USB_VID_HAUPPAUGE) && 752 adap->dev->udev->descriptor.idProduct == cpu_to_le16(USB_PID_HAUPPAUGE_NOVA_T_STICK)) { 753 if (!eeprom_read(prim_i2c,0x58,&a)) if1=1220+a; 754 } 755 if (st->is_dib7000pc) 756 tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1); 757 else 758 tun_i2c = dib7000m_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1); 759 760 return dvb_attach(mt2060_attach, adap->fe_adap[0].fe, tun_i2c, &stk7700p_mt2060_config, 761 if1) == NULL ? -ENODEV : 0; 762 } 763 764 /* DIB7070 generic */ 765 static struct dibx000_agc_config dib7070_agc_config = { 766 .band_caps = BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND, 767 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, 768 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */ 769 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0), 770 .inv_gain = 600, 771 .time_stabiliz = 10, 772 .alpha_level = 0, 773 .thlock = 118, 774 .wbd_inv = 0, 775 .wbd_ref = 3530, 776 .wbd_sel = 1, 777 .wbd_alpha = 5, 778 .agc1_max = 65535, 779 .agc1_min = 0, 780 .agc2_max = 65535, 781 .agc2_min = 0, 782 .agc1_pt1 = 0, 783 .agc1_pt2 = 40, 784 .agc1_pt3 = 183, 785 .agc1_slope1 = 206, 786 .agc1_slope2 = 255, 787 .agc2_pt1 = 72, 788 .agc2_pt2 = 152, 789 .agc2_slope1 = 88, 790 .agc2_slope2 = 90, 791 .alpha_mant = 17, 792 .alpha_exp = 27, 793 .beta_mant = 23, 794 .beta_exp = 51, 795 .perform_agc_softsplit = 0, 796 }; 797 798 static int dib7070_tuner_reset(struct dvb_frontend *fe, int onoff) 799 { 800 struct dvb_usb_adapter *adap = fe->dvb->priv; 801 struct dib0700_adapter_state *state = adap->priv; 802 803 deb_info("reset: %d", onoff); 804 return state->dib7000p_ops.set_gpio(fe, 8, 0, !onoff); 805 } 806 807 static int dib7070_tuner_sleep(struct dvb_frontend *fe, int onoff) 808 { 809 struct dvb_usb_adapter *adap = fe->dvb->priv; 810 struct dib0700_adapter_state *state = adap->priv; 811 812 deb_info("sleep: %d", onoff); 813 return state->dib7000p_ops.set_gpio(fe, 9, 0, onoff); 814 } 815 816 static struct dib0070_config dib7070p_dib0070_config[2] = { 817 { 818 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS, 819 .reset = dib7070_tuner_reset, 820 .sleep = dib7070_tuner_sleep, 821 .clock_khz = 12000, 822 .clock_pad_drive = 4, 823 .charge_pump = 2, 824 }, { 825 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS, 826 .reset = dib7070_tuner_reset, 827 .sleep = dib7070_tuner_sleep, 828 .clock_khz = 12000, 829 .charge_pump = 2, 830 } 831 }; 832 833 static struct dib0070_config dib7770p_dib0070_config = { 834 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS, 835 .reset = dib7070_tuner_reset, 836 .sleep = dib7070_tuner_sleep, 837 .clock_khz = 12000, 838 .clock_pad_drive = 0, 839 .flip_chip = 1, 840 .charge_pump = 2, 841 }; 842 843 static int dib7070_set_param_override(struct dvb_frontend *fe) 844 { 845 struct dtv_frontend_properties *p = &fe->dtv_property_cache; 846 struct dvb_usb_adapter *adap = fe->dvb->priv; 847 struct dib0700_adapter_state *state = adap->priv; 848 849 u16 offset; 850 u8 band = BAND_OF_FREQUENCY(p->frequency/1000); 851 switch (band) { 852 case BAND_VHF: offset = 950; break; 853 case BAND_UHF: 854 default: offset = 550; break; 855 } 856 deb_info("WBD for DiB7000P: %d\n", offset + dib0070_wbd_offset(fe)); 857 state->dib7000p_ops.set_wbd_ref(fe, offset + dib0070_wbd_offset(fe)); 858 return state->set_param_save(fe); 859 } 860 861 static int dib7770_set_param_override(struct dvb_frontend *fe) 862 { 863 struct dtv_frontend_properties *p = &fe->dtv_property_cache; 864 struct dvb_usb_adapter *adap = fe->dvb->priv; 865 struct dib0700_adapter_state *state = adap->priv; 866 867 u16 offset; 868 u8 band = BAND_OF_FREQUENCY(p->frequency/1000); 869 switch (band) { 870 case BAND_VHF: 871 state->dib7000p_ops.set_gpio(fe, 0, 0, 1); 872 offset = 850; 873 break; 874 case BAND_UHF: 875 default: 876 state->dib7000p_ops.set_gpio(fe, 0, 0, 0); 877 offset = 250; 878 break; 879 } 880 deb_info("WBD for DiB7000P: %d\n", offset + dib0070_wbd_offset(fe)); 881 state->dib7000p_ops.set_wbd_ref(fe, offset + dib0070_wbd_offset(fe)); 882 return state->set_param_save(fe); 883 } 884 885 static int dib7770p_tuner_attach(struct dvb_usb_adapter *adap) 886 { 887 struct dib0700_adapter_state *st = adap->priv; 888 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe, 889 DIBX000_I2C_INTERFACE_TUNER, 1); 890 891 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c, 892 &dib7770p_dib0070_config) == NULL) 893 return -ENODEV; 894 895 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params; 896 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7770_set_param_override; 897 return 0; 898 } 899 900 static int dib7070p_tuner_attach(struct dvb_usb_adapter *adap) 901 { 902 struct dib0700_adapter_state *st = adap->priv; 903 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1); 904 905 if (adap->id == 0) { 906 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c, &dib7070p_dib0070_config[0]) == NULL) 907 return -ENODEV; 908 } else { 909 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c, &dib7070p_dib0070_config[1]) == NULL) 910 return -ENODEV; 911 } 912 913 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params; 914 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7070_set_param_override; 915 return 0; 916 } 917 918 static int stk7700p_pid_filter(struct dvb_usb_adapter *adapter, int index, 919 u16 pid, int onoff) 920 { 921 struct dib0700_adapter_state *state = adapter->priv; 922 struct dib0700_state *st = adapter->dev->priv; 923 924 if (st->is_dib7000pc) 925 return state->dib7000p_ops.pid_filter(adapter->fe_adap[0].fe, index, pid, onoff); 926 return dib7000m_pid_filter(adapter->fe_adap[0].fe, index, pid, onoff); 927 } 928 929 static int stk7700p_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff) 930 { 931 struct dib0700_state *st = adapter->dev->priv; 932 struct dib0700_adapter_state *state = adapter->priv; 933 if (st->is_dib7000pc) 934 return state->dib7000p_ops.pid_filter_ctrl(adapter->fe_adap[0].fe, onoff); 935 return dib7000m_pid_filter_ctrl(adapter->fe_adap[0].fe, onoff); 936 } 937 938 static int stk70x0p_pid_filter(struct dvb_usb_adapter *adapter, int index, u16 pid, int onoff) 939 { 940 struct dib0700_adapter_state *state = adapter->priv; 941 return state->dib7000p_ops.pid_filter(adapter->fe_adap[0].fe, index, pid, onoff); 942 } 943 944 static int stk70x0p_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff) 945 { 946 struct dib0700_adapter_state *state = adapter->priv; 947 return state->dib7000p_ops.pid_filter_ctrl(adapter->fe_adap[0].fe, onoff); 948 } 949 950 static struct dibx000_bandwidth_config dib7070_bw_config_12_mhz = { 951 .internal = 60000, 952 .sampling = 15000, 953 .pll_prediv = 1, 954 .pll_ratio = 20, 955 .pll_range = 3, 956 .pll_reset = 1, 957 .pll_bypass = 0, 958 .enable_refdiv = 0, 959 .bypclk_div = 0, 960 .IO_CLK_en_core = 1, 961 .ADClkSrc = 1, 962 .modulo = 2, 963 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0), 964 .ifreq = (0 << 25) | 0, 965 .timf = 20452225, 966 .xtal_hz = 12000000, 967 }; 968 969 static struct dib7000p_config dib7070p_dib7000p_config = { 970 .output_mpeg2_in_188_bytes = 1, 971 972 .agc_config_count = 1, 973 .agc = &dib7070_agc_config, 974 .bw = &dib7070_bw_config_12_mhz, 975 .tuner_is_baseband = 1, 976 .spur_protect = 1, 977 978 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS, 979 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES, 980 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS, 981 982 .hostbus_diversity = 1, 983 }; 984 985 /* STK7070P */ 986 static int stk7070p_frontend_attach(struct dvb_usb_adapter *adap) 987 { 988 struct usb_device_descriptor *p = &adap->dev->udev->descriptor; 989 struct dib0700_adapter_state *state = adap->priv; 990 991 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops)) 992 return -ENODEV; 993 994 if (p->idVendor == cpu_to_le16(USB_VID_PINNACLE) && 995 p->idProduct == cpu_to_le16(USB_PID_PINNACLE_PCTV72E)) 996 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); 997 else 998 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); 999 msleep(10); 1000 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1); 1001 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1); 1002 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1); 1003 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); 1004 1005 dib0700_ctrl_clock(adap->dev, 72, 1); 1006 1007 msleep(10); 1008 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); 1009 msleep(10); 1010 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1); 1011 1012 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18, 1013 &dib7070p_dib7000p_config) != 0) { 1014 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", 1015 __func__); 1016 dvb_detach(&state->dib7000p_ops); 1017 return -ENODEV; 1018 } 1019 1020 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80, 1021 &dib7070p_dib7000p_config); 1022 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0; 1023 } 1024 1025 /* STK7770P */ 1026 static struct dib7000p_config dib7770p_dib7000p_config = { 1027 .output_mpeg2_in_188_bytes = 1, 1028 1029 .agc_config_count = 1, 1030 .agc = &dib7070_agc_config, 1031 .bw = &dib7070_bw_config_12_mhz, 1032 .tuner_is_baseband = 1, 1033 .spur_protect = 1, 1034 1035 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS, 1036 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES, 1037 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS, 1038 1039 .hostbus_diversity = 1, 1040 .enable_current_mirror = 1, 1041 .disable_sample_and_hold = 0, 1042 }; 1043 1044 static int stk7770p_frontend_attach(struct dvb_usb_adapter *adap) 1045 { 1046 struct usb_device_descriptor *p = &adap->dev->udev->descriptor; 1047 struct dib0700_adapter_state *state = adap->priv; 1048 1049 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops)) 1050 return -ENODEV; 1051 1052 if (p->idVendor == cpu_to_le16(USB_VID_PINNACLE) && 1053 p->idProduct == cpu_to_le16(USB_PID_PINNACLE_PCTV72E)) 1054 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); 1055 else 1056 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); 1057 msleep(10); 1058 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1); 1059 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1); 1060 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1); 1061 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); 1062 1063 dib0700_ctrl_clock(adap->dev, 72, 1); 1064 1065 msleep(10); 1066 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); 1067 msleep(10); 1068 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1); 1069 1070 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18, 1071 &dib7770p_dib7000p_config) != 0) { 1072 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", 1073 __func__); 1074 dvb_detach(&state->dib7000p_ops); 1075 return -ENODEV; 1076 } 1077 1078 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80, 1079 &dib7770p_dib7000p_config); 1080 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0; 1081 } 1082 1083 /* DIB807x generic */ 1084 static struct dibx000_agc_config dib807x_agc_config[2] = { 1085 { 1086 BAND_VHF, 1087 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, 1088 * P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0, 1089 * P_agc_inv_pwm2=0,P_agc_inh_dc_rv_est=0, 1090 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, 1091 * P_agc_write=0 */ 1092 (0 << 15) | (0 << 14) | (7 << 11) | (0 << 10) | (0 << 9) | 1093 (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | 1094 (0 << 0), /* setup*/ 1095 1096 600, /* inv_gain*/ 1097 10, /* time_stabiliz*/ 1098 1099 0, /* alpha_level*/ 1100 118, /* thlock*/ 1101 1102 0, /* wbd_inv*/ 1103 3530, /* wbd_ref*/ 1104 1, /* wbd_sel*/ 1105 5, /* wbd_alpha*/ 1106 1107 65535, /* agc1_max*/ 1108 0, /* agc1_min*/ 1109 1110 65535, /* agc2_max*/ 1111 0, /* agc2_min*/ 1112 1113 0, /* agc1_pt1*/ 1114 40, /* agc1_pt2*/ 1115 183, /* agc1_pt3*/ 1116 206, /* agc1_slope1*/ 1117 255, /* agc1_slope2*/ 1118 72, /* agc2_pt1*/ 1119 152, /* agc2_pt2*/ 1120 88, /* agc2_slope1*/ 1121 90, /* agc2_slope2*/ 1122 1123 17, /* alpha_mant*/ 1124 27, /* alpha_exp*/ 1125 23, /* beta_mant*/ 1126 51, /* beta_exp*/ 1127 1128 0, /* perform_agc_softsplit*/ 1129 }, { 1130 BAND_UHF, 1131 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, 1132 * P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0, 1133 * P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0, 1134 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, 1135 * P_agc_write=0 */ 1136 (0 << 15) | (0 << 14) | (1 << 11) | (0 << 10) | (0 << 9) | 1137 (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | 1138 (0 << 0), /* setup */ 1139 1140 600, /* inv_gain*/ 1141 10, /* time_stabiliz*/ 1142 1143 0, /* alpha_level*/ 1144 118, /* thlock*/ 1145 1146 0, /* wbd_inv*/ 1147 3530, /* wbd_ref*/ 1148 1, /* wbd_sel*/ 1149 5, /* wbd_alpha*/ 1150 1151 65535, /* agc1_max*/ 1152 0, /* agc1_min*/ 1153 1154 65535, /* agc2_max*/ 1155 0, /* agc2_min*/ 1156 1157 0, /* agc1_pt1*/ 1158 40, /* agc1_pt2*/ 1159 183, /* agc1_pt3*/ 1160 206, /* agc1_slope1*/ 1161 255, /* agc1_slope2*/ 1162 72, /* agc2_pt1*/ 1163 152, /* agc2_pt2*/ 1164 88, /* agc2_slope1*/ 1165 90, /* agc2_slope2*/ 1166 1167 17, /* alpha_mant*/ 1168 27, /* alpha_exp*/ 1169 23, /* beta_mant*/ 1170 51, /* beta_exp*/ 1171 1172 0, /* perform_agc_softsplit*/ 1173 } 1174 }; 1175 1176 static struct dibx000_bandwidth_config dib807x_bw_config_12_mhz = { 1177 .internal = 60000, 1178 .sampling = 15000, 1179 .pll_prediv = 1, 1180 .pll_ratio = 20, 1181 .pll_range = 3, 1182 .pll_reset = 1, 1183 .pll_bypass = 0, 1184 .enable_refdiv = 0, 1185 .bypclk_div = 0, 1186 .IO_CLK_en_core = 1, 1187 .ADClkSrc = 1, 1188 .modulo = 2, 1189 .sad_cfg = (3 << 14) | (1 << 12) | (599 << 0), /* sad_cfg: refsel, sel, freq_15k*/ 1190 .ifreq = (0 << 25) | 0, /* ifreq = 0.000000 MHz*/ 1191 .timf = 18179755, 1192 .xtal_hz = 12000000, 1193 }; 1194 1195 static struct dib8000_config dib807x_dib8000_config[2] = { 1196 { 1197 .output_mpeg2_in_188_bytes = 1, 1198 1199 .agc_config_count = 2, 1200 .agc = dib807x_agc_config, 1201 .pll = &dib807x_bw_config_12_mhz, 1202 .tuner_is_baseband = 1, 1203 1204 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS, 1205 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES, 1206 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS, 1207 1208 .hostbus_diversity = 1, 1209 .div_cfg = 1, 1210 .agc_control = &dib0070_ctrl_agc_filter, 1211 .output_mode = OUTMODE_MPEG2_FIFO, 1212 .drives = 0x2d98, 1213 }, { 1214 .output_mpeg2_in_188_bytes = 1, 1215 1216 .agc_config_count = 2, 1217 .agc = dib807x_agc_config, 1218 .pll = &dib807x_bw_config_12_mhz, 1219 .tuner_is_baseband = 1, 1220 1221 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS, 1222 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES, 1223 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS, 1224 1225 .hostbus_diversity = 1, 1226 .agc_control = &dib0070_ctrl_agc_filter, 1227 .output_mode = OUTMODE_MPEG2_FIFO, 1228 .drives = 0x2d98, 1229 } 1230 }; 1231 1232 static int dib80xx_tuner_reset(struct dvb_frontend *fe, int onoff) 1233 { 1234 struct dvb_usb_adapter *adap = fe->dvb->priv; 1235 struct dib0700_adapter_state *state = adap->priv; 1236 1237 return state->dib8000_ops.set_gpio(fe, 5, 0, !onoff); 1238 } 1239 1240 static int dib80xx_tuner_sleep(struct dvb_frontend *fe, int onoff) 1241 { 1242 struct dvb_usb_adapter *adap = fe->dvb->priv; 1243 struct dib0700_adapter_state *state = adap->priv; 1244 1245 return state->dib8000_ops.set_gpio(fe, 0, 0, onoff); 1246 } 1247 1248 static const struct dib0070_wbd_gain_cfg dib8070_wbd_gain_cfg[] = { 1249 { 240, 7}, 1250 { 0xffff, 6}, 1251 }; 1252 1253 static struct dib0070_config dib807x_dib0070_config[2] = { 1254 { 1255 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS, 1256 .reset = dib80xx_tuner_reset, 1257 .sleep = dib80xx_tuner_sleep, 1258 .clock_khz = 12000, 1259 .clock_pad_drive = 4, 1260 .vga_filter = 1, 1261 .force_crystal_mode = 1, 1262 .enable_third_order_filter = 1, 1263 .charge_pump = 0, 1264 .wbd_gain = dib8070_wbd_gain_cfg, 1265 .osc_buffer_state = 0, 1266 .freq_offset_khz_uhf = -100, 1267 .freq_offset_khz_vhf = -100, 1268 }, { 1269 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS, 1270 .reset = dib80xx_tuner_reset, 1271 .sleep = dib80xx_tuner_sleep, 1272 .clock_khz = 12000, 1273 .clock_pad_drive = 2, 1274 .vga_filter = 1, 1275 .force_crystal_mode = 1, 1276 .enable_third_order_filter = 1, 1277 .charge_pump = 0, 1278 .wbd_gain = dib8070_wbd_gain_cfg, 1279 .osc_buffer_state = 0, 1280 .freq_offset_khz_uhf = -25, 1281 .freq_offset_khz_vhf = -25, 1282 } 1283 }; 1284 1285 static int dib807x_set_param_override(struct dvb_frontend *fe) 1286 { 1287 struct dtv_frontend_properties *p = &fe->dtv_property_cache; 1288 struct dvb_usb_adapter *adap = fe->dvb->priv; 1289 struct dib0700_adapter_state *state = adap->priv; 1290 1291 u16 offset = dib0070_wbd_offset(fe); 1292 u8 band = BAND_OF_FREQUENCY(p->frequency/1000); 1293 switch (band) { 1294 case BAND_VHF: 1295 offset += 750; 1296 break; 1297 case BAND_UHF: /* fall-thru wanted */ 1298 default: 1299 offset += 250; break; 1300 } 1301 deb_info("WBD for DiB8000: %d\n", offset); 1302 state->dib8000_ops.set_wbd_ref(fe, offset); 1303 1304 return state->set_param_save(fe); 1305 } 1306 1307 static int dib807x_tuner_attach(struct dvb_usb_adapter *adap) 1308 { 1309 struct dib0700_adapter_state *st = adap->priv; 1310 struct i2c_adapter *tun_i2c = st->dib8000_ops.get_i2c_master(adap->fe_adap[0].fe, 1311 DIBX000_I2C_INTERFACE_TUNER, 1); 1312 1313 if (adap->id == 0) { 1314 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c, 1315 &dib807x_dib0070_config[0]) == NULL) 1316 return -ENODEV; 1317 } else { 1318 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c, 1319 &dib807x_dib0070_config[1]) == NULL) 1320 return -ENODEV; 1321 } 1322 1323 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params; 1324 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib807x_set_param_override; 1325 return 0; 1326 } 1327 1328 static int stk80xx_pid_filter(struct dvb_usb_adapter *adapter, int index, 1329 u16 pid, int onoff) 1330 { 1331 struct dib0700_adapter_state *state = adapter->priv; 1332 1333 return state->dib8000_ops.pid_filter(adapter->fe_adap[0].fe, index, pid, onoff); 1334 } 1335 1336 static int stk80xx_pid_filter_ctrl(struct dvb_usb_adapter *adapter, 1337 int onoff) 1338 { 1339 struct dib0700_adapter_state *state = adapter->priv; 1340 1341 return state->dib8000_ops.pid_filter_ctrl(adapter->fe_adap[0].fe, onoff); 1342 } 1343 1344 /* STK807x */ 1345 static int stk807x_frontend_attach(struct dvb_usb_adapter *adap) 1346 { 1347 struct dib0700_adapter_state *state = adap->priv; 1348 1349 if (!dvb_attach(dib8000_attach, &state->dib8000_ops)) 1350 return -ENODEV; 1351 1352 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); 1353 msleep(10); 1354 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1); 1355 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1); 1356 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1); 1357 1358 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); 1359 1360 dib0700_ctrl_clock(adap->dev, 72, 1); 1361 1362 msleep(10); 1363 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); 1364 msleep(10); 1365 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1); 1366 1367 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18, 1368 0x80, 0); 1369 1370 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80, 1371 &dib807x_dib8000_config[0]); 1372 1373 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0; 1374 } 1375 1376 /* STK807xPVR */ 1377 static int stk807xpvr_frontend_attach0(struct dvb_usb_adapter *adap) 1378 { 1379 struct dib0700_adapter_state *state = adap->priv; 1380 1381 if (!dvb_attach(dib8000_attach, &state->dib8000_ops)) 1382 return -ENODEV; 1383 1384 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); 1385 msleep(30); 1386 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); 1387 msleep(500); 1388 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1); 1389 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1); 1390 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1); 1391 1392 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); 1393 1394 dib0700_ctrl_clock(adap->dev, 72, 1); 1395 1396 msleep(10); 1397 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); 1398 msleep(10); 1399 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1); 1400 1401 /* initialize IC 0 */ 1402 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x22, 0x80, 0); 1403 1404 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80, 1405 &dib807x_dib8000_config[0]); 1406 1407 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0; 1408 } 1409 1410 static int stk807xpvr_frontend_attach1(struct dvb_usb_adapter *adap) 1411 { 1412 struct dib0700_adapter_state *state = adap->priv; 1413 1414 if (!dvb_attach(dib8000_attach, &state->dib8000_ops)) 1415 return -ENODEV; 1416 1417 /* initialize IC 1 */ 1418 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x12, 0x82, 0); 1419 1420 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x82, 1421 &dib807x_dib8000_config[1]); 1422 1423 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0; 1424 } 1425 1426 /* STK8096GP */ 1427 static struct dibx000_agc_config dib8090_agc_config[2] = { 1428 { 1429 .band_caps = BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND, 1430 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, 1431 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0, 1432 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */ 1433 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) 1434 | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0), 1435 1436 .inv_gain = 787, 1437 .time_stabiliz = 10, 1438 1439 .alpha_level = 0, 1440 .thlock = 118, 1441 1442 .wbd_inv = 0, 1443 .wbd_ref = 3530, 1444 .wbd_sel = 1, 1445 .wbd_alpha = 5, 1446 1447 .agc1_max = 65535, 1448 .agc1_min = 0, 1449 1450 .agc2_max = 65535, 1451 .agc2_min = 0, 1452 1453 .agc1_pt1 = 0, 1454 .agc1_pt2 = 32, 1455 .agc1_pt3 = 114, 1456 .agc1_slope1 = 143, 1457 .agc1_slope2 = 144, 1458 .agc2_pt1 = 114, 1459 .agc2_pt2 = 227, 1460 .agc2_slope1 = 116, 1461 .agc2_slope2 = 117, 1462 1463 .alpha_mant = 28, 1464 .alpha_exp = 26, 1465 .beta_mant = 31, 1466 .beta_exp = 51, 1467 1468 .perform_agc_softsplit = 0, 1469 }, 1470 { 1471 .band_caps = BAND_CBAND, 1472 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, 1473 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0, 1474 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */ 1475 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) 1476 | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0), 1477 1478 .inv_gain = 787, 1479 .time_stabiliz = 10, 1480 1481 .alpha_level = 0, 1482 .thlock = 118, 1483 1484 .wbd_inv = 0, 1485 .wbd_ref = 3530, 1486 .wbd_sel = 1, 1487 .wbd_alpha = 5, 1488 1489 .agc1_max = 0, 1490 .agc1_min = 0, 1491 1492 .agc2_max = 65535, 1493 .agc2_min = 0, 1494 1495 .agc1_pt1 = 0, 1496 .agc1_pt2 = 32, 1497 .agc1_pt3 = 114, 1498 .agc1_slope1 = 143, 1499 .agc1_slope2 = 144, 1500 .agc2_pt1 = 114, 1501 .agc2_pt2 = 227, 1502 .agc2_slope1 = 116, 1503 .agc2_slope2 = 117, 1504 1505 .alpha_mant = 28, 1506 .alpha_exp = 26, 1507 .beta_mant = 31, 1508 .beta_exp = 51, 1509 1510 .perform_agc_softsplit = 0, 1511 } 1512 }; 1513 1514 static struct dibx000_bandwidth_config dib8090_pll_config_12mhz = { 1515 .internal = 54000, 1516 .sampling = 13500, 1517 1518 .pll_prediv = 1, 1519 .pll_ratio = 18, 1520 .pll_range = 3, 1521 .pll_reset = 1, 1522 .pll_bypass = 0, 1523 1524 .enable_refdiv = 0, 1525 .bypclk_div = 0, 1526 .IO_CLK_en_core = 1, 1527 .ADClkSrc = 1, 1528 .modulo = 2, 1529 1530 .sad_cfg = (3 << 14) | (1 << 12) | (599 << 0), 1531 1532 .ifreq = (0 << 25) | 0, 1533 .timf = 20199727, 1534 1535 .xtal_hz = 12000000, 1536 }; 1537 1538 static int dib8090_get_adc_power(struct dvb_frontend *fe) 1539 { 1540 struct dvb_usb_adapter *adap = fe->dvb->priv; 1541 struct dib0700_adapter_state *state = adap->priv; 1542 1543 return state->dib8000_ops.get_adc_power(fe, 1); 1544 } 1545 1546 static void dib8090_agc_control(struct dvb_frontend *fe, u8 restart) 1547 { 1548 deb_info("AGC control callback: %i\n", restart); 1549 dib0090_dcc_freq(fe, restart); 1550 1551 if (restart == 0) /* before AGC startup */ 1552 dib0090_set_dc_servo(fe, 1); 1553 } 1554 1555 static struct dib8000_config dib809x_dib8000_config[2] = { 1556 { 1557 .output_mpeg2_in_188_bytes = 1, 1558 1559 .agc_config_count = 2, 1560 .agc = dib8090_agc_config, 1561 .agc_control = dib8090_agc_control, 1562 .pll = &dib8090_pll_config_12mhz, 1563 .tuner_is_baseband = 1, 1564 1565 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS, 1566 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES, 1567 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS, 1568 1569 .hostbus_diversity = 1, 1570 .div_cfg = 0x31, 1571 .output_mode = OUTMODE_MPEG2_FIFO, 1572 .drives = 0x2d98, 1573 .diversity_delay = 48, 1574 .refclksel = 3, 1575 }, { 1576 .output_mpeg2_in_188_bytes = 1, 1577 1578 .agc_config_count = 2, 1579 .agc = dib8090_agc_config, 1580 .agc_control = dib8090_agc_control, 1581 .pll = &dib8090_pll_config_12mhz, 1582 .tuner_is_baseband = 1, 1583 1584 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS, 1585 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES, 1586 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS, 1587 1588 .hostbus_diversity = 1, 1589 .div_cfg = 0x31, 1590 .output_mode = OUTMODE_DIVERSITY, 1591 .drives = 0x2d08, 1592 .diversity_delay = 1, 1593 .refclksel = 3, 1594 } 1595 }; 1596 1597 static struct dib0090_wbd_slope dib8090_wbd_table[] = { 1598 /* max freq ; cold slope ; cold offset ; warm slope ; warm offset ; wbd gain */ 1599 { 120, 0, 500, 0, 500, 4 }, /* CBAND */ 1600 { 170, 0, 450, 0, 450, 4 }, /* CBAND */ 1601 { 380, 48, 373, 28, 259, 6 }, /* VHF */ 1602 { 860, 34, 700, 36, 616, 6 }, /* high UHF */ 1603 { 0xFFFF, 34, 700, 36, 616, 6 }, /* default */ 1604 }; 1605 1606 static struct dib0090_config dib809x_dib0090_config = { 1607 .io.pll_bypass = 1, 1608 .io.pll_range = 1, 1609 .io.pll_prediv = 1, 1610 .io.pll_loopdiv = 20, 1611 .io.adc_clock_ratio = 8, 1612 .io.pll_int_loop_filt = 0, 1613 .io.clock_khz = 12000, 1614 .reset = dib80xx_tuner_reset, 1615 .sleep = dib80xx_tuner_sleep, 1616 .clkouttobamse = 1, 1617 .analog_output = 1, 1618 .i2c_address = DEFAULT_DIB0090_I2C_ADDRESS, 1619 .use_pwm_agc = 1, 1620 .clkoutdrive = 1, 1621 .get_adc_power = dib8090_get_adc_power, 1622 .freq_offset_khz_uhf = -63, 1623 .freq_offset_khz_vhf = -143, 1624 .wbd = dib8090_wbd_table, 1625 .fref_clock_ratio = 6, 1626 }; 1627 1628 static u8 dib8090_compute_pll_parameters(struct dvb_frontend *fe) 1629 { 1630 u8 optimal_pll_ratio = 20; 1631 u32 freq_adc, ratio, rest, max = 0; 1632 u8 pll_ratio; 1633 1634 for (pll_ratio = 17; pll_ratio <= 20; pll_ratio++) { 1635 freq_adc = 12 * pll_ratio * (1 << 8) / 16; 1636 ratio = ((fe->dtv_property_cache.frequency / 1000) * (1 << 8) / 1000) / freq_adc; 1637 rest = ((fe->dtv_property_cache.frequency / 1000) * (1 << 8) / 1000) - ratio * freq_adc; 1638 1639 if (rest > freq_adc / 2) 1640 rest = freq_adc - rest; 1641 deb_info("PLL ratio=%i rest=%i\n", pll_ratio, rest); 1642 if ((rest > max) && (rest > 717)) { 1643 optimal_pll_ratio = pll_ratio; 1644 max = rest; 1645 } 1646 } 1647 deb_info("optimal PLL ratio=%i\n", optimal_pll_ratio); 1648 1649 return optimal_pll_ratio; 1650 } 1651 1652 static int dib8096_set_param_override(struct dvb_frontend *fe) 1653 { 1654 struct dvb_usb_adapter *adap = fe->dvb->priv; 1655 struct dib0700_adapter_state *state = adap->priv; 1656 u8 pll_ratio, band = BAND_OF_FREQUENCY(fe->dtv_property_cache.frequency / 1000); 1657 u16 target, ltgain, rf_gain_limit; 1658 u32 timf; 1659 int ret = 0; 1660 enum frontend_tune_state tune_state = CT_SHUTDOWN; 1661 1662 switch (band) { 1663 default: 1664 deb_info("Warning : Rf frequency (%iHz) is not in the supported range, using VHF switch ", fe->dtv_property_cache.frequency); 1665 case BAND_VHF: 1666 state->dib8000_ops.set_gpio(fe, 3, 0, 1); 1667 break; 1668 case BAND_UHF: 1669 state->dib8000_ops.set_gpio(fe, 3, 0, 0); 1670 break; 1671 } 1672 1673 ret = state->set_param_save(fe); 1674 if (ret < 0) 1675 return ret; 1676 1677 if (fe->dtv_property_cache.bandwidth_hz != 6000000) { 1678 deb_info("only 6MHz bandwidth is supported\n"); 1679 return -EINVAL; 1680 } 1681 1682 /** Update PLL if needed ratio **/ 1683 state->dib8000_ops.update_pll(fe, &dib8090_pll_config_12mhz, fe->dtv_property_cache.bandwidth_hz / 1000, 0); 1684 1685 /** Get optimize PLL ratio to remove spurious **/ 1686 pll_ratio = dib8090_compute_pll_parameters(fe); 1687 if (pll_ratio == 17) 1688 timf = 21387946; 1689 else if (pll_ratio == 18) 1690 timf = 20199727; 1691 else if (pll_ratio == 19) 1692 timf = 19136583; 1693 else 1694 timf = 18179756; 1695 1696 /** Update ratio **/ 1697 state->dib8000_ops.update_pll(fe, &dib8090_pll_config_12mhz, fe->dtv_property_cache.bandwidth_hz / 1000, pll_ratio); 1698 1699 state->dib8000_ops.ctrl_timf(fe, DEMOD_TIMF_SET, timf); 1700 1701 if (band != BAND_CBAND) { 1702 /* dib0090_get_wbd_target is returning any possible temperature compensated wbd-target */ 1703 target = (dib0090_get_wbd_target(fe) * 8 * 18 / 33 + 1) / 2; 1704 state->dib8000_ops.set_wbd_ref(fe, target); 1705 } 1706 1707 if (band == BAND_CBAND) { 1708 deb_info("tuning in CBAND - soft-AGC startup\n"); 1709 dib0090_set_tune_state(fe, CT_AGC_START); 1710 1711 do { 1712 ret = dib0090_gain_control(fe); 1713 msleep(ret); 1714 tune_state = dib0090_get_tune_state(fe); 1715 if (tune_state == CT_AGC_STEP_0) 1716 state->dib8000_ops.set_gpio(fe, 6, 0, 1); 1717 else if (tune_state == CT_AGC_STEP_1) { 1718 dib0090_get_current_gain(fe, NULL, NULL, &rf_gain_limit, <gain); 1719 if (rf_gain_limit < 2000) /* activate the external attenuator in case of very high input power */ 1720 state->dib8000_ops.set_gpio(fe, 6, 0, 0); 1721 } 1722 } while (tune_state < CT_AGC_STOP); 1723 1724 deb_info("switching to PWM AGC\n"); 1725 dib0090_pwm_gain_reset(fe); 1726 state->dib8000_ops.pwm_agc_reset(fe); 1727 state->dib8000_ops.set_tune_state(fe, CT_DEMOD_START); 1728 } else { 1729 /* for everything else than CBAND we are using standard AGC */ 1730 deb_info("not tuning in CBAND - standard AGC startup\n"); 1731 dib0090_pwm_gain_reset(fe); 1732 } 1733 1734 return 0; 1735 } 1736 1737 static int dib809x_tuner_attach(struct dvb_usb_adapter *adap) 1738 { 1739 struct dib0700_adapter_state *st = adap->priv; 1740 struct i2c_adapter *tun_i2c = st->dib8000_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1); 1741 1742 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &dib809x_dib0090_config) == NULL) 1743 return -ENODEV; 1744 1745 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params; 1746 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib8096_set_param_override; 1747 return 0; 1748 } 1749 1750 static int stk809x_frontend_attach(struct dvb_usb_adapter *adap) 1751 { 1752 struct dib0700_adapter_state *state = adap->priv; 1753 1754 if (!dvb_attach(dib8000_attach, &state->dib8000_ops)) 1755 return -ENODEV; 1756 1757 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); 1758 msleep(10); 1759 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1); 1760 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1); 1761 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1); 1762 1763 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); 1764 1765 dib0700_ctrl_clock(adap->dev, 72, 1); 1766 1767 msleep(10); 1768 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); 1769 msleep(10); 1770 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1); 1771 1772 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18, 0x80, 0); 1773 1774 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80, &dib809x_dib8000_config[0]); 1775 1776 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0; 1777 } 1778 1779 static int nim8096md_tuner_attach(struct dvb_usb_adapter *adap) 1780 { 1781 struct dib0700_adapter_state *st = adap->priv; 1782 struct i2c_adapter *tun_i2c; 1783 struct dvb_frontend *fe_slave = st->dib8000_ops.get_slave_frontend(adap->fe_adap[0].fe, 1); 1784 1785 if (fe_slave) { 1786 tun_i2c = st->dib8000_ops.get_i2c_master(fe_slave, DIBX000_I2C_INTERFACE_TUNER, 1); 1787 if (dvb_attach(dib0090_register, fe_slave, tun_i2c, &dib809x_dib0090_config) == NULL) 1788 return -ENODEV; 1789 fe_slave->dvb = adap->fe_adap[0].fe->dvb; 1790 fe_slave->ops.tuner_ops.set_params = dib8096_set_param_override; 1791 } 1792 tun_i2c = st->dib8000_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1); 1793 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &dib809x_dib0090_config) == NULL) 1794 return -ENODEV; 1795 1796 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params; 1797 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib8096_set_param_override; 1798 1799 return 0; 1800 } 1801 1802 static int nim8096md_frontend_attach(struct dvb_usb_adapter *adap) 1803 { 1804 struct dvb_frontend *fe_slave; 1805 struct dib0700_adapter_state *state = adap->priv; 1806 1807 if (!dvb_attach(dib8000_attach, &state->dib8000_ops)) 1808 return -ENODEV; 1809 1810 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); 1811 msleep(20); 1812 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); 1813 msleep(1000); 1814 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1); 1815 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1); 1816 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1); 1817 1818 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); 1819 1820 dib0700_ctrl_clock(adap->dev, 72, 1); 1821 1822 msleep(20); 1823 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); 1824 msleep(20); 1825 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1); 1826 1827 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 2, 18, 0x80, 0); 1828 1829 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80, &dib809x_dib8000_config[0]); 1830 if (adap->fe_adap[0].fe == NULL) 1831 return -ENODEV; 1832 1833 /* Needed to increment refcount */ 1834 if (!dvb_attach(dib8000_attach, &state->dib8000_ops)) 1835 return -ENODEV; 1836 1837 fe_slave = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x82, &dib809x_dib8000_config[1]); 1838 state->dib8000_ops.set_slave_frontend(adap->fe_adap[0].fe, fe_slave); 1839 1840 return fe_slave == NULL ? -ENODEV : 0; 1841 } 1842 1843 /* TFE8096P */ 1844 static struct dibx000_agc_config dib8096p_agc_config[2] = { 1845 { 1846 .band_caps = BAND_UHF, 1847 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, 1848 P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0, 1849 P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0, 1850 P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, 1851 P_agc_write=0 */ 1852 .setup = (0 << 15) | (0 << 14) | (5 << 11) 1853 | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) 1854 | (0 << 4) | (5 << 1) | (0 << 0), 1855 1856 .inv_gain = 684, 1857 .time_stabiliz = 10, 1858 1859 .alpha_level = 0, 1860 .thlock = 118, 1861 1862 .wbd_inv = 0, 1863 .wbd_ref = 1200, 1864 .wbd_sel = 3, 1865 .wbd_alpha = 5, 1866 1867 .agc1_max = 65535, 1868 .agc1_min = 0, 1869 1870 .agc2_max = 32767, 1871 .agc2_min = 0, 1872 1873 .agc1_pt1 = 0, 1874 .agc1_pt2 = 0, 1875 .agc1_pt3 = 105, 1876 .agc1_slope1 = 0, 1877 .agc1_slope2 = 156, 1878 .agc2_pt1 = 105, 1879 .agc2_pt2 = 255, 1880 .agc2_slope1 = 54, 1881 .agc2_slope2 = 0, 1882 1883 .alpha_mant = 28, 1884 .alpha_exp = 26, 1885 .beta_mant = 31, 1886 .beta_exp = 51, 1887 1888 .perform_agc_softsplit = 0, 1889 } , { 1890 .band_caps = BAND_FM | BAND_VHF | BAND_CBAND, 1891 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, 1892 P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0, 1893 P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0, 1894 P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, 1895 P_agc_write=0 */ 1896 .setup = (0 << 15) | (0 << 14) | (5 << 11) 1897 | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) 1898 | (0 << 4) | (5 << 1) | (0 << 0), 1899 1900 .inv_gain = 732, 1901 .time_stabiliz = 10, 1902 1903 .alpha_level = 0, 1904 .thlock = 118, 1905 1906 .wbd_inv = 0, 1907 .wbd_ref = 1200, 1908 .wbd_sel = 3, 1909 .wbd_alpha = 5, 1910 1911 .agc1_max = 65535, 1912 .agc1_min = 0, 1913 1914 .agc2_max = 32767, 1915 .agc2_min = 0, 1916 1917 .agc1_pt1 = 0, 1918 .agc1_pt2 = 0, 1919 .agc1_pt3 = 98, 1920 .agc1_slope1 = 0, 1921 .agc1_slope2 = 167, 1922 .agc2_pt1 = 98, 1923 .agc2_pt2 = 255, 1924 .agc2_slope1 = 52, 1925 .agc2_slope2 = 0, 1926 1927 .alpha_mant = 28, 1928 .alpha_exp = 26, 1929 .beta_mant = 31, 1930 .beta_exp = 51, 1931 1932 .perform_agc_softsplit = 0, 1933 } 1934 }; 1935 1936 static struct dibx000_bandwidth_config dib8096p_clock_config_12_mhz = { 1937 .internal = 108000, 1938 .sampling = 13500, 1939 .pll_prediv = 1, 1940 .pll_ratio = 9, 1941 .pll_range = 1, 1942 .pll_reset = 0, 1943 .pll_bypass = 0, 1944 .enable_refdiv = 0, 1945 .bypclk_div = 0, 1946 .IO_CLK_en_core = 0, 1947 .ADClkSrc = 0, 1948 .modulo = 2, 1949 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0), 1950 .ifreq = (0 << 25) | 0, 1951 .timf = 20199729, 1952 .xtal_hz = 12000000, 1953 }; 1954 1955 static struct dib8000_config tfe8096p_dib8000_config = { 1956 .output_mpeg2_in_188_bytes = 1, 1957 .hostbus_diversity = 1, 1958 .update_lna = NULL, 1959 1960 .agc_config_count = 2, 1961 .agc = dib8096p_agc_config, 1962 .pll = &dib8096p_clock_config_12_mhz, 1963 1964 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS, 1965 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES, 1966 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS, 1967 1968 .agc_control = NULL, 1969 .diversity_delay = 48, 1970 .output_mode = OUTMODE_MPEG2_FIFO, 1971 .enMpegOutput = 1, 1972 }; 1973 1974 static struct dib0090_wbd_slope dib8096p_wbd_table[] = { 1975 { 380, 81, 850, 64, 540, 4}, 1976 { 860, 51, 866, 21, 375, 4}, 1977 {1700, 0, 250, 0, 100, 6}, 1978 {2600, 0, 250, 0, 100, 6}, 1979 { 0xFFFF, 0, 0, 0, 0, 0}, 1980 }; 1981 1982 static struct dib0090_config tfe8096p_dib0090_config = { 1983 .io.clock_khz = 12000, 1984 .io.pll_bypass = 0, 1985 .io.pll_range = 0, 1986 .io.pll_prediv = 3, 1987 .io.pll_loopdiv = 6, 1988 .io.adc_clock_ratio = 0, 1989 .io.pll_int_loop_filt = 0, 1990 1991 .freq_offset_khz_uhf = -143, 1992 .freq_offset_khz_vhf = -143, 1993 1994 .get_adc_power = dib8090_get_adc_power, 1995 1996 .clkouttobamse = 1, 1997 .analog_output = 0, 1998 1999 .wbd_vhf_offset = 0, 2000 .wbd_cband_offset = 0, 2001 .use_pwm_agc = 1, 2002 .clkoutdrive = 0, 2003 2004 .fref_clock_ratio = 1, 2005 2006 .ls_cfg_pad_drv = 0, 2007 .data_tx_drv = 0, 2008 .low_if = NULL, 2009 .in_soc = 1, 2010 .force_cband_input = 0, 2011 }; 2012 2013 struct dibx090p_adc { 2014 u32 freq; /* RF freq MHz */ 2015 u32 timf; /* New Timf */ 2016 u32 pll_loopdiv; /* New prediv */ 2017 u32 pll_prediv; /* New loopdiv */ 2018 }; 2019 2020 struct dibx090p_best_adc { 2021 u32 timf; 2022 u32 pll_loopdiv; 2023 u32 pll_prediv; 2024 }; 2025 2026 static int dib8096p_get_best_sampling(struct dvb_frontend *fe, struct dibx090p_best_adc *adc) 2027 { 2028 u8 spur = 0, prediv = 0, loopdiv = 0, min_prediv = 1, max_prediv = 1; 2029 u16 xtal = 12000; 2030 u16 fcp_min = 1900; /* PLL, Minimum Frequency of phase comparator (KHz) */ 2031 u16 fcp_max = 20000; /* PLL, Maximum Frequency of phase comparator (KHz) */ 2032 u32 fmem_max = 140000; /* 140MHz max SDRAM freq */ 2033 u32 fdem_min = 66000; 2034 u32 fcp = 0, fs = 0, fdem = 0, fmem = 0; 2035 u32 harmonic_id = 0; 2036 2037 adc->timf = 0; 2038 adc->pll_loopdiv = loopdiv; 2039 adc->pll_prediv = prediv; 2040 2041 deb_info("bandwidth = %d", fe->dtv_property_cache.bandwidth_hz); 2042 2043 /* Find Min and Max prediv */ 2044 while ((xtal / max_prediv) >= fcp_min) 2045 max_prediv++; 2046 2047 max_prediv--; 2048 min_prediv = max_prediv; 2049 while ((xtal / min_prediv) <= fcp_max) { 2050 min_prediv--; 2051 if (min_prediv == 1) 2052 break; 2053 } 2054 deb_info("MIN prediv = %d : MAX prediv = %d", min_prediv, max_prediv); 2055 2056 min_prediv = 1; 2057 2058 for (prediv = min_prediv; prediv < max_prediv; prediv++) { 2059 fcp = xtal / prediv; 2060 if (fcp > fcp_min && fcp < fcp_max) { 2061 for (loopdiv = 1; loopdiv < 64; loopdiv++) { 2062 fmem = ((xtal/prediv) * loopdiv); 2063 fdem = fmem / 2; 2064 fs = fdem / 4; 2065 2066 /* test min/max system restrictions */ 2067 if ((fdem >= fdem_min) && (fmem <= fmem_max) && (fs >= fe->dtv_property_cache.bandwidth_hz / 1000)) { 2068 spur = 0; 2069 /* test fs harmonics positions */ 2070 for (harmonic_id = (fe->dtv_property_cache.frequency / (1000 * fs)); harmonic_id <= ((fe->dtv_property_cache.frequency / (1000 * fs)) + 1); harmonic_id++) { 2071 if (((fs * harmonic_id) >= (fe->dtv_property_cache.frequency / 1000 - (fe->dtv_property_cache.bandwidth_hz / 2000))) && ((fs * harmonic_id) <= (fe->dtv_property_cache.frequency / 1000 + (fe->dtv_property_cache.bandwidth_hz / 2000)))) { 2072 spur = 1; 2073 break; 2074 } 2075 } 2076 2077 if (!spur) { 2078 adc->pll_loopdiv = loopdiv; 2079 adc->pll_prediv = prediv; 2080 adc->timf = (4260880253U / fdem) * (1 << 8); 2081 adc->timf += ((4260880253U % fdem) << 8) / fdem; 2082 2083 deb_info("RF %6d; BW %6d; Xtal %6d; Fmem %6d; Fdem %6d; Fs %6d; Prediv %2d; Loopdiv %2d; Timf %8d;", fe->dtv_property_cache.frequency, fe->dtv_property_cache.bandwidth_hz, xtal, fmem, fdem, fs, prediv, loopdiv, adc->timf); 2084 break; 2085 } 2086 } 2087 } 2088 } 2089 if (!spur) 2090 break; 2091 } 2092 2093 if (adc->pll_loopdiv == 0 && adc->pll_prediv == 0) 2094 return -EINVAL; 2095 return 0; 2096 } 2097 2098 static int dib8096p_agc_startup(struct dvb_frontend *fe) 2099 { 2100 struct dvb_usb_adapter *adap = fe->dvb->priv; 2101 struct dib0700_adapter_state *state = adap->priv; 2102 struct dibx000_bandwidth_config pll; 2103 struct dibx090p_best_adc adc; 2104 u16 target; 2105 int ret; 2106 2107 ret = state->set_param_save(fe); 2108 if (ret < 0) 2109 return ret; 2110 memset(&pll, 0, sizeof(struct dibx000_bandwidth_config)); 2111 2112 dib0090_pwm_gain_reset(fe); 2113 /* dib0090_get_wbd_target is returning any possible 2114 temperature compensated wbd-target */ 2115 target = (dib0090_get_wbd_target(fe) * 8 + 1) / 2; 2116 state->dib8000_ops.set_wbd_ref(fe, target); 2117 2118 if (dib8096p_get_best_sampling(fe, &adc) == 0) { 2119 pll.pll_ratio = adc.pll_loopdiv; 2120 pll.pll_prediv = adc.pll_prediv; 2121 2122 dib0700_set_i2c_speed(adap->dev, 200); 2123 state->dib8000_ops.update_pll(fe, &pll, fe->dtv_property_cache.bandwidth_hz / 1000, 0); 2124 state->dib8000_ops.ctrl_timf(fe, DEMOD_TIMF_SET, adc.timf); 2125 dib0700_set_i2c_speed(adap->dev, 1000); 2126 } 2127 return 0; 2128 } 2129 2130 static int tfe8096p_frontend_attach(struct dvb_usb_adapter *adap) 2131 { 2132 struct dib0700_state *st = adap->dev->priv; 2133 u32 fw_version; 2134 struct dib0700_adapter_state *state = adap->priv; 2135 2136 if (!dvb_attach(dib8000_attach, &state->dib8000_ops)) 2137 return -ENODEV; 2138 2139 dib0700_get_version(adap->dev, NULL, NULL, &fw_version, NULL); 2140 if (fw_version >= 0x10200) 2141 st->fw_use_new_i2c_api = 1; 2142 2143 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); 2144 msleep(20); 2145 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1); 2146 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1); 2147 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1); 2148 2149 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); 2150 2151 dib0700_ctrl_clock(adap->dev, 72, 1); 2152 2153 msleep(20); 2154 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); 2155 msleep(20); 2156 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1); 2157 2158 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, 0x80, 1); 2159 2160 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 2161 0x80, &tfe8096p_dib8000_config); 2162 2163 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0; 2164 } 2165 2166 static int tfe8096p_tuner_attach(struct dvb_usb_adapter *adap) 2167 { 2168 struct dib0700_adapter_state *st = adap->priv; 2169 struct i2c_adapter *tun_i2c = st->dib8000_ops.get_i2c_tuner(adap->fe_adap[0].fe); 2170 2171 tfe8096p_dib0090_config.reset = st->dib8000_ops.tuner_sleep; 2172 tfe8096p_dib0090_config.sleep = st->dib8000_ops.tuner_sleep; 2173 tfe8096p_dib0090_config.wbd = dib8096p_wbd_table; 2174 2175 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, 2176 &tfe8096p_dib0090_config) == NULL) 2177 return -ENODEV; 2178 2179 st->dib8000_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1); 2180 2181 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params; 2182 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib8096p_agc_startup; 2183 return 0; 2184 } 2185 2186 /* STK9090M */ 2187 static int dib90x0_pid_filter(struct dvb_usb_adapter *adapter, int index, u16 pid, int onoff) 2188 { 2189 return dib9000_fw_pid_filter(adapter->fe_adap[0].fe, index, pid, onoff); 2190 } 2191 2192 static int dib90x0_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff) 2193 { 2194 return dib9000_fw_pid_filter_ctrl(adapter->fe_adap[0].fe, onoff); 2195 } 2196 2197 static int dib90x0_tuner_reset(struct dvb_frontend *fe, int onoff) 2198 { 2199 return dib9000_set_gpio(fe, 5, 0, !onoff); 2200 } 2201 2202 static int dib90x0_tuner_sleep(struct dvb_frontend *fe, int onoff) 2203 { 2204 return dib9000_set_gpio(fe, 0, 0, onoff); 2205 } 2206 2207 static int dib01x0_pmu_update(struct i2c_adapter *i2c, u16 *data, u8 len) 2208 { 2209 u8 wb[4] = { 0xc >> 8, 0xc & 0xff, 0, 0 }; 2210 u8 rb[2]; 2211 struct i2c_msg msg[2] = { 2212 {.addr = 0x1e >> 1, .flags = 0, .buf = wb, .len = 2}, 2213 {.addr = 0x1e >> 1, .flags = I2C_M_RD, .buf = rb, .len = 2}, 2214 }; 2215 u8 index_data; 2216 2217 dibx000_i2c_set_speed(i2c, 250); 2218 2219 if (i2c_transfer(i2c, msg, 2) != 2) 2220 return -EIO; 2221 2222 switch (rb[0] << 8 | rb[1]) { 2223 case 0: 2224 deb_info("Found DiB0170 rev1: This version of DiB0170 is not supported any longer.\n"); 2225 return -EIO; 2226 case 1: 2227 deb_info("Found DiB0170 rev2"); 2228 break; 2229 case 2: 2230 deb_info("Found DiB0190 rev2"); 2231 break; 2232 default: 2233 deb_info("DiB01x0 not found"); 2234 return -EIO; 2235 } 2236 2237 for (index_data = 0; index_data < len; index_data += 2) { 2238 wb[2] = (data[index_data + 1] >> 8) & 0xff; 2239 wb[3] = (data[index_data + 1]) & 0xff; 2240 2241 if (data[index_data] == 0) { 2242 wb[0] = (data[index_data] >> 8) & 0xff; 2243 wb[1] = (data[index_data]) & 0xff; 2244 msg[0].len = 2; 2245 if (i2c_transfer(i2c, msg, 2) != 2) 2246 return -EIO; 2247 wb[2] |= rb[0]; 2248 wb[3] |= rb[1] & ~(3 << 4); 2249 } 2250 2251 wb[0] = (data[index_data] >> 8)&0xff; 2252 wb[1] = (data[index_data])&0xff; 2253 msg[0].len = 4; 2254 if (i2c_transfer(i2c, &msg[0], 1) != 1) 2255 return -EIO; 2256 } 2257 return 0; 2258 } 2259 2260 static struct dib9000_config stk9090m_config = { 2261 .output_mpeg2_in_188_bytes = 1, 2262 .output_mode = OUTMODE_MPEG2_FIFO, 2263 .vcxo_timer = 279620, 2264 .timing_frequency = 20452225, 2265 .demod_clock_khz = 60000, 2266 .xtal_clock_khz = 30000, 2267 .if_drives = (0 << 15) | (1 << 13) | (0 << 12) | (3 << 10) | (0 << 9) | (1 << 7) | (0 << 6) | (0 << 4) | (1 << 3) | (1 << 1) | (0), 2268 .subband = { 2269 2, 2270 { 2271 { 240, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0008, 0x0000, 0x0008 } }, /* GPIO 3 to 1 for VHF */ 2272 { 890, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0008, 0x0000, 0x0000 } }, /* GPIO 3 to 0 for UHF */ 2273 { 0 }, 2274 }, 2275 }, 2276 .gpio_function = { 2277 { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_ON, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = (0x10 & ~0x1) | 0x20 }, 2278 { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_OFF, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = 0 | 0x21 }, 2279 }, 2280 }; 2281 2282 static struct dib9000_config nim9090md_config[2] = { 2283 { 2284 .output_mpeg2_in_188_bytes = 1, 2285 .output_mode = OUTMODE_MPEG2_FIFO, 2286 .vcxo_timer = 279620, 2287 .timing_frequency = 20452225, 2288 .demod_clock_khz = 60000, 2289 .xtal_clock_khz = 30000, 2290 .if_drives = (0 << 15) | (1 << 13) | (0 << 12) | (3 << 10) | (0 << 9) | (1 << 7) | (0 << 6) | (0 << 4) | (1 << 3) | (1 << 1) | (0), 2291 }, { 2292 .output_mpeg2_in_188_bytes = 1, 2293 .output_mode = OUTMODE_DIVERSITY, 2294 .vcxo_timer = 279620, 2295 .timing_frequency = 20452225, 2296 .demod_clock_khz = 60000, 2297 .xtal_clock_khz = 30000, 2298 .if_drives = (0 << 15) | (1 << 13) | (0 << 12) | (3 << 10) | (0 << 9) | (1 << 7) | (0 << 6) | (0 << 4) | (1 << 3) | (1 << 1) | (0), 2299 .subband = { 2300 2, 2301 { 2302 { 240, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0006, 0x0000, 0x0006 } }, /* GPIO 1 and 2 to 1 for VHF */ 2303 { 890, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0006, 0x0000, 0x0000 } }, /* GPIO 1 and 2 to 0 for UHF */ 2304 { 0 }, 2305 }, 2306 }, 2307 .gpio_function = { 2308 { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_ON, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = (0x10 & ~0x1) | 0x20 }, 2309 { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_OFF, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = 0 | 0x21 }, 2310 }, 2311 } 2312 }; 2313 2314 static struct dib0090_config dib9090_dib0090_config = { 2315 .io.pll_bypass = 0, 2316 .io.pll_range = 1, 2317 .io.pll_prediv = 1, 2318 .io.pll_loopdiv = 8, 2319 .io.adc_clock_ratio = 8, 2320 .io.pll_int_loop_filt = 0, 2321 .io.clock_khz = 30000, 2322 .reset = dib90x0_tuner_reset, 2323 .sleep = dib90x0_tuner_sleep, 2324 .clkouttobamse = 0, 2325 .analog_output = 0, 2326 .use_pwm_agc = 0, 2327 .clkoutdrive = 0, 2328 .freq_offset_khz_uhf = 0, 2329 .freq_offset_khz_vhf = 0, 2330 }; 2331 2332 static struct dib0090_config nim9090md_dib0090_config[2] = { 2333 { 2334 .io.pll_bypass = 0, 2335 .io.pll_range = 1, 2336 .io.pll_prediv = 1, 2337 .io.pll_loopdiv = 8, 2338 .io.adc_clock_ratio = 8, 2339 .io.pll_int_loop_filt = 0, 2340 .io.clock_khz = 30000, 2341 .reset = dib90x0_tuner_reset, 2342 .sleep = dib90x0_tuner_sleep, 2343 .clkouttobamse = 1, 2344 .analog_output = 0, 2345 .use_pwm_agc = 0, 2346 .clkoutdrive = 0, 2347 .freq_offset_khz_uhf = 0, 2348 .freq_offset_khz_vhf = 0, 2349 }, { 2350 .io.pll_bypass = 0, 2351 .io.pll_range = 1, 2352 .io.pll_prediv = 1, 2353 .io.pll_loopdiv = 8, 2354 .io.adc_clock_ratio = 8, 2355 .io.pll_int_loop_filt = 0, 2356 .io.clock_khz = 30000, 2357 .reset = dib90x0_tuner_reset, 2358 .sleep = dib90x0_tuner_sleep, 2359 .clkouttobamse = 0, 2360 .analog_output = 0, 2361 .use_pwm_agc = 0, 2362 .clkoutdrive = 0, 2363 .freq_offset_khz_uhf = 0, 2364 .freq_offset_khz_vhf = 0, 2365 } 2366 }; 2367 2368 2369 static int stk9090m_frontend_attach(struct dvb_usb_adapter *adap) 2370 { 2371 struct dib0700_adapter_state *state = adap->priv; 2372 struct dib0700_state *st = adap->dev->priv; 2373 u32 fw_version; 2374 2375 /* Make use of the new i2c functions from FW 1.20 */ 2376 dib0700_get_version(adap->dev, NULL, NULL, &fw_version, NULL); 2377 if (fw_version >= 0x10200) 2378 st->fw_use_new_i2c_api = 1; 2379 dib0700_set_i2c_speed(adap->dev, 340); 2380 2381 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); 2382 msleep(20); 2383 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1); 2384 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1); 2385 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1); 2386 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); 2387 2388 dib0700_ctrl_clock(adap->dev, 72, 1); 2389 2390 msleep(20); 2391 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); 2392 msleep(20); 2393 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1); 2394 2395 dib9000_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, 0x80); 2396 2397 if (request_firmware(&state->frontend_firmware, "dib9090.fw", &adap->dev->udev->dev)) { 2398 deb_info("%s: Upload failed. (file not found?)\n", __func__); 2399 return -ENODEV; 2400 } else { 2401 deb_info("%s: firmware read %Zu bytes.\n", __func__, state->frontend_firmware->size); 2402 } 2403 stk9090m_config.microcode_B_fe_size = state->frontend_firmware->size; 2404 stk9090m_config.microcode_B_fe_buffer = state->frontend_firmware->data; 2405 2406 adap->fe_adap[0].fe = dvb_attach(dib9000_attach, &adap->dev->i2c_adap, 0x80, &stk9090m_config); 2407 2408 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0; 2409 } 2410 2411 static int dib9090_tuner_attach(struct dvb_usb_adapter *adap) 2412 { 2413 struct dib0700_adapter_state *state = adap->priv; 2414 struct i2c_adapter *i2c = dib9000_get_tuner_interface(adap->fe_adap[0].fe); 2415 u16 data_dib190[10] = { 2416 1, 0x1374, 2417 2, 0x01a2, 2418 7, 0x0020, 2419 0, 0x00ef, 2420 8, 0x0486, 2421 }; 2422 2423 if (dvb_attach(dib0090_fw_register, adap->fe_adap[0].fe, i2c, &dib9090_dib0090_config) == NULL) 2424 return -ENODEV; 2425 i2c = dib9000_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_1_2, 0); 2426 if (dib01x0_pmu_update(i2c, data_dib190, 10) != 0) 2427 return -ENODEV; 2428 dib0700_set_i2c_speed(adap->dev, 1500); 2429 if (dib9000_firmware_post_pll_init(adap->fe_adap[0].fe) < 0) 2430 return -ENODEV; 2431 release_firmware(state->frontend_firmware); 2432 return 0; 2433 } 2434 2435 static int nim9090md_frontend_attach(struct dvb_usb_adapter *adap) 2436 { 2437 struct dib0700_adapter_state *state = adap->priv; 2438 struct dib0700_state *st = adap->dev->priv; 2439 struct i2c_adapter *i2c; 2440 struct dvb_frontend *fe_slave; 2441 u32 fw_version; 2442 2443 /* Make use of the new i2c functions from FW 1.20 */ 2444 dib0700_get_version(adap->dev, NULL, NULL, &fw_version, NULL); 2445 if (fw_version >= 0x10200) 2446 st->fw_use_new_i2c_api = 1; 2447 dib0700_set_i2c_speed(adap->dev, 340); 2448 2449 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); 2450 msleep(20); 2451 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1); 2452 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1); 2453 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1); 2454 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); 2455 2456 dib0700_ctrl_clock(adap->dev, 72, 1); 2457 2458 msleep(20); 2459 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); 2460 msleep(20); 2461 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1); 2462 2463 if (request_firmware(&state->frontend_firmware, "dib9090.fw", &adap->dev->udev->dev)) { 2464 deb_info("%s: Upload failed. (file not found?)\n", __func__); 2465 return -EIO; 2466 } else { 2467 deb_info("%s: firmware read %Zu bytes.\n", __func__, state->frontend_firmware->size); 2468 } 2469 nim9090md_config[0].microcode_B_fe_size = state->frontend_firmware->size; 2470 nim9090md_config[0].microcode_B_fe_buffer = state->frontend_firmware->data; 2471 nim9090md_config[1].microcode_B_fe_size = state->frontend_firmware->size; 2472 nim9090md_config[1].microcode_B_fe_buffer = state->frontend_firmware->data; 2473 2474 dib9000_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x20, 0x80); 2475 adap->fe_adap[0].fe = dvb_attach(dib9000_attach, &adap->dev->i2c_adap, 0x80, &nim9090md_config[0]); 2476 2477 if (adap->fe_adap[0].fe == NULL) 2478 return -ENODEV; 2479 2480 i2c = dib9000_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_3_4, 0); 2481 dib9000_i2c_enumeration(i2c, 1, 0x12, 0x82); 2482 2483 fe_slave = dvb_attach(dib9000_attach, i2c, 0x82, &nim9090md_config[1]); 2484 dib9000_set_slave_frontend(adap->fe_adap[0].fe, fe_slave); 2485 2486 return fe_slave == NULL ? -ENODEV : 0; 2487 } 2488 2489 static int nim9090md_tuner_attach(struct dvb_usb_adapter *adap) 2490 { 2491 struct dib0700_adapter_state *state = adap->priv; 2492 struct i2c_adapter *i2c; 2493 struct dvb_frontend *fe_slave; 2494 u16 data_dib190[10] = { 2495 1, 0x5374, 2496 2, 0x01ae, 2497 7, 0x0020, 2498 0, 0x00ef, 2499 8, 0x0406, 2500 }; 2501 i2c = dib9000_get_tuner_interface(adap->fe_adap[0].fe); 2502 if (dvb_attach(dib0090_fw_register, adap->fe_adap[0].fe, i2c, &nim9090md_dib0090_config[0]) == NULL) 2503 return -ENODEV; 2504 i2c = dib9000_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_1_2, 0); 2505 if (dib01x0_pmu_update(i2c, data_dib190, 10) < 0) 2506 return -ENODEV; 2507 2508 dib0700_set_i2c_speed(adap->dev, 1500); 2509 if (dib9000_firmware_post_pll_init(adap->fe_adap[0].fe) < 0) 2510 return -ENODEV; 2511 2512 fe_slave = dib9000_get_slave_frontend(adap->fe_adap[0].fe, 1); 2513 if (fe_slave != NULL) { 2514 i2c = dib9000_get_component_bus_interface(adap->fe_adap[0].fe); 2515 dib9000_set_i2c_adapter(fe_slave, i2c); 2516 2517 i2c = dib9000_get_tuner_interface(fe_slave); 2518 if (dvb_attach(dib0090_fw_register, fe_slave, i2c, &nim9090md_dib0090_config[1]) == NULL) 2519 return -ENODEV; 2520 fe_slave->dvb = adap->fe_adap[0].fe->dvb; 2521 dib9000_fw_set_component_bus_speed(adap->fe_adap[0].fe, 1500); 2522 if (dib9000_firmware_post_pll_init(fe_slave) < 0) 2523 return -ENODEV; 2524 } 2525 release_firmware(state->frontend_firmware); 2526 2527 return 0; 2528 } 2529 2530 /* NIM7090 */ 2531 static int dib7090p_get_best_sampling(struct dvb_frontend *fe , struct dibx090p_best_adc *adc) 2532 { 2533 u8 spur = 0, prediv = 0, loopdiv = 0, min_prediv = 1, max_prediv = 1; 2534 2535 u16 xtal = 12000; 2536 u32 fcp_min = 1900; /* PLL Minimum Frequency comparator KHz */ 2537 u32 fcp_max = 20000; /* PLL Maximum Frequency comparator KHz */ 2538 u32 fdem_max = 76000; 2539 u32 fdem_min = 69500; 2540 u32 fcp = 0, fs = 0, fdem = 0; 2541 u32 harmonic_id = 0; 2542 2543 adc->pll_loopdiv = loopdiv; 2544 adc->pll_prediv = prediv; 2545 adc->timf = 0; 2546 2547 deb_info("bandwidth = %d fdem_min =%d", fe->dtv_property_cache.bandwidth_hz, fdem_min); 2548 2549 /* Find Min and Max prediv */ 2550 while ((xtal/max_prediv) >= fcp_min) 2551 max_prediv++; 2552 2553 max_prediv--; 2554 min_prediv = max_prediv; 2555 while ((xtal/min_prediv) <= fcp_max) { 2556 min_prediv--; 2557 if (min_prediv == 1) 2558 break; 2559 } 2560 deb_info("MIN prediv = %d : MAX prediv = %d", min_prediv, max_prediv); 2561 2562 min_prediv = 2; 2563 2564 for (prediv = min_prediv ; prediv < max_prediv; prediv++) { 2565 fcp = xtal / prediv; 2566 if (fcp > fcp_min && fcp < fcp_max) { 2567 for (loopdiv = 1 ; loopdiv < 64 ; loopdiv++) { 2568 fdem = ((xtal/prediv) * loopdiv); 2569 fs = fdem / 4; 2570 /* test min/max system restrictions */ 2571 2572 if ((fdem >= fdem_min) && (fdem <= fdem_max) && (fs >= fe->dtv_property_cache.bandwidth_hz/1000)) { 2573 spur = 0; 2574 /* test fs harmonics positions */ 2575 for (harmonic_id = (fe->dtv_property_cache.frequency / (1000*fs)) ; harmonic_id <= ((fe->dtv_property_cache.frequency / (1000*fs))+1) ; harmonic_id++) { 2576 if (((fs*harmonic_id) >= ((fe->dtv_property_cache.frequency/1000) - (fe->dtv_property_cache.bandwidth_hz/2000))) && ((fs*harmonic_id) <= ((fe->dtv_property_cache.frequency/1000) + (fe->dtv_property_cache.bandwidth_hz/2000)))) { 2577 spur = 1; 2578 break; 2579 } 2580 } 2581 2582 if (!spur) { 2583 adc->pll_loopdiv = loopdiv; 2584 adc->pll_prediv = prediv; 2585 adc->timf = 2396745143UL/fdem*(1 << 9); 2586 adc->timf += ((2396745143UL%fdem) << 9)/fdem; 2587 deb_info("loopdiv=%i prediv=%i timf=%i", loopdiv, prediv, adc->timf); 2588 break; 2589 } 2590 } 2591 } 2592 } 2593 if (!spur) 2594 break; 2595 } 2596 2597 2598 if (adc->pll_loopdiv == 0 && adc->pll_prediv == 0) 2599 return -EINVAL; 2600 else 2601 return 0; 2602 } 2603 2604 static int dib7090_agc_startup(struct dvb_frontend *fe) 2605 { 2606 struct dvb_usb_adapter *adap = fe->dvb->priv; 2607 struct dib0700_adapter_state *state = adap->priv; 2608 struct dibx000_bandwidth_config pll; 2609 u16 target; 2610 struct dibx090p_best_adc adc; 2611 int ret; 2612 2613 ret = state->set_param_save(fe); 2614 if (ret < 0) 2615 return ret; 2616 2617 memset(&pll, 0, sizeof(struct dibx000_bandwidth_config)); 2618 dib0090_pwm_gain_reset(fe); 2619 target = (dib0090_get_wbd_target(fe) * 8 + 1) / 2; 2620 state->dib7000p_ops.set_wbd_ref(fe, target); 2621 2622 if (dib7090p_get_best_sampling(fe, &adc) == 0) { 2623 pll.pll_ratio = adc.pll_loopdiv; 2624 pll.pll_prediv = adc.pll_prediv; 2625 2626 state->dib7000p_ops.update_pll(fe, &pll); 2627 state->dib7000p_ops.ctrl_timf(fe, DEMOD_TIMF_SET, adc.timf); 2628 } 2629 return 0; 2630 } 2631 2632 static int dib7090_agc_restart(struct dvb_frontend *fe, u8 restart) 2633 { 2634 deb_info("AGC restart callback: %d", restart); 2635 if (restart == 0) /* before AGC startup */ 2636 dib0090_set_dc_servo(fe, 1); 2637 return 0; 2638 } 2639 2640 static int tfe7790p_update_lna(struct dvb_frontend *fe, u16 agc_global) 2641 { 2642 struct dvb_usb_adapter *adap = fe->dvb->priv; 2643 struct dib0700_adapter_state *state = adap->priv; 2644 2645 deb_info("update LNA: agc global=%i", agc_global); 2646 2647 if (agc_global < 25000) { 2648 state->dib7000p_ops.set_gpio(fe, 8, 0, 0); 2649 state->dib7000p_ops.set_agc1_min(fe, 0); 2650 } else { 2651 state->dib7000p_ops.set_gpio(fe, 8, 0, 1); 2652 state->dib7000p_ops.set_agc1_min(fe, 32768); 2653 } 2654 2655 return 0; 2656 } 2657 2658 static struct dib0090_wbd_slope dib7090_wbd_table[] = { 2659 { 380, 81, 850, 64, 540, 4}, 2660 { 860, 51, 866, 21, 375, 4}, 2661 {1700, 0, 250, 0, 100, 6}, 2662 {2600, 0, 250, 0, 100, 6}, 2663 { 0xFFFF, 0, 0, 0, 0, 0}, 2664 }; 2665 2666 static struct dibx000_agc_config dib7090_agc_config[2] = { 2667 { 2668 .band_caps = BAND_UHF, 2669 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, 2670 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */ 2671 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0), 2672 2673 .inv_gain = 687, 2674 .time_stabiliz = 10, 2675 2676 .alpha_level = 0, 2677 .thlock = 118, 2678 2679 .wbd_inv = 0, 2680 .wbd_ref = 1200, 2681 .wbd_sel = 3, 2682 .wbd_alpha = 5, 2683 2684 .agc1_max = 65535, 2685 .agc1_min = 32768, 2686 2687 .agc2_max = 65535, 2688 .agc2_min = 0, 2689 2690 .agc1_pt1 = 0, 2691 .agc1_pt2 = 32, 2692 .agc1_pt3 = 114, 2693 .agc1_slope1 = 143, 2694 .agc1_slope2 = 144, 2695 .agc2_pt1 = 114, 2696 .agc2_pt2 = 227, 2697 .agc2_slope1 = 116, 2698 .agc2_slope2 = 117, 2699 2700 .alpha_mant = 18, 2701 .alpha_exp = 0, 2702 .beta_mant = 20, 2703 .beta_exp = 59, 2704 2705 .perform_agc_softsplit = 0, 2706 } , { 2707 .band_caps = BAND_FM | BAND_VHF | BAND_CBAND, 2708 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, 2709 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */ 2710 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0), 2711 2712 .inv_gain = 732, 2713 .time_stabiliz = 10, 2714 2715 .alpha_level = 0, 2716 .thlock = 118, 2717 2718 .wbd_inv = 0, 2719 .wbd_ref = 1200, 2720 .wbd_sel = 3, 2721 .wbd_alpha = 5, 2722 2723 .agc1_max = 65535, 2724 .agc1_min = 0, 2725 2726 .agc2_max = 65535, 2727 .agc2_min = 0, 2728 2729 .agc1_pt1 = 0, 2730 .agc1_pt2 = 0, 2731 .agc1_pt3 = 98, 2732 .agc1_slope1 = 0, 2733 .agc1_slope2 = 167, 2734 .agc2_pt1 = 98, 2735 .agc2_pt2 = 255, 2736 .agc2_slope1 = 104, 2737 .agc2_slope2 = 0, 2738 2739 .alpha_mant = 18, 2740 .alpha_exp = 0, 2741 .beta_mant = 20, 2742 .beta_exp = 59, 2743 2744 .perform_agc_softsplit = 0, 2745 } 2746 }; 2747 2748 static struct dibx000_bandwidth_config dib7090_clock_config_12_mhz = { 2749 .internal = 60000, 2750 .sampling = 15000, 2751 .pll_prediv = 1, 2752 .pll_ratio = 5, 2753 .pll_range = 0, 2754 .pll_reset = 0, 2755 .pll_bypass = 0, 2756 .enable_refdiv = 0, 2757 .bypclk_div = 0, 2758 .IO_CLK_en_core = 1, 2759 .ADClkSrc = 1, 2760 .modulo = 2, 2761 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0), 2762 .ifreq = (0 << 25) | 0, 2763 .timf = 20452225, 2764 .xtal_hz = 15000000, 2765 }; 2766 2767 static struct dib7000p_config nim7090_dib7000p_config = { 2768 .output_mpeg2_in_188_bytes = 1, 2769 .hostbus_diversity = 1, 2770 .tuner_is_baseband = 1, 2771 .update_lna = tfe7790p_update_lna, /* GPIO used is the same as TFE7790 */ 2772 2773 .agc_config_count = 2, 2774 .agc = dib7090_agc_config, 2775 2776 .bw = &dib7090_clock_config_12_mhz, 2777 2778 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS, 2779 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES, 2780 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS, 2781 2782 .pwm_freq_div = 0, 2783 2784 .agc_control = dib7090_agc_restart, 2785 2786 .spur_protect = 0, 2787 .disable_sample_and_hold = 0, 2788 .enable_current_mirror = 0, 2789 .diversity_delay = 0, 2790 2791 .output_mode = OUTMODE_MPEG2_FIFO, 2792 .enMpegOutput = 1, 2793 }; 2794 2795 static int tfe7090p_pvr_update_lna(struct dvb_frontend *fe, u16 agc_global) 2796 { 2797 struct dvb_usb_adapter *adap = fe->dvb->priv; 2798 struct dib0700_adapter_state *state = adap->priv; 2799 2800 deb_info("TFE7090P-PVR update LNA: agc global=%i", agc_global); 2801 if (agc_global < 25000) { 2802 state->dib7000p_ops.set_gpio(fe, 5, 0, 0); 2803 state->dib7000p_ops.set_agc1_min(fe, 0); 2804 } else { 2805 state->dib7000p_ops.set_gpio(fe, 5, 0, 1); 2806 state->dib7000p_ops.set_agc1_min(fe, 32768); 2807 } 2808 2809 return 0; 2810 } 2811 2812 static struct dib7000p_config tfe7090pvr_dib7000p_config[2] = { 2813 { 2814 .output_mpeg2_in_188_bytes = 1, 2815 .hostbus_diversity = 1, 2816 .tuner_is_baseband = 1, 2817 .update_lna = tfe7090p_pvr_update_lna, 2818 2819 .agc_config_count = 2, 2820 .agc = dib7090_agc_config, 2821 2822 .bw = &dib7090_clock_config_12_mhz, 2823 2824 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS, 2825 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES, 2826 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS, 2827 2828 .pwm_freq_div = 0, 2829 2830 .agc_control = dib7090_agc_restart, 2831 2832 .spur_protect = 0, 2833 .disable_sample_and_hold = 0, 2834 .enable_current_mirror = 0, 2835 .diversity_delay = 0, 2836 2837 .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK, 2838 .default_i2c_addr = 0x90, 2839 .enMpegOutput = 1, 2840 }, { 2841 .output_mpeg2_in_188_bytes = 1, 2842 .hostbus_diversity = 1, 2843 .tuner_is_baseband = 1, 2844 .update_lna = tfe7090p_pvr_update_lna, 2845 2846 .agc_config_count = 2, 2847 .agc = dib7090_agc_config, 2848 2849 .bw = &dib7090_clock_config_12_mhz, 2850 2851 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS, 2852 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES, 2853 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS, 2854 2855 .pwm_freq_div = 0, 2856 2857 .agc_control = dib7090_agc_restart, 2858 2859 .spur_protect = 0, 2860 .disable_sample_and_hold = 0, 2861 .enable_current_mirror = 0, 2862 .diversity_delay = 0, 2863 2864 .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK, 2865 .default_i2c_addr = 0x92, 2866 .enMpegOutput = 0, 2867 } 2868 }; 2869 2870 static struct dib0090_config nim7090_dib0090_config = { 2871 .io.clock_khz = 12000, 2872 .io.pll_bypass = 0, 2873 .io.pll_range = 0, 2874 .io.pll_prediv = 3, 2875 .io.pll_loopdiv = 6, 2876 .io.adc_clock_ratio = 0, 2877 .io.pll_int_loop_filt = 0, 2878 2879 .freq_offset_khz_uhf = 0, 2880 .freq_offset_khz_vhf = 0, 2881 2882 .clkouttobamse = 1, 2883 .analog_output = 0, 2884 2885 .wbd_vhf_offset = 0, 2886 .wbd_cband_offset = 0, 2887 .use_pwm_agc = 1, 2888 .clkoutdrive = 0, 2889 2890 .fref_clock_ratio = 0, 2891 2892 .wbd = dib7090_wbd_table, 2893 2894 .ls_cfg_pad_drv = 0, 2895 .data_tx_drv = 0, 2896 .low_if = NULL, 2897 .in_soc = 1, 2898 }; 2899 2900 static struct dib7000p_config tfe7790p_dib7000p_config = { 2901 .output_mpeg2_in_188_bytes = 1, 2902 .hostbus_diversity = 1, 2903 .tuner_is_baseband = 1, 2904 .update_lna = tfe7790p_update_lna, 2905 2906 .agc_config_count = 2, 2907 .agc = dib7090_agc_config, 2908 2909 .bw = &dib7090_clock_config_12_mhz, 2910 2911 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS, 2912 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES, 2913 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS, 2914 2915 .pwm_freq_div = 0, 2916 2917 .agc_control = dib7090_agc_restart, 2918 2919 .spur_protect = 0, 2920 .disable_sample_and_hold = 0, 2921 .enable_current_mirror = 0, 2922 .diversity_delay = 0, 2923 2924 .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK, 2925 .enMpegOutput = 1, 2926 }; 2927 2928 static struct dib0090_config tfe7790p_dib0090_config = { 2929 .io.clock_khz = 12000, 2930 .io.pll_bypass = 0, 2931 .io.pll_range = 0, 2932 .io.pll_prediv = 3, 2933 .io.pll_loopdiv = 6, 2934 .io.adc_clock_ratio = 0, 2935 .io.pll_int_loop_filt = 0, 2936 2937 .freq_offset_khz_uhf = 0, 2938 .freq_offset_khz_vhf = 0, 2939 2940 .clkouttobamse = 1, 2941 .analog_output = 0, 2942 2943 .wbd_vhf_offset = 0, 2944 .wbd_cband_offset = 0, 2945 .use_pwm_agc = 1, 2946 .clkoutdrive = 0, 2947 2948 .fref_clock_ratio = 0, 2949 2950 .wbd = dib7090_wbd_table, 2951 2952 .ls_cfg_pad_drv = 0, 2953 .data_tx_drv = 0, 2954 .low_if = NULL, 2955 .in_soc = 1, 2956 .force_cband_input = 0, 2957 .is_dib7090e = 0, 2958 .force_crystal_mode = 1, 2959 }; 2960 2961 static struct dib0090_config tfe7090pvr_dib0090_config[2] = { 2962 { 2963 .io.clock_khz = 12000, 2964 .io.pll_bypass = 0, 2965 .io.pll_range = 0, 2966 .io.pll_prediv = 3, 2967 .io.pll_loopdiv = 6, 2968 .io.adc_clock_ratio = 0, 2969 .io.pll_int_loop_filt = 0, 2970 2971 .freq_offset_khz_uhf = 50, 2972 .freq_offset_khz_vhf = 70, 2973 2974 .clkouttobamse = 1, 2975 .analog_output = 0, 2976 2977 .wbd_vhf_offset = 0, 2978 .wbd_cband_offset = 0, 2979 .use_pwm_agc = 1, 2980 .clkoutdrive = 0, 2981 2982 .fref_clock_ratio = 0, 2983 2984 .wbd = dib7090_wbd_table, 2985 2986 .ls_cfg_pad_drv = 0, 2987 .data_tx_drv = 0, 2988 .low_if = NULL, 2989 .in_soc = 1, 2990 }, { 2991 .io.clock_khz = 12000, 2992 .io.pll_bypass = 0, 2993 .io.pll_range = 0, 2994 .io.pll_prediv = 3, 2995 .io.pll_loopdiv = 6, 2996 .io.adc_clock_ratio = 0, 2997 .io.pll_int_loop_filt = 0, 2998 2999 .freq_offset_khz_uhf = -50, 3000 .freq_offset_khz_vhf = -70, 3001 3002 .clkouttobamse = 1, 3003 .analog_output = 0, 3004 3005 .wbd_vhf_offset = 0, 3006 .wbd_cband_offset = 0, 3007 .use_pwm_agc = 1, 3008 .clkoutdrive = 0, 3009 3010 .fref_clock_ratio = 0, 3011 3012 .wbd = dib7090_wbd_table, 3013 3014 .ls_cfg_pad_drv = 0, 3015 .data_tx_drv = 0, 3016 .low_if = NULL, 3017 .in_soc = 1, 3018 } 3019 }; 3020 3021 static int nim7090_frontend_attach(struct dvb_usb_adapter *adap) 3022 { 3023 struct dib0700_adapter_state *state = adap->priv; 3024 3025 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops)) 3026 return -ENODEV; 3027 3028 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); 3029 msleep(20); 3030 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1); 3031 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1); 3032 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1); 3033 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); 3034 3035 msleep(20); 3036 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); 3037 msleep(20); 3038 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1); 3039 3040 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, &nim7090_dib7000p_config) != 0) { 3041 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__); 3042 dvb_detach(&state->dib7000p_ops); 3043 return -ENODEV; 3044 } 3045 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80, &nim7090_dib7000p_config); 3046 3047 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0; 3048 } 3049 3050 static int nim7090_tuner_attach(struct dvb_usb_adapter *adap) 3051 { 3052 struct dib0700_adapter_state *st = adap->priv; 3053 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe); 3054 3055 nim7090_dib0090_config.reset = st->dib7000p_ops.tuner_sleep, 3056 nim7090_dib0090_config.sleep = st->dib7000p_ops.tuner_sleep, 3057 nim7090_dib0090_config.get_adc_power = st->dib7000p_ops.get_adc_power; 3058 3059 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &nim7090_dib0090_config) == NULL) 3060 return -ENODEV; 3061 3062 st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1); 3063 3064 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params; 3065 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup; 3066 return 0; 3067 } 3068 3069 static int tfe7090pvr_frontend0_attach(struct dvb_usb_adapter *adap) 3070 { 3071 struct dib0700_state *st = adap->dev->priv; 3072 struct dib0700_adapter_state *state = adap->priv; 3073 3074 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops)) 3075 return -ENODEV; 3076 3077 /* The TFE7090 requires the dib0700 to not be in master mode */ 3078 st->disable_streaming_master_mode = 1; 3079 3080 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); 3081 msleep(20); 3082 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1); 3083 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1); 3084 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1); 3085 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); 3086 3087 msleep(20); 3088 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); 3089 msleep(20); 3090 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1); 3091 3092 /* initialize IC 0 */ 3093 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x20, &tfe7090pvr_dib7000p_config[0]) != 0) { 3094 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__); 3095 dvb_detach(&state->dib7000p_ops); 3096 return -ENODEV; 3097 } 3098 3099 dib0700_set_i2c_speed(adap->dev, 340); 3100 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x90, &tfe7090pvr_dib7000p_config[0]); 3101 if (adap->fe_adap[0].fe == NULL) 3102 return -ENODEV; 3103 3104 state->dib7000p_ops.slave_reset(adap->fe_adap[0].fe); 3105 3106 return 0; 3107 } 3108 3109 static int tfe7090pvr_frontend1_attach(struct dvb_usb_adapter *adap) 3110 { 3111 struct i2c_adapter *i2c; 3112 struct dib0700_adapter_state *state = adap->priv; 3113 3114 if (adap->dev->adapter[0].fe_adap[0].fe == NULL) { 3115 err("the master dib7090 has to be initialized first"); 3116 return -ENODEV; /* the master device has not been initialized */ 3117 } 3118 3119 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops)) 3120 return -ENODEV; 3121 3122 i2c = state->dib7000p_ops.get_i2c_master(adap->dev->adapter[0].fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_6_7, 1); 3123 if (state->dib7000p_ops.i2c_enumeration(i2c, 1, 0x10, &tfe7090pvr_dib7000p_config[1]) != 0) { 3124 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__); 3125 dvb_detach(&state->dib7000p_ops); 3126 return -ENODEV; 3127 } 3128 3129 adap->fe_adap[0].fe = state->dib7000p_ops.init(i2c, 0x92, &tfe7090pvr_dib7000p_config[1]); 3130 dib0700_set_i2c_speed(adap->dev, 200); 3131 3132 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0; 3133 } 3134 3135 static int tfe7090pvr_tuner0_attach(struct dvb_usb_adapter *adap) 3136 { 3137 struct dib0700_adapter_state *st = adap->priv; 3138 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe); 3139 3140 tfe7090pvr_dib0090_config[0].reset = st->dib7000p_ops.tuner_sleep; 3141 tfe7090pvr_dib0090_config[0].sleep = st->dib7000p_ops.tuner_sleep; 3142 tfe7090pvr_dib0090_config[0].get_adc_power = st->dib7000p_ops.get_adc_power; 3143 3144 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &tfe7090pvr_dib0090_config[0]) == NULL) 3145 return -ENODEV; 3146 3147 st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1); 3148 3149 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params; 3150 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup; 3151 return 0; 3152 } 3153 3154 static int tfe7090pvr_tuner1_attach(struct dvb_usb_adapter *adap) 3155 { 3156 struct dib0700_adapter_state *st = adap->priv; 3157 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe); 3158 3159 tfe7090pvr_dib0090_config[1].reset = st->dib7000p_ops.tuner_sleep; 3160 tfe7090pvr_dib0090_config[1].sleep = st->dib7000p_ops.tuner_sleep; 3161 tfe7090pvr_dib0090_config[1].get_adc_power = st->dib7000p_ops.get_adc_power; 3162 3163 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &tfe7090pvr_dib0090_config[1]) == NULL) 3164 return -ENODEV; 3165 3166 st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1); 3167 3168 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params; 3169 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup; 3170 return 0; 3171 } 3172 3173 static int tfe7790p_frontend_attach(struct dvb_usb_adapter *adap) 3174 { 3175 struct dib0700_state *st = adap->dev->priv; 3176 struct dib0700_adapter_state *state = adap->priv; 3177 3178 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops)) 3179 return -ENODEV; 3180 3181 /* The TFE7790P requires the dib0700 to not be in master mode */ 3182 st->disable_streaming_master_mode = 1; 3183 3184 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); 3185 msleep(20); 3186 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1); 3187 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1); 3188 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1); 3189 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); 3190 msleep(20); 3191 dib0700_ctrl_clock(adap->dev, 72, 1); 3192 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); 3193 msleep(20); 3194 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1); 3195 3196 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 3197 1, 0x10, &tfe7790p_dib7000p_config) != 0) { 3198 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", 3199 __func__); 3200 dvb_detach(&state->dib7000p_ops); 3201 return -ENODEV; 3202 } 3203 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 3204 0x80, &tfe7790p_dib7000p_config); 3205 3206 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0; 3207 } 3208 3209 static int tfe7790p_tuner_attach(struct dvb_usb_adapter *adap) 3210 { 3211 struct dib0700_adapter_state *st = adap->priv; 3212 struct i2c_adapter *tun_i2c = 3213 st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe); 3214 3215 3216 tfe7790p_dib0090_config.reset = st->dib7000p_ops.tuner_sleep; 3217 tfe7790p_dib0090_config.sleep = st->dib7000p_ops.tuner_sleep; 3218 tfe7790p_dib0090_config.get_adc_power = st->dib7000p_ops.get_adc_power; 3219 3220 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, 3221 &tfe7790p_dib0090_config) == NULL) 3222 return -ENODEV; 3223 3224 st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1); 3225 3226 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params; 3227 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup; 3228 return 0; 3229 } 3230 3231 /* STK7070PD */ 3232 static struct dib7000p_config stk7070pd_dib7000p_config[2] = { 3233 { 3234 .output_mpeg2_in_188_bytes = 1, 3235 3236 .agc_config_count = 1, 3237 .agc = &dib7070_agc_config, 3238 .bw = &dib7070_bw_config_12_mhz, 3239 .tuner_is_baseband = 1, 3240 .spur_protect = 1, 3241 3242 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS, 3243 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES, 3244 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS, 3245 3246 .hostbus_diversity = 1, 3247 }, { 3248 .output_mpeg2_in_188_bytes = 1, 3249 3250 .agc_config_count = 1, 3251 .agc = &dib7070_agc_config, 3252 .bw = &dib7070_bw_config_12_mhz, 3253 .tuner_is_baseband = 1, 3254 .spur_protect = 1, 3255 3256 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS, 3257 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES, 3258 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS, 3259 3260 .hostbus_diversity = 1, 3261 } 3262 }; 3263 3264 static void stk7070pd_init(struct dvb_usb_device *dev) 3265 { 3266 dib0700_set_gpio(dev, GPIO6, GPIO_OUT, 1); 3267 msleep(10); 3268 dib0700_set_gpio(dev, GPIO9, GPIO_OUT, 1); 3269 dib0700_set_gpio(dev, GPIO4, GPIO_OUT, 1); 3270 dib0700_set_gpio(dev, GPIO7, GPIO_OUT, 1); 3271 dib0700_set_gpio(dev, GPIO10, GPIO_OUT, 0); 3272 3273 dib0700_ctrl_clock(dev, 72, 1); 3274 3275 msleep(10); 3276 dib0700_set_gpio(dev, GPIO10, GPIO_OUT, 1); 3277 } 3278 3279 static int stk7070pd_frontend_attach0(struct dvb_usb_adapter *adap) 3280 { 3281 struct dib0700_adapter_state *state = adap->priv; 3282 3283 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops)) 3284 return -ENODEV; 3285 3286 stk7070pd_init(adap->dev); 3287 3288 msleep(10); 3289 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1); 3290 3291 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 2, 18, 3292 stk7070pd_dib7000p_config) != 0) { 3293 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", 3294 __func__); 3295 dvb_detach(&state->dib7000p_ops); 3296 return -ENODEV; 3297 } 3298 3299 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80, &stk7070pd_dib7000p_config[0]); 3300 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0; 3301 } 3302 3303 static int stk7070pd_frontend_attach1(struct dvb_usb_adapter *adap) 3304 { 3305 struct dib0700_adapter_state *state = adap->priv; 3306 3307 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops)) 3308 return -ENODEV; 3309 3310 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x82, &stk7070pd_dib7000p_config[1]); 3311 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0; 3312 } 3313 3314 static int novatd_read_status_override(struct dvb_frontend *fe, 3315 fe_status_t *stat) 3316 { 3317 struct dvb_usb_adapter *adap = fe->dvb->priv; 3318 struct dvb_usb_device *dev = adap->dev; 3319 struct dib0700_state *state = dev->priv; 3320 int ret; 3321 3322 ret = state->read_status(fe, stat); 3323 3324 if (!ret) 3325 dib0700_set_gpio(dev, adap->id == 0 ? GPIO1 : GPIO0, GPIO_OUT, 3326 !!(*stat & FE_HAS_LOCK)); 3327 3328 return ret; 3329 } 3330 3331 static int novatd_sleep_override(struct dvb_frontend* fe) 3332 { 3333 struct dvb_usb_adapter *adap = fe->dvb->priv; 3334 struct dvb_usb_device *dev = adap->dev; 3335 struct dib0700_state *state = dev->priv; 3336 3337 /* turn off LED */ 3338 dib0700_set_gpio(dev, adap->id == 0 ? GPIO1 : GPIO0, GPIO_OUT, 0); 3339 3340 return state->sleep(fe); 3341 } 3342 3343 /** 3344 * novatd_frontend_attach - Nova-TD specific attach 3345 * 3346 * Nova-TD has GPIO0, 1 and 2 for LEDs. So do not fiddle with them except for 3347 * information purposes. 3348 */ 3349 static int novatd_frontend_attach(struct dvb_usb_adapter *adap) 3350 { 3351 struct dvb_usb_device *dev = adap->dev; 3352 struct dib0700_state *st = dev->priv; 3353 struct dib0700_adapter_state *state = adap->priv; 3354 3355 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops)) 3356 return -ENODEV; 3357 3358 if (adap->id == 0) { 3359 stk7070pd_init(dev); 3360 3361 /* turn the power LED on, the other two off (just in case) */ 3362 dib0700_set_gpio(dev, GPIO0, GPIO_OUT, 0); 3363 dib0700_set_gpio(dev, GPIO1, GPIO_OUT, 0); 3364 dib0700_set_gpio(dev, GPIO2, GPIO_OUT, 1); 3365 3366 if (state->dib7000p_ops.i2c_enumeration(&dev->i2c_adap, 2, 18, 3367 stk7070pd_dib7000p_config) != 0) { 3368 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", 3369 __func__); 3370 dvb_detach(&state->dib7000p_ops); 3371 return -ENODEV; 3372 } 3373 } 3374 3375 adap->fe_adap[0].fe = state->dib7000p_ops.init(&dev->i2c_adap, 3376 adap->id == 0 ? 0x80 : 0x82, 3377 &stk7070pd_dib7000p_config[adap->id]); 3378 3379 if (adap->fe_adap[0].fe == NULL) 3380 return -ENODEV; 3381 3382 st->read_status = adap->fe_adap[0].fe->ops.read_status; 3383 adap->fe_adap[0].fe->ops.read_status = novatd_read_status_override; 3384 st->sleep = adap->fe_adap[0].fe->ops.sleep; 3385 adap->fe_adap[0].fe->ops.sleep = novatd_sleep_override; 3386 3387 return 0; 3388 } 3389 3390 /* S5H1411 */ 3391 static struct s5h1411_config pinnacle_801e_config = { 3392 .output_mode = S5H1411_PARALLEL_OUTPUT, 3393 .gpio = S5H1411_GPIO_OFF, 3394 .mpeg_timing = S5H1411_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK, 3395 .qam_if = S5H1411_IF_44000, 3396 .vsb_if = S5H1411_IF_44000, 3397 .inversion = S5H1411_INVERSION_OFF, 3398 .status_mode = S5H1411_DEMODLOCKING 3399 }; 3400 3401 /* Pinnacle PCTV HD Pro 801e GPIOs map: 3402 GPIO0 - currently unknown 3403 GPIO1 - xc5000 tuner reset 3404 GPIO2 - CX25843 sleep 3405 GPIO3 - currently unknown 3406 GPIO4 - currently unknown 3407 GPIO6 - currently unknown 3408 GPIO7 - currently unknown 3409 GPIO9 - currently unknown 3410 GPIO10 - CX25843 reset 3411 */ 3412 static int s5h1411_frontend_attach(struct dvb_usb_adapter *adap) 3413 { 3414 struct dib0700_state *st = adap->dev->priv; 3415 3416 /* Make use of the new i2c functions from FW 1.20 */ 3417 st->fw_use_new_i2c_api = 1; 3418 3419 /* The s5h1411 requires the dib0700 to not be in master mode */ 3420 st->disable_streaming_master_mode = 1; 3421 3422 /* All msleep values taken from Windows USB trace */ 3423 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 0); 3424 dib0700_set_gpio(adap->dev, GPIO3, GPIO_OUT, 0); 3425 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); 3426 msleep(400); 3427 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); 3428 msleep(60); 3429 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); 3430 msleep(30); 3431 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1); 3432 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1); 3433 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1); 3434 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1); 3435 dib0700_set_gpio(adap->dev, GPIO2, GPIO_OUT, 0); 3436 msleep(30); 3437 3438 /* Put the CX25843 to sleep for now since we're in digital mode */ 3439 dib0700_set_gpio(adap->dev, GPIO2, GPIO_OUT, 1); 3440 3441 /* GPIOs are initialized, do the attach */ 3442 adap->fe_adap[0].fe = dvb_attach(s5h1411_attach, &pinnacle_801e_config, 3443 &adap->dev->i2c_adap); 3444 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0; 3445 } 3446 3447 static int dib0700_xc5000_tuner_callback(void *priv, int component, 3448 int command, int arg) 3449 { 3450 struct dvb_usb_adapter *adap = priv; 3451 3452 if (command == XC5000_TUNER_RESET) { 3453 /* Reset the tuner */ 3454 dib0700_set_gpio(adap->dev, GPIO1, GPIO_OUT, 0); 3455 msleep(10); 3456 dib0700_set_gpio(adap->dev, GPIO1, GPIO_OUT, 1); 3457 msleep(10); 3458 } else { 3459 err("xc5000: unknown tuner callback command: %d\n", command); 3460 return -EINVAL; 3461 } 3462 3463 return 0; 3464 } 3465 3466 static struct xc5000_config s5h1411_xc5000_tunerconfig = { 3467 .i2c_address = 0x64, 3468 .if_khz = 5380, 3469 }; 3470 3471 static int xc5000_tuner_attach(struct dvb_usb_adapter *adap) 3472 { 3473 /* FIXME: generalize & move to common area */ 3474 adap->fe_adap[0].fe->callback = dib0700_xc5000_tuner_callback; 3475 3476 return dvb_attach(xc5000_attach, adap->fe_adap[0].fe, &adap->dev->i2c_adap, 3477 &s5h1411_xc5000_tunerconfig) 3478 == NULL ? -ENODEV : 0; 3479 } 3480 3481 static int dib0700_xc4000_tuner_callback(void *priv, int component, 3482 int command, int arg) 3483 { 3484 struct dvb_usb_adapter *adap = priv; 3485 struct dib0700_adapter_state *state = adap->priv; 3486 3487 if (command == XC4000_TUNER_RESET) { 3488 /* Reset the tuner */ 3489 state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 0); 3490 msleep(10); 3491 state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1); 3492 } else { 3493 err("xc4000: unknown tuner callback command: %d\n", command); 3494 return -EINVAL; 3495 } 3496 3497 return 0; 3498 } 3499 3500 static struct dibx000_agc_config stk7700p_7000p_xc4000_agc_config = { 3501 .band_caps = BAND_UHF | BAND_VHF, 3502 .setup = 0x64, 3503 .inv_gain = 0x02c8, 3504 .time_stabiliz = 0x15, 3505 .alpha_level = 0x00, 3506 .thlock = 0x76, 3507 .wbd_inv = 0x01, 3508 .wbd_ref = 0x0b33, 3509 .wbd_sel = 0x00, 3510 .wbd_alpha = 0x02, 3511 .agc1_max = 0x00, 3512 .agc1_min = 0x00, 3513 .agc2_max = 0x9b26, 3514 .agc2_min = 0x26ca, 3515 .agc1_pt1 = 0x00, 3516 .agc1_pt2 = 0x00, 3517 .agc1_pt3 = 0x00, 3518 .agc1_slope1 = 0x00, 3519 .agc1_slope2 = 0x00, 3520 .agc2_pt1 = 0x00, 3521 .agc2_pt2 = 0x80, 3522 .agc2_slope1 = 0x1d, 3523 .agc2_slope2 = 0x1d, 3524 .alpha_mant = 0x11, 3525 .alpha_exp = 0x1b, 3526 .beta_mant = 0x17, 3527 .beta_exp = 0x33, 3528 .perform_agc_softsplit = 0x00, 3529 }; 3530 3531 static struct dibx000_bandwidth_config stk7700p_xc4000_pll_config = { 3532 .internal = 60000, 3533 .sampling = 30000, 3534 .pll_prediv = 1, 3535 .pll_ratio = 8, 3536 .pll_range = 3, 3537 .pll_reset = 1, 3538 .pll_bypass = 0, 3539 .enable_refdiv = 0, 3540 .bypclk_div = 0, 3541 .IO_CLK_en_core = 1, 3542 .ADClkSrc = 1, 3543 .modulo = 0, 3544 .sad_cfg = (3 << 14) | (1 << 12) | 524, /* sad_cfg: refsel, sel, freq_15k */ 3545 .ifreq = 39370534, 3546 .timf = 20452225, 3547 .xtal_hz = 30000000 3548 }; 3549 3550 /* FIXME: none of these inputs are validated yet */ 3551 static struct dib7000p_config pctv_340e_config = { 3552 .output_mpeg2_in_188_bytes = 1, 3553 3554 .agc_config_count = 1, 3555 .agc = &stk7700p_7000p_xc4000_agc_config, 3556 .bw = &stk7700p_xc4000_pll_config, 3557 3558 .gpio_dir = DIB7000M_GPIO_DEFAULT_DIRECTIONS, 3559 .gpio_val = DIB7000M_GPIO_DEFAULT_VALUES, 3560 .gpio_pwm_pos = DIB7000M_GPIO_DEFAULT_PWM_POS, 3561 }; 3562 3563 /* PCTV 340e GPIOs map: 3564 dib0700: 3565 GPIO2 - CX25843 sleep 3566 GPIO3 - CS5340 reset 3567 GPIO5 - IRD 3568 GPIO6 - Power Supply 3569 GPIO8 - LNA (1=off 0=on) 3570 GPIO10 - CX25843 reset 3571 dib7000: 3572 GPIO8 - xc4000 reset 3573 */ 3574 static int pctv340e_frontend_attach(struct dvb_usb_adapter *adap) 3575 { 3576 struct dib0700_state *st = adap->dev->priv; 3577 struct dib0700_adapter_state *state = adap->priv; 3578 3579 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops)) 3580 return -ENODEV; 3581 3582 /* Power Supply on */ 3583 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); 3584 msleep(50); 3585 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); 3586 msleep(100); /* Allow power supply to settle before probing */ 3587 3588 /* cx25843 reset */ 3589 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); 3590 msleep(1); /* cx25843 datasheet say 350us required */ 3591 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); 3592 3593 /* LNA off for now */ 3594 dib0700_set_gpio(adap->dev, GPIO8, GPIO_OUT, 1); 3595 3596 /* Put the CX25843 to sleep for now since we're in digital mode */ 3597 dib0700_set_gpio(adap->dev, GPIO2, GPIO_OUT, 1); 3598 3599 /* FIXME: not verified yet */ 3600 dib0700_ctrl_clock(adap->dev, 72, 1); 3601 3602 msleep(500); 3603 3604 if (state->dib7000p_ops.dib7000pc_detection(&adap->dev->i2c_adap) == 0) { 3605 /* Demodulator not found for some reason? */ 3606 dvb_detach(&state->dib7000p_ops); 3607 return -ENODEV; 3608 } 3609 3610 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x12, 3611 &pctv_340e_config); 3612 st->is_dib7000pc = 1; 3613 3614 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0; 3615 } 3616 3617 static struct xc4000_config dib7000p_xc4000_tunerconfig = { 3618 .i2c_address = 0x61, 3619 .default_pm = 1, 3620 .dvb_amplitude = 0, 3621 .set_smoothedcvbs = 0, 3622 .if_khz = 5400 3623 }; 3624 3625 static int xc4000_tuner_attach(struct dvb_usb_adapter *adap) 3626 { 3627 struct i2c_adapter *tun_i2c; 3628 struct dib0700_adapter_state *state = adap->priv; 3629 3630 /* The xc4000 is not on the main i2c bus */ 3631 tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe, 3632 DIBX000_I2C_INTERFACE_TUNER, 1); 3633 if (tun_i2c == NULL) { 3634 printk(KERN_ERR "Could not reach tuner i2c bus\n"); 3635 return 0; 3636 } 3637 3638 /* Setup the reset callback */ 3639 adap->fe_adap[0].fe->callback = dib0700_xc4000_tuner_callback; 3640 3641 return dvb_attach(xc4000_attach, adap->fe_adap[0].fe, tun_i2c, 3642 &dib7000p_xc4000_tunerconfig) 3643 == NULL ? -ENODEV : 0; 3644 } 3645 3646 static struct lgdt3305_config hcw_lgdt3305_config = { 3647 .i2c_addr = 0x0e, 3648 .mpeg_mode = LGDT3305_MPEG_PARALLEL, 3649 .tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE, 3650 .tpvalid_polarity = LGDT3305_TP_VALID_LOW, 3651 .deny_i2c_rptr = 0, 3652 .spectral_inversion = 1, 3653 .qam_if_khz = 6000, 3654 .vsb_if_khz = 6000, 3655 .usref_8vsb = 0x0500, 3656 }; 3657 3658 static struct mxl5007t_config hcw_mxl5007t_config = { 3659 .xtal_freq_hz = MxL_XTAL_25_MHZ, 3660 .if_freq_hz = MxL_IF_6_MHZ, 3661 .invert_if = 1, 3662 }; 3663 3664 /* TIGER-ATSC map: 3665 GPIO0 - LNA_CTR (H: LNA power enabled, L: LNA power disabled) 3666 GPIO1 - ANT_SEL (H: VPA, L: MCX) 3667 GPIO4 - SCL2 3668 GPIO6 - EN_TUNER 3669 GPIO7 - SDA2 3670 GPIO10 - DEM_RST 3671 3672 MXL is behind LG's i2c repeater. LG is on SCL2/SDA2 gpios on the DIB 3673 */ 3674 static int lgdt3305_frontend_attach(struct dvb_usb_adapter *adap) 3675 { 3676 struct dib0700_state *st = adap->dev->priv; 3677 3678 /* Make use of the new i2c functions from FW 1.20 */ 3679 st->fw_use_new_i2c_api = 1; 3680 3681 st->disable_streaming_master_mode = 1; 3682 3683 /* fe power enable */ 3684 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); 3685 msleep(30); 3686 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); 3687 msleep(30); 3688 3689 /* demod reset */ 3690 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); 3691 msleep(30); 3692 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); 3693 msleep(30); 3694 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); 3695 msleep(30); 3696 3697 adap->fe_adap[0].fe = dvb_attach(lgdt3305_attach, 3698 &hcw_lgdt3305_config, 3699 &adap->dev->i2c_adap); 3700 3701 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0; 3702 } 3703 3704 static int mxl5007t_tuner_attach(struct dvb_usb_adapter *adap) 3705 { 3706 return dvb_attach(mxl5007t_attach, adap->fe_adap[0].fe, 3707 &adap->dev->i2c_adap, 0x60, 3708 &hcw_mxl5007t_config) == NULL ? -ENODEV : 0; 3709 } 3710 3711 3712 /* DVB-USB and USB stuff follows */ 3713 struct usb_device_id dib0700_usb_id_table[] = { 3714 /* 0 */ { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7700P) }, 3715 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7700P_PC) }, 3716 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_500) }, 3717 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_500_2) }, 3718 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_STICK) }, 3719 /* 5 */ { USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_VOLAR) }, 3720 { USB_DEVICE(USB_VID_COMPRO, USB_PID_COMPRO_VIDEOMATE_U500) }, 3721 { USB_DEVICE(USB_VID_UNIWILL, USB_PID_UNIWILL_STK7700P) }, 3722 { USB_DEVICE(USB_VID_LEADTEK, USB_PID_WINFAST_DTV_DONGLE_STK7700P) }, 3723 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_STICK_2) }, 3724 /* 10 */{ USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_VOLAR_2) }, 3725 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV2000E) }, 3726 { USB_DEVICE(USB_VID_TERRATEC, 3727 USB_PID_TERRATEC_CINERGY_DT_XS_DIVERSITY) }, 3728 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_TD_STICK) }, 3729 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7700D) }, 3730 /* 15 */{ USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7070P) }, 3731 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV_DVB_T_FLASH) }, 3732 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7070PD) }, 3733 { USB_DEVICE(USB_VID_PINNACLE, 3734 USB_PID_PINNACLE_PCTV_DUAL_DIVERSITY_DVB_T) }, 3735 { USB_DEVICE(USB_VID_COMPRO, USB_PID_COMPRO_VIDEOMATE_U500_PC) }, 3736 /* 20 */{ USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_EXPRESS) }, 3737 { USB_DEVICE(USB_VID_GIGABYTE, USB_PID_GIGABYTE_U7000) }, 3738 { USB_DEVICE(USB_VID_ULTIMA_ELECTRONIC, USB_PID_ARTEC_T14BR) }, 3739 { USB_DEVICE(USB_VID_ASUS, USB_PID_ASUS_U3000) }, 3740 { USB_DEVICE(USB_VID_ASUS, USB_PID_ASUS_U3100) }, 3741 /* 25 */{ USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_STICK_3) }, 3742 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_MYTV_T) }, 3743 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_HT_USB_XE) }, 3744 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_EXPRESSCARD_320CX) }, 3745 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV72E) }, 3746 /* 30 */{ USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV73E) }, 3747 { USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_EC372S) }, 3748 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_HT_EXPRESS) }, 3749 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_T_XXS) }, 3750 { USB_DEVICE(USB_VID_LEADTEK, USB_PID_WINFAST_DTV_DONGLE_STK7700P_2) }, 3751 /* 35 */{ USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_TD_STICK_52009) }, 3752 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_500_3) }, 3753 { USB_DEVICE(USB_VID_GIGABYTE, USB_PID_GIGABYTE_U8000) }, 3754 { USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_STK7700PH) }, 3755 { USB_DEVICE(USB_VID_ASUS, USB_PID_ASUS_U3000H) }, 3756 /* 40 */{ USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV801E) }, 3757 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV801E_SE) }, 3758 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_T_EXPRESS) }, 3759 { USB_DEVICE(USB_VID_TERRATEC, 3760 USB_PID_TERRATEC_CINERGY_DT_XS_DIVERSITY_2) }, 3761 { USB_DEVICE(USB_VID_SONY, USB_PID_SONY_PLAYTV) }, 3762 /* 45 */{ USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_PD378S) }, 3763 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_TIGER_ATSC) }, 3764 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_TIGER_ATSC_B210) }, 3765 { USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_MC770) }, 3766 { USB_DEVICE(USB_VID_ELGATO, USB_PID_ELGATO_EYETV_DTT) }, 3767 /* 50 */{ USB_DEVICE(USB_VID_ELGATO, USB_PID_ELGATO_EYETV_DTT_Dlx) }, 3768 { USB_DEVICE(USB_VID_LEADTEK, USB_PID_WINFAST_DTV_DONGLE_H) }, 3769 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_T3) }, 3770 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_T5) }, 3771 { USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_STK7700D) }, 3772 /* 55 */{ USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_STK7700D_2) }, 3773 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV73A) }, 3774 { USB_DEVICE(USB_VID_PCTV, USB_PID_PINNACLE_PCTV73ESE) }, 3775 { USB_DEVICE(USB_VID_PCTV, USB_PID_PINNACLE_PCTV282E) }, 3776 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7770P) }, 3777 /* 60 */{ USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_T_XXS_2) }, 3778 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK807XPVR) }, 3779 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK807XP) }, 3780 { USB_DEVICE_VER(USB_VID_PIXELVIEW, USB_PID_PIXELVIEW_SBTVD, 0x000, 0x3f00) }, 3781 { USB_DEVICE(USB_VID_EVOLUTEPC, USB_PID_TVWAY_PLUS) }, 3782 /* 65 */{ USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV73ESE) }, 3783 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV282E) }, 3784 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK8096GP) }, 3785 { USB_DEVICE(USB_VID_ELGATO, USB_PID_ELGATO_EYETV_DIVERSITY) }, 3786 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_NIM9090M) }, 3787 /* 70 */{ USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_NIM8096MD) }, 3788 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_NIM9090MD) }, 3789 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_NIM7090) }, 3790 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_TFE7090PVR) }, 3791 { USB_DEVICE(USB_VID_TECHNISAT, USB_PID_TECHNISAT_AIRSTAR_TELESTICK_2) }, 3792 /* 75 */{ USB_DEVICE(USB_VID_MEDION, USB_PID_CREATIX_CTX1921) }, 3793 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV340E) }, 3794 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV340E_SE) }, 3795 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_TFE7790P) }, 3796 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_TFE8096P) }, 3797 /* 80 */{ USB_DEVICE(USB_VID_ELGATO, USB_PID_ELGATO_EYETV_DTT_2) }, 3798 { USB_DEVICE(USB_VID_PCTV, USB_PID_PCTV_2002E) }, 3799 { USB_DEVICE(USB_VID_PCTV, USB_PID_PCTV_2002E_SE) }, 3800 { 0 } /* Terminating entry */ 3801 }; 3802 MODULE_DEVICE_TABLE(usb, dib0700_usb_id_table); 3803 3804 #define DIB0700_DEFAULT_DEVICE_PROPERTIES \ 3805 .caps = DVB_USB_IS_AN_I2C_ADAPTER, \ 3806 .usb_ctrl = DEVICE_SPECIFIC, \ 3807 .firmware = "dvb-usb-dib0700-1.20.fw", \ 3808 .download_firmware = dib0700_download_firmware, \ 3809 .no_reconnect = 1, \ 3810 .size_of_priv = sizeof(struct dib0700_state), \ 3811 .i2c_algo = &dib0700_i2c_algo, \ 3812 .identify_state = dib0700_identify_state 3813 3814 #define DIB0700_DEFAULT_STREAMING_CONFIG(ep) \ 3815 .streaming_ctrl = dib0700_streaming_ctrl, \ 3816 .stream = { \ 3817 .type = USB_BULK, \ 3818 .count = 4, \ 3819 .endpoint = ep, \ 3820 .u = { \ 3821 .bulk = { \ 3822 .buffersize = 39480, \ 3823 } \ 3824 } \ 3825 } 3826 3827 struct dvb_usb_device_properties dib0700_devices[] = { 3828 { 3829 DIB0700_DEFAULT_DEVICE_PROPERTIES, 3830 3831 .num_adapters = 1, 3832 .adapter = { 3833 { 3834 .num_frontends = 1, 3835 .fe = {{ 3836 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 3837 .pid_filter_count = 32, 3838 .pid_filter = stk7700p_pid_filter, 3839 .pid_filter_ctrl = stk7700p_pid_filter_ctrl, 3840 .frontend_attach = stk7700p_frontend_attach, 3841 .tuner_attach = stk7700p_tuner_attach, 3842 3843 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 3844 }}, 3845 .size_of_priv = sizeof(struct dib0700_adapter_state), 3846 }, 3847 }, 3848 3849 .num_device_descs = 8, 3850 .devices = { 3851 { "DiBcom STK7700P reference design", 3852 { &dib0700_usb_id_table[0], &dib0700_usb_id_table[1] }, 3853 { NULL }, 3854 }, 3855 { "Hauppauge Nova-T Stick", 3856 { &dib0700_usb_id_table[4], &dib0700_usb_id_table[9], NULL }, 3857 { NULL }, 3858 }, 3859 { "AVerMedia AVerTV DVB-T Volar", 3860 { &dib0700_usb_id_table[5], &dib0700_usb_id_table[10] }, 3861 { NULL }, 3862 }, 3863 { "Compro Videomate U500", 3864 { &dib0700_usb_id_table[6], &dib0700_usb_id_table[19] }, 3865 { NULL }, 3866 }, 3867 { "Uniwill STK7700P based (Hama and others)", 3868 { &dib0700_usb_id_table[7], NULL }, 3869 { NULL }, 3870 }, 3871 { "Leadtek Winfast DTV Dongle (STK7700P based)", 3872 { &dib0700_usb_id_table[8], &dib0700_usb_id_table[34] }, 3873 { NULL }, 3874 }, 3875 { "AVerMedia AVerTV DVB-T Express", 3876 { &dib0700_usb_id_table[20] }, 3877 { NULL }, 3878 }, 3879 { "Gigabyte U7000", 3880 { &dib0700_usb_id_table[21], NULL }, 3881 { NULL }, 3882 } 3883 }, 3884 3885 .rc.core = { 3886 .rc_interval = DEFAULT_RC_INTERVAL, 3887 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 3888 .rc_query = dib0700_rc_query_old_firmware, 3889 .allowed_protos = RC_BIT_RC5 | 3890 RC_BIT_RC6_MCE | 3891 RC_BIT_NEC, 3892 .change_protocol = dib0700_change_protocol, 3893 }, 3894 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 3895 3896 .num_adapters = 2, 3897 .adapter = { 3898 { 3899 .num_frontends = 1, 3900 .fe = {{ 3901 .frontend_attach = bristol_frontend_attach, 3902 .tuner_attach = bristol_tuner_attach, 3903 3904 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 3905 }}, 3906 }, { 3907 .num_frontends = 1, 3908 .fe = {{ 3909 .frontend_attach = bristol_frontend_attach, 3910 .tuner_attach = bristol_tuner_attach, 3911 3912 DIB0700_DEFAULT_STREAMING_CONFIG(0x03), 3913 }}, 3914 } 3915 }, 3916 3917 .num_device_descs = 1, 3918 .devices = { 3919 { "Hauppauge Nova-T 500 Dual DVB-T", 3920 { &dib0700_usb_id_table[2], &dib0700_usb_id_table[3], NULL }, 3921 { NULL }, 3922 }, 3923 }, 3924 3925 .rc.core = { 3926 .rc_interval = DEFAULT_RC_INTERVAL, 3927 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 3928 .rc_query = dib0700_rc_query_old_firmware, 3929 .allowed_protos = RC_BIT_RC5 | 3930 RC_BIT_RC6_MCE | 3931 RC_BIT_NEC, 3932 .change_protocol = dib0700_change_protocol, 3933 }, 3934 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 3935 3936 .num_adapters = 2, 3937 .adapter = { 3938 { 3939 .num_frontends = 1, 3940 .fe = {{ 3941 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 3942 .pid_filter_count = 32, 3943 .pid_filter = stk70x0p_pid_filter, 3944 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl, 3945 .frontend_attach = stk7700d_frontend_attach, 3946 .tuner_attach = stk7700d_tuner_attach, 3947 3948 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 3949 }}, 3950 }, { 3951 .num_frontends = 1, 3952 .fe = {{ 3953 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 3954 .pid_filter_count = 32, 3955 .pid_filter = stk70x0p_pid_filter, 3956 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl, 3957 .frontend_attach = stk7700d_frontend_attach, 3958 .tuner_attach = stk7700d_tuner_attach, 3959 3960 DIB0700_DEFAULT_STREAMING_CONFIG(0x03), 3961 }}, 3962 } 3963 }, 3964 3965 .num_device_descs = 5, 3966 .devices = { 3967 { "Pinnacle PCTV 2000e", 3968 { &dib0700_usb_id_table[11], NULL }, 3969 { NULL }, 3970 }, 3971 { "Terratec Cinergy DT XS Diversity", 3972 { &dib0700_usb_id_table[12], NULL }, 3973 { NULL }, 3974 }, 3975 { "Hauppauge Nova-TD Stick/Elgato Eye-TV Diversity", 3976 { &dib0700_usb_id_table[13], NULL }, 3977 { NULL }, 3978 }, 3979 { "DiBcom STK7700D reference design", 3980 { &dib0700_usb_id_table[14], NULL }, 3981 { NULL }, 3982 }, 3983 { "YUAN High-Tech DiBcom STK7700D", 3984 { &dib0700_usb_id_table[55], NULL }, 3985 { NULL }, 3986 }, 3987 3988 }, 3989 3990 .rc.core = { 3991 .rc_interval = DEFAULT_RC_INTERVAL, 3992 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 3993 .rc_query = dib0700_rc_query_old_firmware, 3994 .allowed_protos = RC_BIT_RC5 | 3995 RC_BIT_RC6_MCE | 3996 RC_BIT_NEC, 3997 .change_protocol = dib0700_change_protocol, 3998 }, 3999 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 4000 4001 .num_adapters = 1, 4002 .adapter = { 4003 { 4004 .num_frontends = 1, 4005 .fe = {{ 4006 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4007 .pid_filter_count = 32, 4008 .pid_filter = stk70x0p_pid_filter, 4009 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl, 4010 .frontend_attach = stk7700P2_frontend_attach, 4011 .tuner_attach = stk7700d_tuner_attach, 4012 4013 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 4014 }}, 4015 }, 4016 }, 4017 4018 .num_device_descs = 3, 4019 .devices = { 4020 { "ASUS My Cinema U3000 Mini DVBT Tuner", 4021 { &dib0700_usb_id_table[23], NULL }, 4022 { NULL }, 4023 }, 4024 { "Yuan EC372S", 4025 { &dib0700_usb_id_table[31], NULL }, 4026 { NULL }, 4027 }, 4028 { "Terratec Cinergy T Express", 4029 { &dib0700_usb_id_table[42], NULL }, 4030 { NULL }, 4031 } 4032 }, 4033 4034 .rc.core = { 4035 .rc_interval = DEFAULT_RC_INTERVAL, 4036 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 4037 .module_name = "dib0700", 4038 .rc_query = dib0700_rc_query_old_firmware, 4039 .allowed_protos = RC_BIT_RC5 | 4040 RC_BIT_RC6_MCE | 4041 RC_BIT_NEC, 4042 .change_protocol = dib0700_change_protocol, 4043 }, 4044 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 4045 4046 .num_adapters = 1, 4047 .adapter = { 4048 { 4049 .num_frontends = 1, 4050 .fe = {{ 4051 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4052 .pid_filter_count = 32, 4053 .pid_filter = stk70x0p_pid_filter, 4054 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl, 4055 .frontend_attach = stk7070p_frontend_attach, 4056 .tuner_attach = dib7070p_tuner_attach, 4057 4058 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 4059 }}, 4060 .size_of_priv = sizeof(struct dib0700_adapter_state), 4061 }, 4062 }, 4063 4064 .num_device_descs = 12, 4065 .devices = { 4066 { "DiBcom STK7070P reference design", 4067 { &dib0700_usb_id_table[15], NULL }, 4068 { NULL }, 4069 }, 4070 { "Pinnacle PCTV DVB-T Flash Stick", 4071 { &dib0700_usb_id_table[16], NULL }, 4072 { NULL }, 4073 }, 4074 { "Artec T14BR DVB-T", 4075 { &dib0700_usb_id_table[22], NULL }, 4076 { NULL }, 4077 }, 4078 { "ASUS My Cinema U3100 Mini DVBT Tuner", 4079 { &dib0700_usb_id_table[24], NULL }, 4080 { NULL }, 4081 }, 4082 { "Hauppauge Nova-T Stick", 4083 { &dib0700_usb_id_table[25], NULL }, 4084 { NULL }, 4085 }, 4086 { "Hauppauge Nova-T MyTV.t", 4087 { &dib0700_usb_id_table[26], NULL }, 4088 { NULL }, 4089 }, 4090 { "Pinnacle PCTV 72e", 4091 { &dib0700_usb_id_table[29], NULL }, 4092 { NULL }, 4093 }, 4094 { "Pinnacle PCTV 73e", 4095 { &dib0700_usb_id_table[30], NULL }, 4096 { NULL }, 4097 }, 4098 { "Elgato EyeTV DTT", 4099 { &dib0700_usb_id_table[49], NULL }, 4100 { NULL }, 4101 }, 4102 { "Yuan PD378S", 4103 { &dib0700_usb_id_table[45], NULL }, 4104 { NULL }, 4105 }, 4106 { "Elgato EyeTV Dtt Dlx PD378S", 4107 { &dib0700_usb_id_table[50], NULL }, 4108 { NULL }, 4109 }, 4110 { "Elgato EyeTV DTT rev. 2", 4111 { &dib0700_usb_id_table[80], NULL }, 4112 { NULL }, 4113 }, 4114 }, 4115 4116 .rc.core = { 4117 .rc_interval = DEFAULT_RC_INTERVAL, 4118 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 4119 .module_name = "dib0700", 4120 .rc_query = dib0700_rc_query_old_firmware, 4121 .allowed_protos = RC_BIT_RC5 | 4122 RC_BIT_RC6_MCE | 4123 RC_BIT_NEC, 4124 .change_protocol = dib0700_change_protocol, 4125 }, 4126 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 4127 4128 .num_adapters = 1, 4129 .adapter = { 4130 { 4131 .num_frontends = 1, 4132 .fe = {{ 4133 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4134 .pid_filter_count = 32, 4135 .pid_filter = stk70x0p_pid_filter, 4136 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl, 4137 .frontend_attach = stk7070p_frontend_attach, 4138 .tuner_attach = dib7070p_tuner_attach, 4139 4140 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 4141 }}, 4142 .size_of_priv = sizeof(struct dib0700_adapter_state), 4143 }, 4144 }, 4145 4146 .num_device_descs = 3, 4147 .devices = { 4148 { "Pinnacle PCTV 73A", 4149 { &dib0700_usb_id_table[56], NULL }, 4150 { NULL }, 4151 }, 4152 { "Pinnacle PCTV 73e SE", 4153 { &dib0700_usb_id_table[57], &dib0700_usb_id_table[65], NULL }, 4154 { NULL }, 4155 }, 4156 { "Pinnacle PCTV 282e", 4157 { &dib0700_usb_id_table[58], &dib0700_usb_id_table[66], NULL }, 4158 { NULL }, 4159 }, 4160 }, 4161 4162 .rc.core = { 4163 .rc_interval = DEFAULT_RC_INTERVAL, 4164 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 4165 .module_name = "dib0700", 4166 .rc_query = dib0700_rc_query_old_firmware, 4167 .allowed_protos = RC_BIT_RC5 | 4168 RC_BIT_RC6_MCE | 4169 RC_BIT_NEC, 4170 .change_protocol = dib0700_change_protocol, 4171 }, 4172 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 4173 4174 .num_adapters = 2, 4175 .adapter = { 4176 { 4177 .num_frontends = 1, 4178 .fe = {{ 4179 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4180 .pid_filter_count = 32, 4181 .pid_filter = stk70x0p_pid_filter, 4182 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl, 4183 .frontend_attach = novatd_frontend_attach, 4184 .tuner_attach = dib7070p_tuner_attach, 4185 4186 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 4187 }}, 4188 .size_of_priv = sizeof(struct dib0700_adapter_state), 4189 }, { 4190 .num_frontends = 1, 4191 .fe = {{ 4192 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4193 .pid_filter_count = 32, 4194 .pid_filter = stk70x0p_pid_filter, 4195 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl, 4196 .frontend_attach = novatd_frontend_attach, 4197 .tuner_attach = dib7070p_tuner_attach, 4198 4199 DIB0700_DEFAULT_STREAMING_CONFIG(0x03), 4200 }}, 4201 .size_of_priv = sizeof(struct dib0700_adapter_state), 4202 } 4203 }, 4204 4205 .num_device_descs = 3, 4206 .devices = { 4207 { "Hauppauge Nova-TD Stick (52009)", 4208 { &dib0700_usb_id_table[35], NULL }, 4209 { NULL }, 4210 }, 4211 { "PCTV 2002e", 4212 { &dib0700_usb_id_table[81], NULL }, 4213 { NULL }, 4214 }, 4215 { "PCTV 2002e SE", 4216 { &dib0700_usb_id_table[82], NULL }, 4217 { NULL }, 4218 }, 4219 }, 4220 4221 .rc.core = { 4222 .rc_interval = DEFAULT_RC_INTERVAL, 4223 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 4224 .module_name = "dib0700", 4225 .rc_query = dib0700_rc_query_old_firmware, 4226 .allowed_protos = RC_BIT_RC5 | 4227 RC_BIT_RC6_MCE | 4228 RC_BIT_NEC, 4229 .change_protocol = dib0700_change_protocol, 4230 }, 4231 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 4232 4233 .num_adapters = 2, 4234 .adapter = { 4235 { 4236 .num_frontends = 1, 4237 .fe = {{ 4238 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4239 .pid_filter_count = 32, 4240 .pid_filter = stk70x0p_pid_filter, 4241 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl, 4242 .frontend_attach = stk7070pd_frontend_attach0, 4243 .tuner_attach = dib7070p_tuner_attach, 4244 4245 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 4246 }}, 4247 .size_of_priv = sizeof(struct dib0700_adapter_state), 4248 }, { 4249 .num_frontends = 1, 4250 .fe = {{ 4251 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4252 .pid_filter_count = 32, 4253 .pid_filter = stk70x0p_pid_filter, 4254 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl, 4255 .frontend_attach = stk7070pd_frontend_attach1, 4256 .tuner_attach = dib7070p_tuner_attach, 4257 4258 DIB0700_DEFAULT_STREAMING_CONFIG(0x03), 4259 }}, 4260 .size_of_priv = sizeof(struct dib0700_adapter_state), 4261 } 4262 }, 4263 4264 .num_device_descs = 5, 4265 .devices = { 4266 { "DiBcom STK7070PD reference design", 4267 { &dib0700_usb_id_table[17], NULL }, 4268 { NULL }, 4269 }, 4270 { "Pinnacle PCTV Dual DVB-T Diversity Stick", 4271 { &dib0700_usb_id_table[18], NULL }, 4272 { NULL }, 4273 }, 4274 { "Hauppauge Nova-TD-500 (84xxx)", 4275 { &dib0700_usb_id_table[36], NULL }, 4276 { NULL }, 4277 }, 4278 { "Terratec Cinergy DT USB XS Diversity/ T5", 4279 { &dib0700_usb_id_table[43], 4280 &dib0700_usb_id_table[53], NULL}, 4281 { NULL }, 4282 }, 4283 { "Sony PlayTV", 4284 { &dib0700_usb_id_table[44], NULL }, 4285 { NULL }, 4286 }, 4287 }, 4288 4289 .rc.core = { 4290 .rc_interval = DEFAULT_RC_INTERVAL, 4291 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 4292 .module_name = "dib0700", 4293 .rc_query = dib0700_rc_query_old_firmware, 4294 .allowed_protos = RC_BIT_RC5 | 4295 RC_BIT_RC6_MCE | 4296 RC_BIT_NEC, 4297 .change_protocol = dib0700_change_protocol, 4298 }, 4299 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 4300 4301 .num_adapters = 2, 4302 .adapter = { 4303 { 4304 .num_frontends = 1, 4305 .fe = {{ 4306 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4307 .pid_filter_count = 32, 4308 .pid_filter = stk70x0p_pid_filter, 4309 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl, 4310 .frontend_attach = stk7070pd_frontend_attach0, 4311 .tuner_attach = dib7070p_tuner_attach, 4312 4313 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 4314 }}, 4315 .size_of_priv = sizeof(struct dib0700_adapter_state), 4316 }, { 4317 .num_frontends = 1, 4318 .fe = {{ 4319 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4320 .pid_filter_count = 32, 4321 .pid_filter = stk70x0p_pid_filter, 4322 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl, 4323 .frontend_attach = stk7070pd_frontend_attach1, 4324 .tuner_attach = dib7070p_tuner_attach, 4325 4326 DIB0700_DEFAULT_STREAMING_CONFIG(0x03), 4327 }}, 4328 .size_of_priv = sizeof(struct dib0700_adapter_state), 4329 } 4330 }, 4331 4332 .num_device_descs = 1, 4333 .devices = { 4334 { "Elgato EyeTV Diversity", 4335 { &dib0700_usb_id_table[68], NULL }, 4336 { NULL }, 4337 }, 4338 }, 4339 4340 .rc.core = { 4341 .rc_interval = DEFAULT_RC_INTERVAL, 4342 .rc_codes = RC_MAP_DIB0700_NEC_TABLE, 4343 .module_name = "dib0700", 4344 .rc_query = dib0700_rc_query_old_firmware, 4345 .allowed_protos = RC_BIT_RC5 | 4346 RC_BIT_RC6_MCE | 4347 RC_BIT_NEC, 4348 .change_protocol = dib0700_change_protocol, 4349 }, 4350 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 4351 4352 .num_adapters = 1, 4353 .adapter = { 4354 { 4355 .num_frontends = 1, 4356 .fe = {{ 4357 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4358 .pid_filter_count = 32, 4359 .pid_filter = stk70x0p_pid_filter, 4360 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl, 4361 .frontend_attach = stk7700ph_frontend_attach, 4362 .tuner_attach = stk7700ph_tuner_attach, 4363 4364 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 4365 }}, 4366 .size_of_priv = sizeof(struct 4367 dib0700_adapter_state), 4368 }, 4369 }, 4370 4371 .num_device_descs = 9, 4372 .devices = { 4373 { "Terratec Cinergy HT USB XE", 4374 { &dib0700_usb_id_table[27], NULL }, 4375 { NULL }, 4376 }, 4377 { "Pinnacle Expresscard 320cx", 4378 { &dib0700_usb_id_table[28], NULL }, 4379 { NULL }, 4380 }, 4381 { "Terratec Cinergy HT Express", 4382 { &dib0700_usb_id_table[32], NULL }, 4383 { NULL }, 4384 }, 4385 { "Gigabyte U8000-RH", 4386 { &dib0700_usb_id_table[37], NULL }, 4387 { NULL }, 4388 }, 4389 { "YUAN High-Tech STK7700PH", 4390 { &dib0700_usb_id_table[38], NULL }, 4391 { NULL }, 4392 }, 4393 { "Asus My Cinema-U3000Hybrid", 4394 { &dib0700_usb_id_table[39], NULL }, 4395 { NULL }, 4396 }, 4397 { "YUAN High-Tech MC770", 4398 { &dib0700_usb_id_table[48], NULL }, 4399 { NULL }, 4400 }, 4401 { "Leadtek WinFast DTV Dongle H", 4402 { &dib0700_usb_id_table[51], NULL }, 4403 { NULL }, 4404 }, 4405 { "YUAN High-Tech STK7700D", 4406 { &dib0700_usb_id_table[54], NULL }, 4407 { NULL }, 4408 }, 4409 }, 4410 4411 .rc.core = { 4412 .rc_interval = DEFAULT_RC_INTERVAL, 4413 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 4414 .module_name = "dib0700", 4415 .rc_query = dib0700_rc_query_old_firmware, 4416 .allowed_protos = RC_BIT_RC5 | 4417 RC_BIT_RC6_MCE | 4418 RC_BIT_NEC, 4419 .change_protocol = dib0700_change_protocol, 4420 }, 4421 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 4422 .num_adapters = 1, 4423 .adapter = { 4424 { 4425 .num_frontends = 1, 4426 .fe = {{ 4427 .frontend_attach = s5h1411_frontend_attach, 4428 .tuner_attach = xc5000_tuner_attach, 4429 4430 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 4431 }}, 4432 .size_of_priv = sizeof(struct 4433 dib0700_adapter_state), 4434 }, 4435 }, 4436 4437 .num_device_descs = 2, 4438 .devices = { 4439 { "Pinnacle PCTV HD Pro USB Stick", 4440 { &dib0700_usb_id_table[40], NULL }, 4441 { NULL }, 4442 }, 4443 { "Pinnacle PCTV HD USB Stick", 4444 { &dib0700_usb_id_table[41], NULL }, 4445 { NULL }, 4446 }, 4447 }, 4448 4449 .rc.core = { 4450 .rc_interval = DEFAULT_RC_INTERVAL, 4451 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 4452 .module_name = "dib0700", 4453 .rc_query = dib0700_rc_query_old_firmware, 4454 .allowed_protos = RC_BIT_RC5 | 4455 RC_BIT_RC6_MCE | 4456 RC_BIT_NEC, 4457 .change_protocol = dib0700_change_protocol, 4458 }, 4459 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 4460 .num_adapters = 1, 4461 .adapter = { 4462 { 4463 .num_frontends = 1, 4464 .fe = {{ 4465 .frontend_attach = lgdt3305_frontend_attach, 4466 .tuner_attach = mxl5007t_tuner_attach, 4467 4468 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 4469 }}, 4470 .size_of_priv = sizeof(struct 4471 dib0700_adapter_state), 4472 }, 4473 }, 4474 4475 .num_device_descs = 2, 4476 .devices = { 4477 { "Hauppauge ATSC MiniCard (B200)", 4478 { &dib0700_usb_id_table[46], NULL }, 4479 { NULL }, 4480 }, 4481 { "Hauppauge ATSC MiniCard (B210)", 4482 { &dib0700_usb_id_table[47], NULL }, 4483 { NULL }, 4484 }, 4485 }, 4486 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 4487 4488 .num_adapters = 1, 4489 .adapter = { 4490 { 4491 .num_frontends = 1, 4492 .fe = {{ 4493 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4494 .pid_filter_count = 32, 4495 .pid_filter = stk70x0p_pid_filter, 4496 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl, 4497 .frontend_attach = stk7770p_frontend_attach, 4498 .tuner_attach = dib7770p_tuner_attach, 4499 4500 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 4501 }}, 4502 .size_of_priv = 4503 sizeof(struct dib0700_adapter_state), 4504 }, 4505 }, 4506 4507 .num_device_descs = 4, 4508 .devices = { 4509 { "DiBcom STK7770P reference design", 4510 { &dib0700_usb_id_table[59], NULL }, 4511 { NULL }, 4512 }, 4513 { "Terratec Cinergy T USB XXS (HD)/ T3", 4514 { &dib0700_usb_id_table[33], 4515 &dib0700_usb_id_table[52], 4516 &dib0700_usb_id_table[60], NULL}, 4517 { NULL }, 4518 }, 4519 { "TechniSat AirStar TeleStick 2", 4520 { &dib0700_usb_id_table[74], NULL }, 4521 { NULL }, 4522 }, 4523 { "Medion CTX1921 DVB-T USB", 4524 { &dib0700_usb_id_table[75], NULL }, 4525 { NULL }, 4526 }, 4527 }, 4528 4529 .rc.core = { 4530 .rc_interval = DEFAULT_RC_INTERVAL, 4531 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 4532 .module_name = "dib0700", 4533 .rc_query = dib0700_rc_query_old_firmware, 4534 .allowed_protos = RC_BIT_RC5 | 4535 RC_BIT_RC6_MCE | 4536 RC_BIT_NEC, 4537 .change_protocol = dib0700_change_protocol, 4538 }, 4539 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 4540 .num_adapters = 1, 4541 .adapter = { 4542 { 4543 .num_frontends = 1, 4544 .fe = {{ 4545 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4546 .pid_filter_count = 32, 4547 .pid_filter = stk80xx_pid_filter, 4548 .pid_filter_ctrl = stk80xx_pid_filter_ctrl, 4549 .frontend_attach = stk807x_frontend_attach, 4550 .tuner_attach = dib807x_tuner_attach, 4551 4552 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 4553 }}, 4554 .size_of_priv = 4555 sizeof(struct dib0700_adapter_state), 4556 }, 4557 }, 4558 4559 .num_device_descs = 3, 4560 .devices = { 4561 { "DiBcom STK807xP reference design", 4562 { &dib0700_usb_id_table[62], NULL }, 4563 { NULL }, 4564 }, 4565 { "Prolink Pixelview SBTVD", 4566 { &dib0700_usb_id_table[63], NULL }, 4567 { NULL }, 4568 }, 4569 { "EvolutePC TVWay+", 4570 { &dib0700_usb_id_table[64], NULL }, 4571 { NULL }, 4572 }, 4573 }, 4574 4575 .rc.core = { 4576 .rc_interval = DEFAULT_RC_INTERVAL, 4577 .rc_codes = RC_MAP_DIB0700_NEC_TABLE, 4578 .module_name = "dib0700", 4579 .rc_query = dib0700_rc_query_old_firmware, 4580 .allowed_protos = RC_BIT_RC5 | 4581 RC_BIT_RC6_MCE | 4582 RC_BIT_NEC, 4583 .change_protocol = dib0700_change_protocol, 4584 }, 4585 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 4586 .num_adapters = 2, 4587 .adapter = { 4588 { 4589 .num_frontends = 1, 4590 .fe = {{ 4591 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4592 .pid_filter_count = 32, 4593 .pid_filter = stk80xx_pid_filter, 4594 .pid_filter_ctrl = stk80xx_pid_filter_ctrl, 4595 .frontend_attach = stk807xpvr_frontend_attach0, 4596 .tuner_attach = dib807x_tuner_attach, 4597 4598 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 4599 }}, 4600 .size_of_priv = 4601 sizeof(struct dib0700_adapter_state), 4602 }, 4603 { 4604 .num_frontends = 1, 4605 .fe = {{ 4606 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4607 .pid_filter_count = 32, 4608 .pid_filter = stk80xx_pid_filter, 4609 .pid_filter_ctrl = stk80xx_pid_filter_ctrl, 4610 .frontend_attach = stk807xpvr_frontend_attach1, 4611 .tuner_attach = dib807x_tuner_attach, 4612 4613 DIB0700_DEFAULT_STREAMING_CONFIG(0x03), 4614 }}, 4615 .size_of_priv = 4616 sizeof(struct dib0700_adapter_state), 4617 }, 4618 }, 4619 4620 .num_device_descs = 1, 4621 .devices = { 4622 { "DiBcom STK807xPVR reference design", 4623 { &dib0700_usb_id_table[61], NULL }, 4624 { NULL }, 4625 }, 4626 }, 4627 4628 .rc.core = { 4629 .rc_interval = DEFAULT_RC_INTERVAL, 4630 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 4631 .module_name = "dib0700", 4632 .rc_query = dib0700_rc_query_old_firmware, 4633 .allowed_protos = RC_BIT_RC5 | 4634 RC_BIT_RC6_MCE | 4635 RC_BIT_NEC, 4636 .change_protocol = dib0700_change_protocol, 4637 }, 4638 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 4639 .num_adapters = 1, 4640 .adapter = { 4641 { 4642 .num_frontends = 1, 4643 .fe = {{ 4644 .caps = DVB_USB_ADAP_HAS_PID_FILTER | 4645 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4646 .pid_filter_count = 32, 4647 .pid_filter = stk80xx_pid_filter, 4648 .pid_filter_ctrl = stk80xx_pid_filter_ctrl, 4649 .frontend_attach = stk809x_frontend_attach, 4650 .tuner_attach = dib809x_tuner_attach, 4651 4652 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 4653 }}, 4654 .size_of_priv = 4655 sizeof(struct dib0700_adapter_state), 4656 }, 4657 }, 4658 4659 .num_device_descs = 1, 4660 .devices = { 4661 { "DiBcom STK8096GP reference design", 4662 { &dib0700_usb_id_table[67], NULL }, 4663 { NULL }, 4664 }, 4665 }, 4666 4667 .rc.core = { 4668 .rc_interval = DEFAULT_RC_INTERVAL, 4669 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 4670 .module_name = "dib0700", 4671 .rc_query = dib0700_rc_query_old_firmware, 4672 .allowed_protos = RC_BIT_RC5 | 4673 RC_BIT_RC6_MCE | 4674 RC_BIT_NEC, 4675 .change_protocol = dib0700_change_protocol, 4676 }, 4677 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 4678 .num_adapters = 1, 4679 .adapter = { 4680 { 4681 .num_frontends = 1, 4682 .fe = {{ 4683 .caps = DVB_USB_ADAP_HAS_PID_FILTER | 4684 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4685 .pid_filter_count = 32, 4686 .pid_filter = dib90x0_pid_filter, 4687 .pid_filter_ctrl = dib90x0_pid_filter_ctrl, 4688 .frontend_attach = stk9090m_frontend_attach, 4689 .tuner_attach = dib9090_tuner_attach, 4690 4691 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 4692 }}, 4693 .size_of_priv = 4694 sizeof(struct dib0700_adapter_state), 4695 }, 4696 }, 4697 4698 .num_device_descs = 1, 4699 .devices = { 4700 { "DiBcom STK9090M reference design", 4701 { &dib0700_usb_id_table[69], NULL }, 4702 { NULL }, 4703 }, 4704 }, 4705 4706 .rc.core = { 4707 .rc_interval = DEFAULT_RC_INTERVAL, 4708 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 4709 .module_name = "dib0700", 4710 .rc_query = dib0700_rc_query_old_firmware, 4711 .allowed_protos = RC_BIT_RC5 | 4712 RC_BIT_RC6_MCE | 4713 RC_BIT_NEC, 4714 .change_protocol = dib0700_change_protocol, 4715 }, 4716 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 4717 .num_adapters = 1, 4718 .adapter = { 4719 { 4720 .num_frontends = 1, 4721 .fe = {{ 4722 .caps = DVB_USB_ADAP_HAS_PID_FILTER | 4723 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4724 .pid_filter_count = 32, 4725 .pid_filter = stk80xx_pid_filter, 4726 .pid_filter_ctrl = stk80xx_pid_filter_ctrl, 4727 .frontend_attach = nim8096md_frontend_attach, 4728 .tuner_attach = nim8096md_tuner_attach, 4729 4730 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 4731 }}, 4732 .size_of_priv = 4733 sizeof(struct dib0700_adapter_state), 4734 }, 4735 }, 4736 4737 .num_device_descs = 1, 4738 .devices = { 4739 { "DiBcom NIM8096MD reference design", 4740 { &dib0700_usb_id_table[70], NULL }, 4741 { NULL }, 4742 }, 4743 }, 4744 4745 .rc.core = { 4746 .rc_interval = DEFAULT_RC_INTERVAL, 4747 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 4748 .module_name = "dib0700", 4749 .rc_query = dib0700_rc_query_old_firmware, 4750 .allowed_protos = RC_BIT_RC5 | 4751 RC_BIT_RC6_MCE | 4752 RC_BIT_NEC, 4753 .change_protocol = dib0700_change_protocol, 4754 }, 4755 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 4756 .num_adapters = 1, 4757 .adapter = { 4758 { 4759 .num_frontends = 1, 4760 .fe = {{ 4761 .caps = DVB_USB_ADAP_HAS_PID_FILTER | 4762 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4763 .pid_filter_count = 32, 4764 .pid_filter = dib90x0_pid_filter, 4765 .pid_filter_ctrl = dib90x0_pid_filter_ctrl, 4766 .frontend_attach = nim9090md_frontend_attach, 4767 .tuner_attach = nim9090md_tuner_attach, 4768 4769 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 4770 }}, 4771 .size_of_priv = 4772 sizeof(struct dib0700_adapter_state), 4773 }, 4774 }, 4775 4776 .num_device_descs = 1, 4777 .devices = { 4778 { "DiBcom NIM9090MD reference design", 4779 { &dib0700_usb_id_table[71], NULL }, 4780 { NULL }, 4781 }, 4782 }, 4783 4784 .rc.core = { 4785 .rc_interval = DEFAULT_RC_INTERVAL, 4786 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 4787 .module_name = "dib0700", 4788 .rc_query = dib0700_rc_query_old_firmware, 4789 .allowed_protos = RC_BIT_RC5 | 4790 RC_BIT_RC6_MCE | 4791 RC_BIT_NEC, 4792 .change_protocol = dib0700_change_protocol, 4793 }, 4794 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 4795 .num_adapters = 1, 4796 .adapter = { 4797 { 4798 .num_frontends = 1, 4799 .fe = {{ 4800 .caps = DVB_USB_ADAP_HAS_PID_FILTER | 4801 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4802 .pid_filter_count = 32, 4803 .pid_filter = stk70x0p_pid_filter, 4804 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl, 4805 .frontend_attach = nim7090_frontend_attach, 4806 .tuner_attach = nim7090_tuner_attach, 4807 4808 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 4809 }}, 4810 .size_of_priv = 4811 sizeof(struct dib0700_adapter_state), 4812 }, 4813 }, 4814 4815 .num_device_descs = 1, 4816 .devices = { 4817 { "DiBcom NIM7090 reference design", 4818 { &dib0700_usb_id_table[72], NULL }, 4819 { NULL }, 4820 }, 4821 }, 4822 4823 .rc.core = { 4824 .rc_interval = DEFAULT_RC_INTERVAL, 4825 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 4826 .module_name = "dib0700", 4827 .rc_query = dib0700_rc_query_old_firmware, 4828 .allowed_protos = RC_BIT_RC5 | 4829 RC_BIT_RC6_MCE | 4830 RC_BIT_NEC, 4831 .change_protocol = dib0700_change_protocol, 4832 }, 4833 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 4834 .num_adapters = 2, 4835 .adapter = { 4836 { 4837 .num_frontends = 1, 4838 .fe = {{ 4839 .caps = DVB_USB_ADAP_HAS_PID_FILTER | 4840 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4841 .pid_filter_count = 32, 4842 .pid_filter = stk70x0p_pid_filter, 4843 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl, 4844 .frontend_attach = tfe7090pvr_frontend0_attach, 4845 .tuner_attach = tfe7090pvr_tuner0_attach, 4846 4847 DIB0700_DEFAULT_STREAMING_CONFIG(0x03), 4848 }}, 4849 .size_of_priv = 4850 sizeof(struct dib0700_adapter_state), 4851 }, 4852 { 4853 .num_frontends = 1, 4854 .fe = {{ 4855 .caps = DVB_USB_ADAP_HAS_PID_FILTER | 4856 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4857 .pid_filter_count = 32, 4858 .pid_filter = stk70x0p_pid_filter, 4859 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl, 4860 .frontend_attach = tfe7090pvr_frontend1_attach, 4861 .tuner_attach = tfe7090pvr_tuner1_attach, 4862 4863 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 4864 }}, 4865 .size_of_priv = 4866 sizeof(struct dib0700_adapter_state), 4867 }, 4868 }, 4869 4870 .num_device_descs = 1, 4871 .devices = { 4872 { "DiBcom TFE7090PVR reference design", 4873 { &dib0700_usb_id_table[73], NULL }, 4874 { NULL }, 4875 }, 4876 }, 4877 4878 .rc.core = { 4879 .rc_interval = DEFAULT_RC_INTERVAL, 4880 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 4881 .module_name = "dib0700", 4882 .rc_query = dib0700_rc_query_old_firmware, 4883 .allowed_protos = RC_BIT_RC5 | 4884 RC_BIT_RC6_MCE | 4885 RC_BIT_NEC, 4886 .change_protocol = dib0700_change_protocol, 4887 }, 4888 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 4889 .num_adapters = 1, 4890 .adapter = { 4891 { 4892 .num_frontends = 1, 4893 .fe = {{ 4894 .frontend_attach = pctv340e_frontend_attach, 4895 .tuner_attach = xc4000_tuner_attach, 4896 4897 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 4898 }}, 4899 .size_of_priv = sizeof(struct 4900 dib0700_adapter_state), 4901 }, 4902 }, 4903 4904 .num_device_descs = 2, 4905 .devices = { 4906 { "Pinnacle PCTV 340e HD Pro USB Stick", 4907 { &dib0700_usb_id_table[76], NULL }, 4908 { NULL }, 4909 }, 4910 { "Pinnacle PCTV Hybrid Stick Solo", 4911 { &dib0700_usb_id_table[77], NULL }, 4912 { NULL }, 4913 }, 4914 }, 4915 .rc.core = { 4916 .rc_interval = DEFAULT_RC_INTERVAL, 4917 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 4918 .module_name = "dib0700", 4919 .rc_query = dib0700_rc_query_old_firmware, 4920 .allowed_protos = RC_BIT_RC5 | 4921 RC_BIT_RC6_MCE | 4922 RC_BIT_NEC, 4923 .change_protocol = dib0700_change_protocol, 4924 }, 4925 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 4926 .num_adapters = 1, 4927 .adapter = { 4928 { 4929 .num_frontends = 1, 4930 .fe = {{ 4931 .caps = DVB_USB_ADAP_HAS_PID_FILTER | 4932 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4933 .pid_filter_count = 32, 4934 .pid_filter = stk70x0p_pid_filter, 4935 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl, 4936 .frontend_attach = tfe7790p_frontend_attach, 4937 .tuner_attach = tfe7790p_tuner_attach, 4938 4939 DIB0700_DEFAULT_STREAMING_CONFIG(0x03), 4940 } }, 4941 4942 .size_of_priv = 4943 sizeof(struct dib0700_adapter_state), 4944 }, 4945 }, 4946 4947 .num_device_descs = 1, 4948 .devices = { 4949 { "DiBcom TFE7790P reference design", 4950 { &dib0700_usb_id_table[78], NULL }, 4951 { NULL }, 4952 }, 4953 }, 4954 4955 .rc.core = { 4956 .rc_interval = DEFAULT_RC_INTERVAL, 4957 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 4958 .module_name = "dib0700", 4959 .rc_query = dib0700_rc_query_old_firmware, 4960 .allowed_protos = RC_BIT_RC5 | 4961 RC_BIT_RC6_MCE | 4962 RC_BIT_NEC, 4963 .change_protocol = dib0700_change_protocol, 4964 }, 4965 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 4966 .num_adapters = 1, 4967 .adapter = { 4968 { 4969 .num_frontends = 1, 4970 .fe = {{ 4971 .caps = DVB_USB_ADAP_HAS_PID_FILTER | 4972 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 4973 .pid_filter_count = 32, 4974 .pid_filter = stk80xx_pid_filter, 4975 .pid_filter_ctrl = stk80xx_pid_filter_ctrl, 4976 .frontend_attach = tfe8096p_frontend_attach, 4977 .tuner_attach = tfe8096p_tuner_attach, 4978 4979 DIB0700_DEFAULT_STREAMING_CONFIG(0x02), 4980 4981 } }, 4982 4983 .size_of_priv = 4984 sizeof(struct dib0700_adapter_state), 4985 }, 4986 }, 4987 4988 .num_device_descs = 1, 4989 .devices = { 4990 { "DiBcom TFE8096P reference design", 4991 { &dib0700_usb_id_table[79], NULL }, 4992 { NULL }, 4993 }, 4994 }, 4995 4996 .rc.core = { 4997 .rc_interval = DEFAULT_RC_INTERVAL, 4998 .rc_codes = RC_MAP_DIB0700_RC5_TABLE, 4999 .module_name = "dib0700", 5000 .rc_query = dib0700_rc_query_old_firmware, 5001 .allowed_protos = RC_BIT_RC5 | 5002 RC_BIT_RC6_MCE | 5003 RC_BIT_NEC, 5004 .change_protocol = dib0700_change_protocol, 5005 }, 5006 }, 5007 }; 5008 5009 int dib0700_device_count = ARRAY_SIZE(dib0700_devices); 5010