1 /* 2 * mxl111sf-i2c.c - driver for the MaxLinear MXL111SF 3 * 4 * Copyright (C) 2010-2014 Michael Krufky <mkrufky@linuxtv.org> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 */ 16 17 #include "mxl111sf-i2c.h" 18 #include "mxl111sf.h" 19 20 /* SW-I2C ----------------------------------------------------------------- */ 21 22 #define SW_I2C_ADDR 0x1a 23 #define SW_I2C_EN 0x02 24 #define SW_SCL_OUT 0x04 25 #define SW_SDA_OUT 0x08 26 #define SW_SDA_IN 0x04 27 28 #define SW_I2C_BUSY_ADDR 0x2f 29 #define SW_I2C_BUSY 0x02 30 31 static int mxl111sf_i2c_bitbang_sendbyte(struct mxl111sf_state *state, 32 u8 byte) 33 { 34 int i, ret; 35 u8 data = 0; 36 37 mxl_i2c("(0x%02x)", byte); 38 39 ret = mxl111sf_read_reg(state, SW_I2C_BUSY_ADDR, &data); 40 if (mxl_fail(ret)) 41 goto fail; 42 43 for (i = 0; i < 8; i++) { 44 45 data = (byte & (0x80 >> i)) ? SW_SDA_OUT : 0; 46 47 ret = mxl111sf_write_reg(state, SW_I2C_ADDR, 48 0x10 | SW_I2C_EN | data); 49 if (mxl_fail(ret)) 50 goto fail; 51 52 ret = mxl111sf_write_reg(state, SW_I2C_ADDR, 53 0x10 | SW_I2C_EN | data | SW_SCL_OUT); 54 if (mxl_fail(ret)) 55 goto fail; 56 57 ret = mxl111sf_write_reg(state, SW_I2C_ADDR, 58 0x10 | SW_I2C_EN | data); 59 if (mxl_fail(ret)) 60 goto fail; 61 } 62 63 /* last bit was 0 so we need to release SDA */ 64 if (!(byte & 1)) { 65 ret = mxl111sf_write_reg(state, SW_I2C_ADDR, 66 0x10 | SW_I2C_EN | SW_SDA_OUT); 67 if (mxl_fail(ret)) 68 goto fail; 69 } 70 71 /* CLK high for ACK readback */ 72 ret = mxl111sf_write_reg(state, SW_I2C_ADDR, 73 0x10 | SW_I2C_EN | SW_SCL_OUT | SW_SDA_OUT); 74 if (mxl_fail(ret)) 75 goto fail; 76 77 ret = mxl111sf_read_reg(state, SW_I2C_BUSY_ADDR, &data); 78 if (mxl_fail(ret)) 79 goto fail; 80 81 /* drop the CLK after getting ACK, SDA will go high right away */ 82 ret = mxl111sf_write_reg(state, SW_I2C_ADDR, 83 0x10 | SW_I2C_EN | SW_SDA_OUT); 84 if (mxl_fail(ret)) 85 goto fail; 86 87 if (data & SW_SDA_IN) 88 ret = -EIO; 89 fail: 90 return ret; 91 } 92 93 static int mxl111sf_i2c_bitbang_recvbyte(struct mxl111sf_state *state, 94 u8 *pbyte) 95 { 96 int i, ret; 97 u8 byte = 0; 98 u8 data = 0; 99 100 mxl_i2c("()"); 101 102 *pbyte = 0; 103 104 ret = mxl111sf_write_reg(state, SW_I2C_ADDR, 105 0x10 | SW_I2C_EN | SW_SDA_OUT); 106 if (mxl_fail(ret)) 107 goto fail; 108 109 for (i = 0; i < 8; i++) { 110 ret = mxl111sf_write_reg(state, SW_I2C_ADDR, 111 0x10 | SW_I2C_EN | 112 SW_SCL_OUT | SW_SDA_OUT); 113 if (mxl_fail(ret)) 114 goto fail; 115 116 ret = mxl111sf_read_reg(state, SW_I2C_BUSY_ADDR, &data); 117 if (mxl_fail(ret)) 118 goto fail; 119 120 if (data & SW_SDA_IN) 121 byte |= (0x80 >> i); 122 123 ret = mxl111sf_write_reg(state, SW_I2C_ADDR, 124 0x10 | SW_I2C_EN | SW_SDA_OUT); 125 if (mxl_fail(ret)) 126 goto fail; 127 } 128 *pbyte = byte; 129 fail: 130 return ret; 131 } 132 133 static int mxl111sf_i2c_start(struct mxl111sf_state *state) 134 { 135 int ret; 136 137 mxl_i2c("()"); 138 139 ret = mxl111sf_write_reg(state, SW_I2C_ADDR, 140 0x10 | SW_I2C_EN | SW_SCL_OUT | SW_SDA_OUT); 141 if (mxl_fail(ret)) 142 goto fail; 143 144 ret = mxl111sf_write_reg(state, SW_I2C_ADDR, 145 0x10 | SW_I2C_EN | SW_SCL_OUT); 146 if (mxl_fail(ret)) 147 goto fail; 148 149 ret = mxl111sf_write_reg(state, SW_I2C_ADDR, 150 0x10 | SW_I2C_EN); /* start */ 151 mxl_fail(ret); 152 fail: 153 return ret; 154 } 155 156 static int mxl111sf_i2c_stop(struct mxl111sf_state *state) 157 { 158 int ret; 159 160 mxl_i2c("()"); 161 162 ret = mxl111sf_write_reg(state, SW_I2C_ADDR, 163 0x10 | SW_I2C_EN); /* stop */ 164 if (mxl_fail(ret)) 165 goto fail; 166 167 ret = mxl111sf_write_reg(state, SW_I2C_ADDR, 168 0x10 | SW_I2C_EN | SW_SCL_OUT); 169 if (mxl_fail(ret)) 170 goto fail; 171 172 ret = mxl111sf_write_reg(state, SW_I2C_ADDR, 173 0x10 | SW_I2C_EN | SW_SCL_OUT | SW_SDA_OUT); 174 if (mxl_fail(ret)) 175 goto fail; 176 177 ret = mxl111sf_write_reg(state, SW_I2C_ADDR, 178 0x10 | SW_SCL_OUT | SW_SDA_OUT); 179 mxl_fail(ret); 180 fail: 181 return ret; 182 } 183 184 static int mxl111sf_i2c_ack(struct mxl111sf_state *state) 185 { 186 int ret; 187 u8 b = 0; 188 189 mxl_i2c("()"); 190 191 ret = mxl111sf_read_reg(state, SW_I2C_BUSY_ADDR, &b); 192 if (mxl_fail(ret)) 193 goto fail; 194 195 ret = mxl111sf_write_reg(state, SW_I2C_ADDR, 196 0x10 | SW_I2C_EN); 197 if (mxl_fail(ret)) 198 goto fail; 199 200 /* pull SDA low */ 201 ret = mxl111sf_write_reg(state, SW_I2C_ADDR, 202 0x10 | SW_I2C_EN | SW_SCL_OUT); 203 if (mxl_fail(ret)) 204 goto fail; 205 206 ret = mxl111sf_write_reg(state, SW_I2C_ADDR, 207 0x10 | SW_I2C_EN | SW_SDA_OUT); 208 mxl_fail(ret); 209 fail: 210 return ret; 211 } 212 213 static int mxl111sf_i2c_nack(struct mxl111sf_state *state) 214 { 215 int ret; 216 217 mxl_i2c("()"); 218 219 /* SDA high to signal last byte read from slave */ 220 ret = mxl111sf_write_reg(state, SW_I2C_ADDR, 221 0x10 | SW_I2C_EN | SW_SCL_OUT | SW_SDA_OUT); 222 if (mxl_fail(ret)) 223 goto fail; 224 225 ret = mxl111sf_write_reg(state, SW_I2C_ADDR, 226 0x10 | SW_I2C_EN | SW_SDA_OUT); 227 mxl_fail(ret); 228 fail: 229 return ret; 230 } 231 232 /* ------------------------------------------------------------------------ */ 233 234 static int mxl111sf_i2c_sw_xfer_msg(struct mxl111sf_state *state, 235 struct i2c_msg *msg) 236 { 237 int i, ret; 238 239 mxl_i2c("()"); 240 241 if (msg->flags & I2C_M_RD) { 242 243 ret = mxl111sf_i2c_start(state); 244 if (mxl_fail(ret)) 245 goto fail; 246 247 ret = mxl111sf_i2c_bitbang_sendbyte(state, 248 (msg->addr << 1) | 0x01); 249 if (mxl_fail(ret)) { 250 mxl111sf_i2c_stop(state); 251 goto fail; 252 } 253 254 for (i = 0; i < msg->len; i++) { 255 ret = mxl111sf_i2c_bitbang_recvbyte(state, 256 &msg->buf[i]); 257 if (mxl_fail(ret)) { 258 mxl111sf_i2c_stop(state); 259 goto fail; 260 } 261 262 if (i < msg->len - 1) 263 mxl111sf_i2c_ack(state); 264 } 265 266 mxl111sf_i2c_nack(state); 267 268 ret = mxl111sf_i2c_stop(state); 269 if (mxl_fail(ret)) 270 goto fail; 271 272 } else { 273 274 ret = mxl111sf_i2c_start(state); 275 if (mxl_fail(ret)) 276 goto fail; 277 278 ret = mxl111sf_i2c_bitbang_sendbyte(state, 279 (msg->addr << 1) & 0xfe); 280 if (mxl_fail(ret)) { 281 mxl111sf_i2c_stop(state); 282 goto fail; 283 } 284 285 for (i = 0; i < msg->len; i++) { 286 ret = mxl111sf_i2c_bitbang_sendbyte(state, 287 msg->buf[i]); 288 if (mxl_fail(ret)) { 289 mxl111sf_i2c_stop(state); 290 goto fail; 291 } 292 } 293 294 /* FIXME: we only want to do this on the last transaction */ 295 mxl111sf_i2c_stop(state); 296 } 297 fail: 298 return ret; 299 } 300 301 /* HW-I2C ----------------------------------------------------------------- */ 302 303 #define USB_WRITE_I2C_CMD 0x99 304 #define USB_READ_I2C_CMD 0xdd 305 #define USB_END_I2C_CMD 0xfe 306 307 #define USB_WRITE_I2C_CMD_LEN 26 308 #define USB_READ_I2C_CMD_LEN 24 309 310 #define I2C_MUX_REG 0x30 311 #define I2C_CONTROL_REG 0x00 312 #define I2C_SLAVE_ADDR_REG 0x08 313 #define I2C_DATA_REG 0x0c 314 #define I2C_INT_STATUS_REG 0x10 315 316 static int mxl111sf_i2c_send_data(struct mxl111sf_state *state, 317 u8 index, u8 *wdata) 318 { 319 int ret = mxl111sf_ctrl_msg(state, wdata[0], 320 &wdata[1], 25, NULL, 0); 321 mxl_fail(ret); 322 323 return ret; 324 } 325 326 static int mxl111sf_i2c_get_data(struct mxl111sf_state *state, 327 u8 index, u8 *wdata, u8 *rdata) 328 { 329 int ret = mxl111sf_ctrl_msg(state, wdata[0], 330 &wdata[1], 25, rdata, 24); 331 mxl_fail(ret); 332 333 return ret; 334 } 335 336 static u8 mxl111sf_i2c_check_status(struct mxl111sf_state *state) 337 { 338 u8 status = 0; 339 u8 buf[26]; 340 341 mxl_i2c_adv("()"); 342 343 buf[0] = USB_READ_I2C_CMD; 344 buf[1] = 0x00; 345 346 buf[2] = I2C_INT_STATUS_REG; 347 buf[3] = 0x00; 348 buf[4] = 0x00; 349 350 buf[5] = USB_END_I2C_CMD; 351 352 mxl111sf_i2c_get_data(state, 0, buf, buf); 353 354 if (buf[1] & 0x04) 355 status = 1; 356 357 return status; 358 } 359 360 static u8 mxl111sf_i2c_check_fifo(struct mxl111sf_state *state) 361 { 362 u8 status = 0; 363 u8 buf[26]; 364 365 mxl_i2c("()"); 366 367 buf[0] = USB_READ_I2C_CMD; 368 buf[1] = 0x00; 369 370 buf[2] = I2C_MUX_REG; 371 buf[3] = 0x00; 372 buf[4] = 0x00; 373 374 buf[5] = I2C_INT_STATUS_REG; 375 buf[6] = 0x00; 376 buf[7] = 0x00; 377 buf[8] = USB_END_I2C_CMD; 378 379 mxl111sf_i2c_get_data(state, 0, buf, buf); 380 381 if (0x08 == (buf[1] & 0x08)) 382 status = 1; 383 384 if ((buf[5] & 0x02) == 0x02) 385 mxl_i2c("(buf[5] & 0x02) == 0x02"); /* FIXME */ 386 387 return status; 388 } 389 390 static int mxl111sf_i2c_readagain(struct mxl111sf_state *state, 391 u8 count, u8 *rbuf) 392 { 393 u8 i2c_w_data[26]; 394 u8 i2c_r_data[24]; 395 u8 i = 0; 396 u8 fifo_status = 0; 397 int status = 0; 398 399 mxl_i2c("read %d bytes", count); 400 401 while ((fifo_status == 0) && (i++ < 5)) 402 fifo_status = mxl111sf_i2c_check_fifo(state); 403 404 i2c_w_data[0] = 0xDD; 405 i2c_w_data[1] = 0x00; 406 407 for (i = 2; i < 26; i++) 408 i2c_w_data[i] = 0xFE; 409 410 for (i = 0; i < count; i++) { 411 i2c_w_data[2+(i*3)] = 0x0C; 412 i2c_w_data[3+(i*3)] = 0x00; 413 i2c_w_data[4+(i*3)] = 0x00; 414 } 415 416 mxl111sf_i2c_get_data(state, 0, i2c_w_data, i2c_r_data); 417 418 /* Check for I2C NACK status */ 419 if (mxl111sf_i2c_check_status(state) == 1) { 420 mxl_i2c("error!"); 421 } else { 422 for (i = 0; i < count; i++) { 423 rbuf[i] = i2c_r_data[(i*3)+1]; 424 mxl_i2c("%02x\t %02x", 425 i2c_r_data[(i*3)+1], 426 i2c_r_data[(i*3)+2]); 427 } 428 429 status = 1; 430 } 431 432 return status; 433 } 434 435 #define HWI2C400 1 436 static int mxl111sf_i2c_hw_xfer_msg(struct mxl111sf_state *state, 437 struct i2c_msg *msg) 438 { 439 int i, k, ret = 0; 440 u16 index = 0; 441 u8 buf[26]; 442 u8 i2c_r_data[24]; 443 u16 block_len; 444 u16 left_over_len; 445 u8 rd_status[8]; 446 u8 ret_status; 447 u8 readbuff[26]; 448 449 mxl_i2c("addr: 0x%02x, read buff len: %d, write buff len: %d", 450 msg->addr, (msg->flags & I2C_M_RD) ? msg->len : 0, 451 (!(msg->flags & I2C_M_RD)) ? msg->len : 0); 452 453 for (index = 0; index < 26; index++) 454 buf[index] = USB_END_I2C_CMD; 455 456 /* command to indicate data payload is destined for I2C interface */ 457 buf[0] = USB_WRITE_I2C_CMD; 458 buf[1] = 0x00; 459 460 /* enable I2C interface */ 461 buf[2] = I2C_MUX_REG; 462 buf[3] = 0x80; 463 buf[4] = 0x00; 464 465 /* enable I2C interface */ 466 buf[5] = I2C_MUX_REG; 467 buf[6] = 0x81; 468 buf[7] = 0x00; 469 470 /* set Timeout register on I2C interface */ 471 buf[8] = 0x14; 472 buf[9] = 0xff; 473 buf[10] = 0x00; 474 #if 0 475 /* enable Interrupts on I2C interface */ 476 buf[8] = 0x24; 477 buf[9] = 0xF7; 478 buf[10] = 0x00; 479 #endif 480 buf[11] = 0x24; 481 buf[12] = 0xF7; 482 buf[13] = 0x00; 483 484 ret = mxl111sf_i2c_send_data(state, 0, buf); 485 486 /* write data on I2C bus */ 487 if (!(msg->flags & I2C_M_RD) && (msg->len > 0)) { 488 mxl_i2c("%d\t%02x", msg->len, msg->buf[0]); 489 490 /* control register on I2C interface to initialize I2C bus */ 491 buf[2] = I2C_CONTROL_REG; 492 buf[3] = 0x5E; 493 buf[4] = (HWI2C400) ? 0x03 : 0x0D; 494 495 /* I2C Slave device Address */ 496 buf[5] = I2C_SLAVE_ADDR_REG; 497 buf[6] = (msg->addr); 498 buf[7] = 0x00; 499 buf[8] = USB_END_I2C_CMD; 500 ret = mxl111sf_i2c_send_data(state, 0, buf); 501 502 /* check for slave device status */ 503 if (mxl111sf_i2c_check_status(state) == 1) { 504 mxl_i2c("NACK writing slave address %02x", 505 msg->addr); 506 /* if NACK, stop I2C bus and exit */ 507 buf[2] = I2C_CONTROL_REG; 508 buf[3] = 0x4E; 509 buf[4] = (HWI2C400) ? 0x03 : 0x0D; 510 ret = -EIO; 511 goto exit; 512 } 513 514 /* I2C interface can do I2C operations in block of 8 bytes of 515 I2C data. calculation to figure out number of blocks of i2c 516 data required to program */ 517 block_len = (msg->len / 8); 518 left_over_len = (msg->len % 8); 519 index = 0; 520 521 mxl_i2c("block_len %d, left_over_len %d", 522 block_len, left_over_len); 523 524 for (index = 0; index < block_len; index++) { 525 for (i = 0; i < 8; i++) { 526 /* write data on I2C interface */ 527 buf[2+(i*3)] = I2C_DATA_REG; 528 buf[3+(i*3)] = msg->buf[(index*8)+i]; 529 buf[4+(i*3)] = 0x00; 530 } 531 532 ret = mxl111sf_i2c_send_data(state, 0, buf); 533 534 /* check for I2C NACK status */ 535 if (mxl111sf_i2c_check_status(state) == 1) { 536 mxl_i2c("NACK writing slave address %02x", 537 msg->addr); 538 539 /* if NACK, stop I2C bus and exit */ 540 buf[2] = I2C_CONTROL_REG; 541 buf[3] = 0x4E; 542 buf[4] = (HWI2C400) ? 0x03 : 0x0D; 543 ret = -EIO; 544 goto exit; 545 } 546 547 } 548 549 if (left_over_len) { 550 for (k = 0; k < 26; k++) 551 buf[k] = USB_END_I2C_CMD; 552 553 buf[0] = 0x99; 554 buf[1] = 0x00; 555 556 for (i = 0; i < left_over_len; i++) { 557 buf[2+(i*3)] = I2C_DATA_REG; 558 buf[3+(i*3)] = msg->buf[(index*8)+i]; 559 mxl_i2c("index = %d %d data %d", 560 index, i, msg->buf[(index*8)+i]); 561 buf[4+(i*3)] = 0x00; 562 } 563 ret = mxl111sf_i2c_send_data(state, 0, buf); 564 565 /* check for I2C NACK status */ 566 if (mxl111sf_i2c_check_status(state) == 1) { 567 mxl_i2c("NACK writing slave address %02x", 568 msg->addr); 569 570 /* if NACK, stop I2C bus and exit */ 571 buf[2] = I2C_CONTROL_REG; 572 buf[3] = 0x4E; 573 buf[4] = (HWI2C400) ? 0x03 : 0x0D; 574 ret = -EIO; 575 goto exit; 576 } 577 578 } 579 580 /* issue I2C STOP after write */ 581 buf[2] = I2C_CONTROL_REG; 582 buf[3] = 0x4E; 583 buf[4] = (HWI2C400) ? 0x03 : 0x0D; 584 585 } 586 587 /* read data from I2C bus */ 588 if ((msg->flags & I2C_M_RD) && (msg->len > 0)) { 589 mxl_i2c("read buf len %d", msg->len); 590 591 /* command to indicate data payload is 592 destined for I2C interface */ 593 buf[2] = I2C_CONTROL_REG; 594 buf[3] = 0xDF; 595 buf[4] = (HWI2C400) ? 0x03 : 0x0D; 596 597 /* I2C xfer length */ 598 buf[5] = 0x14; 599 buf[6] = (msg->len & 0xFF); 600 buf[7] = 0; 601 602 /* I2C slave device Address */ 603 buf[8] = I2C_SLAVE_ADDR_REG; 604 buf[9] = msg->addr; 605 buf[10] = 0x00; 606 buf[11] = USB_END_I2C_CMD; 607 ret = mxl111sf_i2c_send_data(state, 0, buf); 608 609 /* check for I2C NACK status */ 610 if (mxl111sf_i2c_check_status(state) == 1) { 611 mxl_i2c("NACK reading slave address %02x", 612 msg->addr); 613 614 /* if NACK, stop I2C bus and exit */ 615 buf[2] = I2C_CONTROL_REG; 616 buf[3] = 0xC7; 617 buf[4] = (HWI2C400) ? 0x03 : 0x0D; 618 ret = -EIO; 619 goto exit; 620 } 621 622 /* I2C interface can do I2C operations in block of 8 bytes of 623 I2C data. calculation to figure out number of blocks of 624 i2c data required to program */ 625 block_len = ((msg->len) / 8); 626 left_over_len = ((msg->len) % 8); 627 index = 0; 628 629 mxl_i2c("block_len %d, left_over_len %d", 630 block_len, left_over_len); 631 632 /* command to read data from I2C interface */ 633 buf[0] = USB_READ_I2C_CMD; 634 buf[1] = 0x00; 635 636 for (index = 0; index < block_len; index++) { 637 /* setup I2C read request packet on I2C interface */ 638 for (i = 0; i < 8; i++) { 639 buf[2+(i*3)] = I2C_DATA_REG; 640 buf[3+(i*3)] = 0x00; 641 buf[4+(i*3)] = 0x00; 642 } 643 644 ret = mxl111sf_i2c_get_data(state, 0, buf, i2c_r_data); 645 646 /* check for I2C NACK status */ 647 if (mxl111sf_i2c_check_status(state) == 1) { 648 mxl_i2c("NACK reading slave address %02x", 649 msg->addr); 650 651 /* if NACK, stop I2C bus and exit */ 652 buf[2] = I2C_CONTROL_REG; 653 buf[3] = 0xC7; 654 buf[4] = (HWI2C400) ? 0x03 : 0x0D; 655 ret = -EIO; 656 goto exit; 657 } 658 659 /* copy data from i2c data payload to read buffer */ 660 for (i = 0; i < 8; i++) { 661 rd_status[i] = i2c_r_data[(i*3)+2]; 662 663 if (rd_status[i] == 0x04) { 664 if (i < 7) { 665 mxl_i2c("i2c fifo empty! @ %d", 666 i); 667 msg->buf[(index*8)+i] = 668 i2c_r_data[(i*3)+1]; 669 /* read again */ 670 ret_status = 671 mxl111sf_i2c_readagain( 672 state, 8-(i+1), 673 readbuff); 674 if (ret_status == 1) { 675 for (k = 0; 676 k < 8-(i+1); 677 k++) { 678 679 msg->buf[(index*8)+(k+i+1)] = 680 readbuff[k]; 681 mxl_i2c("read data: %02x\t %02x", 682 msg->buf[(index*8)+(k+i)], 683 (index*8)+(k+i)); 684 mxl_i2c("read data: %02x\t %02x", 685 msg->buf[(index*8)+(k+i+1)], 686 readbuff[k]); 687 688 } 689 goto stop_copy; 690 } else { 691 mxl_i2c("readagain ERROR!"); 692 } 693 } else { 694 msg->buf[(index*8)+i] = 695 i2c_r_data[(i*3)+1]; 696 } 697 } else { 698 msg->buf[(index*8)+i] = 699 i2c_r_data[(i*3)+1]; 700 } 701 } 702 stop_copy: 703 ; 704 705 } 706 707 if (left_over_len) { 708 for (k = 0; k < 26; k++) 709 buf[k] = USB_END_I2C_CMD; 710 711 buf[0] = 0xDD; 712 buf[1] = 0x00; 713 714 for (i = 0; i < left_over_len; i++) { 715 buf[2+(i*3)] = I2C_DATA_REG; 716 buf[3+(i*3)] = 0x00; 717 buf[4+(i*3)] = 0x00; 718 } 719 ret = mxl111sf_i2c_get_data(state, 0, buf, 720 i2c_r_data); 721 722 /* check for I2C NACK status */ 723 if (mxl111sf_i2c_check_status(state) == 1) { 724 mxl_i2c("NACK reading slave address %02x", 725 msg->addr); 726 727 /* if NACK, stop I2C bus and exit */ 728 buf[2] = I2C_CONTROL_REG; 729 buf[3] = 0xC7; 730 buf[4] = (HWI2C400) ? 0x03 : 0x0D; 731 ret = -EIO; 732 goto exit; 733 } 734 735 for (i = 0; i < left_over_len; i++) { 736 msg->buf[(block_len*8)+i] = 737 i2c_r_data[(i*3)+1]; 738 mxl_i2c("read data: %02x\t %02x", 739 i2c_r_data[(i*3)+1], 740 i2c_r_data[(i*3)+2]); 741 } 742 } 743 744 /* indicate I2C interface to issue NACK 745 after next I2C read op */ 746 buf[0] = USB_WRITE_I2C_CMD; 747 buf[1] = 0x00; 748 749 /* control register */ 750 buf[2] = I2C_CONTROL_REG; 751 buf[3] = 0x17; 752 buf[4] = (HWI2C400) ? 0x03 : 0x0D; 753 754 buf[5] = USB_END_I2C_CMD; 755 ret = mxl111sf_i2c_send_data(state, 0, buf); 756 757 /* control register */ 758 buf[2] = I2C_CONTROL_REG; 759 buf[3] = 0xC7; 760 buf[4] = (HWI2C400) ? 0x03 : 0x0D; 761 762 } 763 exit: 764 /* STOP and disable I2C MUX */ 765 buf[0] = USB_WRITE_I2C_CMD; 766 buf[1] = 0x00; 767 768 /* de-initilize I2C BUS */ 769 buf[5] = USB_END_I2C_CMD; 770 mxl111sf_i2c_send_data(state, 0, buf); 771 772 /* Control Register */ 773 buf[2] = I2C_CONTROL_REG; 774 buf[3] = 0xDF; 775 buf[4] = 0x03; 776 777 /* disable I2C interface */ 778 buf[5] = I2C_MUX_REG; 779 buf[6] = 0x00; 780 buf[7] = 0x00; 781 782 /* de-initilize I2C BUS */ 783 buf[8] = USB_END_I2C_CMD; 784 mxl111sf_i2c_send_data(state, 0, buf); 785 786 /* disable I2C interface */ 787 buf[2] = I2C_MUX_REG; 788 buf[3] = 0x81; 789 buf[4] = 0x00; 790 791 /* disable I2C interface */ 792 buf[5] = I2C_MUX_REG; 793 buf[6] = 0x00; 794 buf[7] = 0x00; 795 796 /* disable I2C interface */ 797 buf[8] = I2C_MUX_REG; 798 buf[9] = 0x00; 799 buf[10] = 0x00; 800 801 buf[11] = USB_END_I2C_CMD; 802 mxl111sf_i2c_send_data(state, 0, buf); 803 804 return ret; 805 } 806 807 /* ------------------------------------------------------------------------ */ 808 809 int mxl111sf_i2c_xfer(struct i2c_adapter *adap, 810 struct i2c_msg msg[], int num) 811 { 812 struct dvb_usb_device *d = i2c_get_adapdata(adap); 813 struct mxl111sf_state *state = d->priv; 814 int hwi2c = (state->chip_rev > MXL111SF_V6); 815 int i, ret; 816 817 if (mutex_lock_interruptible(&d->i2c_mutex) < 0) 818 return -EAGAIN; 819 820 for (i = 0; i < num; i++) { 821 ret = (hwi2c) ? 822 mxl111sf_i2c_hw_xfer_msg(state, &msg[i]) : 823 mxl111sf_i2c_sw_xfer_msg(state, &msg[i]); 824 if (mxl_fail(ret)) { 825 mxl_debug_adv("failed with error %d on i2c transaction %d of %d, %sing %d bytes to/from 0x%02x", 826 ret, i+1, num, 827 (msg[i].flags & I2C_M_RD) ? 828 "read" : "writ", 829 msg[i].len, msg[i].addr); 830 831 break; 832 } 833 } 834 835 mutex_unlock(&d->i2c_mutex); 836 837 return i == num ? num : -EREMOTEIO; 838 } 839