1 /* 2 * Afatech AF9035 DVB USB driver 3 * 4 * Copyright (C) 2009 Antti Palosaari <crope@iki.fi> 5 * Copyright (C) 2012 Antti Palosaari <crope@iki.fi> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License along 18 * with this program; if not, write to the Free Software Foundation, Inc., 19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. 20 */ 21 22 #ifndef AF9035_H 23 #define AF9035_H 24 25 #include <linux/platform_device.h> 26 #include "dvb_usb.h" 27 #include "af9033.h" 28 #include "tua9001.h" 29 #include "fc0011.h" 30 #include "fc0012.h" 31 #include "mxl5007t.h" 32 #include "tda18218.h" 33 #include "fc2580.h" 34 #include "it913x.h" 35 #include "si2168.h" 36 #include "si2157.h" 37 38 struct reg_val { 39 u32 reg; 40 u8 val; 41 }; 42 43 struct reg_val_mask { 44 u32 reg; 45 u8 val; 46 u8 mask; 47 }; 48 49 struct usb_req { 50 u8 cmd; 51 u8 mbox; 52 u8 wlen; 53 u8 *wbuf; 54 u8 rlen; 55 u8 *rbuf; 56 }; 57 58 struct state { 59 #define BUF_LEN 64 60 u8 buf[BUF_LEN]; 61 u8 seq; /* packet sequence number */ 62 u8 prechip_version; 63 u8 chip_version; 64 u16 chip_type; 65 u8 eeprom[256]; 66 bool no_eeprom; 67 u8 ir_mode; 68 u8 ir_type; 69 u8 dual_mode:1; 70 u8 no_read:1; 71 u8 af9033_i2c_addr[2]; 72 struct af9033_config af9033_config[2]; 73 struct af9033_ops ops; 74 #define AF9035_I2C_CLIENT_MAX 4 75 struct i2c_client *i2c_client[AF9035_I2C_CLIENT_MAX]; 76 struct i2c_adapter *i2c_adapter_demod; 77 struct platform_device *platform_device_tuner[2]; 78 }; 79 80 static const u32 clock_lut_af9035[] = { 81 20480000, /* FPGA */ 82 16384000, /* 16.38 MHz */ 83 20480000, /* 20.48 MHz */ 84 36000000, /* 36.00 MHz */ 85 30000000, /* 30.00 MHz */ 86 26000000, /* 26.00 MHz */ 87 28000000, /* 28.00 MHz */ 88 32000000, /* 32.00 MHz */ 89 34000000, /* 34.00 MHz */ 90 24000000, /* 24.00 MHz */ 91 22000000, /* 22.00 MHz */ 92 12000000, /* 12.00 MHz */ 93 }; 94 95 static const u32 clock_lut_it9135[] = { 96 12000000, /* 12.00 MHz */ 97 20480000, /* 20.48 MHz */ 98 36000000, /* 36.00 MHz */ 99 30000000, /* 30.00 MHz */ 100 26000000, /* 26.00 MHz */ 101 28000000, /* 28.00 MHz */ 102 32000000, /* 32.00 MHz */ 103 34000000, /* 34.00 MHz */ 104 24000000, /* 24.00 MHz */ 105 22000000, /* 22.00 MHz */ 106 }; 107 108 #define AF9035_FIRMWARE_AF9035 "dvb-usb-af9035-02.fw" 109 #define AF9035_FIRMWARE_IT9135_V1 "dvb-usb-it9135-01.fw" 110 #define AF9035_FIRMWARE_IT9135_V2 "dvb-usb-it9135-02.fw" 111 #define AF9035_FIRMWARE_IT9303 "dvb-usb-it9303-01.fw" 112 113 /* 114 * eeprom is memory mapped as read only. Writing that memory mapped address 115 * will not corrupt eeprom. 116 * 117 * TS mode: 118 * 0 TS 119 * 1 DCA + PIP 120 * 3 PIP 121 * 5 DCA + PIP (AF9035 only) 122 * n DCA 123 * 124 * Values 0, 3 and 5 are seen to this day. 0 for single TS and 3/5 for dual TS. 125 */ 126 127 #define EEPROM_BASE_AF9035 0x42f5 128 #define EEPROM_BASE_IT9135 0x4994 129 #define EEPROM_SHIFT 0x10 130 131 #define EEPROM_IR_MODE 0x18 132 #define EEPROM_TS_MODE 0x31 133 #define EEPROM_2ND_DEMOD_ADDR 0x32 134 #define EEPROM_IR_TYPE 0x34 135 #define EEPROM_1_IF_L 0x38 136 #define EEPROM_1_IF_H 0x39 137 #define EEPROM_1_TUNER_ID 0x3c 138 #define EEPROM_2_IF_L 0x48 139 #define EEPROM_2_IF_H 0x49 140 #define EEPROM_2_TUNER_ID 0x4c 141 142 /* USB commands */ 143 #define CMD_MEM_RD 0x00 144 #define CMD_MEM_WR 0x01 145 #define CMD_I2C_RD 0x02 146 #define CMD_I2C_WR 0x03 147 #define CMD_IR_GET 0x18 148 #define CMD_FW_DL 0x21 149 #define CMD_FW_QUERYINFO 0x22 150 #define CMD_FW_BOOT 0x23 151 #define CMD_FW_DL_BEGIN 0x24 152 #define CMD_FW_DL_END 0x25 153 #define CMD_FW_SCATTER_WR 0x29 154 #define CMD_GENERIC_I2C_RD 0x2a 155 #define CMD_GENERIC_I2C_WR 0x2b 156 157 #endif 158