10c0d06caSMauro Carvalho Chehab /* 20c0d06caSMauro Carvalho Chehab * Driver for the Auvitek USB bridge 30c0d06caSMauro Carvalho Chehab * 40c0d06caSMauro Carvalho Chehab * Copyright (c) 2008 Steven Toth <stoth@linuxtv.org> 50c0d06caSMauro Carvalho Chehab * 60c0d06caSMauro Carvalho Chehab * This program is free software; you can redistribute it and/or modify 70c0d06caSMauro Carvalho Chehab * it under the terms of the GNU General Public License as published by 80c0d06caSMauro Carvalho Chehab * the Free Software Foundation; either version 2 of the License, or 90c0d06caSMauro Carvalho Chehab * (at your option) any later version. 100c0d06caSMauro Carvalho Chehab * 110c0d06caSMauro Carvalho Chehab * This program is distributed in the hope that it will be useful, 120c0d06caSMauro Carvalho Chehab * but WITHOUT ANY WARRANTY; without even the implied warranty of 130c0d06caSMauro Carvalho Chehab * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 140c0d06caSMauro Carvalho Chehab * 150c0d06caSMauro Carvalho Chehab * GNU General Public License for more details. 160c0d06caSMauro Carvalho Chehab * 170c0d06caSMauro Carvalho Chehab * You should have received a copy of the GNU General Public License 180c0d06caSMauro Carvalho Chehab * along with this program; if not, write to the Free Software 190c0d06caSMauro Carvalho Chehab * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 200c0d06caSMauro Carvalho Chehab */ 210c0d06caSMauro Carvalho Chehab 220c0d06caSMauro Carvalho Chehab /* We'll start to rename these registers once we have a better 230c0d06caSMauro Carvalho Chehab * understanding of their meaning. 240c0d06caSMauro Carvalho Chehab */ 250c0d06caSMauro Carvalho Chehab #define REG_000 0x000 260c0d06caSMauro Carvalho Chehab #define REG_001 0x001 270c0d06caSMauro Carvalho Chehab #define REG_002 0x002 280c0d06caSMauro Carvalho Chehab #define REG_003 0x003 290c0d06caSMauro Carvalho Chehab 300c0d06caSMauro Carvalho Chehab #define AU0828_SENSORCTRL_100 0x100 310c0d06caSMauro Carvalho Chehab #define AU0828_SENSORCTRL_VBI_103 0x103 320c0d06caSMauro Carvalho Chehab 330c0d06caSMauro Carvalho Chehab /* I2C registers */ 340c0d06caSMauro Carvalho Chehab #define AU0828_I2C_TRIGGER_200 0x200 350c0d06caSMauro Carvalho Chehab #define AU0828_I2C_STATUS_201 0x201 360c0d06caSMauro Carvalho Chehab #define AU0828_I2C_CLK_DIVIDER_202 0x202 370c0d06caSMauro Carvalho Chehab #define AU0828_I2C_DEST_ADDR_203 0x203 380c0d06caSMauro Carvalho Chehab #define AU0828_I2C_WRITE_FIFO_205 0x205 390c0d06caSMauro Carvalho Chehab #define AU0828_I2C_READ_FIFO_209 0x209 400c0d06caSMauro Carvalho Chehab #define AU0828_I2C_MULTIBYTE_MODE_2FF 0x2ff 410c0d06caSMauro Carvalho Chehab 420c0d06caSMauro Carvalho Chehab /* Audio registers */ 430c0d06caSMauro Carvalho Chehab #define AU0828_AUDIOCTRL_50C 0x50C 440c0d06caSMauro Carvalho Chehab 450c0d06caSMauro Carvalho Chehab #define REG_600 0x600 460c0d06caSMauro Carvalho Chehab 470c0d06caSMauro Carvalho Chehab /*********************************************************************/ 480c0d06caSMauro Carvalho Chehab /* Here are constants for values associated with the above registers */ 490c0d06caSMauro Carvalho Chehab 500c0d06caSMauro Carvalho Chehab /* I2C Trigger (Reg 0x200) */ 510c0d06caSMauro Carvalho Chehab #define AU0828_I2C_TRIGGER_WRITE 0x01 520c0d06caSMauro Carvalho Chehab #define AU0828_I2C_TRIGGER_READ 0x20 530c0d06caSMauro Carvalho Chehab #define AU0828_I2C_TRIGGER_HOLD 0x40 540c0d06caSMauro Carvalho Chehab 550c0d06caSMauro Carvalho Chehab /* I2C Status (Reg 0x201) */ 560c0d06caSMauro Carvalho Chehab #define AU0828_I2C_STATUS_READ_DONE 0x01 570c0d06caSMauro Carvalho Chehab #define AU0828_I2C_STATUS_NO_READ_ACK 0x02 580c0d06caSMauro Carvalho Chehab #define AU0828_I2C_STATUS_WRITE_DONE 0x04 590c0d06caSMauro Carvalho Chehab #define AU0828_I2C_STATUS_NO_WRITE_ACK 0x08 600c0d06caSMauro Carvalho Chehab #define AU0828_I2C_STATUS_BUSY 0x10 610c0d06caSMauro Carvalho Chehab 620c0d06caSMauro Carvalho Chehab /* I2C Clock Divider (Reg 0x202) */ 630c0d06caSMauro Carvalho Chehab #define AU0828_I2C_CLK_250KHZ 0x07 640c0d06caSMauro Carvalho Chehab #define AU0828_I2C_CLK_100KHZ 0x14 650c0d06caSMauro Carvalho Chehab #define AU0828_I2C_CLK_30KHZ 0x40 660c0d06caSMauro Carvalho Chehab #define AU0828_I2C_CLK_20KHZ 0x60 67