1 /* 2 * Driver for Microtune MT2060 "Single chip dual conversion broadband tuner" 3 * 4 * Copyright (c) 2006 Olivier DANET <odanet@caramail.com> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.= 20 */ 21 22 /* In that file, frequencies are expressed in kiloHertz to avoid 32 bits overflows */ 23 24 #include <linux/module.h> 25 #include <linux/delay.h> 26 #include <linux/dvb/frontend.h> 27 #include <linux/i2c.h> 28 #include <linux/slab.h> 29 30 #include "dvb_frontend.h" 31 32 #include "mt2060.h" 33 #include "mt2060_priv.h" 34 35 static int debug; 36 module_param(debug, int, 0644); 37 MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off)."); 38 39 #define dprintk(args...) do { if (debug) {printk(KERN_DEBUG "MT2060: " args); printk("\n"); }} while (0) 40 41 // Reads a single register 42 static int mt2060_readreg(struct mt2060_priv *priv, u8 reg, u8 *val) 43 { 44 struct i2c_msg msg[2] = { 45 { .addr = priv->cfg->i2c_address, .flags = 0, .buf = ®, .len = 1 }, 46 { .addr = priv->cfg->i2c_address, .flags = I2C_M_RD, .buf = val, .len = 1 }, 47 }; 48 49 if (i2c_transfer(priv->i2c, msg, 2) != 2) { 50 printk(KERN_WARNING "mt2060 I2C read failed\n"); 51 return -EREMOTEIO; 52 } 53 return 0; 54 } 55 56 // Writes a single register 57 static int mt2060_writereg(struct mt2060_priv *priv, u8 reg, u8 val) 58 { 59 u8 buf[2] = { reg, val }; 60 struct i2c_msg msg = { 61 .addr = priv->cfg->i2c_address, .flags = 0, .buf = buf, .len = 2 62 }; 63 64 if (i2c_transfer(priv->i2c, &msg, 1) != 1) { 65 printk(KERN_WARNING "mt2060 I2C write failed\n"); 66 return -EREMOTEIO; 67 } 68 return 0; 69 } 70 71 // Writes a set of consecutive registers 72 static int mt2060_writeregs(struct mt2060_priv *priv,u8 *buf, u8 len) 73 { 74 struct i2c_msg msg = { 75 .addr = priv->cfg->i2c_address, .flags = 0, .buf = buf, .len = len 76 }; 77 if (i2c_transfer(priv->i2c, &msg, 1) != 1) { 78 printk(KERN_WARNING "mt2060 I2C write failed (len=%i)\n",(int)len); 79 return -EREMOTEIO; 80 } 81 return 0; 82 } 83 84 // Initialisation sequences 85 // LNABAND=3, NUM1=0x3C, DIV1=0x74, NUM2=0x1080, DIV2=0x49 86 static u8 mt2060_config1[] = { 87 REG_LO1C1, 88 0x3F, 0x74, 0x00, 0x08, 0x93 89 }; 90 91 // FMCG=2, GP2=0, GP1=0 92 static u8 mt2060_config2[] = { 93 REG_MISC_CTRL, 94 0x20, 0x1E, 0x30, 0xff, 0x80, 0xff, 0x00, 0x2c, 0x42 95 }; 96 97 // VGAG=3, V1CSE=1 98 99 #ifdef MT2060_SPURCHECK 100 /* The function below calculates the frequency offset between the output frequency if2 101 and the closer cross modulation subcarrier between lo1 and lo2 up to the tenth harmonic */ 102 static int mt2060_spurcalc(u32 lo1,u32 lo2,u32 if2) 103 { 104 int I,J; 105 int dia,diamin,diff; 106 diamin=1000000; 107 for (I = 1; I < 10; I++) { 108 J = ((2*I*lo1)/lo2+1)/2; 109 diff = I*(int)lo1-J*(int)lo2; 110 if (diff < 0) diff=-diff; 111 dia = (diff-(int)if2); 112 if (dia < 0) dia=-dia; 113 if (diamin > dia) diamin=dia; 114 } 115 return diamin; 116 } 117 118 #define BANDWIDTH 4000 // kHz 119 120 /* Calculates the frequency offset to add to avoid spurs. Returns 0 if no offset is needed */ 121 static int mt2060_spurcheck(u32 lo1,u32 lo2,u32 if2) 122 { 123 u32 Spur,Sp1,Sp2; 124 int I,J; 125 I=0; 126 J=1000; 127 128 Spur=mt2060_spurcalc(lo1,lo2,if2); 129 if (Spur < BANDWIDTH) { 130 /* Potential spurs detected */ 131 dprintk("Spurs before : f_lo1: %d f_lo2: %d (kHz)", 132 (int)lo1,(int)lo2); 133 I=1000; 134 Sp1 = mt2060_spurcalc(lo1+I,lo2+I,if2); 135 Sp2 = mt2060_spurcalc(lo1-I,lo2-I,if2); 136 137 if (Sp1 < Sp2) { 138 J=-J; I=-I; Spur=Sp2; 139 } else 140 Spur=Sp1; 141 142 while (Spur < BANDWIDTH) { 143 I += J; 144 Spur = mt2060_spurcalc(lo1+I,lo2+I,if2); 145 } 146 dprintk("Spurs after : f_lo1: %d f_lo2: %d (kHz)", 147 (int)(lo1+I),(int)(lo2+I)); 148 } 149 return I; 150 } 151 #endif 152 153 #define IF2 36150 // IF2 frequency = 36.150 MHz 154 #define FREF 16000 // Quartz oscillator 16 MHz 155 156 static int mt2060_set_params(struct dvb_frontend *fe) 157 { 158 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 159 struct mt2060_priv *priv; 160 int ret=0; 161 int i=0; 162 u32 freq; 163 u8 lnaband; 164 u32 f_lo1,f_lo2; 165 u32 div1,num1,div2,num2; 166 u8 b[8]; 167 u32 if1; 168 169 priv = fe->tuner_priv; 170 171 if1 = priv->if1_freq; 172 b[0] = REG_LO1B1; 173 b[1] = 0xFF; 174 175 if (fe->ops.i2c_gate_ctrl) 176 fe->ops.i2c_gate_ctrl(fe, 1); /* open i2c_gate */ 177 178 mt2060_writeregs(priv,b,2); 179 180 freq = c->frequency / 1000; /* Hz -> kHz */ 181 182 f_lo1 = freq + if1 * 1000; 183 f_lo1 = (f_lo1 / 250) * 250; 184 f_lo2 = f_lo1 - freq - IF2; 185 // From the Comtech datasheet, the step used is 50kHz. The tuner chip could be more precise 186 f_lo2 = ((f_lo2 + 25) / 50) * 50; 187 priv->frequency = (f_lo1 - f_lo2 - IF2) * 1000, 188 189 #ifdef MT2060_SPURCHECK 190 // LO-related spurs detection and correction 191 num1 = mt2060_spurcheck(f_lo1,f_lo2,IF2); 192 f_lo1 += num1; 193 f_lo2 += num1; 194 #endif 195 //Frequency LO1 = 16MHz * (DIV1 + NUM1/64 ) 196 num1 = f_lo1 / (FREF / 64); 197 div1 = num1 / 64; 198 num1 &= 0x3f; 199 200 // Frequency LO2 = 16MHz * (DIV2 + NUM2/8192 ) 201 num2 = f_lo2 * 64 / (FREF / 128); 202 div2 = num2 / 8192; 203 num2 &= 0x1fff; 204 205 if (freq <= 95000) lnaband = 0xB0; else 206 if (freq <= 180000) lnaband = 0xA0; else 207 if (freq <= 260000) lnaband = 0x90; else 208 if (freq <= 335000) lnaband = 0x80; else 209 if (freq <= 425000) lnaband = 0x70; else 210 if (freq <= 480000) lnaband = 0x60; else 211 if (freq <= 570000) lnaband = 0x50; else 212 if (freq <= 645000) lnaband = 0x40; else 213 if (freq <= 730000) lnaband = 0x30; else 214 if (freq <= 810000) lnaband = 0x20; else lnaband = 0x10; 215 216 b[0] = REG_LO1C1; 217 b[1] = lnaband | ((num1 >>2) & 0x0F); 218 b[2] = div1; 219 b[3] = (num2 & 0x0F) | ((num1 & 3) << 4); 220 b[4] = num2 >> 4; 221 b[5] = ((num2 >>12) & 1) | (div2 << 1); 222 223 dprintk("IF1: %dMHz",(int)if1); 224 dprintk("PLL freq=%dkHz f_lo1=%dkHz f_lo2=%dkHz",(int)freq,(int)f_lo1,(int)f_lo2); 225 dprintk("PLL div1=%d num1=%d div2=%d num2=%d",(int)div1,(int)num1,(int)div2,(int)num2); 226 dprintk("PLL [1..5]: %2x %2x %2x %2x %2x",(int)b[1],(int)b[2],(int)b[3],(int)b[4],(int)b[5]); 227 228 mt2060_writeregs(priv,b,6); 229 230 //Waits for pll lock or timeout 231 i = 0; 232 do { 233 mt2060_readreg(priv,REG_LO_STATUS,b); 234 if ((b[0] & 0x88)==0x88) 235 break; 236 msleep(4); 237 i++; 238 } while (i<10); 239 240 if (fe->ops.i2c_gate_ctrl) 241 fe->ops.i2c_gate_ctrl(fe, 0); /* close i2c_gate */ 242 243 return ret; 244 } 245 246 static void mt2060_calibrate(struct mt2060_priv *priv) 247 { 248 u8 b = 0; 249 int i = 0; 250 251 if (mt2060_writeregs(priv,mt2060_config1,sizeof(mt2060_config1))) 252 return; 253 if (mt2060_writeregs(priv,mt2060_config2,sizeof(mt2060_config2))) 254 return; 255 256 /* initialize the clock output */ 257 mt2060_writereg(priv, REG_VGAG, (priv->cfg->clock_out << 6) | 0x30); 258 259 do { 260 b |= (1 << 6); // FM1SS; 261 mt2060_writereg(priv, REG_LO2C1,b); 262 msleep(20); 263 264 if (i == 0) { 265 b |= (1 << 7); // FM1CA; 266 mt2060_writereg(priv, REG_LO2C1,b); 267 b &= ~(1 << 7); // FM1CA; 268 msleep(20); 269 } 270 271 b &= ~(1 << 6); // FM1SS 272 mt2060_writereg(priv, REG_LO2C1,b); 273 274 msleep(20); 275 i++; 276 } while (i < 9); 277 278 i = 0; 279 while (i++ < 10 && mt2060_readreg(priv, REG_MISC_STAT, &b) == 0 && (b & (1 << 6)) == 0) 280 msleep(20); 281 282 if (i <= 10) { 283 mt2060_readreg(priv, REG_FM_FREQ, &priv->fmfreq); // now find out, what is fmreq used for :) 284 dprintk("calibration was successful: %d", (int)priv->fmfreq); 285 } else 286 dprintk("FMCAL timed out"); 287 } 288 289 static int mt2060_get_frequency(struct dvb_frontend *fe, u32 *frequency) 290 { 291 struct mt2060_priv *priv = fe->tuner_priv; 292 *frequency = priv->frequency; 293 return 0; 294 } 295 296 static int mt2060_get_if_frequency(struct dvb_frontend *fe, u32 *frequency) 297 { 298 *frequency = IF2 * 1000; 299 return 0; 300 } 301 302 static int mt2060_init(struct dvb_frontend *fe) 303 { 304 struct mt2060_priv *priv = fe->tuner_priv; 305 int ret; 306 307 if (fe->ops.i2c_gate_ctrl) 308 fe->ops.i2c_gate_ctrl(fe, 1); /* open i2c_gate */ 309 310 ret = mt2060_writereg(priv, REG_VGAG, 311 (priv->cfg->clock_out << 6) | 0x33); 312 313 if (fe->ops.i2c_gate_ctrl) 314 fe->ops.i2c_gate_ctrl(fe, 0); /* close i2c_gate */ 315 316 return ret; 317 } 318 319 static int mt2060_sleep(struct dvb_frontend *fe) 320 { 321 struct mt2060_priv *priv = fe->tuner_priv; 322 int ret; 323 324 if (fe->ops.i2c_gate_ctrl) 325 fe->ops.i2c_gate_ctrl(fe, 1); /* open i2c_gate */ 326 327 ret = mt2060_writereg(priv, REG_VGAG, 328 (priv->cfg->clock_out << 6) | 0x30); 329 330 if (fe->ops.i2c_gate_ctrl) 331 fe->ops.i2c_gate_ctrl(fe, 0); /* close i2c_gate */ 332 333 return ret; 334 } 335 336 static int mt2060_release(struct dvb_frontend *fe) 337 { 338 kfree(fe->tuner_priv); 339 fe->tuner_priv = NULL; 340 return 0; 341 } 342 343 static const struct dvb_tuner_ops mt2060_tuner_ops = { 344 .info = { 345 .name = "Microtune MT2060", 346 .frequency_min = 48000000, 347 .frequency_max = 860000000, 348 .frequency_step = 50000, 349 }, 350 351 .release = mt2060_release, 352 353 .init = mt2060_init, 354 .sleep = mt2060_sleep, 355 356 .set_params = mt2060_set_params, 357 .get_frequency = mt2060_get_frequency, 358 .get_if_frequency = mt2060_get_if_frequency, 359 }; 360 361 /* This functions tries to identify a MT2060 tuner by reading the PART/REV register. This is hasty. */ 362 struct dvb_frontend * mt2060_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct mt2060_config *cfg, u16 if1) 363 { 364 struct mt2060_priv *priv = NULL; 365 u8 id = 0; 366 367 priv = kzalloc(sizeof(struct mt2060_priv), GFP_KERNEL); 368 if (priv == NULL) 369 return NULL; 370 371 priv->cfg = cfg; 372 priv->i2c = i2c; 373 priv->if1_freq = if1; 374 375 if (fe->ops.i2c_gate_ctrl) 376 fe->ops.i2c_gate_ctrl(fe, 1); /* open i2c_gate */ 377 378 if (mt2060_readreg(priv,REG_PART_REV,&id) != 0) { 379 kfree(priv); 380 return NULL; 381 } 382 383 if (id != PART_REV) { 384 kfree(priv); 385 return NULL; 386 } 387 printk(KERN_INFO "MT2060: successfully identified (IF1 = %d)\n", if1); 388 memcpy(&fe->ops.tuner_ops, &mt2060_tuner_ops, sizeof(struct dvb_tuner_ops)); 389 390 fe->tuner_priv = priv; 391 392 mt2060_calibrate(priv); 393 394 if (fe->ops.i2c_gate_ctrl) 395 fe->ops.i2c_gate_ctrl(fe, 0); /* close i2c_gate */ 396 397 return fe; 398 } 399 EXPORT_SYMBOL(mt2060_attach); 400 401 MODULE_AUTHOR("Olivier DANET"); 402 MODULE_DESCRIPTION("Microtune MT2060 silicon tuner driver"); 403 MODULE_LICENSE("GPL"); 404