1 /* 2 * Mirics MSi001 silicon tuner driver 3 * 4 * Copyright (C) 2013 Antti Palosaari <crope@iki.fi> 5 * Copyright (C) 2014 Antti Palosaari <crope@iki.fi> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 */ 17 18 #include <linux/module.h> 19 #include <linux/gcd.h> 20 #include <media/v4l2-device.h> 21 #include <media/v4l2-ctrls.h> 22 23 static const struct v4l2_frequency_band bands[] = { 24 { 25 .type = V4L2_TUNER_RF, 26 .index = 0, 27 .capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS, 28 .rangelow = 49000000, 29 .rangehigh = 263000000, 30 }, { 31 .type = V4L2_TUNER_RF, 32 .index = 1, 33 .capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS, 34 .rangelow = 390000000, 35 .rangehigh = 960000000, 36 }, 37 }; 38 39 struct msi001_dev { 40 struct spi_device *spi; 41 struct v4l2_subdev sd; 42 43 /* Controls */ 44 struct v4l2_ctrl_handler hdl; 45 struct v4l2_ctrl *bandwidth_auto; 46 struct v4l2_ctrl *bandwidth; 47 struct v4l2_ctrl *lna_gain; 48 struct v4l2_ctrl *mixer_gain; 49 struct v4l2_ctrl *if_gain; 50 51 unsigned int f_tuner; 52 }; 53 54 static inline struct msi001_dev *sd_to_msi001_dev(struct v4l2_subdev *sd) 55 { 56 return container_of(sd, struct msi001_dev, sd); 57 } 58 59 static int msi001_wreg(struct msi001_dev *dev, u32 data) 60 { 61 /* Register format: 4 bits addr + 20 bits value */ 62 return spi_write(dev->spi, &data, 3); 63 }; 64 65 static int msi001_set_gain(struct msi001_dev *dev, int lna_gain, int mixer_gain, 66 int if_gain) 67 { 68 struct spi_device *spi = dev->spi; 69 int ret; 70 u32 reg; 71 72 dev_dbg(&spi->dev, "lna=%d mixer=%d if=%d\n", 73 lna_gain, mixer_gain, if_gain); 74 75 reg = 1 << 0; 76 reg |= (59 - if_gain) << 4; 77 reg |= 0 << 10; 78 reg |= (1 - mixer_gain) << 12; 79 reg |= (1 - lna_gain) << 13; 80 reg |= 4 << 14; 81 reg |= 0 << 17; 82 ret = msi001_wreg(dev, reg); 83 if (ret) 84 goto err; 85 86 return 0; 87 err: 88 dev_dbg(&spi->dev, "failed %d\n", ret); 89 return ret; 90 }; 91 92 static int msi001_set_tuner(struct msi001_dev *dev) 93 { 94 struct spi_device *spi = dev->spi; 95 int ret, i; 96 unsigned int uitmp, div_n, k, k_thresh, k_frac, div_lo, f_if1; 97 u32 reg; 98 u64 f_vco; 99 u8 mode, filter_mode; 100 101 static const struct { 102 u32 rf; 103 u8 mode; 104 u8 div_lo; 105 } band_lut[] = { 106 { 50000000, 0xe1, 16}, /* AM_MODE2, antenna 2 */ 107 {108000000, 0x42, 32}, /* VHF_MODE */ 108 {330000000, 0x44, 16}, /* B3_MODE */ 109 {960000000, 0x48, 4}, /* B45_MODE */ 110 { ~0U, 0x50, 2}, /* BL_MODE */ 111 }; 112 static const struct { 113 u32 freq; 114 u8 filter_mode; 115 } if_freq_lut[] = { 116 { 0, 0x03}, /* Zero IF */ 117 { 450000, 0x02}, /* 450 kHz IF */ 118 {1620000, 0x01}, /* 1.62 MHz IF */ 119 {2048000, 0x00}, /* 2.048 MHz IF */ 120 }; 121 static const struct { 122 u32 freq; 123 u8 val; 124 } bandwidth_lut[] = { 125 { 200000, 0x00}, /* 200 kHz */ 126 { 300000, 0x01}, /* 300 kHz */ 127 { 600000, 0x02}, /* 600 kHz */ 128 {1536000, 0x03}, /* 1.536 MHz */ 129 {5000000, 0x04}, /* 5 MHz */ 130 {6000000, 0x05}, /* 6 MHz */ 131 {7000000, 0x06}, /* 7 MHz */ 132 {8000000, 0x07}, /* 8 MHz */ 133 }; 134 135 unsigned int f_rf = dev->f_tuner; 136 137 /* 138 * bandwidth (Hz) 139 * 200000, 300000, 600000, 1536000, 5000000, 6000000, 7000000, 8000000 140 */ 141 unsigned int bandwidth; 142 143 /* 144 * intermediate frequency (Hz) 145 * 0, 450000, 1620000, 2048000 146 */ 147 unsigned int f_if = 0; 148 #define F_REF 24000000 149 #define DIV_PRE_N 4 150 #define F_VCO_STEP div_lo 151 152 dev_dbg(&spi->dev, "f_rf=%d f_if=%d\n", f_rf, f_if); 153 154 for (i = 0; i < ARRAY_SIZE(band_lut); i++) { 155 if (f_rf <= band_lut[i].rf) { 156 mode = band_lut[i].mode; 157 div_lo = band_lut[i].div_lo; 158 break; 159 } 160 } 161 if (i == ARRAY_SIZE(band_lut)) { 162 ret = -EINVAL; 163 goto err; 164 } 165 166 /* AM_MODE is upconverted */ 167 if ((mode >> 0) & 0x1) 168 f_if1 = 5 * F_REF; 169 else 170 f_if1 = 0; 171 172 for (i = 0; i < ARRAY_SIZE(if_freq_lut); i++) { 173 if (f_if == if_freq_lut[i].freq) { 174 filter_mode = if_freq_lut[i].filter_mode; 175 break; 176 } 177 } 178 if (i == ARRAY_SIZE(if_freq_lut)) { 179 ret = -EINVAL; 180 goto err; 181 } 182 183 /* filters */ 184 bandwidth = dev->bandwidth->val; 185 bandwidth = clamp(bandwidth, 200000U, 8000000U); 186 187 for (i = 0; i < ARRAY_SIZE(bandwidth_lut); i++) { 188 if (bandwidth <= bandwidth_lut[i].freq) { 189 bandwidth = bandwidth_lut[i].val; 190 break; 191 } 192 } 193 if (i == ARRAY_SIZE(bandwidth_lut)) { 194 ret = -EINVAL; 195 goto err; 196 } 197 198 dev->bandwidth->val = bandwidth_lut[i].freq; 199 200 dev_dbg(&spi->dev, "bandwidth selected=%d\n", bandwidth_lut[i].freq); 201 202 /* 203 * Fractional-N synthesizer 204 * 205 * +---------------------------------------+ 206 * v | 207 * Fref +----+ +-------+ +----+ +------+ +---+ 208 * ------> | PD | --> | VCO | ------> | /4 | --> | /N.F | <-- | K | 209 * +----+ +-------+ +----+ +------+ +---+ 210 * | 211 * | 212 * v 213 * +-------+ Fout 214 * | /Rout | ------> 215 * +-------+ 216 */ 217 218 /* Calculate PLL integer and fractional control word. */ 219 f_vco = (u64) (f_rf + f_if + f_if1) * div_lo; 220 div_n = div_u64_rem(f_vco, DIV_PRE_N * F_REF, &k); 221 k_thresh = (DIV_PRE_N * F_REF) / F_VCO_STEP; 222 k_frac = div_u64((u64) k * k_thresh, (DIV_PRE_N * F_REF)); 223 224 /* Find out greatest common divisor and divide to smaller. */ 225 uitmp = gcd(k_thresh, k_frac); 226 k_thresh /= uitmp; 227 k_frac /= uitmp; 228 229 /* Force divide to reg max. Resolution will be reduced. */ 230 uitmp = DIV_ROUND_UP(k_thresh, 4095); 231 k_thresh = DIV_ROUND_CLOSEST(k_thresh, uitmp); 232 k_frac = DIV_ROUND_CLOSEST(k_frac, uitmp); 233 234 /* Calculate real RF set. */ 235 uitmp = (unsigned int) F_REF * DIV_PRE_N * div_n; 236 uitmp += (unsigned int) F_REF * DIV_PRE_N * k_frac / k_thresh; 237 uitmp /= div_lo; 238 239 dev_dbg(&spi->dev, 240 "f_rf=%u:%u f_vco=%llu div_n=%u k_thresh=%u k_frac=%u div_lo=%u\n", 241 f_rf, uitmp, f_vco, div_n, k_thresh, k_frac, div_lo); 242 243 ret = msi001_wreg(dev, 0x00000e); 244 if (ret) 245 goto err; 246 247 ret = msi001_wreg(dev, 0x000003); 248 if (ret) 249 goto err; 250 251 reg = 0 << 0; 252 reg |= mode << 4; 253 reg |= filter_mode << 12; 254 reg |= bandwidth << 14; 255 reg |= 0x02 << 17; 256 reg |= 0x00 << 20; 257 ret = msi001_wreg(dev, reg); 258 if (ret) 259 goto err; 260 261 reg = 5 << 0; 262 reg |= k_thresh << 4; 263 reg |= 1 << 19; 264 reg |= 1 << 21; 265 ret = msi001_wreg(dev, reg); 266 if (ret) 267 goto err; 268 269 reg = 2 << 0; 270 reg |= k_frac << 4; 271 reg |= div_n << 16; 272 ret = msi001_wreg(dev, reg); 273 if (ret) 274 goto err; 275 276 ret = msi001_set_gain(dev, dev->lna_gain->cur.val, 277 dev->mixer_gain->cur.val, dev->if_gain->cur.val); 278 if (ret) 279 goto err; 280 281 reg = 6 << 0; 282 reg |= 63 << 4; 283 reg |= 4095 << 10; 284 ret = msi001_wreg(dev, reg); 285 if (ret) 286 goto err; 287 288 return 0; 289 err: 290 dev_dbg(&spi->dev, "failed %d\n", ret); 291 return ret; 292 } 293 294 static int msi001_s_power(struct v4l2_subdev *sd, int on) 295 { 296 struct msi001_dev *dev = sd_to_msi001_dev(sd); 297 struct spi_device *spi = dev->spi; 298 int ret; 299 300 dev_dbg(&spi->dev, "on=%d\n", on); 301 302 if (on) 303 ret = 0; 304 else 305 ret = msi001_wreg(dev, 0x000000); 306 307 return ret; 308 } 309 310 static const struct v4l2_subdev_core_ops msi001_core_ops = { 311 .s_power = msi001_s_power, 312 }; 313 314 static int msi001_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *v) 315 { 316 struct msi001_dev *dev = sd_to_msi001_dev(sd); 317 struct spi_device *spi = dev->spi; 318 319 dev_dbg(&spi->dev, "index=%d\n", v->index); 320 321 strlcpy(v->name, "Mirics MSi001", sizeof(v->name)); 322 v->type = V4L2_TUNER_RF; 323 v->capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS; 324 v->rangelow = 49000000; 325 v->rangehigh = 960000000; 326 327 return 0; 328 } 329 330 static int msi001_s_tuner(struct v4l2_subdev *sd, const struct v4l2_tuner *v) 331 { 332 struct msi001_dev *dev = sd_to_msi001_dev(sd); 333 struct spi_device *spi = dev->spi; 334 335 dev_dbg(&spi->dev, "index=%d\n", v->index); 336 return 0; 337 } 338 339 static int msi001_g_frequency(struct v4l2_subdev *sd, struct v4l2_frequency *f) 340 { 341 struct msi001_dev *dev = sd_to_msi001_dev(sd); 342 struct spi_device *spi = dev->spi; 343 344 dev_dbg(&spi->dev, "tuner=%d\n", f->tuner); 345 f->frequency = dev->f_tuner; 346 return 0; 347 } 348 349 static int msi001_s_frequency(struct v4l2_subdev *sd, 350 const struct v4l2_frequency *f) 351 { 352 struct msi001_dev *dev = sd_to_msi001_dev(sd); 353 struct spi_device *spi = dev->spi; 354 unsigned int band; 355 356 dev_dbg(&spi->dev, "tuner=%d type=%d frequency=%u\n", 357 f->tuner, f->type, f->frequency); 358 359 if (f->frequency < ((bands[0].rangehigh + bands[1].rangelow) / 2)) 360 band = 0; 361 else 362 band = 1; 363 dev->f_tuner = clamp_t(unsigned int, f->frequency, 364 bands[band].rangelow, bands[band].rangehigh); 365 366 return msi001_set_tuner(dev); 367 } 368 369 static int msi001_enum_freq_bands(struct v4l2_subdev *sd, 370 struct v4l2_frequency_band *band) 371 { 372 struct msi001_dev *dev = sd_to_msi001_dev(sd); 373 struct spi_device *spi = dev->spi; 374 375 dev_dbg(&spi->dev, "tuner=%d type=%d index=%d\n", 376 band->tuner, band->type, band->index); 377 378 if (band->index >= ARRAY_SIZE(bands)) 379 return -EINVAL; 380 381 band->capability = bands[band->index].capability; 382 band->rangelow = bands[band->index].rangelow; 383 band->rangehigh = bands[band->index].rangehigh; 384 385 return 0; 386 } 387 388 static const struct v4l2_subdev_tuner_ops msi001_tuner_ops = { 389 .g_tuner = msi001_g_tuner, 390 .s_tuner = msi001_s_tuner, 391 .g_frequency = msi001_g_frequency, 392 .s_frequency = msi001_s_frequency, 393 .enum_freq_bands = msi001_enum_freq_bands, 394 }; 395 396 static const struct v4l2_subdev_ops msi001_ops = { 397 .core = &msi001_core_ops, 398 .tuner = &msi001_tuner_ops, 399 }; 400 401 static int msi001_s_ctrl(struct v4l2_ctrl *ctrl) 402 { 403 struct msi001_dev *dev = container_of(ctrl->handler, struct msi001_dev, hdl); 404 struct spi_device *spi = dev->spi; 405 406 int ret; 407 408 dev_dbg(&spi->dev, "id=%d name=%s val=%d min=%lld max=%lld step=%lld\n", 409 ctrl->id, ctrl->name, ctrl->val, ctrl->minimum, ctrl->maximum, 410 ctrl->step); 411 412 switch (ctrl->id) { 413 case V4L2_CID_RF_TUNER_BANDWIDTH_AUTO: 414 case V4L2_CID_RF_TUNER_BANDWIDTH: 415 ret = msi001_set_tuner(dev); 416 break; 417 case V4L2_CID_RF_TUNER_LNA_GAIN: 418 ret = msi001_set_gain(dev, dev->lna_gain->val, 419 dev->mixer_gain->cur.val, 420 dev->if_gain->cur.val); 421 break; 422 case V4L2_CID_RF_TUNER_MIXER_GAIN: 423 ret = msi001_set_gain(dev, dev->lna_gain->cur.val, 424 dev->mixer_gain->val, 425 dev->if_gain->cur.val); 426 break; 427 case V4L2_CID_RF_TUNER_IF_GAIN: 428 ret = msi001_set_gain(dev, dev->lna_gain->cur.val, 429 dev->mixer_gain->cur.val, 430 dev->if_gain->val); 431 break; 432 default: 433 dev_dbg(&spi->dev, "unknown control %d\n", ctrl->id); 434 ret = -EINVAL; 435 } 436 437 return ret; 438 } 439 440 static const struct v4l2_ctrl_ops msi001_ctrl_ops = { 441 .s_ctrl = msi001_s_ctrl, 442 }; 443 444 static int msi001_probe(struct spi_device *spi) 445 { 446 struct msi001_dev *dev; 447 int ret; 448 449 dev_dbg(&spi->dev, "\n"); 450 451 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 452 if (!dev) { 453 ret = -ENOMEM; 454 goto err; 455 } 456 457 dev->spi = spi; 458 dev->f_tuner = bands[0].rangelow; 459 v4l2_spi_subdev_init(&dev->sd, spi, &msi001_ops); 460 461 /* Register controls */ 462 v4l2_ctrl_handler_init(&dev->hdl, 5); 463 dev->bandwidth_auto = v4l2_ctrl_new_std(&dev->hdl, &msi001_ctrl_ops, 464 V4L2_CID_RF_TUNER_BANDWIDTH_AUTO, 0, 1, 1, 1); 465 dev->bandwidth = v4l2_ctrl_new_std(&dev->hdl, &msi001_ctrl_ops, 466 V4L2_CID_RF_TUNER_BANDWIDTH, 200000, 8000000, 1, 200000); 467 v4l2_ctrl_auto_cluster(2, &dev->bandwidth_auto, 0, false); 468 dev->lna_gain = v4l2_ctrl_new_std(&dev->hdl, &msi001_ctrl_ops, 469 V4L2_CID_RF_TUNER_LNA_GAIN, 0, 1, 1, 1); 470 dev->mixer_gain = v4l2_ctrl_new_std(&dev->hdl, &msi001_ctrl_ops, 471 V4L2_CID_RF_TUNER_MIXER_GAIN, 0, 1, 1, 1); 472 dev->if_gain = v4l2_ctrl_new_std(&dev->hdl, &msi001_ctrl_ops, 473 V4L2_CID_RF_TUNER_IF_GAIN, 0, 59, 1, 0); 474 if (dev->hdl.error) { 475 ret = dev->hdl.error; 476 dev_err(&spi->dev, "Could not initialize controls\n"); 477 /* control init failed, free handler */ 478 goto err_ctrl_handler_free; 479 } 480 481 dev->sd.ctrl_handler = &dev->hdl; 482 return 0; 483 err_ctrl_handler_free: 484 v4l2_ctrl_handler_free(&dev->hdl); 485 kfree(dev); 486 err: 487 return ret; 488 } 489 490 static int msi001_remove(struct spi_device *spi) 491 { 492 struct v4l2_subdev *sd = spi_get_drvdata(spi); 493 struct msi001_dev *dev = sd_to_msi001_dev(sd); 494 495 dev_dbg(&spi->dev, "\n"); 496 497 /* 498 * Registered by v4l2_spi_new_subdev() from master driver, but we must 499 * unregister it from here. Weird. 500 */ 501 v4l2_device_unregister_subdev(&dev->sd); 502 v4l2_ctrl_handler_free(&dev->hdl); 503 kfree(dev); 504 return 0; 505 } 506 507 static const struct spi_device_id msi001_id_table[] = { 508 {"msi001", 0}, 509 {} 510 }; 511 MODULE_DEVICE_TABLE(spi, msi001_id_table); 512 513 static struct spi_driver msi001_driver = { 514 .driver = { 515 .name = "msi001", 516 .suppress_bind_attrs = true, 517 }, 518 .probe = msi001_probe, 519 .remove = msi001_remove, 520 .id_table = msi001_id_table, 521 }; 522 module_spi_driver(msi001_driver); 523 524 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>"); 525 MODULE_DESCRIPTION("Mirics MSi001"); 526 MODULE_LICENSE("GPL"); 527