1 /* 2 * Driver for Maxim MAX2165 silicon tuner 3 * 4 * Copyright (c) 2009 David T. L. Wong <davidtlwong@gmail.com> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * 15 * GNU General Public License for more details. 16 */ 17 18 #include <linux/module.h> 19 #include <linux/moduleparam.h> 20 #include <linux/videodev2.h> 21 #include <linux/delay.h> 22 #include <linux/dvb/frontend.h> 23 #include <linux/i2c.h> 24 #include <linux/slab.h> 25 26 #include <media/dvb_frontend.h> 27 28 #include "max2165.h" 29 #include "max2165_priv.h" 30 #include "tuner-i2c.h" 31 32 #define dprintk(args...) \ 33 do { \ 34 if (debug) \ 35 printk(KERN_DEBUG "max2165: " args); \ 36 } while (0) 37 38 static int debug; 39 module_param(debug, int, 0644); 40 MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off)."); 41 42 static int max2165_write_reg(struct max2165_priv *priv, u8 reg, u8 data) 43 { 44 int ret; 45 u8 buf[] = { reg, data }; 46 struct i2c_msg msg = { .flags = 0, .buf = buf, .len = 2 }; 47 48 msg.addr = priv->config->i2c_address; 49 50 if (debug >= 2) 51 dprintk("%s: reg=0x%02X, data=0x%02X\n", __func__, reg, data); 52 53 ret = i2c_transfer(priv->i2c, &msg, 1); 54 55 if (ret != 1) 56 dprintk("%s: error reg=0x%x, data=0x%x, ret=%i\n", 57 __func__, reg, data, ret); 58 59 return (ret != 1) ? -EIO : 0; 60 } 61 62 static int max2165_read_reg(struct max2165_priv *priv, u8 reg, u8 *p_data) 63 { 64 int ret; 65 u8 dev_addr = priv->config->i2c_address; 66 67 u8 b0[] = { reg }; 68 u8 b1[] = { 0 }; 69 struct i2c_msg msg[] = { 70 { .addr = dev_addr, .flags = 0, .buf = b0, .len = 1 }, 71 { .addr = dev_addr, .flags = I2C_M_RD, .buf = b1, .len = 1 }, 72 }; 73 74 ret = i2c_transfer(priv->i2c, msg, 2); 75 if (ret != 2) { 76 dprintk("%s: error reg=0x%x, ret=%i\n", __func__, reg, ret); 77 return -EIO; 78 } 79 80 *p_data = b1[0]; 81 if (debug >= 2) 82 dprintk("%s: reg=0x%02X, data=0x%02X\n", 83 __func__, reg, b1[0]); 84 return 0; 85 } 86 87 static int max2165_mask_write_reg(struct max2165_priv *priv, u8 reg, 88 u8 mask, u8 data) 89 { 90 int ret; 91 u8 v; 92 93 data &= mask; 94 ret = max2165_read_reg(priv, reg, &v); 95 if (ret != 0) 96 return ret; 97 v &= ~mask; 98 v |= data; 99 ret = max2165_write_reg(priv, reg, v); 100 101 return ret; 102 } 103 104 static int max2165_read_rom_table(struct max2165_priv *priv) 105 { 106 u8 dat[3]; 107 int i; 108 109 for (i = 0; i < 3; i++) { 110 max2165_write_reg(priv, REG_ROM_TABLE_ADDR, i + 1); 111 max2165_read_reg(priv, REG_ROM_TABLE_DATA, &dat[i]); 112 } 113 114 priv->tf_ntch_low_cfg = dat[0] >> 4; 115 priv->tf_ntch_hi_cfg = dat[0] & 0x0F; 116 priv->tf_balun_low_ref = dat[1] & 0x0F; 117 priv->tf_balun_hi_ref = dat[1] >> 4; 118 priv->bb_filter_7mhz_cfg = dat[2] & 0x0F; 119 priv->bb_filter_8mhz_cfg = dat[2] >> 4; 120 121 dprintk("tf_ntch_low_cfg = 0x%X\n", priv->tf_ntch_low_cfg); 122 dprintk("tf_ntch_hi_cfg = 0x%X\n", priv->tf_ntch_hi_cfg); 123 dprintk("tf_balun_low_ref = 0x%X\n", priv->tf_balun_low_ref); 124 dprintk("tf_balun_hi_ref = 0x%X\n", priv->tf_balun_hi_ref); 125 dprintk("bb_filter_7mhz_cfg = 0x%X\n", priv->bb_filter_7mhz_cfg); 126 dprintk("bb_filter_8mhz_cfg = 0x%X\n", priv->bb_filter_8mhz_cfg); 127 128 return 0; 129 } 130 131 static int max2165_set_osc(struct max2165_priv *priv, u8 osc /*MHz*/) 132 { 133 u8 v; 134 135 v = (osc / 2); 136 if (v == 2) 137 v = 0x7; 138 else 139 v -= 8; 140 141 max2165_mask_write_reg(priv, REG_PLL_CFG, 0x07, v); 142 143 return 0; 144 } 145 146 static int max2165_set_bandwidth(struct max2165_priv *priv, u32 bw) 147 { 148 u8 val; 149 150 if (bw == 8000000) 151 val = priv->bb_filter_8mhz_cfg; 152 else 153 val = priv->bb_filter_7mhz_cfg; 154 155 max2165_mask_write_reg(priv, REG_BASEBAND_CTRL, 0xF0, val << 4); 156 157 return 0; 158 } 159 160 static int fixpt_div32(u32 dividend, u32 divisor, u32 *quotient, u32 *fraction) 161 { 162 u32 remainder; 163 u32 q, f = 0; 164 int i; 165 166 if (0 == divisor) 167 return -EINVAL; 168 169 q = dividend / divisor; 170 remainder = dividend - q * divisor; 171 172 for (i = 0; i < 31; i++) { 173 remainder <<= 1; 174 if (remainder >= divisor) { 175 f += 1; 176 remainder -= divisor; 177 } 178 f <<= 1; 179 } 180 181 *quotient = q; 182 *fraction = f; 183 184 return 0; 185 } 186 187 static int max2165_set_rf(struct max2165_priv *priv, u32 freq) 188 { 189 u8 tf; 190 u8 tf_ntch; 191 u32 t; 192 u32 quotient, fraction; 193 int ret; 194 195 /* Set PLL divider according to RF frequency */ 196 ret = fixpt_div32(freq / 1000, priv->config->osc_clk * 1000, 197 "ient, &fraction); 198 if (ret != 0) 199 return ret; 200 201 /* 20-bit fraction */ 202 fraction >>= 12; 203 204 max2165_write_reg(priv, REG_NDIV_INT, quotient); 205 max2165_mask_write_reg(priv, REG_NDIV_FRAC2, 0x0F, fraction >> 16); 206 max2165_write_reg(priv, REG_NDIV_FRAC1, fraction >> 8); 207 max2165_write_reg(priv, REG_NDIV_FRAC0, fraction); 208 209 /* Norch Filter */ 210 tf_ntch = (freq < 725000000) ? 211 priv->tf_ntch_low_cfg : priv->tf_ntch_hi_cfg; 212 213 /* Tracking filter balun */ 214 t = priv->tf_balun_low_ref; 215 t += (priv->tf_balun_hi_ref - priv->tf_balun_low_ref) 216 * (freq / 1000 - 470000) / (780000 - 470000); 217 218 tf = t; 219 dprintk("tf = %X\n", tf); 220 tf |= tf_ntch << 4; 221 222 max2165_write_reg(priv, REG_TRACK_FILTER, tf); 223 224 return 0; 225 } 226 227 static void max2165_debug_status(struct max2165_priv *priv) 228 { 229 u8 status, autotune; 230 u8 auto_vco_success, auto_vco_active; 231 u8 pll_locked; 232 u8 dc_offset_low, dc_offset_hi; 233 u8 signal_lv_over_threshold; 234 u8 vco, vco_sub_band, adc; 235 236 max2165_read_reg(priv, REG_STATUS, &status); 237 max2165_read_reg(priv, REG_AUTOTUNE, &autotune); 238 239 auto_vco_success = (status >> 6) & 0x01; 240 auto_vco_active = (status >> 5) & 0x01; 241 pll_locked = (status >> 4) & 0x01; 242 dc_offset_low = (status >> 3) & 0x01; 243 dc_offset_hi = (status >> 2) & 0x01; 244 signal_lv_over_threshold = status & 0x01; 245 246 vco = autotune >> 6; 247 vco_sub_band = (autotune >> 3) & 0x7; 248 adc = autotune & 0x7; 249 250 dprintk("auto VCO active: %d, auto VCO success: %d\n", 251 auto_vco_active, auto_vco_success); 252 dprintk("PLL locked: %d\n", pll_locked); 253 dprintk("DC offset low: %d, DC offset high: %d\n", 254 dc_offset_low, dc_offset_hi); 255 dprintk("Signal lvl over threshold: %d\n", signal_lv_over_threshold); 256 dprintk("VCO: %d, VCO Sub-band: %d, ADC: %d\n", vco, vco_sub_band, adc); 257 } 258 259 static int max2165_set_params(struct dvb_frontend *fe) 260 { 261 struct max2165_priv *priv = fe->tuner_priv; 262 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 263 int ret; 264 265 switch (c->bandwidth_hz) { 266 case 7000000: 267 case 8000000: 268 priv->frequency = c->frequency; 269 break; 270 default: 271 printk(KERN_INFO "MAX2165: bandwidth %d Hz not supported.\n", 272 c->bandwidth_hz); 273 return -EINVAL; 274 } 275 276 dprintk("%s() frequency=%d\n", __func__, c->frequency); 277 278 if (fe->ops.i2c_gate_ctrl) 279 fe->ops.i2c_gate_ctrl(fe, 1); 280 max2165_set_bandwidth(priv, c->bandwidth_hz); 281 ret = max2165_set_rf(priv, priv->frequency); 282 mdelay(50); 283 max2165_debug_status(priv); 284 if (fe->ops.i2c_gate_ctrl) 285 fe->ops.i2c_gate_ctrl(fe, 0); 286 287 if (ret != 0) 288 return -EREMOTEIO; 289 290 return 0; 291 } 292 293 static int max2165_get_frequency(struct dvb_frontend *fe, u32 *freq) 294 { 295 struct max2165_priv *priv = fe->tuner_priv; 296 dprintk("%s()\n", __func__); 297 *freq = priv->frequency; 298 return 0; 299 } 300 301 static int max2165_get_bandwidth(struct dvb_frontend *fe, u32 *bw) 302 { 303 struct max2165_priv *priv = fe->tuner_priv; 304 dprintk("%s()\n", __func__); 305 306 *bw = priv->bandwidth; 307 return 0; 308 } 309 310 static int max2165_get_status(struct dvb_frontend *fe, u32 *status) 311 { 312 struct max2165_priv *priv = fe->tuner_priv; 313 u16 lock_status = 0; 314 315 dprintk("%s()\n", __func__); 316 317 if (fe->ops.i2c_gate_ctrl) 318 fe->ops.i2c_gate_ctrl(fe, 1); 319 320 max2165_debug_status(priv); 321 *status = lock_status; 322 323 if (fe->ops.i2c_gate_ctrl) 324 fe->ops.i2c_gate_ctrl(fe, 0); 325 326 return 0; 327 } 328 329 static int max2165_sleep(struct dvb_frontend *fe) 330 { 331 dprintk("%s()\n", __func__); 332 return 0; 333 } 334 335 static int max2165_init(struct dvb_frontend *fe) 336 { 337 struct max2165_priv *priv = fe->tuner_priv; 338 dprintk("%s()\n", __func__); 339 340 if (fe->ops.i2c_gate_ctrl) 341 fe->ops.i2c_gate_ctrl(fe, 1); 342 343 /* Setup initial values */ 344 /* Fractional Mode on */ 345 max2165_write_reg(priv, REG_NDIV_FRAC2, 0x18); 346 /* LNA on */ 347 max2165_write_reg(priv, REG_LNA, 0x01); 348 max2165_write_reg(priv, REG_PLL_CFG, 0x7A); 349 max2165_write_reg(priv, REG_TEST, 0x08); 350 max2165_write_reg(priv, REG_SHUTDOWN, 0x40); 351 max2165_write_reg(priv, REG_VCO_CTRL, 0x84); 352 max2165_write_reg(priv, REG_BASEBAND_CTRL, 0xC3); 353 max2165_write_reg(priv, REG_DC_OFFSET_CTRL, 0x75); 354 max2165_write_reg(priv, REG_DC_OFFSET_DAC, 0x00); 355 max2165_write_reg(priv, REG_ROM_TABLE_ADDR, 0x00); 356 357 max2165_set_osc(priv, priv->config->osc_clk); 358 359 max2165_read_rom_table(priv); 360 361 max2165_set_bandwidth(priv, 8000000); 362 363 if (fe->ops.i2c_gate_ctrl) 364 fe->ops.i2c_gate_ctrl(fe, 0); 365 366 return 0; 367 } 368 369 static void max2165_release(struct dvb_frontend *fe) 370 { 371 struct max2165_priv *priv = fe->tuner_priv; 372 dprintk("%s()\n", __func__); 373 374 kfree(priv); 375 fe->tuner_priv = NULL; 376 } 377 378 static const struct dvb_tuner_ops max2165_tuner_ops = { 379 .info = { 380 .name = "Maxim MAX2165", 381 .frequency_min = 470000000, 382 .frequency_max = 862000000, 383 .frequency_step = 50000, 384 }, 385 386 .release = max2165_release, 387 .init = max2165_init, 388 .sleep = max2165_sleep, 389 390 .set_params = max2165_set_params, 391 .set_analog_params = NULL, 392 .get_frequency = max2165_get_frequency, 393 .get_bandwidth = max2165_get_bandwidth, 394 .get_status = max2165_get_status 395 }; 396 397 struct dvb_frontend *max2165_attach(struct dvb_frontend *fe, 398 struct i2c_adapter *i2c, 399 struct max2165_config *cfg) 400 { 401 struct max2165_priv *priv = NULL; 402 403 dprintk("%s(%d-%04x)\n", __func__, 404 i2c ? i2c_adapter_id(i2c) : -1, 405 cfg ? cfg->i2c_address : -1); 406 407 priv = kzalloc(sizeof(struct max2165_priv), GFP_KERNEL); 408 if (priv == NULL) 409 return NULL; 410 411 memcpy(&fe->ops.tuner_ops, &max2165_tuner_ops, 412 sizeof(struct dvb_tuner_ops)); 413 414 priv->config = cfg; 415 priv->i2c = i2c; 416 fe->tuner_priv = priv; 417 418 max2165_init(fe); 419 max2165_debug_status(priv); 420 421 return fe; 422 } 423 EXPORT_SYMBOL(max2165_attach); 424 425 MODULE_AUTHOR("David T. L. Wong <davidtlwong@gmail.com>"); 426 MODULE_DESCRIPTION("Maxim MAX2165 silicon tuner driver"); 427 MODULE_LICENSE("GPL"); 428