1 /* 2 * Elonics E4000 silicon tuner driver 3 * 4 * Copyright (C) 2012 Antti Palosaari <crope@iki.fi> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License along 17 * with this program; if not, write to the Free Software Foundation, Inc., 18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. 19 */ 20 21 #include "e4000_priv.h" 22 #include <linux/math64.h> 23 24 /* write multiple registers */ 25 static int e4000_wr_regs(struct e4000_priv *priv, u8 reg, u8 *val, int len) 26 { 27 int ret; 28 u8 buf[1 + len]; 29 struct i2c_msg msg[1] = { 30 { 31 .addr = priv->cfg->i2c_addr, 32 .flags = 0, 33 .len = sizeof(buf), 34 .buf = buf, 35 } 36 }; 37 38 buf[0] = reg; 39 memcpy(&buf[1], val, len); 40 41 ret = i2c_transfer(priv->i2c, msg, 1); 42 if (ret == 1) { 43 ret = 0; 44 } else { 45 dev_warn(&priv->i2c->dev, 46 "%s: i2c wr failed=%d reg=%02x len=%d\n", 47 KBUILD_MODNAME, ret, reg, len); 48 ret = -EREMOTEIO; 49 } 50 return ret; 51 } 52 53 /* read multiple registers */ 54 static int e4000_rd_regs(struct e4000_priv *priv, u8 reg, u8 *val, int len) 55 { 56 int ret; 57 u8 buf[len]; 58 struct i2c_msg msg[2] = { 59 { 60 .addr = priv->cfg->i2c_addr, 61 .flags = 0, 62 .len = 1, 63 .buf = ®, 64 }, { 65 .addr = priv->cfg->i2c_addr, 66 .flags = I2C_M_RD, 67 .len = sizeof(buf), 68 .buf = buf, 69 } 70 }; 71 72 ret = i2c_transfer(priv->i2c, msg, 2); 73 if (ret == 2) { 74 memcpy(val, buf, len); 75 ret = 0; 76 } else { 77 dev_warn(&priv->i2c->dev, 78 "%s: i2c rd failed=%d reg=%02x len=%d\n", 79 KBUILD_MODNAME, ret, reg, len); 80 ret = -EREMOTEIO; 81 } 82 83 return ret; 84 } 85 86 /* write single register */ 87 static int e4000_wr_reg(struct e4000_priv *priv, u8 reg, u8 val) 88 { 89 return e4000_wr_regs(priv, reg, &val, 1); 90 } 91 92 /* read single register */ 93 static int e4000_rd_reg(struct e4000_priv *priv, u8 reg, u8 *val) 94 { 95 return e4000_rd_regs(priv, reg, val, 1); 96 } 97 98 static int e4000_init(struct dvb_frontend *fe) 99 { 100 struct e4000_priv *priv = fe->tuner_priv; 101 int ret; 102 103 dev_dbg(&priv->i2c->dev, "%s:\n", __func__); 104 105 if (fe->ops.i2c_gate_ctrl) 106 fe->ops.i2c_gate_ctrl(fe, 1); 107 108 /* dummy I2C to ensure I2C wakes up */ 109 ret = e4000_wr_reg(priv, 0x02, 0x40); 110 111 /* reset */ 112 ret = e4000_wr_reg(priv, 0x00, 0x01); 113 if (ret < 0) 114 goto err; 115 116 /* disable output clock */ 117 ret = e4000_wr_reg(priv, 0x06, 0x00); 118 if (ret < 0) 119 goto err; 120 121 ret = e4000_wr_reg(priv, 0x7a, 0x96); 122 if (ret < 0) 123 goto err; 124 125 /* configure gains */ 126 ret = e4000_wr_regs(priv, 0x7e, "\x01\xfe", 2); 127 if (ret < 0) 128 goto err; 129 130 ret = e4000_wr_reg(priv, 0x82, 0x00); 131 if (ret < 0) 132 goto err; 133 134 ret = e4000_wr_reg(priv, 0x24, 0x05); 135 if (ret < 0) 136 goto err; 137 138 ret = e4000_wr_regs(priv, 0x87, "\x20\x01", 2); 139 if (ret < 0) 140 goto err; 141 142 ret = e4000_wr_regs(priv, 0x9f, "\x7f\x07", 2); 143 if (ret < 0) 144 goto err; 145 146 /* DC offset control */ 147 ret = e4000_wr_reg(priv, 0x2d, 0x1f); 148 if (ret < 0) 149 goto err; 150 151 ret = e4000_wr_regs(priv, 0x70, "\x01\x01", 2); 152 if (ret < 0) 153 goto err; 154 155 /* gain control */ 156 ret = e4000_wr_reg(priv, 0x1a, 0x17); 157 if (ret < 0) 158 goto err; 159 160 ret = e4000_wr_reg(priv, 0x1f, 0x1a); 161 if (ret < 0) 162 goto err; 163 164 if (fe->ops.i2c_gate_ctrl) 165 fe->ops.i2c_gate_ctrl(fe, 0); 166 167 return 0; 168 err: 169 if (fe->ops.i2c_gate_ctrl) 170 fe->ops.i2c_gate_ctrl(fe, 0); 171 172 dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret); 173 return ret; 174 } 175 176 static int e4000_sleep(struct dvb_frontend *fe) 177 { 178 struct e4000_priv *priv = fe->tuner_priv; 179 int ret; 180 181 dev_dbg(&priv->i2c->dev, "%s:\n", __func__); 182 183 if (fe->ops.i2c_gate_ctrl) 184 fe->ops.i2c_gate_ctrl(fe, 1); 185 186 ret = e4000_wr_reg(priv, 0x00, 0x00); 187 if (ret < 0) 188 goto err; 189 190 if (fe->ops.i2c_gate_ctrl) 191 fe->ops.i2c_gate_ctrl(fe, 0); 192 193 return 0; 194 err: 195 if (fe->ops.i2c_gate_ctrl) 196 fe->ops.i2c_gate_ctrl(fe, 0); 197 198 dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret); 199 return ret; 200 } 201 202 static int e4000_set_params(struct dvb_frontend *fe) 203 { 204 struct e4000_priv *priv = fe->tuner_priv; 205 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 206 int ret, i, sigma_delta; 207 unsigned int f_vco; 208 u8 buf[5], i_data[4], q_data[4]; 209 210 dev_dbg(&priv->i2c->dev, 211 "%s: delivery_system=%d frequency=%d bandwidth_hz=%d\n", 212 __func__, c->delivery_system, c->frequency, 213 c->bandwidth_hz); 214 215 if (fe->ops.i2c_gate_ctrl) 216 fe->ops.i2c_gate_ctrl(fe, 1); 217 218 /* gain control manual */ 219 ret = e4000_wr_reg(priv, 0x1a, 0x00); 220 if (ret < 0) 221 goto err; 222 223 /* PLL */ 224 for (i = 0; i < ARRAY_SIZE(e4000_pll_lut); i++) { 225 if (c->frequency <= e4000_pll_lut[i].freq) 226 break; 227 } 228 229 if (i == ARRAY_SIZE(e4000_pll_lut)) 230 goto err; 231 232 /* 233 * Note: Currently f_vco overflows when c->frequency is 1 073 741 824 Hz 234 * or more. 235 */ 236 f_vco = c->frequency * e4000_pll_lut[i].mul; 237 sigma_delta = div_u64(0x10000ULL * (f_vco % priv->cfg->clock), priv->cfg->clock); 238 buf[0] = f_vco / priv->cfg->clock; 239 buf[1] = (sigma_delta >> 0) & 0xff; 240 buf[2] = (sigma_delta >> 8) & 0xff; 241 buf[3] = 0x00; 242 buf[4] = e4000_pll_lut[i].div; 243 244 dev_dbg(&priv->i2c->dev, "%s: f_vco=%u pll div=%d sigma_delta=%04x\n", 245 __func__, f_vco, buf[0], sigma_delta); 246 247 ret = e4000_wr_regs(priv, 0x09, buf, 5); 248 if (ret < 0) 249 goto err; 250 251 /* LNA filter (RF filter) */ 252 for (i = 0; i < ARRAY_SIZE(e400_lna_filter_lut); i++) { 253 if (c->frequency <= e400_lna_filter_lut[i].freq) 254 break; 255 } 256 257 if (i == ARRAY_SIZE(e400_lna_filter_lut)) 258 goto err; 259 260 ret = e4000_wr_reg(priv, 0x10, e400_lna_filter_lut[i].val); 261 if (ret < 0) 262 goto err; 263 264 /* IF filters */ 265 for (i = 0; i < ARRAY_SIZE(e4000_if_filter_lut); i++) { 266 if (c->bandwidth_hz <= e4000_if_filter_lut[i].freq) 267 break; 268 } 269 270 if (i == ARRAY_SIZE(e4000_if_filter_lut)) 271 goto err; 272 273 buf[0] = e4000_if_filter_lut[i].reg11_val; 274 buf[1] = e4000_if_filter_lut[i].reg12_val; 275 276 ret = e4000_wr_regs(priv, 0x11, buf, 2); 277 if (ret < 0) 278 goto err; 279 280 /* frequency band */ 281 for (i = 0; i < ARRAY_SIZE(e4000_band_lut); i++) { 282 if (c->frequency <= e4000_band_lut[i].freq) 283 break; 284 } 285 286 if (i == ARRAY_SIZE(e4000_band_lut)) 287 goto err; 288 289 ret = e4000_wr_reg(priv, 0x07, e4000_band_lut[i].reg07_val); 290 if (ret < 0) 291 goto err; 292 293 ret = e4000_wr_reg(priv, 0x78, e4000_band_lut[i].reg78_val); 294 if (ret < 0) 295 goto err; 296 297 /* DC offset */ 298 for (i = 0; i < 4; i++) { 299 if (i == 0) 300 ret = e4000_wr_regs(priv, 0x15, "\x00\x7e\x24", 3); 301 else if (i == 1) 302 ret = e4000_wr_regs(priv, 0x15, "\x00\x7f", 2); 303 else if (i == 2) 304 ret = e4000_wr_regs(priv, 0x15, "\x01", 1); 305 else 306 ret = e4000_wr_regs(priv, 0x16, "\x7e", 1); 307 308 if (ret < 0) 309 goto err; 310 311 ret = e4000_wr_reg(priv, 0x29, 0x01); 312 if (ret < 0) 313 goto err; 314 315 ret = e4000_rd_regs(priv, 0x2a, buf, 3); 316 if (ret < 0) 317 goto err; 318 319 i_data[i] = (((buf[2] >> 0) & 0x3) << 6) | (buf[0] & 0x3f); 320 q_data[i] = (((buf[2] >> 4) & 0x3) << 6) | (buf[1] & 0x3f); 321 } 322 323 swap(q_data[2], q_data[3]); 324 swap(i_data[2], i_data[3]); 325 326 ret = e4000_wr_regs(priv, 0x50, q_data, 4); 327 if (ret < 0) 328 goto err; 329 330 ret = e4000_wr_regs(priv, 0x60, i_data, 4); 331 if (ret < 0) 332 goto err; 333 334 /* gain control auto */ 335 ret = e4000_wr_reg(priv, 0x1a, 0x17); 336 if (ret < 0) 337 goto err; 338 339 if (fe->ops.i2c_gate_ctrl) 340 fe->ops.i2c_gate_ctrl(fe, 0); 341 342 return 0; 343 err: 344 if (fe->ops.i2c_gate_ctrl) 345 fe->ops.i2c_gate_ctrl(fe, 0); 346 347 dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret); 348 return ret; 349 } 350 351 static int e4000_get_if_frequency(struct dvb_frontend *fe, u32 *frequency) 352 { 353 struct e4000_priv *priv = fe->tuner_priv; 354 355 dev_dbg(&priv->i2c->dev, "%s:\n", __func__); 356 357 *frequency = 0; /* Zero-IF */ 358 359 return 0; 360 } 361 362 static int e4000_release(struct dvb_frontend *fe) 363 { 364 struct e4000_priv *priv = fe->tuner_priv; 365 366 dev_dbg(&priv->i2c->dev, "%s:\n", __func__); 367 368 kfree(fe->tuner_priv); 369 370 return 0; 371 } 372 373 static const struct dvb_tuner_ops e4000_tuner_ops = { 374 .info = { 375 .name = "Elonics E4000", 376 .frequency_min = 174000000, 377 .frequency_max = 862000000, 378 }, 379 380 .release = e4000_release, 381 382 .init = e4000_init, 383 .sleep = e4000_sleep, 384 .set_params = e4000_set_params, 385 386 .get_if_frequency = e4000_get_if_frequency, 387 }; 388 389 struct dvb_frontend *e4000_attach(struct dvb_frontend *fe, 390 struct i2c_adapter *i2c, const struct e4000_config *cfg) 391 { 392 struct e4000_priv *priv; 393 int ret; 394 u8 chip_id; 395 396 if (fe->ops.i2c_gate_ctrl) 397 fe->ops.i2c_gate_ctrl(fe, 1); 398 399 priv = kzalloc(sizeof(struct e4000_priv), GFP_KERNEL); 400 if (!priv) { 401 ret = -ENOMEM; 402 dev_err(&i2c->dev, "%s: kzalloc() failed\n", KBUILD_MODNAME); 403 goto err; 404 } 405 406 priv->cfg = cfg; 407 priv->i2c = i2c; 408 409 /* check if the tuner is there */ 410 ret = e4000_rd_reg(priv, 0x02, &chip_id); 411 if (ret < 0) 412 goto err; 413 414 dev_dbg(&priv->i2c->dev, "%s: chip_id=%02x\n", __func__, chip_id); 415 416 if (chip_id != 0x40) 417 goto err; 418 419 /* put sleep as chip seems to be in normal mode by default */ 420 ret = e4000_wr_reg(priv, 0x00, 0x00); 421 if (ret < 0) 422 goto err; 423 424 dev_info(&priv->i2c->dev, 425 "%s: Elonics E4000 successfully identified\n", 426 KBUILD_MODNAME); 427 428 fe->tuner_priv = priv; 429 memcpy(&fe->ops.tuner_ops, &e4000_tuner_ops, 430 sizeof(struct dvb_tuner_ops)); 431 432 if (fe->ops.i2c_gate_ctrl) 433 fe->ops.i2c_gate_ctrl(fe, 0); 434 435 return fe; 436 err: 437 if (fe->ops.i2c_gate_ctrl) 438 fe->ops.i2c_gate_ctrl(fe, 0); 439 440 dev_dbg(&i2c->dev, "%s: failed=%d\n", __func__, ret); 441 kfree(priv); 442 return NULL; 443 } 444 EXPORT_SYMBOL(e4000_attach); 445 446 MODULE_DESCRIPTION("Elonics E4000 silicon tuner driver"); 447 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>"); 448 MODULE_LICENSE("GPL"); 449