1 /* 2 * Copyright (C) 2013 STMicroelectronics Limited 3 * Author: Srinivas Kandagatla <srinivas.kandagatla@st.com> 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; either version 2 of the License, or 8 * (at your option) any later version. 9 */ 10 #include <linux/kernel.h> 11 #include <linux/clk.h> 12 #include <linux/interrupt.h> 13 #include <linux/module.h> 14 #include <linux/of.h> 15 #include <linux/platform_device.h> 16 #include <linux/reset.h> 17 #include <media/rc-core.h> 18 #include <linux/pinctrl/consumer.h> 19 20 struct st_rc_device { 21 struct device *dev; 22 int irq; 23 int irq_wake; 24 struct clk *sys_clock; 25 void __iomem *base; /* Register base address */ 26 void __iomem *rx_base;/* RX Register base address */ 27 struct rc_dev *rdev; 28 bool overclocking; 29 int sample_mult; 30 int sample_div; 31 bool rxuhfmode; 32 struct reset_control *rstc; 33 }; 34 35 /* Registers */ 36 #define IRB_SAMPLE_RATE_COMM 0x64 /* sample freq divisor*/ 37 #define IRB_CLOCK_SEL 0x70 /* clock select */ 38 #define IRB_CLOCK_SEL_STATUS 0x74 /* clock status */ 39 /* IRB IR/UHF receiver registers */ 40 #define IRB_RX_ON 0x40 /* pulse time capture */ 41 #define IRB_RX_SYS 0X44 /* sym period capture */ 42 #define IRB_RX_INT_EN 0x48 /* IRQ enable (R/W) */ 43 #define IRB_RX_INT_STATUS 0x4c /* IRQ status (R/W) */ 44 #define IRB_RX_EN 0x50 /* Receive enable */ 45 #define IRB_MAX_SYM_PERIOD 0x54 /* max sym value */ 46 #define IRB_RX_INT_CLEAR 0x58 /* overrun status */ 47 #define IRB_RX_STATUS 0x6c /* receive status */ 48 #define IRB_RX_NOISE_SUPPR 0x5c /* noise suppression */ 49 #define IRB_RX_POLARITY_INV 0x68 /* polarity inverter */ 50 51 /** 52 * IRQ set: Enable full FIFO 1 -> bit 3; 53 * Enable overrun IRQ 1 -> bit 2; 54 * Enable last symbol IRQ 1 -> bit 1: 55 * Enable RX interrupt 1 -> bit 0; 56 */ 57 #define IRB_RX_INTS 0x0f 58 #define IRB_RX_OVERRUN_INT 0x04 59 /* maximum symbol period (microsecs),timeout to detect end of symbol train */ 60 #define MAX_SYMB_TIME 0x5000 61 #define IRB_SAMPLE_FREQ 10000000 62 #define IRB_FIFO_NOT_EMPTY 0xff00 63 #define IRB_OVERFLOW 0x4 64 #define IRB_TIMEOUT 0xffff 65 #define IR_ST_NAME "st-rc" 66 67 static void st_rc_send_lirc_timeout(struct rc_dev *rdev) 68 { 69 DEFINE_IR_RAW_EVENT(ev); 70 ev.timeout = true; 71 ir_raw_event_store(rdev, &ev); 72 } 73 74 /** 75 * RX graphical example to better understand the difference between ST IR block 76 * output and standard definition used by LIRC (and most of the world!) 77 * 78 * mark mark 79 * |-IRB_RX_ON-| |-IRB_RX_ON-| 80 * ___ ___ ___ ___ ___ ___ _ 81 * | | | | | | | | | | | | | 82 * | | | | | | space 0 | | | | | | space 1 | 83 * _____| |__| |__| |____________________________| |__| |__| |_____________| 84 * 85 * |--------------- IRB_RX_SYS -------------|------ IRB_RX_SYS -------| 86 * 87 * |------------- encoding bit 0 -----------|---- encoding bit 1 -----| 88 * 89 * ST hardware returns mark (IRB_RX_ON) and total symbol time (IRB_RX_SYS), so 90 * convert to standard mark/space we have to calculate space=(IRB_RX_SYS-mark) 91 * The mark time represents the amount of time the carrier (usually 36-40kHz) 92 * is detected.The above examples shows Pulse Width Modulation encoding where 93 * bit 0 is represented by space>mark. 94 */ 95 96 static irqreturn_t st_rc_rx_interrupt(int irq, void *data) 97 { 98 unsigned int symbol, mark = 0; 99 struct st_rc_device *dev = data; 100 int last_symbol = 0; 101 u32 status; 102 DEFINE_IR_RAW_EVENT(ev); 103 104 if (dev->irq_wake) 105 pm_wakeup_event(dev->dev, 0); 106 107 status = readl(dev->rx_base + IRB_RX_STATUS); 108 109 while (status & (IRB_FIFO_NOT_EMPTY | IRB_OVERFLOW)) { 110 u32 int_status = readl(dev->rx_base + IRB_RX_INT_STATUS); 111 if (unlikely(int_status & IRB_RX_OVERRUN_INT)) { 112 /* discard the entire collection in case of errors! */ 113 ir_raw_event_reset(dev->rdev); 114 dev_info(dev->dev, "IR RX overrun\n"); 115 writel(IRB_RX_OVERRUN_INT, 116 dev->rx_base + IRB_RX_INT_CLEAR); 117 continue; 118 } 119 120 symbol = readl(dev->rx_base + IRB_RX_SYS); 121 mark = readl(dev->rx_base + IRB_RX_ON); 122 123 if (symbol == IRB_TIMEOUT) 124 last_symbol = 1; 125 126 /* Ignore any noise */ 127 if ((mark > 2) && (symbol > 1)) { 128 symbol -= mark; 129 if (dev->overclocking) { /* adjustments to timings */ 130 symbol *= dev->sample_mult; 131 symbol /= dev->sample_div; 132 mark *= dev->sample_mult; 133 mark /= dev->sample_div; 134 } 135 136 ev.duration = US_TO_NS(mark); 137 ev.pulse = true; 138 ir_raw_event_store(dev->rdev, &ev); 139 140 if (!last_symbol) { 141 ev.duration = US_TO_NS(symbol); 142 ev.pulse = false; 143 ir_raw_event_store(dev->rdev, &ev); 144 } else { 145 st_rc_send_lirc_timeout(dev->rdev); 146 } 147 148 } 149 last_symbol = 0; 150 status = readl(dev->rx_base + IRB_RX_STATUS); 151 } 152 153 writel(IRB_RX_INTS, dev->rx_base + IRB_RX_INT_CLEAR); 154 155 /* Empty software fifo */ 156 ir_raw_event_handle(dev->rdev); 157 return IRQ_HANDLED; 158 } 159 160 static void st_rc_hardware_init(struct st_rc_device *dev) 161 { 162 int baseclock, freqdiff; 163 unsigned int rx_max_symbol_per = MAX_SYMB_TIME; 164 unsigned int rx_sampling_freq_div; 165 166 /* Enable the IP */ 167 if (dev->rstc) 168 reset_control_deassert(dev->rstc); 169 170 clk_prepare_enable(dev->sys_clock); 171 baseclock = clk_get_rate(dev->sys_clock); 172 173 /* IRB input pins are inverted internally from high to low. */ 174 writel(1, dev->rx_base + IRB_RX_POLARITY_INV); 175 176 rx_sampling_freq_div = baseclock / IRB_SAMPLE_FREQ; 177 writel(rx_sampling_freq_div, dev->base + IRB_SAMPLE_RATE_COMM); 178 179 freqdiff = baseclock - (rx_sampling_freq_div * IRB_SAMPLE_FREQ); 180 if (freqdiff) { /* over clocking, workout the adjustment factors */ 181 dev->overclocking = true; 182 dev->sample_mult = 1000; 183 dev->sample_div = baseclock / (10000 * rx_sampling_freq_div); 184 rx_max_symbol_per = (rx_max_symbol_per * 1000)/dev->sample_div; 185 } 186 187 writel(rx_max_symbol_per, dev->rx_base + IRB_MAX_SYM_PERIOD); 188 } 189 190 static int st_rc_remove(struct platform_device *pdev) 191 { 192 struct st_rc_device *rc_dev = platform_get_drvdata(pdev); 193 clk_disable_unprepare(rc_dev->sys_clock); 194 rc_unregister_device(rc_dev->rdev); 195 return 0; 196 } 197 198 static int st_rc_open(struct rc_dev *rdev) 199 { 200 struct st_rc_device *dev = rdev->priv; 201 unsigned long flags; 202 local_irq_save(flags); 203 /* enable interrupts and receiver */ 204 writel(IRB_RX_INTS, dev->rx_base + IRB_RX_INT_EN); 205 writel(0x01, dev->rx_base + IRB_RX_EN); 206 local_irq_restore(flags); 207 208 return 0; 209 } 210 211 static void st_rc_close(struct rc_dev *rdev) 212 { 213 struct st_rc_device *dev = rdev->priv; 214 /* disable interrupts and receiver */ 215 writel(0x00, dev->rx_base + IRB_RX_EN); 216 writel(0x00, dev->rx_base + IRB_RX_INT_EN); 217 } 218 219 static int st_rc_probe(struct platform_device *pdev) 220 { 221 int ret = -EINVAL; 222 struct rc_dev *rdev; 223 struct device *dev = &pdev->dev; 224 struct resource *res; 225 struct st_rc_device *rc_dev; 226 struct device_node *np = pdev->dev.of_node; 227 const char *rx_mode; 228 229 rc_dev = devm_kzalloc(dev, sizeof(struct st_rc_device), GFP_KERNEL); 230 231 if (!rc_dev) 232 return -ENOMEM; 233 234 rdev = rc_allocate_device(); 235 236 if (!rdev) 237 return -ENOMEM; 238 239 if (np && !of_property_read_string(np, "rx-mode", &rx_mode)) { 240 241 if (!strcmp(rx_mode, "uhf")) { 242 rc_dev->rxuhfmode = true; 243 } else if (!strcmp(rx_mode, "infrared")) { 244 rc_dev->rxuhfmode = false; 245 } else { 246 dev_err(dev, "Unsupported rx mode [%s]\n", rx_mode); 247 goto err; 248 } 249 250 } else { 251 goto err; 252 } 253 254 rc_dev->sys_clock = devm_clk_get(dev, NULL); 255 if (IS_ERR(rc_dev->sys_clock)) { 256 dev_err(dev, "System clock not found\n"); 257 ret = PTR_ERR(rc_dev->sys_clock); 258 goto err; 259 } 260 261 rc_dev->irq = platform_get_irq(pdev, 0); 262 if (rc_dev->irq < 0) { 263 ret = rc_dev->irq; 264 goto err; 265 } 266 267 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 268 269 rc_dev->base = devm_ioremap_resource(dev, res); 270 if (IS_ERR(rc_dev->base)) { 271 ret = PTR_ERR(rc_dev->base); 272 goto err; 273 } 274 275 if (rc_dev->rxuhfmode) 276 rc_dev->rx_base = rc_dev->base + 0x40; 277 else 278 rc_dev->rx_base = rc_dev->base; 279 280 281 rc_dev->rstc = reset_control_get_optional(dev, NULL); 282 if (IS_ERR(rc_dev->rstc)) 283 rc_dev->rstc = NULL; 284 285 rc_dev->dev = dev; 286 platform_set_drvdata(pdev, rc_dev); 287 st_rc_hardware_init(rc_dev); 288 289 rdev->driver_type = RC_DRIVER_IR_RAW; 290 rdev->allowed_protocols = RC_BIT_ALL; 291 /* rx sampling rate is 10Mhz */ 292 rdev->rx_resolution = 100; 293 rdev->timeout = US_TO_NS(MAX_SYMB_TIME); 294 rdev->priv = rc_dev; 295 rdev->open = st_rc_open; 296 rdev->close = st_rc_close; 297 rdev->driver_name = IR_ST_NAME; 298 rdev->map_name = RC_MAP_LIRC; 299 rdev->input_name = "ST Remote Control Receiver"; 300 301 /* enable wake via this device */ 302 device_set_wakeup_capable(dev, true); 303 device_set_wakeup_enable(dev, true); 304 305 ret = rc_register_device(rdev); 306 if (ret < 0) 307 goto clkerr; 308 309 rc_dev->rdev = rdev; 310 if (devm_request_irq(dev, rc_dev->irq, st_rc_rx_interrupt, 311 IRQF_NO_SUSPEND, IR_ST_NAME, rc_dev) < 0) { 312 dev_err(dev, "IRQ %d register failed\n", rc_dev->irq); 313 ret = -EINVAL; 314 goto rcerr; 315 } 316 317 /** 318 * for LIRC_MODE_MODE2 or LIRC_MODE_PULSE or LIRC_MODE_RAW 319 * lircd expects a long space first before a signal train to sync. 320 */ 321 st_rc_send_lirc_timeout(rdev); 322 323 dev_info(dev, "setup in %s mode\n", rc_dev->rxuhfmode ? "UHF" : "IR"); 324 325 return ret; 326 rcerr: 327 rc_unregister_device(rdev); 328 rdev = NULL; 329 clkerr: 330 clk_disable_unprepare(rc_dev->sys_clock); 331 err: 332 rc_free_device(rdev); 333 dev_err(dev, "Unable to register device (%d)\n", ret); 334 return ret; 335 } 336 337 #ifdef CONFIG_PM_SLEEP 338 static int st_rc_suspend(struct device *dev) 339 { 340 struct st_rc_device *rc_dev = dev_get_drvdata(dev); 341 342 if (device_may_wakeup(dev)) { 343 if (!enable_irq_wake(rc_dev->irq)) 344 rc_dev->irq_wake = 1; 345 else 346 return -EINVAL; 347 } else { 348 pinctrl_pm_select_sleep_state(dev); 349 writel(0x00, rc_dev->rx_base + IRB_RX_EN); 350 writel(0x00, rc_dev->rx_base + IRB_RX_INT_EN); 351 clk_disable_unprepare(rc_dev->sys_clock); 352 if (rc_dev->rstc) 353 reset_control_assert(rc_dev->rstc); 354 } 355 356 return 0; 357 } 358 359 static int st_rc_resume(struct device *dev) 360 { 361 struct st_rc_device *rc_dev = dev_get_drvdata(dev); 362 struct rc_dev *rdev = rc_dev->rdev; 363 364 if (rc_dev->irq_wake) { 365 disable_irq_wake(rc_dev->irq); 366 rc_dev->irq_wake = 0; 367 } else { 368 pinctrl_pm_select_default_state(dev); 369 st_rc_hardware_init(rc_dev); 370 if (rdev->users) { 371 writel(IRB_RX_INTS, rc_dev->rx_base + IRB_RX_INT_EN); 372 writel(0x01, rc_dev->rx_base + IRB_RX_EN); 373 } 374 } 375 376 return 0; 377 } 378 379 #endif 380 381 static SIMPLE_DEV_PM_OPS(st_rc_pm_ops, st_rc_suspend, st_rc_resume); 382 383 #ifdef CONFIG_OF 384 static const struct of_device_id st_rc_match[] = { 385 { .compatible = "st,comms-irb", }, 386 {}, 387 }; 388 389 MODULE_DEVICE_TABLE(of, st_rc_match); 390 #endif 391 392 static struct platform_driver st_rc_driver = { 393 .driver = { 394 .name = IR_ST_NAME, 395 .of_match_table = of_match_ptr(st_rc_match), 396 .pm = &st_rc_pm_ops, 397 }, 398 .probe = st_rc_probe, 399 .remove = st_rc_remove, 400 }; 401 402 module_platform_driver(st_rc_driver); 403 404 MODULE_DESCRIPTION("RC Transceiver driver for STMicroelectronics platforms"); 405 MODULE_AUTHOR("STMicroelectronics (R&D) Ltd"); 406 MODULE_LICENSE("GPL"); 407