1 /* 2 * Copyright (C) 2008 Nokia Corporation 3 * 4 * Based on lirc_serial.c 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 * 20 */ 21 22 #include <linux/module.h> 23 #include <linux/interrupt.h> 24 #include <linux/uaccess.h> 25 #include <linux/platform_device.h> 26 #include <linux/sched.h> 27 #include <linux/wait.h> 28 29 #include <plat/dmtimer.h> 30 #include <plat/clock.h> 31 #include <plat/omap-pm.h> 32 33 #include <media/lirc.h> 34 #include <media/lirc_dev.h> 35 #include <media/ir-rx51.h> 36 37 #define LIRC_RX51_DRIVER_FEATURES (LIRC_CAN_SET_SEND_DUTY_CYCLE | \ 38 LIRC_CAN_SET_SEND_CARRIER | \ 39 LIRC_CAN_SEND_PULSE) 40 41 #define DRIVER_NAME "lirc_rx51" 42 43 #define WBUF_LEN 256 44 45 #define TIMER_MAX_VALUE 0xffffffff 46 47 struct lirc_rx51 { 48 struct omap_dm_timer *pwm_timer; 49 struct omap_dm_timer *pulse_timer; 50 struct device *dev; 51 struct lirc_rx51_platform_data *pdata; 52 wait_queue_head_t wqueue; 53 54 unsigned long fclk_khz; 55 unsigned int freq; /* carrier frequency */ 56 unsigned int duty_cycle; /* carrier duty cycle */ 57 unsigned int irq_num; 58 unsigned int match; 59 int wbuf[WBUF_LEN]; 60 int wbuf_index; 61 unsigned long device_is_open; 62 int pwm_timer_num; 63 }; 64 65 static void lirc_rx51_on(struct lirc_rx51 *lirc_rx51) 66 { 67 omap_dm_timer_set_pwm(lirc_rx51->pwm_timer, 0, 1, 68 OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE); 69 } 70 71 static void lirc_rx51_off(struct lirc_rx51 *lirc_rx51) 72 { 73 omap_dm_timer_set_pwm(lirc_rx51->pwm_timer, 0, 1, 74 OMAP_TIMER_TRIGGER_NONE); 75 } 76 77 static int init_timing_params(struct lirc_rx51 *lirc_rx51) 78 { 79 u32 load, match; 80 81 load = -(lirc_rx51->fclk_khz * 1000 / lirc_rx51->freq); 82 match = -(lirc_rx51->duty_cycle * -load / 100); 83 omap_dm_timer_set_load(lirc_rx51->pwm_timer, 1, load); 84 omap_dm_timer_set_match(lirc_rx51->pwm_timer, 1, match); 85 omap_dm_timer_write_counter(lirc_rx51->pwm_timer, TIMER_MAX_VALUE - 2); 86 omap_dm_timer_start(lirc_rx51->pwm_timer); 87 omap_dm_timer_set_int_enable(lirc_rx51->pulse_timer, 0); 88 omap_dm_timer_start(lirc_rx51->pulse_timer); 89 90 lirc_rx51->match = 0; 91 92 return 0; 93 } 94 95 #define tics_after(a, b) ((long)(b) - (long)(a) < 0) 96 97 static int pulse_timer_set_timeout(struct lirc_rx51 *lirc_rx51, int usec) 98 { 99 int counter; 100 101 BUG_ON(usec < 0); 102 103 if (lirc_rx51->match == 0) 104 counter = omap_dm_timer_read_counter(lirc_rx51->pulse_timer); 105 else 106 counter = lirc_rx51->match; 107 108 counter += (u32)(lirc_rx51->fclk_khz * usec / (1000)); 109 omap_dm_timer_set_match(lirc_rx51->pulse_timer, 1, counter); 110 omap_dm_timer_set_int_enable(lirc_rx51->pulse_timer, 111 OMAP_TIMER_INT_MATCH); 112 if (tics_after(omap_dm_timer_read_counter(lirc_rx51->pulse_timer), 113 counter)) { 114 return 1; 115 } 116 return 0; 117 } 118 119 static irqreturn_t lirc_rx51_interrupt_handler(int irq, void *ptr) 120 { 121 unsigned int retval; 122 struct lirc_rx51 *lirc_rx51 = ptr; 123 124 retval = omap_dm_timer_read_status(lirc_rx51->pulse_timer); 125 if (!retval) 126 return IRQ_NONE; 127 128 if (retval & ~OMAP_TIMER_INT_MATCH) 129 dev_err_ratelimited(lirc_rx51->dev, 130 ": Unexpected interrupt source: %x\n", retval); 131 132 omap_dm_timer_write_status(lirc_rx51->pulse_timer, 133 OMAP_TIMER_INT_MATCH | 134 OMAP_TIMER_INT_OVERFLOW | 135 OMAP_TIMER_INT_CAPTURE); 136 if (lirc_rx51->wbuf_index < 0) { 137 dev_err_ratelimited(lirc_rx51->dev, 138 ": BUG wbuf_index has value of %i\n", 139 lirc_rx51->wbuf_index); 140 goto end; 141 } 142 143 /* 144 * If we happen to hit an odd latency spike, loop through the 145 * pulses until we catch up. 146 */ 147 do { 148 if (lirc_rx51->wbuf_index >= WBUF_LEN) 149 goto end; 150 if (lirc_rx51->wbuf[lirc_rx51->wbuf_index] == -1) 151 goto end; 152 153 if (lirc_rx51->wbuf_index % 2) 154 lirc_rx51_off(lirc_rx51); 155 else 156 lirc_rx51_on(lirc_rx51); 157 158 retval = pulse_timer_set_timeout(lirc_rx51, 159 lirc_rx51->wbuf[lirc_rx51->wbuf_index]); 160 lirc_rx51->wbuf_index++; 161 162 } while (retval); 163 164 return IRQ_HANDLED; 165 end: 166 /* Stop TX here */ 167 lirc_rx51_off(lirc_rx51); 168 lirc_rx51->wbuf_index = -1; 169 omap_dm_timer_stop(lirc_rx51->pwm_timer); 170 omap_dm_timer_stop(lirc_rx51->pulse_timer); 171 omap_dm_timer_set_int_enable(lirc_rx51->pulse_timer, 0); 172 wake_up_interruptible(&lirc_rx51->wqueue); 173 174 return IRQ_HANDLED; 175 } 176 177 static int lirc_rx51_init_port(struct lirc_rx51 *lirc_rx51) 178 { 179 struct clk *clk_fclk; 180 int retval, pwm_timer = lirc_rx51->pwm_timer_num; 181 182 lirc_rx51->pwm_timer = omap_dm_timer_request_specific(pwm_timer); 183 if (lirc_rx51->pwm_timer == NULL) { 184 dev_err(lirc_rx51->dev, ": Error requesting GPT%d timer\n", 185 pwm_timer); 186 return -EBUSY; 187 } 188 189 lirc_rx51->pulse_timer = omap_dm_timer_request(); 190 if (lirc_rx51->pulse_timer == NULL) { 191 dev_err(lirc_rx51->dev, ": Error requesting pulse timer\n"); 192 retval = -EBUSY; 193 goto err1; 194 } 195 196 omap_dm_timer_set_source(lirc_rx51->pwm_timer, OMAP_TIMER_SRC_SYS_CLK); 197 omap_dm_timer_set_source(lirc_rx51->pulse_timer, 198 OMAP_TIMER_SRC_SYS_CLK); 199 200 omap_dm_timer_enable(lirc_rx51->pwm_timer); 201 omap_dm_timer_enable(lirc_rx51->pulse_timer); 202 203 lirc_rx51->irq_num = omap_dm_timer_get_irq(lirc_rx51->pulse_timer); 204 retval = request_irq(lirc_rx51->irq_num, lirc_rx51_interrupt_handler, 205 IRQF_DISABLED | IRQF_SHARED, 206 "lirc_pulse_timer", lirc_rx51); 207 if (retval) { 208 dev_err(lirc_rx51->dev, ": Failed to request interrupt line\n"); 209 goto err2; 210 } 211 212 clk_fclk = omap_dm_timer_get_fclk(lirc_rx51->pwm_timer); 213 lirc_rx51->fclk_khz = clk_fclk->rate / 1000; 214 215 return 0; 216 217 err2: 218 omap_dm_timer_free(lirc_rx51->pulse_timer); 219 err1: 220 omap_dm_timer_free(lirc_rx51->pwm_timer); 221 222 return retval; 223 } 224 225 static int lirc_rx51_free_port(struct lirc_rx51 *lirc_rx51) 226 { 227 omap_dm_timer_set_int_enable(lirc_rx51->pulse_timer, 0); 228 free_irq(lirc_rx51->irq_num, lirc_rx51); 229 lirc_rx51_off(lirc_rx51); 230 omap_dm_timer_disable(lirc_rx51->pwm_timer); 231 omap_dm_timer_disable(lirc_rx51->pulse_timer); 232 omap_dm_timer_free(lirc_rx51->pwm_timer); 233 omap_dm_timer_free(lirc_rx51->pulse_timer); 234 lirc_rx51->wbuf_index = -1; 235 236 return 0; 237 } 238 239 static ssize_t lirc_rx51_write(struct file *file, const char *buf, 240 size_t n, loff_t *ppos) 241 { 242 int count, i; 243 struct lirc_rx51 *lirc_rx51 = file->private_data; 244 245 if (n % sizeof(int)) 246 return -EINVAL; 247 248 count = n / sizeof(int); 249 if ((count > WBUF_LEN) || (count % 2 == 0)) 250 return -EINVAL; 251 252 /* Wait any pending transfers to finish */ 253 wait_event_interruptible(lirc_rx51->wqueue, lirc_rx51->wbuf_index < 0); 254 255 if (copy_from_user(lirc_rx51->wbuf, buf, n)) 256 return -EFAULT; 257 258 /* Sanity check the input pulses */ 259 for (i = 0; i < count; i++) 260 if (lirc_rx51->wbuf[i] < 0) 261 return -EINVAL; 262 263 init_timing_params(lirc_rx51); 264 if (count < WBUF_LEN) 265 lirc_rx51->wbuf[count] = -1; /* Insert termination mark */ 266 267 /* 268 * Adjust latency requirements so the device doesn't go in too 269 * deep sleep states 270 */ 271 lirc_rx51->pdata->set_max_mpu_wakeup_lat(lirc_rx51->dev, 50); 272 273 lirc_rx51_on(lirc_rx51); 274 lirc_rx51->wbuf_index = 1; 275 pulse_timer_set_timeout(lirc_rx51, lirc_rx51->wbuf[0]); 276 277 /* 278 * Don't return back to the userspace until the transfer has 279 * finished 280 */ 281 wait_event_interruptible(lirc_rx51->wqueue, lirc_rx51->wbuf_index < 0); 282 283 /* We can sleep again */ 284 lirc_rx51->pdata->set_max_mpu_wakeup_lat(lirc_rx51->dev, -1); 285 286 return n; 287 } 288 289 static long lirc_rx51_ioctl(struct file *filep, 290 unsigned int cmd, unsigned long arg) 291 { 292 int result; 293 unsigned long value; 294 unsigned int ivalue; 295 struct lirc_rx51 *lirc_rx51 = filep->private_data; 296 297 switch (cmd) { 298 case LIRC_GET_SEND_MODE: 299 result = put_user(LIRC_MODE_PULSE, (unsigned long *)arg); 300 if (result) 301 return result; 302 break; 303 304 case LIRC_SET_SEND_MODE: 305 result = get_user(value, (unsigned long *)arg); 306 if (result) 307 return result; 308 309 /* only LIRC_MODE_PULSE supported */ 310 if (value != LIRC_MODE_PULSE) 311 return -ENOSYS; 312 break; 313 314 case LIRC_GET_REC_MODE: 315 result = put_user(0, (unsigned long *) arg); 316 if (result) 317 return result; 318 break; 319 320 case LIRC_GET_LENGTH: 321 return -ENOSYS; 322 break; 323 324 case LIRC_SET_SEND_DUTY_CYCLE: 325 result = get_user(ivalue, (unsigned int *) arg); 326 if (result) 327 return result; 328 329 if (ivalue <= 0 || ivalue > 100) { 330 dev_err(lirc_rx51->dev, ": invalid duty cycle %d\n", 331 ivalue); 332 return -EINVAL; 333 } 334 335 lirc_rx51->duty_cycle = ivalue; 336 break; 337 338 case LIRC_SET_SEND_CARRIER: 339 result = get_user(ivalue, (unsigned int *) arg); 340 if (result) 341 return result; 342 343 if (ivalue > 500000 || ivalue < 20000) { 344 dev_err(lirc_rx51->dev, ": invalid carrier freq %d\n", 345 ivalue); 346 return -EINVAL; 347 } 348 349 lirc_rx51->freq = ivalue; 350 break; 351 352 case LIRC_GET_FEATURES: 353 result = put_user(LIRC_RX51_DRIVER_FEATURES, 354 (unsigned long *) arg); 355 if (result) 356 return result; 357 break; 358 359 default: 360 return -ENOIOCTLCMD; 361 } 362 363 return 0; 364 } 365 366 static int lirc_rx51_open(struct inode *inode, struct file *file) 367 { 368 struct lirc_rx51 *lirc_rx51 = lirc_get_pdata(file); 369 BUG_ON(!lirc_rx51); 370 371 file->private_data = lirc_rx51; 372 373 if (test_and_set_bit(1, &lirc_rx51->device_is_open)) 374 return -EBUSY; 375 376 return lirc_rx51_init_port(lirc_rx51); 377 } 378 379 static int lirc_rx51_release(struct inode *inode, struct file *file) 380 { 381 struct lirc_rx51 *lirc_rx51 = file->private_data; 382 383 lirc_rx51_free_port(lirc_rx51); 384 385 clear_bit(1, &lirc_rx51->device_is_open); 386 387 return 0; 388 } 389 390 static struct lirc_rx51 lirc_rx51 = { 391 .freq = 38000, 392 .duty_cycle = 50, 393 .wbuf_index = -1, 394 }; 395 396 static const struct file_operations lirc_fops = { 397 .owner = THIS_MODULE, 398 .write = lirc_rx51_write, 399 .unlocked_ioctl = lirc_rx51_ioctl, 400 .read = lirc_dev_fop_read, 401 .poll = lirc_dev_fop_poll, 402 .open = lirc_rx51_open, 403 .release = lirc_rx51_release, 404 }; 405 406 static struct lirc_driver lirc_rx51_driver = { 407 .name = DRIVER_NAME, 408 .minor = -1, 409 .code_length = 1, 410 .data = &lirc_rx51, 411 .fops = &lirc_fops, 412 .owner = THIS_MODULE, 413 }; 414 415 #ifdef CONFIG_PM 416 417 static int lirc_rx51_suspend(struct platform_device *dev, pm_message_t state) 418 { 419 /* 420 * In case the device is still open, do not suspend. Normally 421 * this should not be a problem as lircd only keeps the device 422 * open only for short periods of time. We also don't want to 423 * get involved with race conditions that might happen if we 424 * were in a middle of a transmit. Thus, we defer any suspend 425 * actions until transmit has completed. 426 */ 427 if (test_and_set_bit(1, &lirc_rx51.device_is_open)) 428 return -EAGAIN; 429 430 clear_bit(1, &lirc_rx51.device_is_open); 431 432 return 0; 433 } 434 435 static int lirc_rx51_resume(struct platform_device *dev) 436 { 437 return 0; 438 } 439 440 #else 441 442 #define lirc_rx51_suspend NULL 443 #define lirc_rx51_resume NULL 444 445 #endif /* CONFIG_PM */ 446 447 static int __devinit lirc_rx51_probe(struct platform_device *dev) 448 { 449 lirc_rx51_driver.features = LIRC_RX51_DRIVER_FEATURES; 450 lirc_rx51.pdata = dev->dev.platform_data; 451 lirc_rx51.pwm_timer_num = lirc_rx51.pdata->pwm_timer; 452 lirc_rx51.dev = &dev->dev; 453 lirc_rx51_driver.dev = &dev->dev; 454 lirc_rx51_driver.minor = lirc_register_driver(&lirc_rx51_driver); 455 init_waitqueue_head(&lirc_rx51.wqueue); 456 457 if (lirc_rx51_driver.minor < 0) { 458 dev_err(lirc_rx51.dev, ": lirc_register_driver failed: %d\n", 459 lirc_rx51_driver.minor); 460 return lirc_rx51_driver.minor; 461 } 462 dev_info(lirc_rx51.dev, "registration ok, minor: %d, pwm: %d\n", 463 lirc_rx51_driver.minor, lirc_rx51.pwm_timer_num); 464 465 return 0; 466 } 467 468 static int __exit lirc_rx51_remove(struct platform_device *dev) 469 { 470 return lirc_unregister_driver(lirc_rx51_driver.minor); 471 } 472 473 struct platform_driver lirc_rx51_platform_driver = { 474 .probe = lirc_rx51_probe, 475 .remove = __exit_p(lirc_rx51_remove), 476 .suspend = lirc_rx51_suspend, 477 .resume = lirc_rx51_resume, 478 .driver = { 479 .name = DRIVER_NAME, 480 .owner = THIS_MODULE, 481 }, 482 }; 483 484 static int __init lirc_rx51_init(void) 485 { 486 return platform_driver_register(&lirc_rx51_platform_driver); 487 } 488 module_init(lirc_rx51_init); 489 490 static void __exit lirc_rx51_exit(void) 491 { 492 platform_driver_unregister(&lirc_rx51_platform_driver); 493 } 494 module_exit(lirc_rx51_exit); 495 496 MODULE_DESCRIPTION("LIRC TX driver for Nokia RX51"); 497 MODULE_AUTHOR("Nokia Corporation"); 498 MODULE_LICENSE("GPL"); 499