1 /* 2 * ImgTec IR Hardware Decoder found in PowerDown Controller. 3 * 4 * Copyright 2010-2014 Imagination Technologies Ltd. 5 * 6 * This ties into the input subsystem using the RC-core. Protocol support is 7 * provided in separate modules which provide the parameters and scancode 8 * translation functions to set up the hardware decoder and interpret the 9 * resulting input. 10 */ 11 12 #include <linux/bitops.h> 13 #include <linux/clk.h> 14 #include <linux/interrupt.h> 15 #include <linux/spinlock.h> 16 #include <linux/timer.h> 17 #include <media/rc-core.h> 18 #include "img-ir.h" 19 20 /* Decoders lock (only modified to preprocess them) */ 21 static DEFINE_SPINLOCK(img_ir_decoders_lock); 22 23 extern struct img_ir_decoder img_ir_nec; 24 extern struct img_ir_decoder img_ir_jvc; 25 extern struct img_ir_decoder img_ir_sony; 26 extern struct img_ir_decoder img_ir_sharp; 27 extern struct img_ir_decoder img_ir_sanyo; 28 29 static bool img_ir_decoders_preprocessed; 30 static struct img_ir_decoder *img_ir_decoders[] = { 31 #ifdef CONFIG_IR_IMG_NEC 32 &img_ir_nec, 33 #endif 34 #ifdef CONFIG_IR_IMG_JVC 35 &img_ir_jvc, 36 #endif 37 #ifdef CONFIG_IR_IMG_SONY 38 &img_ir_sony, 39 #endif 40 #ifdef CONFIG_IR_IMG_SHARP 41 &img_ir_sharp, 42 #endif 43 #ifdef CONFIG_IR_IMG_SANYO 44 &img_ir_sanyo, 45 #endif 46 NULL 47 }; 48 49 #define IMG_IR_F_FILTER BIT(RC_FILTER_NORMAL) /* enable filtering */ 50 #define IMG_IR_F_WAKE BIT(RC_FILTER_WAKEUP) /* enable waking */ 51 52 /* code type quirks */ 53 54 #define IMG_IR_QUIRK_CODE_BROKEN 0x1 /* Decode is broken */ 55 #define IMG_IR_QUIRK_CODE_LEN_INCR 0x2 /* Bit length needs increment */ 56 57 /* functions for preprocessing timings, ensuring max is set */ 58 59 static void img_ir_timing_preprocess(struct img_ir_timing_range *range, 60 unsigned int unit) 61 { 62 if (range->max < range->min) 63 range->max = range->min; 64 if (unit) { 65 /* multiply by unit and convert to microseconds */ 66 range->min = (range->min*unit)/1000; 67 range->max = (range->max*unit + 999)/1000; /* round up */ 68 } 69 } 70 71 static void img_ir_symbol_timing_preprocess(struct img_ir_symbol_timing *timing, 72 unsigned int unit) 73 { 74 img_ir_timing_preprocess(&timing->pulse, unit); 75 img_ir_timing_preprocess(&timing->space, unit); 76 } 77 78 static void img_ir_timings_preprocess(struct img_ir_timings *timings, 79 unsigned int unit) 80 { 81 img_ir_symbol_timing_preprocess(&timings->ldr, unit); 82 img_ir_symbol_timing_preprocess(&timings->s00, unit); 83 img_ir_symbol_timing_preprocess(&timings->s01, unit); 84 img_ir_symbol_timing_preprocess(&timings->s10, unit); 85 img_ir_symbol_timing_preprocess(&timings->s11, unit); 86 /* default s10 and s11 to s00 and s01 if no leader */ 87 if (unit) 88 /* multiply by unit and convert to microseconds (round up) */ 89 timings->ft.ft_min = (timings->ft.ft_min*unit + 999)/1000; 90 } 91 92 /* functions for filling empty fields with defaults */ 93 94 static void img_ir_timing_defaults(struct img_ir_timing_range *range, 95 struct img_ir_timing_range *defaults) 96 { 97 if (!range->min) 98 range->min = defaults->min; 99 if (!range->max) 100 range->max = defaults->max; 101 } 102 103 static void img_ir_symbol_timing_defaults(struct img_ir_symbol_timing *timing, 104 struct img_ir_symbol_timing *defaults) 105 { 106 img_ir_timing_defaults(&timing->pulse, &defaults->pulse); 107 img_ir_timing_defaults(&timing->space, &defaults->space); 108 } 109 110 static void img_ir_timings_defaults(struct img_ir_timings *timings, 111 struct img_ir_timings *defaults) 112 { 113 img_ir_symbol_timing_defaults(&timings->ldr, &defaults->ldr); 114 img_ir_symbol_timing_defaults(&timings->s00, &defaults->s00); 115 img_ir_symbol_timing_defaults(&timings->s01, &defaults->s01); 116 img_ir_symbol_timing_defaults(&timings->s10, &defaults->s10); 117 img_ir_symbol_timing_defaults(&timings->s11, &defaults->s11); 118 if (!timings->ft.ft_min) 119 timings->ft.ft_min = defaults->ft.ft_min; 120 } 121 122 /* functions for converting timings to register values */ 123 124 /** 125 * img_ir_control() - Convert control struct to control register value. 126 * @control: Control data 127 * 128 * Returns: The control register value equivalent of @control. 129 */ 130 static u32 img_ir_control(const struct img_ir_control *control) 131 { 132 u32 ctrl = control->code_type << IMG_IR_CODETYPE_SHIFT; 133 if (control->decoden) 134 ctrl |= IMG_IR_DECODEN; 135 if (control->hdrtog) 136 ctrl |= IMG_IR_HDRTOG; 137 if (control->ldrdec) 138 ctrl |= IMG_IR_LDRDEC; 139 if (control->decodinpol) 140 ctrl |= IMG_IR_DECODINPOL; 141 if (control->bitorien) 142 ctrl |= IMG_IR_BITORIEN; 143 if (control->d1validsel) 144 ctrl |= IMG_IR_D1VALIDSEL; 145 if (control->bitinv) 146 ctrl |= IMG_IR_BITINV; 147 if (control->decodend2) 148 ctrl |= IMG_IR_DECODEND2; 149 if (control->bitoriend2) 150 ctrl |= IMG_IR_BITORIEND2; 151 if (control->bitinvd2) 152 ctrl |= IMG_IR_BITINVD2; 153 return ctrl; 154 } 155 156 /** 157 * img_ir_timing_range_convert() - Convert microsecond range. 158 * @out: Output timing range in clock cycles with a shift. 159 * @in: Input timing range in microseconds. 160 * @tolerance: Tolerance as a fraction of 128 (roughly percent). 161 * @clock_hz: IR clock rate in Hz. 162 * @shift: Shift of output units. 163 * 164 * Converts min and max from microseconds to IR clock cycles, applies a 165 * tolerance, and shifts for the register, rounding in the right direction. 166 * Note that in and out can safely be the same object. 167 */ 168 static void img_ir_timing_range_convert(struct img_ir_timing_range *out, 169 const struct img_ir_timing_range *in, 170 unsigned int tolerance, 171 unsigned long clock_hz, 172 unsigned int shift) 173 { 174 unsigned int min = in->min; 175 unsigned int max = in->max; 176 /* add a tolerance */ 177 min = min - (min*tolerance >> 7); 178 max = max + (max*tolerance >> 7); 179 /* convert from microseconds into clock cycles */ 180 min = min*clock_hz / 1000000; 181 max = (max*clock_hz + 999999) / 1000000; /* round up */ 182 /* apply shift and copy to output */ 183 out->min = min >> shift; 184 out->max = (max + ((1 << shift) - 1)) >> shift; /* round up */ 185 } 186 187 /** 188 * img_ir_symbol_timing() - Convert symbol timing struct to register value. 189 * @timing: Symbol timing data 190 * @tolerance: Timing tolerance where 0-128 represents 0-100% 191 * @clock_hz: Frequency of source clock in Hz 192 * @pd_shift: Shift to apply to symbol period 193 * @w_shift: Shift to apply to symbol width 194 * 195 * Returns: Symbol timing register value based on arguments. 196 */ 197 static u32 img_ir_symbol_timing(const struct img_ir_symbol_timing *timing, 198 unsigned int tolerance, 199 unsigned long clock_hz, 200 unsigned int pd_shift, 201 unsigned int w_shift) 202 { 203 struct img_ir_timing_range hw_pulse, hw_period; 204 /* we calculate period in hw_period, then convert in place */ 205 hw_period.min = timing->pulse.min + timing->space.min; 206 hw_period.max = timing->pulse.max + timing->space.max; 207 img_ir_timing_range_convert(&hw_period, &hw_period, 208 tolerance, clock_hz, pd_shift); 209 img_ir_timing_range_convert(&hw_pulse, &timing->pulse, 210 tolerance, clock_hz, w_shift); 211 /* construct register value */ 212 return (hw_period.max << IMG_IR_PD_MAX_SHIFT) | 213 (hw_period.min << IMG_IR_PD_MIN_SHIFT) | 214 (hw_pulse.max << IMG_IR_W_MAX_SHIFT) | 215 (hw_pulse.min << IMG_IR_W_MIN_SHIFT); 216 } 217 218 /** 219 * img_ir_free_timing() - Convert free time timing struct to register value. 220 * @timing: Free symbol timing data 221 * @clock_hz: Source clock frequency in Hz 222 * 223 * Returns: Free symbol timing register value. 224 */ 225 static u32 img_ir_free_timing(const struct img_ir_free_timing *timing, 226 unsigned long clock_hz) 227 { 228 unsigned int minlen, maxlen, ft_min; 229 /* minlen is only 5 bits, and round minlen to multiple of 2 */ 230 if (timing->minlen < 30) 231 minlen = timing->minlen & -2; 232 else 233 minlen = 30; 234 /* maxlen has maximum value of 48, and round maxlen to multiple of 2 */ 235 if (timing->maxlen < 48) 236 maxlen = (timing->maxlen + 1) & -2; 237 else 238 maxlen = 48; 239 /* convert and shift ft_min, rounding upwards */ 240 ft_min = (timing->ft_min*clock_hz + 999999) / 1000000; 241 ft_min = (ft_min + 7) >> 3; 242 /* construct register value */ 243 return (maxlen << IMG_IR_MAXLEN_SHIFT) | 244 (minlen << IMG_IR_MINLEN_SHIFT) | 245 (ft_min << IMG_IR_FT_MIN_SHIFT); 246 } 247 248 /** 249 * img_ir_free_timing_dynamic() - Update free time register value. 250 * @st_ft: Static free time register value from img_ir_free_timing. 251 * @filter: Current filter which may additionally restrict min/max len. 252 * 253 * Returns: Updated free time register value based on the current filter. 254 */ 255 static u32 img_ir_free_timing_dynamic(u32 st_ft, struct img_ir_filter *filter) 256 { 257 unsigned int minlen, maxlen, newminlen, newmaxlen; 258 259 /* round minlen, maxlen to multiple of 2 */ 260 newminlen = filter->minlen & -2; 261 newmaxlen = (filter->maxlen + 1) & -2; 262 /* extract min/max len from register */ 263 minlen = (st_ft & IMG_IR_MINLEN) >> IMG_IR_MINLEN_SHIFT; 264 maxlen = (st_ft & IMG_IR_MAXLEN) >> IMG_IR_MAXLEN_SHIFT; 265 /* if the new values are more restrictive, update the register value */ 266 if (newminlen > minlen) { 267 st_ft &= ~IMG_IR_MINLEN; 268 st_ft |= newminlen << IMG_IR_MINLEN_SHIFT; 269 } 270 if (newmaxlen < maxlen) { 271 st_ft &= ~IMG_IR_MAXLEN; 272 st_ft |= newmaxlen << IMG_IR_MAXLEN_SHIFT; 273 } 274 return st_ft; 275 } 276 277 /** 278 * img_ir_timings_convert() - Convert timings to register values 279 * @regs: Output timing register values 280 * @timings: Input timing data 281 * @tolerance: Timing tolerance where 0-128 represents 0-100% 282 * @clock_hz: Source clock frequency in Hz 283 */ 284 static void img_ir_timings_convert(struct img_ir_timing_regvals *regs, 285 const struct img_ir_timings *timings, 286 unsigned int tolerance, 287 unsigned int clock_hz) 288 { 289 /* leader symbol timings are divided by 16 */ 290 regs->ldr = img_ir_symbol_timing(&timings->ldr, tolerance, clock_hz, 291 4, 4); 292 /* other symbol timings, pd fields only are divided by 2 */ 293 regs->s00 = img_ir_symbol_timing(&timings->s00, tolerance, clock_hz, 294 1, 0); 295 regs->s01 = img_ir_symbol_timing(&timings->s01, tolerance, clock_hz, 296 1, 0); 297 regs->s10 = img_ir_symbol_timing(&timings->s10, tolerance, clock_hz, 298 1, 0); 299 regs->s11 = img_ir_symbol_timing(&timings->s11, tolerance, clock_hz, 300 1, 0); 301 regs->ft = img_ir_free_timing(&timings->ft, clock_hz); 302 } 303 304 /** 305 * img_ir_decoder_preprocess() - Preprocess timings in decoder. 306 * @decoder: Decoder to be preprocessed. 307 * 308 * Ensures that the symbol timing ranges are valid with respect to ordering, and 309 * does some fixed conversion on them. 310 */ 311 static void img_ir_decoder_preprocess(struct img_ir_decoder *decoder) 312 { 313 /* default tolerance */ 314 if (!decoder->tolerance) 315 decoder->tolerance = 10; /* percent */ 316 /* and convert tolerance to fraction out of 128 */ 317 decoder->tolerance = decoder->tolerance * 128 / 100; 318 319 /* fill in implicit fields */ 320 img_ir_timings_preprocess(&decoder->timings, decoder->unit); 321 322 /* do the same for repeat timings if applicable */ 323 if (decoder->repeat) { 324 img_ir_timings_preprocess(&decoder->rtimings, decoder->unit); 325 img_ir_timings_defaults(&decoder->rtimings, &decoder->timings); 326 } 327 } 328 329 /** 330 * img_ir_decoder_convert() - Generate internal timings in decoder. 331 * @decoder: Decoder to be converted to internal timings. 332 * @timings: Timing register values. 333 * @clock_hz: IR clock rate in Hz. 334 * 335 * Fills out the repeat timings and timing register values for a specific clock 336 * rate. 337 */ 338 static void img_ir_decoder_convert(const struct img_ir_decoder *decoder, 339 struct img_ir_reg_timings *reg_timings, 340 unsigned int clock_hz) 341 { 342 /* calculate control value */ 343 reg_timings->ctrl = img_ir_control(&decoder->control); 344 345 /* fill in implicit fields and calculate register values */ 346 img_ir_timings_convert(®_timings->timings, &decoder->timings, 347 decoder->tolerance, clock_hz); 348 349 /* do the same for repeat timings if applicable */ 350 if (decoder->repeat) 351 img_ir_timings_convert(®_timings->rtimings, 352 &decoder->rtimings, decoder->tolerance, 353 clock_hz); 354 } 355 356 /** 357 * img_ir_write_timings() - Write timings to the hardware now 358 * @priv: IR private data 359 * @regs: Timing register values to write 360 * @type: RC filter type (RC_FILTER_*) 361 * 362 * Write timing register values @regs to the hardware, taking into account the 363 * current filter which may impose restrictions on the length of the expected 364 * data. 365 */ 366 static void img_ir_write_timings(struct img_ir_priv *priv, 367 struct img_ir_timing_regvals *regs, 368 enum rc_filter_type type) 369 { 370 struct img_ir_priv_hw *hw = &priv->hw; 371 372 /* filter may be more restrictive to minlen, maxlen */ 373 u32 ft = regs->ft; 374 if (hw->flags & BIT(type)) 375 ft = img_ir_free_timing_dynamic(regs->ft, &hw->filters[type]); 376 /* write to registers */ 377 img_ir_write(priv, IMG_IR_LEAD_SYMB_TIMING, regs->ldr); 378 img_ir_write(priv, IMG_IR_S00_SYMB_TIMING, regs->s00); 379 img_ir_write(priv, IMG_IR_S01_SYMB_TIMING, regs->s01); 380 img_ir_write(priv, IMG_IR_S10_SYMB_TIMING, regs->s10); 381 img_ir_write(priv, IMG_IR_S11_SYMB_TIMING, regs->s11); 382 img_ir_write(priv, IMG_IR_FREE_SYMB_TIMING, ft); 383 dev_dbg(priv->dev, "timings: ldr=%#x, s=[%#x, %#x, %#x, %#x], ft=%#x\n", 384 regs->ldr, regs->s00, regs->s01, regs->s10, regs->s11, ft); 385 } 386 387 static void img_ir_write_filter(struct img_ir_priv *priv, 388 struct img_ir_filter *filter) 389 { 390 if (filter) { 391 dev_dbg(priv->dev, "IR filter=%016llx & %016llx\n", 392 (unsigned long long)filter->data, 393 (unsigned long long)filter->mask); 394 img_ir_write(priv, IMG_IR_IRQ_MSG_DATA_LW, (u32)filter->data); 395 img_ir_write(priv, IMG_IR_IRQ_MSG_DATA_UP, (u32)(filter->data 396 >> 32)); 397 img_ir_write(priv, IMG_IR_IRQ_MSG_MASK_LW, (u32)filter->mask); 398 img_ir_write(priv, IMG_IR_IRQ_MSG_MASK_UP, (u32)(filter->mask 399 >> 32)); 400 } else { 401 dev_dbg(priv->dev, "IR clearing filter\n"); 402 img_ir_write(priv, IMG_IR_IRQ_MSG_MASK_LW, 0); 403 img_ir_write(priv, IMG_IR_IRQ_MSG_MASK_UP, 0); 404 } 405 } 406 407 /* caller must have lock */ 408 static void _img_ir_set_filter(struct img_ir_priv *priv, 409 struct img_ir_filter *filter) 410 { 411 struct img_ir_priv_hw *hw = &priv->hw; 412 u32 irq_en, irq_on; 413 414 irq_en = img_ir_read(priv, IMG_IR_IRQ_ENABLE); 415 if (filter) { 416 /* Only use the match interrupt */ 417 hw->filters[RC_FILTER_NORMAL] = *filter; 418 hw->flags |= IMG_IR_F_FILTER; 419 irq_on = IMG_IR_IRQ_DATA_MATCH; 420 irq_en &= ~(IMG_IR_IRQ_DATA_VALID | IMG_IR_IRQ_DATA2_VALID); 421 } else { 422 /* Only use the valid interrupt */ 423 hw->flags &= ~IMG_IR_F_FILTER; 424 irq_en &= ~IMG_IR_IRQ_DATA_MATCH; 425 irq_on = IMG_IR_IRQ_DATA_VALID | IMG_IR_IRQ_DATA2_VALID; 426 } 427 irq_en |= irq_on; 428 429 img_ir_write_filter(priv, filter); 430 /* clear any interrupts we're enabling so we don't handle old ones */ 431 img_ir_write(priv, IMG_IR_IRQ_CLEAR, irq_on); 432 img_ir_write(priv, IMG_IR_IRQ_ENABLE, irq_en); 433 } 434 435 /* caller must have lock */ 436 static void _img_ir_set_wake_filter(struct img_ir_priv *priv, 437 struct img_ir_filter *filter) 438 { 439 struct img_ir_priv_hw *hw = &priv->hw; 440 if (filter) { 441 /* Enable wake, and copy filter for later */ 442 hw->filters[RC_FILTER_WAKEUP] = *filter; 443 hw->flags |= IMG_IR_F_WAKE; 444 } else { 445 /* Disable wake */ 446 hw->flags &= ~IMG_IR_F_WAKE; 447 } 448 } 449 450 /* Callback for setting scancode filter */ 451 static int img_ir_set_filter(struct rc_dev *dev, enum rc_filter_type type, 452 struct rc_scancode_filter *sc_filter) 453 { 454 struct img_ir_priv *priv = dev->priv; 455 struct img_ir_priv_hw *hw = &priv->hw; 456 struct img_ir_filter filter, *filter_ptr = &filter; 457 int ret = 0; 458 459 dev_dbg(priv->dev, "IR scancode %sfilter=%08x & %08x\n", 460 type == RC_FILTER_WAKEUP ? "wake " : "", 461 sc_filter->data, 462 sc_filter->mask); 463 464 spin_lock_irq(&priv->lock); 465 466 /* filtering can always be disabled */ 467 if (!sc_filter->mask) { 468 filter_ptr = NULL; 469 goto set_unlock; 470 } 471 472 /* current decoder must support scancode filtering */ 473 if (!hw->decoder || !hw->decoder->filter) { 474 ret = -EINVAL; 475 goto unlock; 476 } 477 478 /* convert scancode filter to raw filter */ 479 filter.minlen = 0; 480 filter.maxlen = ~0; 481 ret = hw->decoder->filter(sc_filter, &filter, hw->enabled_protocols); 482 if (ret) 483 goto unlock; 484 dev_dbg(priv->dev, "IR raw %sfilter=%016llx & %016llx\n", 485 type == RC_FILTER_WAKEUP ? "wake " : "", 486 (unsigned long long)filter.data, 487 (unsigned long long)filter.mask); 488 489 set_unlock: 490 /* apply raw filters */ 491 switch (type) { 492 case RC_FILTER_NORMAL: 493 _img_ir_set_filter(priv, filter_ptr); 494 break; 495 case RC_FILTER_WAKEUP: 496 _img_ir_set_wake_filter(priv, filter_ptr); 497 break; 498 default: 499 ret = -EINVAL; 500 } 501 502 unlock: 503 spin_unlock_irq(&priv->lock); 504 return ret; 505 } 506 507 static int img_ir_set_normal_filter(struct rc_dev *dev, 508 struct rc_scancode_filter *sc_filter) 509 { 510 return img_ir_set_filter(dev, RC_FILTER_NORMAL, sc_filter); 511 } 512 513 static int img_ir_set_wakeup_filter(struct rc_dev *dev, 514 struct rc_scancode_filter *sc_filter) 515 { 516 return img_ir_set_filter(dev, RC_FILTER_WAKEUP, sc_filter); 517 } 518 519 /** 520 * img_ir_set_decoder() - Set the current decoder. 521 * @priv: IR private data. 522 * @decoder: Decoder to use with immediate effect. 523 * @proto: Protocol bitmap (or 0 to use decoder->type). 524 */ 525 static void img_ir_set_decoder(struct img_ir_priv *priv, 526 const struct img_ir_decoder *decoder, 527 u64 proto) 528 { 529 struct img_ir_priv_hw *hw = &priv->hw; 530 struct rc_dev *rdev = hw->rdev; 531 u32 ir_status, irq_en; 532 spin_lock_irq(&priv->lock); 533 534 /* switch off and disable interrupts */ 535 img_ir_write(priv, IMG_IR_CONTROL, 0); 536 irq_en = img_ir_read(priv, IMG_IR_IRQ_ENABLE); 537 img_ir_write(priv, IMG_IR_IRQ_ENABLE, irq_en & IMG_IR_IRQ_EDGE); 538 img_ir_write(priv, IMG_IR_IRQ_CLEAR, IMG_IR_IRQ_ALL & ~IMG_IR_IRQ_EDGE); 539 540 /* ack any data already detected */ 541 ir_status = img_ir_read(priv, IMG_IR_STATUS); 542 if (ir_status & (IMG_IR_RXDVAL | IMG_IR_RXDVALD2)) { 543 ir_status &= ~(IMG_IR_RXDVAL | IMG_IR_RXDVALD2); 544 img_ir_write(priv, IMG_IR_STATUS, ir_status); 545 img_ir_read(priv, IMG_IR_DATA_LW); 546 img_ir_read(priv, IMG_IR_DATA_UP); 547 } 548 549 /* stop the end timer and switch back to normal mode */ 550 del_timer_sync(&hw->end_timer); 551 hw->mode = IMG_IR_M_NORMAL; 552 553 /* clear the wakeup scancode filter */ 554 rdev->scancode_filters[RC_FILTER_WAKEUP].data = 0; 555 rdev->scancode_filters[RC_FILTER_WAKEUP].mask = 0; 556 557 /* clear raw filters */ 558 _img_ir_set_filter(priv, NULL); 559 _img_ir_set_wake_filter(priv, NULL); 560 561 /* clear the enabled protocols */ 562 hw->enabled_protocols = 0; 563 564 /* switch decoder */ 565 hw->decoder = decoder; 566 if (!decoder) 567 goto unlock; 568 569 /* set the enabled protocols */ 570 if (!proto) 571 proto = decoder->type; 572 hw->enabled_protocols = proto; 573 574 /* write the new timings */ 575 img_ir_decoder_convert(decoder, &hw->reg_timings, hw->clk_hz); 576 img_ir_write_timings(priv, &hw->reg_timings.timings, RC_FILTER_NORMAL); 577 578 /* set up and enable */ 579 img_ir_write(priv, IMG_IR_CONTROL, hw->reg_timings.ctrl); 580 581 582 unlock: 583 spin_unlock_irq(&priv->lock); 584 } 585 586 /** 587 * img_ir_decoder_compatable() - Find whether a decoder will work with a device. 588 * @priv: IR private data. 589 * @dec: Decoder to check. 590 * 591 * Returns: true if @dec is compatible with the device @priv refers to. 592 */ 593 static bool img_ir_decoder_compatible(struct img_ir_priv *priv, 594 const struct img_ir_decoder *dec) 595 { 596 unsigned int ct; 597 598 /* don't accept decoders using code types which aren't supported */ 599 ct = dec->control.code_type; 600 if (priv->hw.ct_quirks[ct] & IMG_IR_QUIRK_CODE_BROKEN) 601 return false; 602 603 return true; 604 } 605 606 /** 607 * img_ir_allowed_protos() - Get allowed protocols from global decoder list. 608 * @priv: IR private data. 609 * 610 * Returns: Mask of protocols supported by the device @priv refers to. 611 */ 612 static u64 img_ir_allowed_protos(struct img_ir_priv *priv) 613 { 614 u64 protos = 0; 615 struct img_ir_decoder **decp; 616 617 for (decp = img_ir_decoders; *decp; ++decp) { 618 const struct img_ir_decoder *dec = *decp; 619 if (img_ir_decoder_compatible(priv, dec)) 620 protos |= dec->type; 621 } 622 return protos; 623 } 624 625 /* Callback for changing protocol using sysfs */ 626 static int img_ir_change_protocol(struct rc_dev *dev, u64 *ir_type) 627 { 628 struct img_ir_priv *priv = dev->priv; 629 struct img_ir_priv_hw *hw = &priv->hw; 630 struct rc_dev *rdev = hw->rdev; 631 struct img_ir_decoder **decp; 632 u64 wakeup_protocols; 633 634 if (!*ir_type) { 635 /* disable all protocols */ 636 img_ir_set_decoder(priv, NULL, 0); 637 goto success; 638 } 639 for (decp = img_ir_decoders; *decp; ++decp) { 640 const struct img_ir_decoder *dec = *decp; 641 if (!img_ir_decoder_compatible(priv, dec)) 642 continue; 643 if (*ir_type & dec->type) { 644 *ir_type &= dec->type; 645 img_ir_set_decoder(priv, dec, *ir_type); 646 goto success; 647 } 648 } 649 return -EINVAL; 650 651 success: 652 /* 653 * Only allow matching wakeup protocols for now, and only if filtering 654 * is supported. 655 */ 656 wakeup_protocols = *ir_type; 657 if (!hw->decoder || !hw->decoder->filter) 658 wakeup_protocols = 0; 659 rc_set_allowed_wakeup_protocols(rdev, wakeup_protocols); 660 rc_set_enabled_wakeup_protocols(rdev, wakeup_protocols); 661 return 0; 662 } 663 664 /* Changes ir-core protocol device attribute */ 665 static void img_ir_set_protocol(struct img_ir_priv *priv, u64 proto) 666 { 667 struct rc_dev *rdev = priv->hw.rdev; 668 669 spin_lock_irq(&rdev->rc_map.lock); 670 rdev->rc_map.rc_type = __ffs64(proto); 671 spin_unlock_irq(&rdev->rc_map.lock); 672 673 mutex_lock(&rdev->lock); 674 rc_set_enabled_protocols(rdev, proto); 675 rc_set_allowed_wakeup_protocols(rdev, proto); 676 rc_set_enabled_wakeup_protocols(rdev, proto); 677 mutex_unlock(&rdev->lock); 678 } 679 680 /* Set up IR decoders */ 681 static void img_ir_init_decoders(void) 682 { 683 struct img_ir_decoder **decp; 684 685 spin_lock(&img_ir_decoders_lock); 686 if (!img_ir_decoders_preprocessed) { 687 for (decp = img_ir_decoders; *decp; ++decp) 688 img_ir_decoder_preprocess(*decp); 689 img_ir_decoders_preprocessed = true; 690 } 691 spin_unlock(&img_ir_decoders_lock); 692 } 693 694 #ifdef CONFIG_PM_SLEEP 695 /** 696 * img_ir_enable_wake() - Switch to wake mode. 697 * @priv: IR private data. 698 * 699 * Returns: non-zero if the IR can wake the system. 700 */ 701 static int img_ir_enable_wake(struct img_ir_priv *priv) 702 { 703 struct img_ir_priv_hw *hw = &priv->hw; 704 int ret = 0; 705 706 spin_lock_irq(&priv->lock); 707 if (hw->flags & IMG_IR_F_WAKE) { 708 /* interrupt only on a match */ 709 hw->suspend_irqen = img_ir_read(priv, IMG_IR_IRQ_ENABLE); 710 img_ir_write(priv, IMG_IR_IRQ_ENABLE, IMG_IR_IRQ_DATA_MATCH); 711 img_ir_write_filter(priv, &hw->filters[RC_FILTER_WAKEUP]); 712 img_ir_write_timings(priv, &hw->reg_timings.timings, 713 RC_FILTER_WAKEUP); 714 hw->mode = IMG_IR_M_WAKE; 715 ret = 1; 716 } 717 spin_unlock_irq(&priv->lock); 718 return ret; 719 } 720 721 /** 722 * img_ir_disable_wake() - Switch out of wake mode. 723 * @priv: IR private data 724 * 725 * Returns: 1 if the hardware should be allowed to wake from a sleep state. 726 * 0 otherwise. 727 */ 728 static int img_ir_disable_wake(struct img_ir_priv *priv) 729 { 730 struct img_ir_priv_hw *hw = &priv->hw; 731 int ret = 0; 732 733 spin_lock_irq(&priv->lock); 734 if (hw->flags & IMG_IR_F_WAKE) { 735 /* restore normal filtering */ 736 if (hw->flags & IMG_IR_F_FILTER) { 737 img_ir_write(priv, IMG_IR_IRQ_ENABLE, 738 (hw->suspend_irqen & IMG_IR_IRQ_EDGE) | 739 IMG_IR_IRQ_DATA_MATCH); 740 img_ir_write_filter(priv, 741 &hw->filters[RC_FILTER_NORMAL]); 742 } else { 743 img_ir_write(priv, IMG_IR_IRQ_ENABLE, 744 (hw->suspend_irqen & IMG_IR_IRQ_EDGE) | 745 IMG_IR_IRQ_DATA_VALID | 746 IMG_IR_IRQ_DATA2_VALID); 747 img_ir_write_filter(priv, NULL); 748 } 749 img_ir_write_timings(priv, &hw->reg_timings.timings, 750 RC_FILTER_NORMAL); 751 hw->mode = IMG_IR_M_NORMAL; 752 ret = 1; 753 } 754 spin_unlock_irq(&priv->lock); 755 return ret; 756 } 757 #endif /* CONFIG_PM_SLEEP */ 758 759 /* lock must be held */ 760 static void img_ir_begin_repeat(struct img_ir_priv *priv) 761 { 762 struct img_ir_priv_hw *hw = &priv->hw; 763 if (hw->mode == IMG_IR_M_NORMAL) { 764 /* switch to repeat timings */ 765 img_ir_write(priv, IMG_IR_CONTROL, 0); 766 hw->mode = IMG_IR_M_REPEATING; 767 img_ir_write_timings(priv, &hw->reg_timings.rtimings, 768 RC_FILTER_NORMAL); 769 img_ir_write(priv, IMG_IR_CONTROL, hw->reg_timings.ctrl); 770 } 771 } 772 773 /* lock must be held */ 774 static void img_ir_end_repeat(struct img_ir_priv *priv) 775 { 776 struct img_ir_priv_hw *hw = &priv->hw; 777 if (hw->mode == IMG_IR_M_REPEATING) { 778 /* switch to normal timings */ 779 img_ir_write(priv, IMG_IR_CONTROL, 0); 780 hw->mode = IMG_IR_M_NORMAL; 781 img_ir_write_timings(priv, &hw->reg_timings.timings, 782 RC_FILTER_NORMAL); 783 img_ir_write(priv, IMG_IR_CONTROL, hw->reg_timings.ctrl); 784 } 785 } 786 787 /* lock must be held */ 788 static void img_ir_handle_data(struct img_ir_priv *priv, u32 len, u64 raw) 789 { 790 struct img_ir_priv_hw *hw = &priv->hw; 791 const struct img_ir_decoder *dec = hw->decoder; 792 int ret = IMG_IR_SCANCODE; 793 int scancode; 794 if (dec->scancode) 795 ret = dec->scancode(len, raw, &scancode, hw->enabled_protocols); 796 else if (len >= 32) 797 scancode = (u32)raw; 798 else if (len < 32) 799 scancode = (u32)raw & ((1 << len)-1); 800 dev_dbg(priv->dev, "data (%u bits) = %#llx\n", 801 len, (unsigned long long)raw); 802 if (ret == IMG_IR_SCANCODE) { 803 dev_dbg(priv->dev, "decoded scan code %#x\n", scancode); 804 rc_keydown(hw->rdev, scancode, 0); 805 img_ir_end_repeat(priv); 806 } else if (ret == IMG_IR_REPEATCODE) { 807 if (hw->mode == IMG_IR_M_REPEATING) { 808 dev_dbg(priv->dev, "decoded repeat code\n"); 809 rc_repeat(hw->rdev); 810 } else { 811 dev_dbg(priv->dev, "decoded unexpected repeat code, ignoring\n"); 812 } 813 } else { 814 dev_dbg(priv->dev, "decode failed (%d)\n", ret); 815 return; 816 } 817 818 819 if (dec->repeat) { 820 unsigned long interval; 821 822 img_ir_begin_repeat(priv); 823 824 /* update timer, but allowing for 1/8th tolerance */ 825 interval = dec->repeat + (dec->repeat >> 3); 826 mod_timer(&hw->end_timer, 827 jiffies + msecs_to_jiffies(interval)); 828 } 829 } 830 831 /* timer function to end waiting for repeat. */ 832 static void img_ir_end_timer(unsigned long arg) 833 { 834 struct img_ir_priv *priv = (struct img_ir_priv *)arg; 835 836 spin_lock_irq(&priv->lock); 837 img_ir_end_repeat(priv); 838 spin_unlock_irq(&priv->lock); 839 } 840 841 #ifdef CONFIG_COMMON_CLK 842 static void img_ir_change_frequency(struct img_ir_priv *priv, 843 struct clk_notifier_data *change) 844 { 845 struct img_ir_priv_hw *hw = &priv->hw; 846 847 dev_dbg(priv->dev, "clk changed %lu HZ -> %lu HZ\n", 848 change->old_rate, change->new_rate); 849 850 spin_lock_irq(&priv->lock); 851 if (hw->clk_hz == change->new_rate) 852 goto unlock; 853 hw->clk_hz = change->new_rate; 854 /* refresh current timings */ 855 if (hw->decoder) { 856 img_ir_decoder_convert(hw->decoder, &hw->reg_timings, 857 hw->clk_hz); 858 switch (hw->mode) { 859 case IMG_IR_M_NORMAL: 860 img_ir_write_timings(priv, &hw->reg_timings.timings, 861 RC_FILTER_NORMAL); 862 break; 863 case IMG_IR_M_REPEATING: 864 img_ir_write_timings(priv, &hw->reg_timings.rtimings, 865 RC_FILTER_NORMAL); 866 break; 867 #ifdef CONFIG_PM_SLEEP 868 case IMG_IR_M_WAKE: 869 img_ir_write_timings(priv, &hw->reg_timings.timings, 870 RC_FILTER_WAKEUP); 871 break; 872 #endif 873 } 874 } 875 unlock: 876 spin_unlock_irq(&priv->lock); 877 } 878 879 static int img_ir_clk_notify(struct notifier_block *self, unsigned long action, 880 void *data) 881 { 882 struct img_ir_priv *priv = container_of(self, struct img_ir_priv, 883 hw.clk_nb); 884 switch (action) { 885 case POST_RATE_CHANGE: 886 img_ir_change_frequency(priv, data); 887 break; 888 default: 889 break; 890 } 891 return NOTIFY_OK; 892 } 893 #endif /* CONFIG_COMMON_CLK */ 894 895 /* called with priv->lock held */ 896 void img_ir_isr_hw(struct img_ir_priv *priv, u32 irq_status) 897 { 898 struct img_ir_priv_hw *hw = &priv->hw; 899 u32 ir_status, len, lw, up; 900 unsigned int ct; 901 902 /* use the current decoder */ 903 if (!hw->decoder) 904 return; 905 906 ir_status = img_ir_read(priv, IMG_IR_STATUS); 907 if (!(ir_status & (IMG_IR_RXDVAL | IMG_IR_RXDVALD2))) 908 return; 909 ir_status &= ~(IMG_IR_RXDVAL | IMG_IR_RXDVALD2); 910 img_ir_write(priv, IMG_IR_STATUS, ir_status); 911 912 len = (ir_status & IMG_IR_RXDLEN) >> IMG_IR_RXDLEN_SHIFT; 913 /* some versions report wrong length for certain code types */ 914 ct = hw->decoder->control.code_type; 915 if (hw->ct_quirks[ct] & IMG_IR_QUIRK_CODE_LEN_INCR) 916 ++len; 917 918 lw = img_ir_read(priv, IMG_IR_DATA_LW); 919 up = img_ir_read(priv, IMG_IR_DATA_UP); 920 img_ir_handle_data(priv, len, (u64)up << 32 | lw); 921 } 922 923 void img_ir_setup_hw(struct img_ir_priv *priv) 924 { 925 struct img_ir_decoder **decp; 926 927 if (!priv->hw.rdev) 928 return; 929 930 /* Use the first available decoder (or disable stuff if NULL) */ 931 for (decp = img_ir_decoders; *decp; ++decp) { 932 const struct img_ir_decoder *dec = *decp; 933 if (img_ir_decoder_compatible(priv, dec)) { 934 img_ir_set_protocol(priv, dec->type); 935 img_ir_set_decoder(priv, dec, 0); 936 return; 937 } 938 } 939 img_ir_set_decoder(priv, NULL, 0); 940 } 941 942 /** 943 * img_ir_probe_hw_caps() - Probe capabilities of the hardware. 944 * @priv: IR private data. 945 */ 946 static void img_ir_probe_hw_caps(struct img_ir_priv *priv) 947 { 948 struct img_ir_priv_hw *hw = &priv->hw; 949 /* 950 * When a version of the block becomes available without these quirks, 951 * they'll have to depend on the core revision. 952 */ 953 hw->ct_quirks[IMG_IR_CODETYPE_PULSELEN] 954 |= IMG_IR_QUIRK_CODE_LEN_INCR; 955 hw->ct_quirks[IMG_IR_CODETYPE_BIPHASE] 956 |= IMG_IR_QUIRK_CODE_BROKEN; 957 hw->ct_quirks[IMG_IR_CODETYPE_2BITPULSEPOS] 958 |= IMG_IR_QUIRK_CODE_BROKEN; 959 } 960 961 int img_ir_probe_hw(struct img_ir_priv *priv) 962 { 963 struct img_ir_priv_hw *hw = &priv->hw; 964 struct rc_dev *rdev; 965 int error; 966 967 /* Ensure hardware decoders have been preprocessed */ 968 img_ir_init_decoders(); 969 970 /* Probe hardware capabilities */ 971 img_ir_probe_hw_caps(priv); 972 973 /* Set up the end timer */ 974 setup_timer(&hw->end_timer, img_ir_end_timer, (unsigned long)priv); 975 976 /* Register a clock notifier */ 977 if (!IS_ERR(priv->clk)) { 978 hw->clk_hz = clk_get_rate(priv->clk); 979 #ifdef CONFIG_COMMON_CLK 980 hw->clk_nb.notifier_call = img_ir_clk_notify; 981 error = clk_notifier_register(priv->clk, &hw->clk_nb); 982 if (error) 983 dev_warn(priv->dev, 984 "failed to register clock notifier\n"); 985 #endif 986 } else { 987 hw->clk_hz = 32768; 988 } 989 990 /* Allocate hardware decoder */ 991 hw->rdev = rdev = rc_allocate_device(); 992 if (!rdev) { 993 dev_err(priv->dev, "cannot allocate input device\n"); 994 error = -ENOMEM; 995 goto err_alloc_rc; 996 } 997 rdev->priv = priv; 998 rdev->map_name = RC_MAP_EMPTY; 999 rc_set_allowed_protocols(rdev, img_ir_allowed_protos(priv)); 1000 rdev->input_name = "IMG Infrared Decoder"; 1001 rdev->s_filter = img_ir_set_normal_filter; 1002 rdev->s_wakeup_filter = img_ir_set_wakeup_filter; 1003 1004 /* Register hardware decoder */ 1005 error = rc_register_device(rdev); 1006 if (error) { 1007 dev_err(priv->dev, "failed to register IR input device\n"); 1008 goto err_register_rc; 1009 } 1010 1011 /* 1012 * Set this after rc_register_device as no protocols have been 1013 * registered yet. 1014 */ 1015 rdev->change_protocol = img_ir_change_protocol; 1016 1017 device_init_wakeup(priv->dev, 1); 1018 1019 return 0; 1020 1021 err_register_rc: 1022 img_ir_set_decoder(priv, NULL, 0); 1023 hw->rdev = NULL; 1024 rc_free_device(rdev); 1025 err_alloc_rc: 1026 #ifdef CONFIG_COMMON_CLK 1027 if (!IS_ERR(priv->clk)) 1028 clk_notifier_unregister(priv->clk, &hw->clk_nb); 1029 #endif 1030 return error; 1031 } 1032 1033 void img_ir_remove_hw(struct img_ir_priv *priv) 1034 { 1035 struct img_ir_priv_hw *hw = &priv->hw; 1036 struct rc_dev *rdev = hw->rdev; 1037 if (!rdev) 1038 return; 1039 img_ir_set_decoder(priv, NULL, 0); 1040 hw->rdev = NULL; 1041 rc_unregister_device(rdev); 1042 #ifdef CONFIG_COMMON_CLK 1043 if (!IS_ERR(priv->clk)) 1044 clk_notifier_unregister(priv->clk, &hw->clk_nb); 1045 #endif 1046 } 1047 1048 #ifdef CONFIG_PM_SLEEP 1049 int img_ir_suspend(struct device *dev) 1050 { 1051 struct img_ir_priv *priv = dev_get_drvdata(dev); 1052 1053 if (device_may_wakeup(dev) && img_ir_enable_wake(priv)) 1054 enable_irq_wake(priv->irq); 1055 return 0; 1056 } 1057 1058 int img_ir_resume(struct device *dev) 1059 { 1060 struct img_ir_priv *priv = dev_get_drvdata(dev); 1061 1062 if (device_may_wakeup(dev) && img_ir_disable_wake(priv)) 1063 disable_irq_wake(priv->irq); 1064 return 0; 1065 } 1066 #endif /* CONFIG_PM_SLEEP */ 1067