1 /* 2 * ImgTec IR Hardware Decoder found in PowerDown Controller. 3 * 4 * Copyright 2010-2014 Imagination Technologies Ltd. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by the 8 * Free Software Foundation; either version 2 of the License, or (at your 9 * option) any later version. 10 * 11 * This ties into the input subsystem using the RC-core. Protocol support is 12 * provided in separate modules which provide the parameters and scancode 13 * translation functions to set up the hardware decoder and interpret the 14 * resulting input. 15 */ 16 17 #include <linux/bitops.h> 18 #include <linux/clk.h> 19 #include <linux/interrupt.h> 20 #include <linux/spinlock.h> 21 #include <linux/timer.h> 22 #include <media/rc-core.h> 23 #include "img-ir.h" 24 25 /* Decoders lock (only modified to preprocess them) */ 26 static DEFINE_SPINLOCK(img_ir_decoders_lock); 27 28 static bool img_ir_decoders_preprocessed; 29 static struct img_ir_decoder *img_ir_decoders[] = { 30 #ifdef CONFIG_IR_IMG_NEC 31 &img_ir_nec, 32 #endif 33 #ifdef CONFIG_IR_IMG_JVC 34 &img_ir_jvc, 35 #endif 36 #ifdef CONFIG_IR_IMG_SONY 37 &img_ir_sony, 38 #endif 39 #ifdef CONFIG_IR_IMG_SHARP 40 &img_ir_sharp, 41 #endif 42 #ifdef CONFIG_IR_IMG_SANYO 43 &img_ir_sanyo, 44 #endif 45 #ifdef CONFIG_IR_IMG_RC5 46 &img_ir_rc5, 47 #endif 48 #ifdef CONFIG_IR_IMG_RC6 49 &img_ir_rc6, 50 #endif 51 NULL 52 }; 53 54 #define IMG_IR_F_FILTER BIT(RC_FILTER_NORMAL) /* enable filtering */ 55 #define IMG_IR_F_WAKE BIT(RC_FILTER_WAKEUP) /* enable waking */ 56 57 /* code type quirks */ 58 59 #define IMG_IR_QUIRK_CODE_BROKEN 0x1 /* Decode is broken */ 60 #define IMG_IR_QUIRK_CODE_LEN_INCR 0x2 /* Bit length needs increment */ 61 /* 62 * The decoder generates rapid interrupts without actually having 63 * received any new data after an incomplete IR code is decoded. 64 */ 65 #define IMG_IR_QUIRK_CODE_IRQ 0x4 66 67 /* functions for preprocessing timings, ensuring max is set */ 68 69 static void img_ir_timing_preprocess(struct img_ir_timing_range *range, 70 unsigned int unit) 71 { 72 if (range->max < range->min) 73 range->max = range->min; 74 if (unit) { 75 /* multiply by unit and convert to microseconds */ 76 range->min = (range->min*unit)/1000; 77 range->max = (range->max*unit + 999)/1000; /* round up */ 78 } 79 } 80 81 static void img_ir_symbol_timing_preprocess(struct img_ir_symbol_timing *timing, 82 unsigned int unit) 83 { 84 img_ir_timing_preprocess(&timing->pulse, unit); 85 img_ir_timing_preprocess(&timing->space, unit); 86 } 87 88 static void img_ir_timings_preprocess(struct img_ir_timings *timings, 89 unsigned int unit) 90 { 91 img_ir_symbol_timing_preprocess(&timings->ldr, unit); 92 img_ir_symbol_timing_preprocess(&timings->s00, unit); 93 img_ir_symbol_timing_preprocess(&timings->s01, unit); 94 img_ir_symbol_timing_preprocess(&timings->s10, unit); 95 img_ir_symbol_timing_preprocess(&timings->s11, unit); 96 /* default s10 and s11 to s00 and s01 if no leader */ 97 if (unit) 98 /* multiply by unit and convert to microseconds (round up) */ 99 timings->ft.ft_min = (timings->ft.ft_min*unit + 999)/1000; 100 } 101 102 /* functions for filling empty fields with defaults */ 103 104 static void img_ir_timing_defaults(struct img_ir_timing_range *range, 105 struct img_ir_timing_range *defaults) 106 { 107 if (!range->min) 108 range->min = defaults->min; 109 if (!range->max) 110 range->max = defaults->max; 111 } 112 113 static void img_ir_symbol_timing_defaults(struct img_ir_symbol_timing *timing, 114 struct img_ir_symbol_timing *defaults) 115 { 116 img_ir_timing_defaults(&timing->pulse, &defaults->pulse); 117 img_ir_timing_defaults(&timing->space, &defaults->space); 118 } 119 120 static void img_ir_timings_defaults(struct img_ir_timings *timings, 121 struct img_ir_timings *defaults) 122 { 123 img_ir_symbol_timing_defaults(&timings->ldr, &defaults->ldr); 124 img_ir_symbol_timing_defaults(&timings->s00, &defaults->s00); 125 img_ir_symbol_timing_defaults(&timings->s01, &defaults->s01); 126 img_ir_symbol_timing_defaults(&timings->s10, &defaults->s10); 127 img_ir_symbol_timing_defaults(&timings->s11, &defaults->s11); 128 if (!timings->ft.ft_min) 129 timings->ft.ft_min = defaults->ft.ft_min; 130 } 131 132 /* functions for converting timings to register values */ 133 134 /** 135 * img_ir_control() - Convert control struct to control register value. 136 * @control: Control data 137 * 138 * Returns: The control register value equivalent of @control. 139 */ 140 static u32 img_ir_control(const struct img_ir_control *control) 141 { 142 u32 ctrl = control->code_type << IMG_IR_CODETYPE_SHIFT; 143 if (control->decoden) 144 ctrl |= IMG_IR_DECODEN; 145 if (control->hdrtog) 146 ctrl |= IMG_IR_HDRTOG; 147 if (control->ldrdec) 148 ctrl |= IMG_IR_LDRDEC; 149 if (control->decodinpol) 150 ctrl |= IMG_IR_DECODINPOL; 151 if (control->bitorien) 152 ctrl |= IMG_IR_BITORIEN; 153 if (control->d1validsel) 154 ctrl |= IMG_IR_D1VALIDSEL; 155 if (control->bitinv) 156 ctrl |= IMG_IR_BITINV; 157 if (control->decodend2) 158 ctrl |= IMG_IR_DECODEND2; 159 if (control->bitoriend2) 160 ctrl |= IMG_IR_BITORIEND2; 161 if (control->bitinvd2) 162 ctrl |= IMG_IR_BITINVD2; 163 return ctrl; 164 } 165 166 /** 167 * img_ir_timing_range_convert() - Convert microsecond range. 168 * @out: Output timing range in clock cycles with a shift. 169 * @in: Input timing range in microseconds. 170 * @tolerance: Tolerance as a fraction of 128 (roughly percent). 171 * @clock_hz: IR clock rate in Hz. 172 * @shift: Shift of output units. 173 * 174 * Converts min and max from microseconds to IR clock cycles, applies a 175 * tolerance, and shifts for the register, rounding in the right direction. 176 * Note that in and out can safely be the same object. 177 */ 178 static void img_ir_timing_range_convert(struct img_ir_timing_range *out, 179 const struct img_ir_timing_range *in, 180 unsigned int tolerance, 181 unsigned long clock_hz, 182 unsigned int shift) 183 { 184 unsigned int min = in->min; 185 unsigned int max = in->max; 186 /* add a tolerance */ 187 min = min - (min*tolerance >> 7); 188 max = max + (max*tolerance >> 7); 189 /* convert from microseconds into clock cycles */ 190 min = min*clock_hz / 1000000; 191 max = (max*clock_hz + 999999) / 1000000; /* round up */ 192 /* apply shift and copy to output */ 193 out->min = min >> shift; 194 out->max = (max + ((1 << shift) - 1)) >> shift; /* round up */ 195 } 196 197 /** 198 * img_ir_symbol_timing() - Convert symbol timing struct to register value. 199 * @timing: Symbol timing data 200 * @tolerance: Timing tolerance where 0-128 represents 0-100% 201 * @clock_hz: Frequency of source clock in Hz 202 * @pd_shift: Shift to apply to symbol period 203 * @w_shift: Shift to apply to symbol width 204 * 205 * Returns: Symbol timing register value based on arguments. 206 */ 207 static u32 img_ir_symbol_timing(const struct img_ir_symbol_timing *timing, 208 unsigned int tolerance, 209 unsigned long clock_hz, 210 unsigned int pd_shift, 211 unsigned int w_shift) 212 { 213 struct img_ir_timing_range hw_pulse, hw_period; 214 /* we calculate period in hw_period, then convert in place */ 215 hw_period.min = timing->pulse.min + timing->space.min; 216 hw_period.max = timing->pulse.max + timing->space.max; 217 img_ir_timing_range_convert(&hw_period, &hw_period, 218 tolerance, clock_hz, pd_shift); 219 img_ir_timing_range_convert(&hw_pulse, &timing->pulse, 220 tolerance, clock_hz, w_shift); 221 /* construct register value */ 222 return (hw_period.max << IMG_IR_PD_MAX_SHIFT) | 223 (hw_period.min << IMG_IR_PD_MIN_SHIFT) | 224 (hw_pulse.max << IMG_IR_W_MAX_SHIFT) | 225 (hw_pulse.min << IMG_IR_W_MIN_SHIFT); 226 } 227 228 /** 229 * img_ir_free_timing() - Convert free time timing struct to register value. 230 * @timing: Free symbol timing data 231 * @clock_hz: Source clock frequency in Hz 232 * 233 * Returns: Free symbol timing register value. 234 */ 235 static u32 img_ir_free_timing(const struct img_ir_free_timing *timing, 236 unsigned long clock_hz) 237 { 238 unsigned int minlen, maxlen, ft_min; 239 /* minlen is only 5 bits, and round minlen to multiple of 2 */ 240 if (timing->minlen < 30) 241 minlen = timing->minlen & -2; 242 else 243 minlen = 30; 244 /* maxlen has maximum value of 48, and round maxlen to multiple of 2 */ 245 if (timing->maxlen < 48) 246 maxlen = (timing->maxlen + 1) & -2; 247 else 248 maxlen = 48; 249 /* convert and shift ft_min, rounding upwards */ 250 ft_min = (timing->ft_min*clock_hz + 999999) / 1000000; 251 ft_min = (ft_min + 7) >> 3; 252 /* construct register value */ 253 return (maxlen << IMG_IR_MAXLEN_SHIFT) | 254 (minlen << IMG_IR_MINLEN_SHIFT) | 255 (ft_min << IMG_IR_FT_MIN_SHIFT); 256 } 257 258 /** 259 * img_ir_free_timing_dynamic() - Update free time register value. 260 * @st_ft: Static free time register value from img_ir_free_timing. 261 * @filter: Current filter which may additionally restrict min/max len. 262 * 263 * Returns: Updated free time register value based on the current filter. 264 */ 265 static u32 img_ir_free_timing_dynamic(u32 st_ft, struct img_ir_filter *filter) 266 { 267 unsigned int minlen, maxlen, newminlen, newmaxlen; 268 269 /* round minlen, maxlen to multiple of 2 */ 270 newminlen = filter->minlen & -2; 271 newmaxlen = (filter->maxlen + 1) & -2; 272 /* extract min/max len from register */ 273 minlen = (st_ft & IMG_IR_MINLEN) >> IMG_IR_MINLEN_SHIFT; 274 maxlen = (st_ft & IMG_IR_MAXLEN) >> IMG_IR_MAXLEN_SHIFT; 275 /* if the new values are more restrictive, update the register value */ 276 if (newminlen > minlen) { 277 st_ft &= ~IMG_IR_MINLEN; 278 st_ft |= newminlen << IMG_IR_MINLEN_SHIFT; 279 } 280 if (newmaxlen < maxlen) { 281 st_ft &= ~IMG_IR_MAXLEN; 282 st_ft |= newmaxlen << IMG_IR_MAXLEN_SHIFT; 283 } 284 return st_ft; 285 } 286 287 /** 288 * img_ir_timings_convert() - Convert timings to register values 289 * @regs: Output timing register values 290 * @timings: Input timing data 291 * @tolerance: Timing tolerance where 0-128 represents 0-100% 292 * @clock_hz: Source clock frequency in Hz 293 */ 294 static void img_ir_timings_convert(struct img_ir_timing_regvals *regs, 295 const struct img_ir_timings *timings, 296 unsigned int tolerance, 297 unsigned int clock_hz) 298 { 299 /* leader symbol timings are divided by 16 */ 300 regs->ldr = img_ir_symbol_timing(&timings->ldr, tolerance, clock_hz, 301 4, 4); 302 /* other symbol timings, pd fields only are divided by 2 */ 303 regs->s00 = img_ir_symbol_timing(&timings->s00, tolerance, clock_hz, 304 1, 0); 305 regs->s01 = img_ir_symbol_timing(&timings->s01, tolerance, clock_hz, 306 1, 0); 307 regs->s10 = img_ir_symbol_timing(&timings->s10, tolerance, clock_hz, 308 1, 0); 309 regs->s11 = img_ir_symbol_timing(&timings->s11, tolerance, clock_hz, 310 1, 0); 311 regs->ft = img_ir_free_timing(&timings->ft, clock_hz); 312 } 313 314 /** 315 * img_ir_decoder_preprocess() - Preprocess timings in decoder. 316 * @decoder: Decoder to be preprocessed. 317 * 318 * Ensures that the symbol timing ranges are valid with respect to ordering, and 319 * does some fixed conversion on them. 320 */ 321 static void img_ir_decoder_preprocess(struct img_ir_decoder *decoder) 322 { 323 /* default tolerance */ 324 if (!decoder->tolerance) 325 decoder->tolerance = 10; /* percent */ 326 /* and convert tolerance to fraction out of 128 */ 327 decoder->tolerance = decoder->tolerance * 128 / 100; 328 329 /* fill in implicit fields */ 330 img_ir_timings_preprocess(&decoder->timings, decoder->unit); 331 332 /* do the same for repeat timings if applicable */ 333 if (decoder->repeat) { 334 img_ir_timings_preprocess(&decoder->rtimings, decoder->unit); 335 img_ir_timings_defaults(&decoder->rtimings, &decoder->timings); 336 } 337 } 338 339 /** 340 * img_ir_decoder_convert() - Generate internal timings in decoder. 341 * @decoder: Decoder to be converted to internal timings. 342 * @timings: Timing register values. 343 * @clock_hz: IR clock rate in Hz. 344 * 345 * Fills out the repeat timings and timing register values for a specific clock 346 * rate. 347 */ 348 static void img_ir_decoder_convert(const struct img_ir_decoder *decoder, 349 struct img_ir_reg_timings *reg_timings, 350 unsigned int clock_hz) 351 { 352 /* calculate control value */ 353 reg_timings->ctrl = img_ir_control(&decoder->control); 354 355 /* fill in implicit fields and calculate register values */ 356 img_ir_timings_convert(®_timings->timings, &decoder->timings, 357 decoder->tolerance, clock_hz); 358 359 /* do the same for repeat timings if applicable */ 360 if (decoder->repeat) 361 img_ir_timings_convert(®_timings->rtimings, 362 &decoder->rtimings, decoder->tolerance, 363 clock_hz); 364 } 365 366 /** 367 * img_ir_write_timings() - Write timings to the hardware now 368 * @priv: IR private data 369 * @regs: Timing register values to write 370 * @type: RC filter type (RC_FILTER_*) 371 * 372 * Write timing register values @regs to the hardware, taking into account the 373 * current filter which may impose restrictions on the length of the expected 374 * data. 375 */ 376 static void img_ir_write_timings(struct img_ir_priv *priv, 377 struct img_ir_timing_regvals *regs, 378 enum rc_filter_type type) 379 { 380 struct img_ir_priv_hw *hw = &priv->hw; 381 382 /* filter may be more restrictive to minlen, maxlen */ 383 u32 ft = regs->ft; 384 if (hw->flags & BIT(type)) 385 ft = img_ir_free_timing_dynamic(regs->ft, &hw->filters[type]); 386 /* write to registers */ 387 img_ir_write(priv, IMG_IR_LEAD_SYMB_TIMING, regs->ldr); 388 img_ir_write(priv, IMG_IR_S00_SYMB_TIMING, regs->s00); 389 img_ir_write(priv, IMG_IR_S01_SYMB_TIMING, regs->s01); 390 img_ir_write(priv, IMG_IR_S10_SYMB_TIMING, regs->s10); 391 img_ir_write(priv, IMG_IR_S11_SYMB_TIMING, regs->s11); 392 img_ir_write(priv, IMG_IR_FREE_SYMB_TIMING, ft); 393 dev_dbg(priv->dev, "timings: ldr=%#x, s=[%#x, %#x, %#x, %#x], ft=%#x\n", 394 regs->ldr, regs->s00, regs->s01, regs->s10, regs->s11, ft); 395 } 396 397 static void img_ir_write_filter(struct img_ir_priv *priv, 398 struct img_ir_filter *filter) 399 { 400 if (filter) { 401 dev_dbg(priv->dev, "IR filter=%016llx & %016llx\n", 402 (unsigned long long)filter->data, 403 (unsigned long long)filter->mask); 404 img_ir_write(priv, IMG_IR_IRQ_MSG_DATA_LW, (u32)filter->data); 405 img_ir_write(priv, IMG_IR_IRQ_MSG_DATA_UP, (u32)(filter->data 406 >> 32)); 407 img_ir_write(priv, IMG_IR_IRQ_MSG_MASK_LW, (u32)filter->mask); 408 img_ir_write(priv, IMG_IR_IRQ_MSG_MASK_UP, (u32)(filter->mask 409 >> 32)); 410 } else { 411 dev_dbg(priv->dev, "IR clearing filter\n"); 412 img_ir_write(priv, IMG_IR_IRQ_MSG_MASK_LW, 0); 413 img_ir_write(priv, IMG_IR_IRQ_MSG_MASK_UP, 0); 414 } 415 } 416 417 /* caller must have lock */ 418 static void _img_ir_set_filter(struct img_ir_priv *priv, 419 struct img_ir_filter *filter) 420 { 421 struct img_ir_priv_hw *hw = &priv->hw; 422 u32 irq_en, irq_on; 423 424 irq_en = img_ir_read(priv, IMG_IR_IRQ_ENABLE); 425 if (filter) { 426 /* Only use the match interrupt */ 427 hw->filters[RC_FILTER_NORMAL] = *filter; 428 hw->flags |= IMG_IR_F_FILTER; 429 irq_on = IMG_IR_IRQ_DATA_MATCH; 430 irq_en &= ~(IMG_IR_IRQ_DATA_VALID | IMG_IR_IRQ_DATA2_VALID); 431 } else { 432 /* Only use the valid interrupt */ 433 hw->flags &= ~IMG_IR_F_FILTER; 434 irq_en &= ~IMG_IR_IRQ_DATA_MATCH; 435 irq_on = IMG_IR_IRQ_DATA_VALID | IMG_IR_IRQ_DATA2_VALID; 436 } 437 irq_en |= irq_on; 438 439 img_ir_write_filter(priv, filter); 440 /* clear any interrupts we're enabling so we don't handle old ones */ 441 img_ir_write(priv, IMG_IR_IRQ_CLEAR, irq_on); 442 img_ir_write(priv, IMG_IR_IRQ_ENABLE, irq_en); 443 } 444 445 /* caller must have lock */ 446 static void _img_ir_set_wake_filter(struct img_ir_priv *priv, 447 struct img_ir_filter *filter) 448 { 449 struct img_ir_priv_hw *hw = &priv->hw; 450 if (filter) { 451 /* Enable wake, and copy filter for later */ 452 hw->filters[RC_FILTER_WAKEUP] = *filter; 453 hw->flags |= IMG_IR_F_WAKE; 454 } else { 455 /* Disable wake */ 456 hw->flags &= ~IMG_IR_F_WAKE; 457 } 458 } 459 460 /* Callback for setting scancode filter */ 461 static int img_ir_set_filter(struct rc_dev *dev, enum rc_filter_type type, 462 struct rc_scancode_filter *sc_filter) 463 { 464 struct img_ir_priv *priv = dev->priv; 465 struct img_ir_priv_hw *hw = &priv->hw; 466 struct img_ir_filter filter, *filter_ptr = &filter; 467 int ret = 0; 468 469 dev_dbg(priv->dev, "IR scancode %sfilter=%08x & %08x\n", 470 type == RC_FILTER_WAKEUP ? "wake " : "", 471 sc_filter->data, 472 sc_filter->mask); 473 474 spin_lock_irq(&priv->lock); 475 476 /* filtering can always be disabled */ 477 if (!sc_filter->mask) { 478 filter_ptr = NULL; 479 goto set_unlock; 480 } 481 482 /* current decoder must support scancode filtering */ 483 if (!hw->decoder || !hw->decoder->filter) { 484 ret = -EINVAL; 485 goto unlock; 486 } 487 488 /* convert scancode filter to raw filter */ 489 filter.minlen = 0; 490 filter.maxlen = ~0; 491 ret = hw->decoder->filter(sc_filter, &filter, hw->enabled_protocols); 492 if (ret) 493 goto unlock; 494 dev_dbg(priv->dev, "IR raw %sfilter=%016llx & %016llx\n", 495 type == RC_FILTER_WAKEUP ? "wake " : "", 496 (unsigned long long)filter.data, 497 (unsigned long long)filter.mask); 498 499 set_unlock: 500 /* apply raw filters */ 501 switch (type) { 502 case RC_FILTER_NORMAL: 503 _img_ir_set_filter(priv, filter_ptr); 504 break; 505 case RC_FILTER_WAKEUP: 506 _img_ir_set_wake_filter(priv, filter_ptr); 507 break; 508 default: 509 ret = -EINVAL; 510 } 511 512 unlock: 513 spin_unlock_irq(&priv->lock); 514 return ret; 515 } 516 517 static int img_ir_set_normal_filter(struct rc_dev *dev, 518 struct rc_scancode_filter *sc_filter) 519 { 520 return img_ir_set_filter(dev, RC_FILTER_NORMAL, sc_filter); 521 } 522 523 static int img_ir_set_wakeup_filter(struct rc_dev *dev, 524 struct rc_scancode_filter *sc_filter) 525 { 526 return img_ir_set_filter(dev, RC_FILTER_WAKEUP, sc_filter); 527 } 528 529 /** 530 * img_ir_set_decoder() - Set the current decoder. 531 * @priv: IR private data. 532 * @decoder: Decoder to use with immediate effect. 533 * @proto: Protocol bitmap (or 0 to use decoder->type). 534 */ 535 static void img_ir_set_decoder(struct img_ir_priv *priv, 536 const struct img_ir_decoder *decoder, 537 u64 proto) 538 { 539 struct img_ir_priv_hw *hw = &priv->hw; 540 struct rc_dev *rdev = hw->rdev; 541 u32 ir_status, irq_en; 542 spin_lock_irq(&priv->lock); 543 544 /* 545 * First record that the protocol is being stopped so that the end timer 546 * isn't restarted while we're trying to stop it. 547 */ 548 hw->stopping = true; 549 550 /* 551 * Release the lock to stop the end timer, since the end timer handler 552 * acquires the lock and we don't want to deadlock waiting for it. 553 */ 554 spin_unlock_irq(&priv->lock); 555 del_timer_sync(&hw->end_timer); 556 del_timer_sync(&hw->suspend_timer); 557 spin_lock_irq(&priv->lock); 558 559 hw->stopping = false; 560 561 /* switch off and disable interrupts */ 562 img_ir_write(priv, IMG_IR_CONTROL, 0); 563 irq_en = img_ir_read(priv, IMG_IR_IRQ_ENABLE); 564 img_ir_write(priv, IMG_IR_IRQ_ENABLE, irq_en & IMG_IR_IRQ_EDGE); 565 img_ir_write(priv, IMG_IR_IRQ_CLEAR, IMG_IR_IRQ_ALL & ~IMG_IR_IRQ_EDGE); 566 567 /* ack any data already detected */ 568 ir_status = img_ir_read(priv, IMG_IR_STATUS); 569 if (ir_status & (IMG_IR_RXDVAL | IMG_IR_RXDVALD2)) { 570 ir_status &= ~(IMG_IR_RXDVAL | IMG_IR_RXDVALD2); 571 img_ir_write(priv, IMG_IR_STATUS, ir_status); 572 } 573 574 /* always read data to clear buffer if IR wakes the device */ 575 img_ir_read(priv, IMG_IR_DATA_LW); 576 img_ir_read(priv, IMG_IR_DATA_UP); 577 578 /* switch back to normal mode */ 579 hw->mode = IMG_IR_M_NORMAL; 580 581 /* clear the wakeup scancode filter */ 582 rdev->scancode_wakeup_filter.data = 0; 583 rdev->scancode_wakeup_filter.mask = 0; 584 585 /* clear raw filters */ 586 _img_ir_set_filter(priv, NULL); 587 _img_ir_set_wake_filter(priv, NULL); 588 589 /* clear the enabled protocols */ 590 hw->enabled_protocols = 0; 591 592 /* switch decoder */ 593 hw->decoder = decoder; 594 if (!decoder) 595 goto unlock; 596 597 /* set the enabled protocols */ 598 if (!proto) 599 proto = decoder->type; 600 hw->enabled_protocols = proto; 601 602 /* write the new timings */ 603 img_ir_decoder_convert(decoder, &hw->reg_timings, hw->clk_hz); 604 img_ir_write_timings(priv, &hw->reg_timings.timings, RC_FILTER_NORMAL); 605 606 /* set up and enable */ 607 img_ir_write(priv, IMG_IR_CONTROL, hw->reg_timings.ctrl); 608 609 610 unlock: 611 spin_unlock_irq(&priv->lock); 612 } 613 614 /** 615 * img_ir_decoder_compatable() - Find whether a decoder will work with a device. 616 * @priv: IR private data. 617 * @dec: Decoder to check. 618 * 619 * Returns: true if @dec is compatible with the device @priv refers to. 620 */ 621 static bool img_ir_decoder_compatible(struct img_ir_priv *priv, 622 const struct img_ir_decoder *dec) 623 { 624 unsigned int ct; 625 626 /* don't accept decoders using code types which aren't supported */ 627 ct = dec->control.code_type; 628 if (priv->hw.ct_quirks[ct] & IMG_IR_QUIRK_CODE_BROKEN) 629 return false; 630 631 return true; 632 } 633 634 /** 635 * img_ir_allowed_protos() - Get allowed protocols from global decoder list. 636 * @priv: IR private data. 637 * 638 * Returns: Mask of protocols supported by the device @priv refers to. 639 */ 640 static u64 img_ir_allowed_protos(struct img_ir_priv *priv) 641 { 642 u64 protos = 0; 643 struct img_ir_decoder **decp; 644 645 for (decp = img_ir_decoders; *decp; ++decp) { 646 const struct img_ir_decoder *dec = *decp; 647 if (img_ir_decoder_compatible(priv, dec)) 648 protos |= dec->type; 649 } 650 return protos; 651 } 652 653 /* Callback for changing protocol using sysfs */ 654 static int img_ir_change_protocol(struct rc_dev *dev, u64 *ir_type) 655 { 656 struct img_ir_priv *priv = dev->priv; 657 struct img_ir_priv_hw *hw = &priv->hw; 658 struct rc_dev *rdev = hw->rdev; 659 struct img_ir_decoder **decp; 660 u64 wakeup_protocols; 661 662 if (!*ir_type) { 663 /* disable all protocols */ 664 img_ir_set_decoder(priv, NULL, 0); 665 goto success; 666 } 667 for (decp = img_ir_decoders; *decp; ++decp) { 668 const struct img_ir_decoder *dec = *decp; 669 if (!img_ir_decoder_compatible(priv, dec)) 670 continue; 671 if (*ir_type & dec->type) { 672 *ir_type &= dec->type; 673 img_ir_set_decoder(priv, dec, *ir_type); 674 goto success; 675 } 676 } 677 return -EINVAL; 678 679 success: 680 /* 681 * Only allow matching wakeup protocols for now, and only if filtering 682 * is supported. 683 */ 684 wakeup_protocols = *ir_type; 685 if (!hw->decoder || !hw->decoder->filter) 686 wakeup_protocols = 0; 687 rdev->allowed_wakeup_protocols = wakeup_protocols; 688 rdev->enabled_wakeup_protocols = wakeup_protocols; 689 return 0; 690 } 691 692 /* Changes ir-core protocol device attribute */ 693 static void img_ir_set_protocol(struct img_ir_priv *priv, u64 proto) 694 { 695 struct rc_dev *rdev = priv->hw.rdev; 696 697 spin_lock_irq(&rdev->rc_map.lock); 698 rdev->rc_map.rc_type = __ffs64(proto); 699 spin_unlock_irq(&rdev->rc_map.lock); 700 701 mutex_lock(&rdev->lock); 702 rdev->enabled_protocols = proto; 703 rdev->allowed_wakeup_protocols = proto; 704 rdev->enabled_wakeup_protocols = proto; 705 mutex_unlock(&rdev->lock); 706 } 707 708 /* Set up IR decoders */ 709 static void img_ir_init_decoders(void) 710 { 711 struct img_ir_decoder **decp; 712 713 spin_lock(&img_ir_decoders_lock); 714 if (!img_ir_decoders_preprocessed) { 715 for (decp = img_ir_decoders; *decp; ++decp) 716 img_ir_decoder_preprocess(*decp); 717 img_ir_decoders_preprocessed = true; 718 } 719 spin_unlock(&img_ir_decoders_lock); 720 } 721 722 #ifdef CONFIG_PM_SLEEP 723 /** 724 * img_ir_enable_wake() - Switch to wake mode. 725 * @priv: IR private data. 726 * 727 * Returns: non-zero if the IR can wake the system. 728 */ 729 static int img_ir_enable_wake(struct img_ir_priv *priv) 730 { 731 struct img_ir_priv_hw *hw = &priv->hw; 732 int ret = 0; 733 734 spin_lock_irq(&priv->lock); 735 if (hw->flags & IMG_IR_F_WAKE) { 736 /* interrupt only on a match */ 737 hw->suspend_irqen = img_ir_read(priv, IMG_IR_IRQ_ENABLE); 738 img_ir_write(priv, IMG_IR_IRQ_ENABLE, IMG_IR_IRQ_DATA_MATCH); 739 img_ir_write_filter(priv, &hw->filters[RC_FILTER_WAKEUP]); 740 img_ir_write_timings(priv, &hw->reg_timings.timings, 741 RC_FILTER_WAKEUP); 742 hw->mode = IMG_IR_M_WAKE; 743 ret = 1; 744 } 745 spin_unlock_irq(&priv->lock); 746 return ret; 747 } 748 749 /** 750 * img_ir_disable_wake() - Switch out of wake mode. 751 * @priv: IR private data 752 * 753 * Returns: 1 if the hardware should be allowed to wake from a sleep state. 754 * 0 otherwise. 755 */ 756 static int img_ir_disable_wake(struct img_ir_priv *priv) 757 { 758 struct img_ir_priv_hw *hw = &priv->hw; 759 int ret = 0; 760 761 spin_lock_irq(&priv->lock); 762 if (hw->flags & IMG_IR_F_WAKE) { 763 /* restore normal filtering */ 764 if (hw->flags & IMG_IR_F_FILTER) { 765 img_ir_write(priv, IMG_IR_IRQ_ENABLE, 766 (hw->suspend_irqen & IMG_IR_IRQ_EDGE) | 767 IMG_IR_IRQ_DATA_MATCH); 768 img_ir_write_filter(priv, 769 &hw->filters[RC_FILTER_NORMAL]); 770 } else { 771 img_ir_write(priv, IMG_IR_IRQ_ENABLE, 772 (hw->suspend_irqen & IMG_IR_IRQ_EDGE) | 773 IMG_IR_IRQ_DATA_VALID | 774 IMG_IR_IRQ_DATA2_VALID); 775 img_ir_write_filter(priv, NULL); 776 } 777 img_ir_write_timings(priv, &hw->reg_timings.timings, 778 RC_FILTER_NORMAL); 779 hw->mode = IMG_IR_M_NORMAL; 780 ret = 1; 781 } 782 spin_unlock_irq(&priv->lock); 783 return ret; 784 } 785 #endif /* CONFIG_PM_SLEEP */ 786 787 /* lock must be held */ 788 static void img_ir_begin_repeat(struct img_ir_priv *priv) 789 { 790 struct img_ir_priv_hw *hw = &priv->hw; 791 if (hw->mode == IMG_IR_M_NORMAL) { 792 /* switch to repeat timings */ 793 img_ir_write(priv, IMG_IR_CONTROL, 0); 794 hw->mode = IMG_IR_M_REPEATING; 795 img_ir_write_timings(priv, &hw->reg_timings.rtimings, 796 RC_FILTER_NORMAL); 797 img_ir_write(priv, IMG_IR_CONTROL, hw->reg_timings.ctrl); 798 } 799 } 800 801 /* lock must be held */ 802 static void img_ir_end_repeat(struct img_ir_priv *priv) 803 { 804 struct img_ir_priv_hw *hw = &priv->hw; 805 if (hw->mode == IMG_IR_M_REPEATING) { 806 /* switch to normal timings */ 807 img_ir_write(priv, IMG_IR_CONTROL, 0); 808 hw->mode = IMG_IR_M_NORMAL; 809 img_ir_write_timings(priv, &hw->reg_timings.timings, 810 RC_FILTER_NORMAL); 811 img_ir_write(priv, IMG_IR_CONTROL, hw->reg_timings.ctrl); 812 } 813 } 814 815 /* lock must be held */ 816 static void img_ir_handle_data(struct img_ir_priv *priv, u32 len, u64 raw) 817 { 818 struct img_ir_priv_hw *hw = &priv->hw; 819 const struct img_ir_decoder *dec = hw->decoder; 820 int ret = IMG_IR_SCANCODE; 821 struct img_ir_scancode_req request; 822 823 request.protocol = RC_TYPE_UNKNOWN; 824 request.toggle = 0; 825 826 if (dec->scancode) 827 ret = dec->scancode(len, raw, hw->enabled_protocols, &request); 828 else if (len >= 32) 829 request.scancode = (u32)raw; 830 else if (len < 32) 831 request.scancode = (u32)raw & ((1 << len)-1); 832 dev_dbg(priv->dev, "data (%u bits) = %#llx\n", 833 len, (unsigned long long)raw); 834 if (ret == IMG_IR_SCANCODE) { 835 dev_dbg(priv->dev, "decoded scan code %#x, toggle %u\n", 836 request.scancode, request.toggle); 837 rc_keydown(hw->rdev, request.protocol, request.scancode, 838 request.toggle); 839 img_ir_end_repeat(priv); 840 } else if (ret == IMG_IR_REPEATCODE) { 841 if (hw->mode == IMG_IR_M_REPEATING) { 842 dev_dbg(priv->dev, "decoded repeat code\n"); 843 rc_repeat(hw->rdev); 844 } else { 845 dev_dbg(priv->dev, "decoded unexpected repeat code, ignoring\n"); 846 } 847 } else { 848 dev_dbg(priv->dev, "decode failed (%d)\n", ret); 849 return; 850 } 851 852 853 /* we mustn't update the end timer while trying to stop it */ 854 if (dec->repeat && !hw->stopping) { 855 unsigned long interval; 856 857 img_ir_begin_repeat(priv); 858 859 /* update timer, but allowing for 1/8th tolerance */ 860 interval = dec->repeat + (dec->repeat >> 3); 861 mod_timer(&hw->end_timer, 862 jiffies + msecs_to_jiffies(interval)); 863 } 864 } 865 866 /* timer function to end waiting for repeat. */ 867 static void img_ir_end_timer(unsigned long arg) 868 { 869 struct img_ir_priv *priv = (struct img_ir_priv *)arg; 870 871 spin_lock_irq(&priv->lock); 872 img_ir_end_repeat(priv); 873 spin_unlock_irq(&priv->lock); 874 } 875 876 /* 877 * Timer function to re-enable the current protocol after it had been 878 * cleared when invalid interrupts were generated due to a quirk in the 879 * img-ir decoder. 880 */ 881 static void img_ir_suspend_timer(unsigned long arg) 882 { 883 struct img_ir_priv *priv = (struct img_ir_priv *)arg; 884 885 spin_lock_irq(&priv->lock); 886 /* 887 * Don't overwrite enabled valid/match IRQs if they have already been 888 * changed by e.g. a filter change. 889 */ 890 if ((priv->hw.quirk_suspend_irq & IMG_IR_IRQ_EDGE) == 891 img_ir_read(priv, IMG_IR_IRQ_ENABLE)) 892 img_ir_write(priv, IMG_IR_IRQ_ENABLE, 893 priv->hw.quirk_suspend_irq); 894 /* enable */ 895 img_ir_write(priv, IMG_IR_CONTROL, priv->hw.reg_timings.ctrl); 896 spin_unlock_irq(&priv->lock); 897 } 898 899 #ifdef CONFIG_COMMON_CLK 900 static void img_ir_change_frequency(struct img_ir_priv *priv, 901 struct clk_notifier_data *change) 902 { 903 struct img_ir_priv_hw *hw = &priv->hw; 904 905 dev_dbg(priv->dev, "clk changed %lu HZ -> %lu HZ\n", 906 change->old_rate, change->new_rate); 907 908 spin_lock_irq(&priv->lock); 909 if (hw->clk_hz == change->new_rate) 910 goto unlock; 911 hw->clk_hz = change->new_rate; 912 /* refresh current timings */ 913 if (hw->decoder) { 914 img_ir_decoder_convert(hw->decoder, &hw->reg_timings, 915 hw->clk_hz); 916 switch (hw->mode) { 917 case IMG_IR_M_NORMAL: 918 img_ir_write_timings(priv, &hw->reg_timings.timings, 919 RC_FILTER_NORMAL); 920 break; 921 case IMG_IR_M_REPEATING: 922 img_ir_write_timings(priv, &hw->reg_timings.rtimings, 923 RC_FILTER_NORMAL); 924 break; 925 #ifdef CONFIG_PM_SLEEP 926 case IMG_IR_M_WAKE: 927 img_ir_write_timings(priv, &hw->reg_timings.timings, 928 RC_FILTER_WAKEUP); 929 break; 930 #endif 931 } 932 } 933 unlock: 934 spin_unlock_irq(&priv->lock); 935 } 936 937 static int img_ir_clk_notify(struct notifier_block *self, unsigned long action, 938 void *data) 939 { 940 struct img_ir_priv *priv = container_of(self, struct img_ir_priv, 941 hw.clk_nb); 942 switch (action) { 943 case POST_RATE_CHANGE: 944 img_ir_change_frequency(priv, data); 945 break; 946 default: 947 break; 948 } 949 return NOTIFY_OK; 950 } 951 #endif /* CONFIG_COMMON_CLK */ 952 953 /* called with priv->lock held */ 954 void img_ir_isr_hw(struct img_ir_priv *priv, u32 irq_status) 955 { 956 struct img_ir_priv_hw *hw = &priv->hw; 957 u32 ir_status, len, lw, up; 958 unsigned int ct; 959 960 /* use the current decoder */ 961 if (!hw->decoder) 962 return; 963 964 ct = hw->decoder->control.code_type; 965 966 ir_status = img_ir_read(priv, IMG_IR_STATUS); 967 if (!(ir_status & (IMG_IR_RXDVAL | IMG_IR_RXDVALD2))) { 968 if (!(priv->hw.ct_quirks[ct] & IMG_IR_QUIRK_CODE_IRQ) || 969 hw->stopping) 970 return; 971 /* 972 * The below functionality is added as a work around to stop 973 * multiple Interrupts generated when an incomplete IR code is 974 * received by the decoder. 975 * The decoder generates rapid interrupts without actually 976 * having received any new data. After a single interrupt it's 977 * expected to clear up, but instead multiple interrupts are 978 * rapidly generated. only way to get out of this loop is to 979 * reset the control register after a short delay. 980 */ 981 img_ir_write(priv, IMG_IR_CONTROL, 0); 982 hw->quirk_suspend_irq = img_ir_read(priv, IMG_IR_IRQ_ENABLE); 983 img_ir_write(priv, IMG_IR_IRQ_ENABLE, 984 hw->quirk_suspend_irq & IMG_IR_IRQ_EDGE); 985 986 /* Timer activated to re-enable the protocol. */ 987 mod_timer(&hw->suspend_timer, 988 jiffies + msecs_to_jiffies(5)); 989 return; 990 } 991 ir_status &= ~(IMG_IR_RXDVAL | IMG_IR_RXDVALD2); 992 img_ir_write(priv, IMG_IR_STATUS, ir_status); 993 994 len = (ir_status & IMG_IR_RXDLEN) >> IMG_IR_RXDLEN_SHIFT; 995 /* some versions report wrong length for certain code types */ 996 if (hw->ct_quirks[ct] & IMG_IR_QUIRK_CODE_LEN_INCR) 997 ++len; 998 999 lw = img_ir_read(priv, IMG_IR_DATA_LW); 1000 up = img_ir_read(priv, IMG_IR_DATA_UP); 1001 img_ir_handle_data(priv, len, (u64)up << 32 | lw); 1002 } 1003 1004 void img_ir_setup_hw(struct img_ir_priv *priv) 1005 { 1006 struct img_ir_decoder **decp; 1007 1008 if (!priv->hw.rdev) 1009 return; 1010 1011 /* Use the first available decoder (or disable stuff if NULL) */ 1012 for (decp = img_ir_decoders; *decp; ++decp) { 1013 const struct img_ir_decoder *dec = *decp; 1014 if (img_ir_decoder_compatible(priv, dec)) { 1015 img_ir_set_protocol(priv, dec->type); 1016 img_ir_set_decoder(priv, dec, 0); 1017 return; 1018 } 1019 } 1020 img_ir_set_decoder(priv, NULL, 0); 1021 } 1022 1023 /** 1024 * img_ir_probe_hw_caps() - Probe capabilities of the hardware. 1025 * @priv: IR private data. 1026 */ 1027 static void img_ir_probe_hw_caps(struct img_ir_priv *priv) 1028 { 1029 struct img_ir_priv_hw *hw = &priv->hw; 1030 /* 1031 * When a version of the block becomes available without these quirks, 1032 * they'll have to depend on the core revision. 1033 */ 1034 hw->ct_quirks[IMG_IR_CODETYPE_PULSELEN] 1035 |= IMG_IR_QUIRK_CODE_LEN_INCR; 1036 hw->ct_quirks[IMG_IR_CODETYPE_BIPHASE] 1037 |= IMG_IR_QUIRK_CODE_IRQ; 1038 hw->ct_quirks[IMG_IR_CODETYPE_2BITPULSEPOS] 1039 |= IMG_IR_QUIRK_CODE_BROKEN; 1040 } 1041 1042 int img_ir_probe_hw(struct img_ir_priv *priv) 1043 { 1044 struct img_ir_priv_hw *hw = &priv->hw; 1045 struct rc_dev *rdev; 1046 int error; 1047 1048 /* Ensure hardware decoders have been preprocessed */ 1049 img_ir_init_decoders(); 1050 1051 /* Probe hardware capabilities */ 1052 img_ir_probe_hw_caps(priv); 1053 1054 /* Set up the end timer */ 1055 setup_timer(&hw->end_timer, img_ir_end_timer, (unsigned long)priv); 1056 setup_timer(&hw->suspend_timer, img_ir_suspend_timer, 1057 (unsigned long)priv); 1058 1059 /* Register a clock notifier */ 1060 if (!IS_ERR(priv->clk)) { 1061 hw->clk_hz = clk_get_rate(priv->clk); 1062 #ifdef CONFIG_COMMON_CLK 1063 hw->clk_nb.notifier_call = img_ir_clk_notify; 1064 error = clk_notifier_register(priv->clk, &hw->clk_nb); 1065 if (error) 1066 dev_warn(priv->dev, 1067 "failed to register clock notifier\n"); 1068 #endif 1069 } else { 1070 hw->clk_hz = 32768; 1071 } 1072 1073 /* Allocate hardware decoder */ 1074 hw->rdev = rdev = rc_allocate_device(); 1075 if (!rdev) { 1076 dev_err(priv->dev, "cannot allocate input device\n"); 1077 error = -ENOMEM; 1078 goto err_alloc_rc; 1079 } 1080 rdev->priv = priv; 1081 rdev->map_name = RC_MAP_EMPTY; 1082 rdev->allowed_protocols = img_ir_allowed_protos(priv); 1083 rdev->input_name = "IMG Infrared Decoder"; 1084 rdev->s_filter = img_ir_set_normal_filter; 1085 rdev->s_wakeup_filter = img_ir_set_wakeup_filter; 1086 1087 /* Register hardware decoder */ 1088 error = rc_register_device(rdev); 1089 if (error) { 1090 dev_err(priv->dev, "failed to register IR input device\n"); 1091 goto err_register_rc; 1092 } 1093 1094 /* 1095 * Set this after rc_register_device as no protocols have been 1096 * registered yet. 1097 */ 1098 rdev->change_protocol = img_ir_change_protocol; 1099 1100 device_init_wakeup(priv->dev, 1); 1101 1102 return 0; 1103 1104 err_register_rc: 1105 img_ir_set_decoder(priv, NULL, 0); 1106 hw->rdev = NULL; 1107 rc_free_device(rdev); 1108 err_alloc_rc: 1109 #ifdef CONFIG_COMMON_CLK 1110 if (!IS_ERR(priv->clk)) 1111 clk_notifier_unregister(priv->clk, &hw->clk_nb); 1112 #endif 1113 return error; 1114 } 1115 1116 void img_ir_remove_hw(struct img_ir_priv *priv) 1117 { 1118 struct img_ir_priv_hw *hw = &priv->hw; 1119 struct rc_dev *rdev = hw->rdev; 1120 if (!rdev) 1121 return; 1122 img_ir_set_decoder(priv, NULL, 0); 1123 hw->rdev = NULL; 1124 rc_unregister_device(rdev); 1125 #ifdef CONFIG_COMMON_CLK 1126 if (!IS_ERR(priv->clk)) 1127 clk_notifier_unregister(priv->clk, &hw->clk_nb); 1128 #endif 1129 } 1130 1131 #ifdef CONFIG_PM_SLEEP 1132 int img_ir_suspend(struct device *dev) 1133 { 1134 struct img_ir_priv *priv = dev_get_drvdata(dev); 1135 1136 if (device_may_wakeup(dev) && img_ir_enable_wake(priv)) 1137 enable_irq_wake(priv->irq); 1138 return 0; 1139 } 1140 1141 int img_ir_resume(struct device *dev) 1142 { 1143 struct img_ir_priv *priv = dev_get_drvdata(dev); 1144 1145 if (device_may_wakeup(dev) && img_ir_disable_wake(priv)) 1146 disable_irq_wake(priv->irq); 1147 return 0; 1148 } 1149 #endif /* CONFIG_PM_SLEEP */ 1150