1 /* 2 * ImgTec IR Hardware Decoder found in PowerDown Controller. 3 * 4 * Copyright 2010-2014 Imagination Technologies Ltd. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by the 8 * Free Software Foundation; either version 2 of the License, or (at your 9 * option) any later version. 10 * 11 * This ties into the input subsystem using the RC-core. Protocol support is 12 * provided in separate modules which provide the parameters and scancode 13 * translation functions to set up the hardware decoder and interpret the 14 * resulting input. 15 */ 16 17 #include <linux/bitops.h> 18 #include <linux/clk.h> 19 #include <linux/interrupt.h> 20 #include <linux/spinlock.h> 21 #include <linux/timer.h> 22 #include <media/rc-core.h> 23 #include "img-ir.h" 24 25 /* Decoders lock (only modified to preprocess them) */ 26 static DEFINE_SPINLOCK(img_ir_decoders_lock); 27 28 static bool img_ir_decoders_preprocessed; 29 static struct img_ir_decoder *img_ir_decoders[] = { 30 #ifdef CONFIG_IR_IMG_NEC 31 &img_ir_nec, 32 #endif 33 #ifdef CONFIG_IR_IMG_JVC 34 &img_ir_jvc, 35 #endif 36 #ifdef CONFIG_IR_IMG_SONY 37 &img_ir_sony, 38 #endif 39 #ifdef CONFIG_IR_IMG_SHARP 40 &img_ir_sharp, 41 #endif 42 #ifdef CONFIG_IR_IMG_SANYO 43 &img_ir_sanyo, 44 #endif 45 #ifdef CONFIG_IR_IMG_RC5 46 &img_ir_rc5, 47 #endif 48 #ifdef CONFIG_IR_IMG_RC6 49 &img_ir_rc6, 50 #endif 51 NULL 52 }; 53 54 #define IMG_IR_F_FILTER BIT(RC_FILTER_NORMAL) /* enable filtering */ 55 #define IMG_IR_F_WAKE BIT(RC_FILTER_WAKEUP) /* enable waking */ 56 57 /* code type quirks */ 58 59 #define IMG_IR_QUIRK_CODE_BROKEN 0x1 /* Decode is broken */ 60 #define IMG_IR_QUIRK_CODE_LEN_INCR 0x2 /* Bit length needs increment */ 61 /* 62 * The decoder generates rapid interrupts without actually having 63 * received any new data after an incomplete IR code is decoded. 64 */ 65 #define IMG_IR_QUIRK_CODE_IRQ 0x4 66 67 /* functions for preprocessing timings, ensuring max is set */ 68 69 static void img_ir_timing_preprocess(struct img_ir_timing_range *range, 70 unsigned int unit) 71 { 72 if (range->max < range->min) 73 range->max = range->min; 74 if (unit) { 75 /* multiply by unit and convert to microseconds */ 76 range->min = (range->min*unit)/1000; 77 range->max = (range->max*unit + 999)/1000; /* round up */ 78 } 79 } 80 81 static void img_ir_symbol_timing_preprocess(struct img_ir_symbol_timing *timing, 82 unsigned int unit) 83 { 84 img_ir_timing_preprocess(&timing->pulse, unit); 85 img_ir_timing_preprocess(&timing->space, unit); 86 } 87 88 static void img_ir_timings_preprocess(struct img_ir_timings *timings, 89 unsigned int unit) 90 { 91 img_ir_symbol_timing_preprocess(&timings->ldr, unit); 92 img_ir_symbol_timing_preprocess(&timings->s00, unit); 93 img_ir_symbol_timing_preprocess(&timings->s01, unit); 94 img_ir_symbol_timing_preprocess(&timings->s10, unit); 95 img_ir_symbol_timing_preprocess(&timings->s11, unit); 96 /* default s10 and s11 to s00 and s01 if no leader */ 97 if (unit) 98 /* multiply by unit and convert to microseconds (round up) */ 99 timings->ft.ft_min = (timings->ft.ft_min*unit + 999)/1000; 100 } 101 102 /* functions for filling empty fields with defaults */ 103 104 static void img_ir_timing_defaults(struct img_ir_timing_range *range, 105 struct img_ir_timing_range *defaults) 106 { 107 if (!range->min) 108 range->min = defaults->min; 109 if (!range->max) 110 range->max = defaults->max; 111 } 112 113 static void img_ir_symbol_timing_defaults(struct img_ir_symbol_timing *timing, 114 struct img_ir_symbol_timing *defaults) 115 { 116 img_ir_timing_defaults(&timing->pulse, &defaults->pulse); 117 img_ir_timing_defaults(&timing->space, &defaults->space); 118 } 119 120 static void img_ir_timings_defaults(struct img_ir_timings *timings, 121 struct img_ir_timings *defaults) 122 { 123 img_ir_symbol_timing_defaults(&timings->ldr, &defaults->ldr); 124 img_ir_symbol_timing_defaults(&timings->s00, &defaults->s00); 125 img_ir_symbol_timing_defaults(&timings->s01, &defaults->s01); 126 img_ir_symbol_timing_defaults(&timings->s10, &defaults->s10); 127 img_ir_symbol_timing_defaults(&timings->s11, &defaults->s11); 128 if (!timings->ft.ft_min) 129 timings->ft.ft_min = defaults->ft.ft_min; 130 } 131 132 /* functions for converting timings to register values */ 133 134 /** 135 * img_ir_control() - Convert control struct to control register value. 136 * @control: Control data 137 * 138 * Returns: The control register value equivalent of @control. 139 */ 140 static u32 img_ir_control(const struct img_ir_control *control) 141 { 142 u32 ctrl = control->code_type << IMG_IR_CODETYPE_SHIFT; 143 if (control->decoden) 144 ctrl |= IMG_IR_DECODEN; 145 if (control->hdrtog) 146 ctrl |= IMG_IR_HDRTOG; 147 if (control->ldrdec) 148 ctrl |= IMG_IR_LDRDEC; 149 if (control->decodinpol) 150 ctrl |= IMG_IR_DECODINPOL; 151 if (control->bitorien) 152 ctrl |= IMG_IR_BITORIEN; 153 if (control->d1validsel) 154 ctrl |= IMG_IR_D1VALIDSEL; 155 if (control->bitinv) 156 ctrl |= IMG_IR_BITINV; 157 if (control->decodend2) 158 ctrl |= IMG_IR_DECODEND2; 159 if (control->bitoriend2) 160 ctrl |= IMG_IR_BITORIEND2; 161 if (control->bitinvd2) 162 ctrl |= IMG_IR_BITINVD2; 163 return ctrl; 164 } 165 166 /** 167 * img_ir_timing_range_convert() - Convert microsecond range. 168 * @out: Output timing range in clock cycles with a shift. 169 * @in: Input timing range in microseconds. 170 * @tolerance: Tolerance as a fraction of 128 (roughly percent). 171 * @clock_hz: IR clock rate in Hz. 172 * @shift: Shift of output units. 173 * 174 * Converts min and max from microseconds to IR clock cycles, applies a 175 * tolerance, and shifts for the register, rounding in the right direction. 176 * Note that in and out can safely be the same object. 177 */ 178 static void img_ir_timing_range_convert(struct img_ir_timing_range *out, 179 const struct img_ir_timing_range *in, 180 unsigned int tolerance, 181 unsigned long clock_hz, 182 unsigned int shift) 183 { 184 unsigned int min = in->min; 185 unsigned int max = in->max; 186 /* add a tolerance */ 187 min = min - (min*tolerance >> 7); 188 max = max + (max*tolerance >> 7); 189 /* convert from microseconds into clock cycles */ 190 min = min*clock_hz / 1000000; 191 max = (max*clock_hz + 999999) / 1000000; /* round up */ 192 /* apply shift and copy to output */ 193 out->min = min >> shift; 194 out->max = (max + ((1 << shift) - 1)) >> shift; /* round up */ 195 } 196 197 /** 198 * img_ir_symbol_timing() - Convert symbol timing struct to register value. 199 * @timing: Symbol timing data 200 * @tolerance: Timing tolerance where 0-128 represents 0-100% 201 * @clock_hz: Frequency of source clock in Hz 202 * @pd_shift: Shift to apply to symbol period 203 * @w_shift: Shift to apply to symbol width 204 * 205 * Returns: Symbol timing register value based on arguments. 206 */ 207 static u32 img_ir_symbol_timing(const struct img_ir_symbol_timing *timing, 208 unsigned int tolerance, 209 unsigned long clock_hz, 210 unsigned int pd_shift, 211 unsigned int w_shift) 212 { 213 struct img_ir_timing_range hw_pulse, hw_period; 214 /* we calculate period in hw_period, then convert in place */ 215 hw_period.min = timing->pulse.min + timing->space.min; 216 hw_period.max = timing->pulse.max + timing->space.max; 217 img_ir_timing_range_convert(&hw_period, &hw_period, 218 tolerance, clock_hz, pd_shift); 219 img_ir_timing_range_convert(&hw_pulse, &timing->pulse, 220 tolerance, clock_hz, w_shift); 221 /* construct register value */ 222 return (hw_period.max << IMG_IR_PD_MAX_SHIFT) | 223 (hw_period.min << IMG_IR_PD_MIN_SHIFT) | 224 (hw_pulse.max << IMG_IR_W_MAX_SHIFT) | 225 (hw_pulse.min << IMG_IR_W_MIN_SHIFT); 226 } 227 228 /** 229 * img_ir_free_timing() - Convert free time timing struct to register value. 230 * @timing: Free symbol timing data 231 * @clock_hz: Source clock frequency in Hz 232 * 233 * Returns: Free symbol timing register value. 234 */ 235 static u32 img_ir_free_timing(const struct img_ir_free_timing *timing, 236 unsigned long clock_hz) 237 { 238 unsigned int minlen, maxlen, ft_min; 239 /* minlen is only 5 bits, and round minlen to multiple of 2 */ 240 if (timing->minlen < 30) 241 minlen = timing->minlen & -2; 242 else 243 minlen = 30; 244 /* maxlen has maximum value of 48, and round maxlen to multiple of 2 */ 245 if (timing->maxlen < 48) 246 maxlen = (timing->maxlen + 1) & -2; 247 else 248 maxlen = 48; 249 /* convert and shift ft_min, rounding upwards */ 250 ft_min = (timing->ft_min*clock_hz + 999999) / 1000000; 251 ft_min = (ft_min + 7) >> 3; 252 /* construct register value */ 253 return (maxlen << IMG_IR_MAXLEN_SHIFT) | 254 (minlen << IMG_IR_MINLEN_SHIFT) | 255 (ft_min << IMG_IR_FT_MIN_SHIFT); 256 } 257 258 /** 259 * img_ir_free_timing_dynamic() - Update free time register value. 260 * @st_ft: Static free time register value from img_ir_free_timing. 261 * @filter: Current filter which may additionally restrict min/max len. 262 * 263 * Returns: Updated free time register value based on the current filter. 264 */ 265 static u32 img_ir_free_timing_dynamic(u32 st_ft, struct img_ir_filter *filter) 266 { 267 unsigned int minlen, maxlen, newminlen, newmaxlen; 268 269 /* round minlen, maxlen to multiple of 2 */ 270 newminlen = filter->minlen & -2; 271 newmaxlen = (filter->maxlen + 1) & -2; 272 /* extract min/max len from register */ 273 minlen = (st_ft & IMG_IR_MINLEN) >> IMG_IR_MINLEN_SHIFT; 274 maxlen = (st_ft & IMG_IR_MAXLEN) >> IMG_IR_MAXLEN_SHIFT; 275 /* if the new values are more restrictive, update the register value */ 276 if (newminlen > minlen) { 277 st_ft &= ~IMG_IR_MINLEN; 278 st_ft |= newminlen << IMG_IR_MINLEN_SHIFT; 279 } 280 if (newmaxlen < maxlen) { 281 st_ft &= ~IMG_IR_MAXLEN; 282 st_ft |= newmaxlen << IMG_IR_MAXLEN_SHIFT; 283 } 284 return st_ft; 285 } 286 287 /** 288 * img_ir_timings_convert() - Convert timings to register values 289 * @regs: Output timing register values 290 * @timings: Input timing data 291 * @tolerance: Timing tolerance where 0-128 represents 0-100% 292 * @clock_hz: Source clock frequency in Hz 293 */ 294 static void img_ir_timings_convert(struct img_ir_timing_regvals *regs, 295 const struct img_ir_timings *timings, 296 unsigned int tolerance, 297 unsigned int clock_hz) 298 { 299 /* leader symbol timings are divided by 16 */ 300 regs->ldr = img_ir_symbol_timing(&timings->ldr, tolerance, clock_hz, 301 4, 4); 302 /* other symbol timings, pd fields only are divided by 2 */ 303 regs->s00 = img_ir_symbol_timing(&timings->s00, tolerance, clock_hz, 304 1, 0); 305 regs->s01 = img_ir_symbol_timing(&timings->s01, tolerance, clock_hz, 306 1, 0); 307 regs->s10 = img_ir_symbol_timing(&timings->s10, tolerance, clock_hz, 308 1, 0); 309 regs->s11 = img_ir_symbol_timing(&timings->s11, tolerance, clock_hz, 310 1, 0); 311 regs->ft = img_ir_free_timing(&timings->ft, clock_hz); 312 } 313 314 /** 315 * img_ir_decoder_preprocess() - Preprocess timings in decoder. 316 * @decoder: Decoder to be preprocessed. 317 * 318 * Ensures that the symbol timing ranges are valid with respect to ordering, and 319 * does some fixed conversion on them. 320 */ 321 static void img_ir_decoder_preprocess(struct img_ir_decoder *decoder) 322 { 323 /* default tolerance */ 324 if (!decoder->tolerance) 325 decoder->tolerance = 10; /* percent */ 326 /* and convert tolerance to fraction out of 128 */ 327 decoder->tolerance = decoder->tolerance * 128 / 100; 328 329 /* fill in implicit fields */ 330 img_ir_timings_preprocess(&decoder->timings, decoder->unit); 331 332 /* do the same for repeat timings if applicable */ 333 if (decoder->repeat) { 334 img_ir_timings_preprocess(&decoder->rtimings, decoder->unit); 335 img_ir_timings_defaults(&decoder->rtimings, &decoder->timings); 336 } 337 } 338 339 /** 340 * img_ir_decoder_convert() - Generate internal timings in decoder. 341 * @decoder: Decoder to be converted to internal timings. 342 * @timings: Timing register values. 343 * @clock_hz: IR clock rate in Hz. 344 * 345 * Fills out the repeat timings and timing register values for a specific clock 346 * rate. 347 */ 348 static void img_ir_decoder_convert(const struct img_ir_decoder *decoder, 349 struct img_ir_reg_timings *reg_timings, 350 unsigned int clock_hz) 351 { 352 /* calculate control value */ 353 reg_timings->ctrl = img_ir_control(&decoder->control); 354 355 /* fill in implicit fields and calculate register values */ 356 img_ir_timings_convert(®_timings->timings, &decoder->timings, 357 decoder->tolerance, clock_hz); 358 359 /* do the same for repeat timings if applicable */ 360 if (decoder->repeat) 361 img_ir_timings_convert(®_timings->rtimings, 362 &decoder->rtimings, decoder->tolerance, 363 clock_hz); 364 } 365 366 /** 367 * img_ir_write_timings() - Write timings to the hardware now 368 * @priv: IR private data 369 * @regs: Timing register values to write 370 * @type: RC filter type (RC_FILTER_*) 371 * 372 * Write timing register values @regs to the hardware, taking into account the 373 * current filter which may impose restrictions on the length of the expected 374 * data. 375 */ 376 static void img_ir_write_timings(struct img_ir_priv *priv, 377 struct img_ir_timing_regvals *regs, 378 enum rc_filter_type type) 379 { 380 struct img_ir_priv_hw *hw = &priv->hw; 381 382 /* filter may be more restrictive to minlen, maxlen */ 383 u32 ft = regs->ft; 384 if (hw->flags & BIT(type)) 385 ft = img_ir_free_timing_dynamic(regs->ft, &hw->filters[type]); 386 /* write to registers */ 387 img_ir_write(priv, IMG_IR_LEAD_SYMB_TIMING, regs->ldr); 388 img_ir_write(priv, IMG_IR_S00_SYMB_TIMING, regs->s00); 389 img_ir_write(priv, IMG_IR_S01_SYMB_TIMING, regs->s01); 390 img_ir_write(priv, IMG_IR_S10_SYMB_TIMING, regs->s10); 391 img_ir_write(priv, IMG_IR_S11_SYMB_TIMING, regs->s11); 392 img_ir_write(priv, IMG_IR_FREE_SYMB_TIMING, ft); 393 dev_dbg(priv->dev, "timings: ldr=%#x, s=[%#x, %#x, %#x, %#x], ft=%#x\n", 394 regs->ldr, regs->s00, regs->s01, regs->s10, regs->s11, ft); 395 } 396 397 static void img_ir_write_filter(struct img_ir_priv *priv, 398 struct img_ir_filter *filter) 399 { 400 if (filter) { 401 dev_dbg(priv->dev, "IR filter=%016llx & %016llx\n", 402 (unsigned long long)filter->data, 403 (unsigned long long)filter->mask); 404 img_ir_write(priv, IMG_IR_IRQ_MSG_DATA_LW, (u32)filter->data); 405 img_ir_write(priv, IMG_IR_IRQ_MSG_DATA_UP, (u32)(filter->data 406 >> 32)); 407 img_ir_write(priv, IMG_IR_IRQ_MSG_MASK_LW, (u32)filter->mask); 408 img_ir_write(priv, IMG_IR_IRQ_MSG_MASK_UP, (u32)(filter->mask 409 >> 32)); 410 } else { 411 dev_dbg(priv->dev, "IR clearing filter\n"); 412 img_ir_write(priv, IMG_IR_IRQ_MSG_MASK_LW, 0); 413 img_ir_write(priv, IMG_IR_IRQ_MSG_MASK_UP, 0); 414 } 415 } 416 417 /* caller must have lock */ 418 static void _img_ir_set_filter(struct img_ir_priv *priv, 419 struct img_ir_filter *filter) 420 { 421 struct img_ir_priv_hw *hw = &priv->hw; 422 u32 irq_en, irq_on; 423 424 irq_en = img_ir_read(priv, IMG_IR_IRQ_ENABLE); 425 if (filter) { 426 /* Only use the match interrupt */ 427 hw->filters[RC_FILTER_NORMAL] = *filter; 428 hw->flags |= IMG_IR_F_FILTER; 429 irq_on = IMG_IR_IRQ_DATA_MATCH; 430 irq_en &= ~(IMG_IR_IRQ_DATA_VALID | IMG_IR_IRQ_DATA2_VALID); 431 } else { 432 /* Only use the valid interrupt */ 433 hw->flags &= ~IMG_IR_F_FILTER; 434 irq_en &= ~IMG_IR_IRQ_DATA_MATCH; 435 irq_on = IMG_IR_IRQ_DATA_VALID | IMG_IR_IRQ_DATA2_VALID; 436 } 437 irq_en |= irq_on; 438 439 img_ir_write_filter(priv, filter); 440 /* clear any interrupts we're enabling so we don't handle old ones */ 441 img_ir_write(priv, IMG_IR_IRQ_CLEAR, irq_on); 442 img_ir_write(priv, IMG_IR_IRQ_ENABLE, irq_en); 443 } 444 445 /* caller must have lock */ 446 static void _img_ir_set_wake_filter(struct img_ir_priv *priv, 447 struct img_ir_filter *filter) 448 { 449 struct img_ir_priv_hw *hw = &priv->hw; 450 if (filter) { 451 /* Enable wake, and copy filter for later */ 452 hw->filters[RC_FILTER_WAKEUP] = *filter; 453 hw->flags |= IMG_IR_F_WAKE; 454 } else { 455 /* Disable wake */ 456 hw->flags &= ~IMG_IR_F_WAKE; 457 } 458 } 459 460 /* Callback for setting scancode filter */ 461 static int img_ir_set_filter(struct rc_dev *dev, enum rc_filter_type type, 462 struct rc_scancode_filter *sc_filter) 463 { 464 struct img_ir_priv *priv = dev->priv; 465 struct img_ir_priv_hw *hw = &priv->hw; 466 struct img_ir_filter filter, *filter_ptr = &filter; 467 int ret = 0; 468 469 dev_dbg(priv->dev, "IR scancode %sfilter=%08x & %08x\n", 470 type == RC_FILTER_WAKEUP ? "wake " : "", 471 sc_filter->data, 472 sc_filter->mask); 473 474 spin_lock_irq(&priv->lock); 475 476 /* filtering can always be disabled */ 477 if (!sc_filter->mask) { 478 filter_ptr = NULL; 479 goto set_unlock; 480 } 481 482 /* current decoder must support scancode filtering */ 483 if (!hw->decoder || !hw->decoder->filter) { 484 ret = -EINVAL; 485 goto unlock; 486 } 487 488 /* convert scancode filter to raw filter */ 489 filter.minlen = 0; 490 filter.maxlen = ~0; 491 if (type == RC_FILTER_NORMAL) { 492 /* guess scancode from protocol */ 493 ret = hw->decoder->filter(sc_filter, &filter, 494 dev->enabled_protocols); 495 } else { 496 /* for wakeup user provided exact protocol variant */ 497 ret = hw->decoder->filter(sc_filter, &filter, 498 1ULL << dev->wakeup_protocol); 499 } 500 if (ret) 501 goto unlock; 502 dev_dbg(priv->dev, "IR raw %sfilter=%016llx & %016llx\n", 503 type == RC_FILTER_WAKEUP ? "wake " : "", 504 (unsigned long long)filter.data, 505 (unsigned long long)filter.mask); 506 507 set_unlock: 508 /* apply raw filters */ 509 switch (type) { 510 case RC_FILTER_NORMAL: 511 _img_ir_set_filter(priv, filter_ptr); 512 break; 513 case RC_FILTER_WAKEUP: 514 _img_ir_set_wake_filter(priv, filter_ptr); 515 break; 516 default: 517 ret = -EINVAL; 518 } 519 520 unlock: 521 spin_unlock_irq(&priv->lock); 522 return ret; 523 } 524 525 static int img_ir_set_normal_filter(struct rc_dev *dev, 526 struct rc_scancode_filter *sc_filter) 527 { 528 return img_ir_set_filter(dev, RC_FILTER_NORMAL, sc_filter); 529 } 530 531 static int img_ir_set_wakeup_filter(struct rc_dev *dev, 532 struct rc_scancode_filter *sc_filter) 533 { 534 return img_ir_set_filter(dev, RC_FILTER_WAKEUP, sc_filter); 535 } 536 537 /** 538 * img_ir_set_decoder() - Set the current decoder. 539 * @priv: IR private data. 540 * @decoder: Decoder to use with immediate effect. 541 * @proto: Protocol bitmap (or 0 to use decoder->type). 542 */ 543 static void img_ir_set_decoder(struct img_ir_priv *priv, 544 const struct img_ir_decoder *decoder, 545 u64 proto) 546 { 547 struct img_ir_priv_hw *hw = &priv->hw; 548 struct rc_dev *rdev = hw->rdev; 549 u32 ir_status, irq_en; 550 spin_lock_irq(&priv->lock); 551 552 /* 553 * First record that the protocol is being stopped so that the end timer 554 * isn't restarted while we're trying to stop it. 555 */ 556 hw->stopping = true; 557 558 /* 559 * Release the lock to stop the end timer, since the end timer handler 560 * acquires the lock and we don't want to deadlock waiting for it. 561 */ 562 spin_unlock_irq(&priv->lock); 563 del_timer_sync(&hw->end_timer); 564 del_timer_sync(&hw->suspend_timer); 565 spin_lock_irq(&priv->lock); 566 567 hw->stopping = false; 568 569 /* switch off and disable interrupts */ 570 img_ir_write(priv, IMG_IR_CONTROL, 0); 571 irq_en = img_ir_read(priv, IMG_IR_IRQ_ENABLE); 572 img_ir_write(priv, IMG_IR_IRQ_ENABLE, irq_en & IMG_IR_IRQ_EDGE); 573 img_ir_write(priv, IMG_IR_IRQ_CLEAR, IMG_IR_IRQ_ALL & ~IMG_IR_IRQ_EDGE); 574 575 /* ack any data already detected */ 576 ir_status = img_ir_read(priv, IMG_IR_STATUS); 577 if (ir_status & (IMG_IR_RXDVAL | IMG_IR_RXDVALD2)) { 578 ir_status &= ~(IMG_IR_RXDVAL | IMG_IR_RXDVALD2); 579 img_ir_write(priv, IMG_IR_STATUS, ir_status); 580 } 581 582 /* always read data to clear buffer if IR wakes the device */ 583 img_ir_read(priv, IMG_IR_DATA_LW); 584 img_ir_read(priv, IMG_IR_DATA_UP); 585 586 /* switch back to normal mode */ 587 hw->mode = IMG_IR_M_NORMAL; 588 589 /* clear the wakeup scancode filter */ 590 rdev->scancode_wakeup_filter.data = 0; 591 rdev->scancode_wakeup_filter.mask = 0; 592 rdev->wakeup_protocol = RC_TYPE_UNKNOWN; 593 594 /* clear raw filters */ 595 _img_ir_set_filter(priv, NULL); 596 _img_ir_set_wake_filter(priv, NULL); 597 598 /* clear the enabled protocols */ 599 hw->enabled_protocols = 0; 600 601 /* switch decoder */ 602 hw->decoder = decoder; 603 if (!decoder) 604 goto unlock; 605 606 /* set the enabled protocols */ 607 if (!proto) 608 proto = decoder->type; 609 hw->enabled_protocols = proto; 610 611 /* write the new timings */ 612 img_ir_decoder_convert(decoder, &hw->reg_timings, hw->clk_hz); 613 img_ir_write_timings(priv, &hw->reg_timings.timings, RC_FILTER_NORMAL); 614 615 /* set up and enable */ 616 img_ir_write(priv, IMG_IR_CONTROL, hw->reg_timings.ctrl); 617 618 619 unlock: 620 spin_unlock_irq(&priv->lock); 621 } 622 623 /** 624 * img_ir_decoder_compatable() - Find whether a decoder will work with a device. 625 * @priv: IR private data. 626 * @dec: Decoder to check. 627 * 628 * Returns: true if @dec is compatible with the device @priv refers to. 629 */ 630 static bool img_ir_decoder_compatible(struct img_ir_priv *priv, 631 const struct img_ir_decoder *dec) 632 { 633 unsigned int ct; 634 635 /* don't accept decoders using code types which aren't supported */ 636 ct = dec->control.code_type; 637 if (priv->hw.ct_quirks[ct] & IMG_IR_QUIRK_CODE_BROKEN) 638 return false; 639 640 return true; 641 } 642 643 /** 644 * img_ir_allowed_protos() - Get allowed protocols from global decoder list. 645 * @priv: IR private data. 646 * 647 * Returns: Mask of protocols supported by the device @priv refers to. 648 */ 649 static u64 img_ir_allowed_protos(struct img_ir_priv *priv) 650 { 651 u64 protos = 0; 652 struct img_ir_decoder **decp; 653 654 for (decp = img_ir_decoders; *decp; ++decp) { 655 const struct img_ir_decoder *dec = *decp; 656 if (img_ir_decoder_compatible(priv, dec)) 657 protos |= dec->type; 658 } 659 return protos; 660 } 661 662 /* Callback for changing protocol using sysfs */ 663 static int img_ir_change_protocol(struct rc_dev *dev, u64 *ir_type) 664 { 665 struct img_ir_priv *priv = dev->priv; 666 struct img_ir_priv_hw *hw = &priv->hw; 667 struct rc_dev *rdev = hw->rdev; 668 struct img_ir_decoder **decp; 669 u64 wakeup_protocols; 670 671 if (!*ir_type) { 672 /* disable all protocols */ 673 img_ir_set_decoder(priv, NULL, 0); 674 goto success; 675 } 676 for (decp = img_ir_decoders; *decp; ++decp) { 677 const struct img_ir_decoder *dec = *decp; 678 if (!img_ir_decoder_compatible(priv, dec)) 679 continue; 680 if (*ir_type & dec->type) { 681 *ir_type &= dec->type; 682 img_ir_set_decoder(priv, dec, *ir_type); 683 goto success; 684 } 685 } 686 return -EINVAL; 687 688 success: 689 /* 690 * Only allow matching wakeup protocols for now, and only if filtering 691 * is supported. 692 */ 693 wakeup_protocols = *ir_type; 694 if (!hw->decoder || !hw->decoder->filter) 695 wakeup_protocols = 0; 696 rdev->allowed_wakeup_protocols = wakeup_protocols; 697 return 0; 698 } 699 700 /* Changes ir-core protocol device attribute */ 701 static void img_ir_set_protocol(struct img_ir_priv *priv, u64 proto) 702 { 703 struct rc_dev *rdev = priv->hw.rdev; 704 705 spin_lock_irq(&rdev->rc_map.lock); 706 rdev->rc_map.rc_type = __ffs64(proto); 707 spin_unlock_irq(&rdev->rc_map.lock); 708 709 mutex_lock(&rdev->lock); 710 rdev->enabled_protocols = proto; 711 rdev->allowed_wakeup_protocols = proto; 712 mutex_unlock(&rdev->lock); 713 } 714 715 /* Set up IR decoders */ 716 static void img_ir_init_decoders(void) 717 { 718 struct img_ir_decoder **decp; 719 720 spin_lock(&img_ir_decoders_lock); 721 if (!img_ir_decoders_preprocessed) { 722 for (decp = img_ir_decoders; *decp; ++decp) 723 img_ir_decoder_preprocess(*decp); 724 img_ir_decoders_preprocessed = true; 725 } 726 spin_unlock(&img_ir_decoders_lock); 727 } 728 729 #ifdef CONFIG_PM_SLEEP 730 /** 731 * img_ir_enable_wake() - Switch to wake mode. 732 * @priv: IR private data. 733 * 734 * Returns: non-zero if the IR can wake the system. 735 */ 736 static int img_ir_enable_wake(struct img_ir_priv *priv) 737 { 738 struct img_ir_priv_hw *hw = &priv->hw; 739 int ret = 0; 740 741 spin_lock_irq(&priv->lock); 742 if (hw->flags & IMG_IR_F_WAKE) { 743 /* interrupt only on a match */ 744 hw->suspend_irqen = img_ir_read(priv, IMG_IR_IRQ_ENABLE); 745 img_ir_write(priv, IMG_IR_IRQ_ENABLE, IMG_IR_IRQ_DATA_MATCH); 746 img_ir_write_filter(priv, &hw->filters[RC_FILTER_WAKEUP]); 747 img_ir_write_timings(priv, &hw->reg_timings.timings, 748 RC_FILTER_WAKEUP); 749 hw->mode = IMG_IR_M_WAKE; 750 ret = 1; 751 } 752 spin_unlock_irq(&priv->lock); 753 return ret; 754 } 755 756 /** 757 * img_ir_disable_wake() - Switch out of wake mode. 758 * @priv: IR private data 759 * 760 * Returns: 1 if the hardware should be allowed to wake from a sleep state. 761 * 0 otherwise. 762 */ 763 static int img_ir_disable_wake(struct img_ir_priv *priv) 764 { 765 struct img_ir_priv_hw *hw = &priv->hw; 766 int ret = 0; 767 768 spin_lock_irq(&priv->lock); 769 if (hw->flags & IMG_IR_F_WAKE) { 770 /* restore normal filtering */ 771 if (hw->flags & IMG_IR_F_FILTER) { 772 img_ir_write(priv, IMG_IR_IRQ_ENABLE, 773 (hw->suspend_irqen & IMG_IR_IRQ_EDGE) | 774 IMG_IR_IRQ_DATA_MATCH); 775 img_ir_write_filter(priv, 776 &hw->filters[RC_FILTER_NORMAL]); 777 } else { 778 img_ir_write(priv, IMG_IR_IRQ_ENABLE, 779 (hw->suspend_irqen & IMG_IR_IRQ_EDGE) | 780 IMG_IR_IRQ_DATA_VALID | 781 IMG_IR_IRQ_DATA2_VALID); 782 img_ir_write_filter(priv, NULL); 783 } 784 img_ir_write_timings(priv, &hw->reg_timings.timings, 785 RC_FILTER_NORMAL); 786 hw->mode = IMG_IR_M_NORMAL; 787 ret = 1; 788 } 789 spin_unlock_irq(&priv->lock); 790 return ret; 791 } 792 #endif /* CONFIG_PM_SLEEP */ 793 794 /* lock must be held */ 795 static void img_ir_begin_repeat(struct img_ir_priv *priv) 796 { 797 struct img_ir_priv_hw *hw = &priv->hw; 798 if (hw->mode == IMG_IR_M_NORMAL) { 799 /* switch to repeat timings */ 800 img_ir_write(priv, IMG_IR_CONTROL, 0); 801 hw->mode = IMG_IR_M_REPEATING; 802 img_ir_write_timings(priv, &hw->reg_timings.rtimings, 803 RC_FILTER_NORMAL); 804 img_ir_write(priv, IMG_IR_CONTROL, hw->reg_timings.ctrl); 805 } 806 } 807 808 /* lock must be held */ 809 static void img_ir_end_repeat(struct img_ir_priv *priv) 810 { 811 struct img_ir_priv_hw *hw = &priv->hw; 812 if (hw->mode == IMG_IR_M_REPEATING) { 813 /* switch to normal timings */ 814 img_ir_write(priv, IMG_IR_CONTROL, 0); 815 hw->mode = IMG_IR_M_NORMAL; 816 img_ir_write_timings(priv, &hw->reg_timings.timings, 817 RC_FILTER_NORMAL); 818 img_ir_write(priv, IMG_IR_CONTROL, hw->reg_timings.ctrl); 819 } 820 } 821 822 /* lock must be held */ 823 static void img_ir_handle_data(struct img_ir_priv *priv, u32 len, u64 raw) 824 { 825 struct img_ir_priv_hw *hw = &priv->hw; 826 const struct img_ir_decoder *dec = hw->decoder; 827 int ret = IMG_IR_SCANCODE; 828 struct img_ir_scancode_req request; 829 830 request.protocol = RC_TYPE_UNKNOWN; 831 request.toggle = 0; 832 833 if (dec->scancode) 834 ret = dec->scancode(len, raw, hw->enabled_protocols, &request); 835 else if (len >= 32) 836 request.scancode = (u32)raw; 837 else if (len < 32) 838 request.scancode = (u32)raw & ((1 << len)-1); 839 dev_dbg(priv->dev, "data (%u bits) = %#llx\n", 840 len, (unsigned long long)raw); 841 if (ret == IMG_IR_SCANCODE) { 842 dev_dbg(priv->dev, "decoded scan code %#x, toggle %u\n", 843 request.scancode, request.toggle); 844 rc_keydown(hw->rdev, request.protocol, request.scancode, 845 request.toggle); 846 img_ir_end_repeat(priv); 847 } else if (ret == IMG_IR_REPEATCODE) { 848 if (hw->mode == IMG_IR_M_REPEATING) { 849 dev_dbg(priv->dev, "decoded repeat code\n"); 850 rc_repeat(hw->rdev); 851 } else { 852 dev_dbg(priv->dev, "decoded unexpected repeat code, ignoring\n"); 853 } 854 } else { 855 dev_dbg(priv->dev, "decode failed (%d)\n", ret); 856 return; 857 } 858 859 860 /* we mustn't update the end timer while trying to stop it */ 861 if (dec->repeat && !hw->stopping) { 862 unsigned long interval; 863 864 img_ir_begin_repeat(priv); 865 866 /* update timer, but allowing for 1/8th tolerance */ 867 interval = dec->repeat + (dec->repeat >> 3); 868 mod_timer(&hw->end_timer, 869 jiffies + msecs_to_jiffies(interval)); 870 } 871 } 872 873 /* timer function to end waiting for repeat. */ 874 static void img_ir_end_timer(unsigned long arg) 875 { 876 struct img_ir_priv *priv = (struct img_ir_priv *)arg; 877 878 spin_lock_irq(&priv->lock); 879 img_ir_end_repeat(priv); 880 spin_unlock_irq(&priv->lock); 881 } 882 883 /* 884 * Timer function to re-enable the current protocol after it had been 885 * cleared when invalid interrupts were generated due to a quirk in the 886 * img-ir decoder. 887 */ 888 static void img_ir_suspend_timer(unsigned long arg) 889 { 890 struct img_ir_priv *priv = (struct img_ir_priv *)arg; 891 892 spin_lock_irq(&priv->lock); 893 /* 894 * Don't overwrite enabled valid/match IRQs if they have already been 895 * changed by e.g. a filter change. 896 */ 897 if ((priv->hw.quirk_suspend_irq & IMG_IR_IRQ_EDGE) == 898 img_ir_read(priv, IMG_IR_IRQ_ENABLE)) 899 img_ir_write(priv, IMG_IR_IRQ_ENABLE, 900 priv->hw.quirk_suspend_irq); 901 /* enable */ 902 img_ir_write(priv, IMG_IR_CONTROL, priv->hw.reg_timings.ctrl); 903 spin_unlock_irq(&priv->lock); 904 } 905 906 #ifdef CONFIG_COMMON_CLK 907 static void img_ir_change_frequency(struct img_ir_priv *priv, 908 struct clk_notifier_data *change) 909 { 910 struct img_ir_priv_hw *hw = &priv->hw; 911 912 dev_dbg(priv->dev, "clk changed %lu HZ -> %lu HZ\n", 913 change->old_rate, change->new_rate); 914 915 spin_lock_irq(&priv->lock); 916 if (hw->clk_hz == change->new_rate) 917 goto unlock; 918 hw->clk_hz = change->new_rate; 919 /* refresh current timings */ 920 if (hw->decoder) { 921 img_ir_decoder_convert(hw->decoder, &hw->reg_timings, 922 hw->clk_hz); 923 switch (hw->mode) { 924 case IMG_IR_M_NORMAL: 925 img_ir_write_timings(priv, &hw->reg_timings.timings, 926 RC_FILTER_NORMAL); 927 break; 928 case IMG_IR_M_REPEATING: 929 img_ir_write_timings(priv, &hw->reg_timings.rtimings, 930 RC_FILTER_NORMAL); 931 break; 932 #ifdef CONFIG_PM_SLEEP 933 case IMG_IR_M_WAKE: 934 img_ir_write_timings(priv, &hw->reg_timings.timings, 935 RC_FILTER_WAKEUP); 936 break; 937 #endif 938 } 939 } 940 unlock: 941 spin_unlock_irq(&priv->lock); 942 } 943 944 static int img_ir_clk_notify(struct notifier_block *self, unsigned long action, 945 void *data) 946 { 947 struct img_ir_priv *priv = container_of(self, struct img_ir_priv, 948 hw.clk_nb); 949 switch (action) { 950 case POST_RATE_CHANGE: 951 img_ir_change_frequency(priv, data); 952 break; 953 default: 954 break; 955 } 956 return NOTIFY_OK; 957 } 958 #endif /* CONFIG_COMMON_CLK */ 959 960 /* called with priv->lock held */ 961 void img_ir_isr_hw(struct img_ir_priv *priv, u32 irq_status) 962 { 963 struct img_ir_priv_hw *hw = &priv->hw; 964 u32 ir_status, len, lw, up; 965 unsigned int ct; 966 967 /* use the current decoder */ 968 if (!hw->decoder) 969 return; 970 971 ct = hw->decoder->control.code_type; 972 973 ir_status = img_ir_read(priv, IMG_IR_STATUS); 974 if (!(ir_status & (IMG_IR_RXDVAL | IMG_IR_RXDVALD2))) { 975 if (!(priv->hw.ct_quirks[ct] & IMG_IR_QUIRK_CODE_IRQ) || 976 hw->stopping) 977 return; 978 /* 979 * The below functionality is added as a work around to stop 980 * multiple Interrupts generated when an incomplete IR code is 981 * received by the decoder. 982 * The decoder generates rapid interrupts without actually 983 * having received any new data. After a single interrupt it's 984 * expected to clear up, but instead multiple interrupts are 985 * rapidly generated. only way to get out of this loop is to 986 * reset the control register after a short delay. 987 */ 988 img_ir_write(priv, IMG_IR_CONTROL, 0); 989 hw->quirk_suspend_irq = img_ir_read(priv, IMG_IR_IRQ_ENABLE); 990 img_ir_write(priv, IMG_IR_IRQ_ENABLE, 991 hw->quirk_suspend_irq & IMG_IR_IRQ_EDGE); 992 993 /* Timer activated to re-enable the protocol. */ 994 mod_timer(&hw->suspend_timer, 995 jiffies + msecs_to_jiffies(5)); 996 return; 997 } 998 ir_status &= ~(IMG_IR_RXDVAL | IMG_IR_RXDVALD2); 999 img_ir_write(priv, IMG_IR_STATUS, ir_status); 1000 1001 len = (ir_status & IMG_IR_RXDLEN) >> IMG_IR_RXDLEN_SHIFT; 1002 /* some versions report wrong length for certain code types */ 1003 if (hw->ct_quirks[ct] & IMG_IR_QUIRK_CODE_LEN_INCR) 1004 ++len; 1005 1006 lw = img_ir_read(priv, IMG_IR_DATA_LW); 1007 up = img_ir_read(priv, IMG_IR_DATA_UP); 1008 img_ir_handle_data(priv, len, (u64)up << 32 | lw); 1009 } 1010 1011 void img_ir_setup_hw(struct img_ir_priv *priv) 1012 { 1013 struct img_ir_decoder **decp; 1014 1015 if (!priv->hw.rdev) 1016 return; 1017 1018 /* Use the first available decoder (or disable stuff if NULL) */ 1019 for (decp = img_ir_decoders; *decp; ++decp) { 1020 const struct img_ir_decoder *dec = *decp; 1021 if (img_ir_decoder_compatible(priv, dec)) { 1022 img_ir_set_protocol(priv, dec->type); 1023 img_ir_set_decoder(priv, dec, 0); 1024 return; 1025 } 1026 } 1027 img_ir_set_decoder(priv, NULL, 0); 1028 } 1029 1030 /** 1031 * img_ir_probe_hw_caps() - Probe capabilities of the hardware. 1032 * @priv: IR private data. 1033 */ 1034 static void img_ir_probe_hw_caps(struct img_ir_priv *priv) 1035 { 1036 struct img_ir_priv_hw *hw = &priv->hw; 1037 /* 1038 * When a version of the block becomes available without these quirks, 1039 * they'll have to depend on the core revision. 1040 */ 1041 hw->ct_quirks[IMG_IR_CODETYPE_PULSELEN] 1042 |= IMG_IR_QUIRK_CODE_LEN_INCR; 1043 hw->ct_quirks[IMG_IR_CODETYPE_BIPHASE] 1044 |= IMG_IR_QUIRK_CODE_IRQ; 1045 hw->ct_quirks[IMG_IR_CODETYPE_2BITPULSEPOS] 1046 |= IMG_IR_QUIRK_CODE_BROKEN; 1047 } 1048 1049 int img_ir_probe_hw(struct img_ir_priv *priv) 1050 { 1051 struct img_ir_priv_hw *hw = &priv->hw; 1052 struct rc_dev *rdev; 1053 int error; 1054 1055 /* Ensure hardware decoders have been preprocessed */ 1056 img_ir_init_decoders(); 1057 1058 /* Probe hardware capabilities */ 1059 img_ir_probe_hw_caps(priv); 1060 1061 /* Set up the end timer */ 1062 setup_timer(&hw->end_timer, img_ir_end_timer, (unsigned long)priv); 1063 setup_timer(&hw->suspend_timer, img_ir_suspend_timer, 1064 (unsigned long)priv); 1065 1066 /* Register a clock notifier */ 1067 if (!IS_ERR(priv->clk)) { 1068 hw->clk_hz = clk_get_rate(priv->clk); 1069 #ifdef CONFIG_COMMON_CLK 1070 hw->clk_nb.notifier_call = img_ir_clk_notify; 1071 error = clk_notifier_register(priv->clk, &hw->clk_nb); 1072 if (error) 1073 dev_warn(priv->dev, 1074 "failed to register clock notifier\n"); 1075 #endif 1076 } else { 1077 hw->clk_hz = 32768; 1078 } 1079 1080 /* Allocate hardware decoder */ 1081 hw->rdev = rdev = rc_allocate_device(RC_DRIVER_SCANCODE); 1082 if (!rdev) { 1083 dev_err(priv->dev, "cannot allocate input device\n"); 1084 error = -ENOMEM; 1085 goto err_alloc_rc; 1086 } 1087 rdev->priv = priv; 1088 rdev->map_name = RC_MAP_EMPTY; 1089 rdev->allowed_protocols = img_ir_allowed_protos(priv); 1090 rdev->input_name = "IMG Infrared Decoder"; 1091 rdev->s_filter = img_ir_set_normal_filter; 1092 rdev->s_wakeup_filter = img_ir_set_wakeup_filter; 1093 1094 /* Register hardware decoder */ 1095 error = rc_register_device(rdev); 1096 if (error) { 1097 dev_err(priv->dev, "failed to register IR input device\n"); 1098 goto err_register_rc; 1099 } 1100 1101 /* 1102 * Set this after rc_register_device as no protocols have been 1103 * registered yet. 1104 */ 1105 rdev->change_protocol = img_ir_change_protocol; 1106 1107 device_init_wakeup(priv->dev, 1); 1108 1109 return 0; 1110 1111 err_register_rc: 1112 img_ir_set_decoder(priv, NULL, 0); 1113 hw->rdev = NULL; 1114 rc_free_device(rdev); 1115 err_alloc_rc: 1116 #ifdef CONFIG_COMMON_CLK 1117 if (!IS_ERR(priv->clk)) 1118 clk_notifier_unregister(priv->clk, &hw->clk_nb); 1119 #endif 1120 return error; 1121 } 1122 1123 void img_ir_remove_hw(struct img_ir_priv *priv) 1124 { 1125 struct img_ir_priv_hw *hw = &priv->hw; 1126 struct rc_dev *rdev = hw->rdev; 1127 if (!rdev) 1128 return; 1129 img_ir_set_decoder(priv, NULL, 0); 1130 hw->rdev = NULL; 1131 rc_unregister_device(rdev); 1132 #ifdef CONFIG_COMMON_CLK 1133 if (!IS_ERR(priv->clk)) 1134 clk_notifier_unregister(priv->clk, &hw->clk_nb); 1135 #endif 1136 } 1137 1138 #ifdef CONFIG_PM_SLEEP 1139 int img_ir_suspend(struct device *dev) 1140 { 1141 struct img_ir_priv *priv = dev_get_drvdata(dev); 1142 1143 if (device_may_wakeup(dev) && img_ir_enable_wake(priv)) 1144 enable_irq_wake(priv->irq); 1145 return 0; 1146 } 1147 1148 int img_ir_resume(struct device *dev) 1149 { 1150 struct img_ir_priv *priv = dev_get_drvdata(dev); 1151 1152 if (device_may_wakeup(dev) && img_ir_disable_wake(priv)) 1153 disable_irq_wake(priv->irq); 1154 return 0; 1155 } 1156 #endif /* CONFIG_PM_SLEEP */ 1157