1 /* 2 * ImgTec IR Hardware Decoder found in PowerDown Controller. 3 * 4 * Copyright 2010-2014 Imagination Technologies Ltd. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by the 8 * Free Software Foundation; either version 2 of the License, or (at your 9 * option) any later version. 10 * 11 * This ties into the input subsystem using the RC-core. Protocol support is 12 * provided in separate modules which provide the parameters and scancode 13 * translation functions to set up the hardware decoder and interpret the 14 * resulting input. 15 */ 16 17 #include <linux/bitops.h> 18 #include <linux/clk.h> 19 #include <linux/interrupt.h> 20 #include <linux/spinlock.h> 21 #include <linux/timer.h> 22 #include <media/rc-core.h> 23 #include "img-ir.h" 24 25 /* Decoders lock (only modified to preprocess them) */ 26 static DEFINE_SPINLOCK(img_ir_decoders_lock); 27 28 static bool img_ir_decoders_preprocessed; 29 static struct img_ir_decoder *img_ir_decoders[] = { 30 #ifdef CONFIG_IR_IMG_NEC 31 &img_ir_nec, 32 #endif 33 #ifdef CONFIG_IR_IMG_JVC 34 &img_ir_jvc, 35 #endif 36 #ifdef CONFIG_IR_IMG_SONY 37 &img_ir_sony, 38 #endif 39 #ifdef CONFIG_IR_IMG_SHARP 40 &img_ir_sharp, 41 #endif 42 #ifdef CONFIG_IR_IMG_SANYO 43 &img_ir_sanyo, 44 #endif 45 NULL 46 }; 47 48 #define IMG_IR_F_FILTER BIT(RC_FILTER_NORMAL) /* enable filtering */ 49 #define IMG_IR_F_WAKE BIT(RC_FILTER_WAKEUP) /* enable waking */ 50 51 /* code type quirks */ 52 53 #define IMG_IR_QUIRK_CODE_BROKEN 0x1 /* Decode is broken */ 54 #define IMG_IR_QUIRK_CODE_LEN_INCR 0x2 /* Bit length needs increment */ 55 56 /* functions for preprocessing timings, ensuring max is set */ 57 58 static void img_ir_timing_preprocess(struct img_ir_timing_range *range, 59 unsigned int unit) 60 { 61 if (range->max < range->min) 62 range->max = range->min; 63 if (unit) { 64 /* multiply by unit and convert to microseconds */ 65 range->min = (range->min*unit)/1000; 66 range->max = (range->max*unit + 999)/1000; /* round up */ 67 } 68 } 69 70 static void img_ir_symbol_timing_preprocess(struct img_ir_symbol_timing *timing, 71 unsigned int unit) 72 { 73 img_ir_timing_preprocess(&timing->pulse, unit); 74 img_ir_timing_preprocess(&timing->space, unit); 75 } 76 77 static void img_ir_timings_preprocess(struct img_ir_timings *timings, 78 unsigned int unit) 79 { 80 img_ir_symbol_timing_preprocess(&timings->ldr, unit); 81 img_ir_symbol_timing_preprocess(&timings->s00, unit); 82 img_ir_symbol_timing_preprocess(&timings->s01, unit); 83 img_ir_symbol_timing_preprocess(&timings->s10, unit); 84 img_ir_symbol_timing_preprocess(&timings->s11, unit); 85 /* default s10 and s11 to s00 and s01 if no leader */ 86 if (unit) 87 /* multiply by unit and convert to microseconds (round up) */ 88 timings->ft.ft_min = (timings->ft.ft_min*unit + 999)/1000; 89 } 90 91 /* functions for filling empty fields with defaults */ 92 93 static void img_ir_timing_defaults(struct img_ir_timing_range *range, 94 struct img_ir_timing_range *defaults) 95 { 96 if (!range->min) 97 range->min = defaults->min; 98 if (!range->max) 99 range->max = defaults->max; 100 } 101 102 static void img_ir_symbol_timing_defaults(struct img_ir_symbol_timing *timing, 103 struct img_ir_symbol_timing *defaults) 104 { 105 img_ir_timing_defaults(&timing->pulse, &defaults->pulse); 106 img_ir_timing_defaults(&timing->space, &defaults->space); 107 } 108 109 static void img_ir_timings_defaults(struct img_ir_timings *timings, 110 struct img_ir_timings *defaults) 111 { 112 img_ir_symbol_timing_defaults(&timings->ldr, &defaults->ldr); 113 img_ir_symbol_timing_defaults(&timings->s00, &defaults->s00); 114 img_ir_symbol_timing_defaults(&timings->s01, &defaults->s01); 115 img_ir_symbol_timing_defaults(&timings->s10, &defaults->s10); 116 img_ir_symbol_timing_defaults(&timings->s11, &defaults->s11); 117 if (!timings->ft.ft_min) 118 timings->ft.ft_min = defaults->ft.ft_min; 119 } 120 121 /* functions for converting timings to register values */ 122 123 /** 124 * img_ir_control() - Convert control struct to control register value. 125 * @control: Control data 126 * 127 * Returns: The control register value equivalent of @control. 128 */ 129 static u32 img_ir_control(const struct img_ir_control *control) 130 { 131 u32 ctrl = control->code_type << IMG_IR_CODETYPE_SHIFT; 132 if (control->decoden) 133 ctrl |= IMG_IR_DECODEN; 134 if (control->hdrtog) 135 ctrl |= IMG_IR_HDRTOG; 136 if (control->ldrdec) 137 ctrl |= IMG_IR_LDRDEC; 138 if (control->decodinpol) 139 ctrl |= IMG_IR_DECODINPOL; 140 if (control->bitorien) 141 ctrl |= IMG_IR_BITORIEN; 142 if (control->d1validsel) 143 ctrl |= IMG_IR_D1VALIDSEL; 144 if (control->bitinv) 145 ctrl |= IMG_IR_BITINV; 146 if (control->decodend2) 147 ctrl |= IMG_IR_DECODEND2; 148 if (control->bitoriend2) 149 ctrl |= IMG_IR_BITORIEND2; 150 if (control->bitinvd2) 151 ctrl |= IMG_IR_BITINVD2; 152 return ctrl; 153 } 154 155 /** 156 * img_ir_timing_range_convert() - Convert microsecond range. 157 * @out: Output timing range in clock cycles with a shift. 158 * @in: Input timing range in microseconds. 159 * @tolerance: Tolerance as a fraction of 128 (roughly percent). 160 * @clock_hz: IR clock rate in Hz. 161 * @shift: Shift of output units. 162 * 163 * Converts min and max from microseconds to IR clock cycles, applies a 164 * tolerance, and shifts for the register, rounding in the right direction. 165 * Note that in and out can safely be the same object. 166 */ 167 static void img_ir_timing_range_convert(struct img_ir_timing_range *out, 168 const struct img_ir_timing_range *in, 169 unsigned int tolerance, 170 unsigned long clock_hz, 171 unsigned int shift) 172 { 173 unsigned int min = in->min; 174 unsigned int max = in->max; 175 /* add a tolerance */ 176 min = min - (min*tolerance >> 7); 177 max = max + (max*tolerance >> 7); 178 /* convert from microseconds into clock cycles */ 179 min = min*clock_hz / 1000000; 180 max = (max*clock_hz + 999999) / 1000000; /* round up */ 181 /* apply shift and copy to output */ 182 out->min = min >> shift; 183 out->max = (max + ((1 << shift) - 1)) >> shift; /* round up */ 184 } 185 186 /** 187 * img_ir_symbol_timing() - Convert symbol timing struct to register value. 188 * @timing: Symbol timing data 189 * @tolerance: Timing tolerance where 0-128 represents 0-100% 190 * @clock_hz: Frequency of source clock in Hz 191 * @pd_shift: Shift to apply to symbol period 192 * @w_shift: Shift to apply to symbol width 193 * 194 * Returns: Symbol timing register value based on arguments. 195 */ 196 static u32 img_ir_symbol_timing(const struct img_ir_symbol_timing *timing, 197 unsigned int tolerance, 198 unsigned long clock_hz, 199 unsigned int pd_shift, 200 unsigned int w_shift) 201 { 202 struct img_ir_timing_range hw_pulse, hw_period; 203 /* we calculate period in hw_period, then convert in place */ 204 hw_period.min = timing->pulse.min + timing->space.min; 205 hw_period.max = timing->pulse.max + timing->space.max; 206 img_ir_timing_range_convert(&hw_period, &hw_period, 207 tolerance, clock_hz, pd_shift); 208 img_ir_timing_range_convert(&hw_pulse, &timing->pulse, 209 tolerance, clock_hz, w_shift); 210 /* construct register value */ 211 return (hw_period.max << IMG_IR_PD_MAX_SHIFT) | 212 (hw_period.min << IMG_IR_PD_MIN_SHIFT) | 213 (hw_pulse.max << IMG_IR_W_MAX_SHIFT) | 214 (hw_pulse.min << IMG_IR_W_MIN_SHIFT); 215 } 216 217 /** 218 * img_ir_free_timing() - Convert free time timing struct to register value. 219 * @timing: Free symbol timing data 220 * @clock_hz: Source clock frequency in Hz 221 * 222 * Returns: Free symbol timing register value. 223 */ 224 static u32 img_ir_free_timing(const struct img_ir_free_timing *timing, 225 unsigned long clock_hz) 226 { 227 unsigned int minlen, maxlen, ft_min; 228 /* minlen is only 5 bits, and round minlen to multiple of 2 */ 229 if (timing->minlen < 30) 230 minlen = timing->minlen & -2; 231 else 232 minlen = 30; 233 /* maxlen has maximum value of 48, and round maxlen to multiple of 2 */ 234 if (timing->maxlen < 48) 235 maxlen = (timing->maxlen + 1) & -2; 236 else 237 maxlen = 48; 238 /* convert and shift ft_min, rounding upwards */ 239 ft_min = (timing->ft_min*clock_hz + 999999) / 1000000; 240 ft_min = (ft_min + 7) >> 3; 241 /* construct register value */ 242 return (maxlen << IMG_IR_MAXLEN_SHIFT) | 243 (minlen << IMG_IR_MINLEN_SHIFT) | 244 (ft_min << IMG_IR_FT_MIN_SHIFT); 245 } 246 247 /** 248 * img_ir_free_timing_dynamic() - Update free time register value. 249 * @st_ft: Static free time register value from img_ir_free_timing. 250 * @filter: Current filter which may additionally restrict min/max len. 251 * 252 * Returns: Updated free time register value based on the current filter. 253 */ 254 static u32 img_ir_free_timing_dynamic(u32 st_ft, struct img_ir_filter *filter) 255 { 256 unsigned int minlen, maxlen, newminlen, newmaxlen; 257 258 /* round minlen, maxlen to multiple of 2 */ 259 newminlen = filter->minlen & -2; 260 newmaxlen = (filter->maxlen + 1) & -2; 261 /* extract min/max len from register */ 262 minlen = (st_ft & IMG_IR_MINLEN) >> IMG_IR_MINLEN_SHIFT; 263 maxlen = (st_ft & IMG_IR_MAXLEN) >> IMG_IR_MAXLEN_SHIFT; 264 /* if the new values are more restrictive, update the register value */ 265 if (newminlen > minlen) { 266 st_ft &= ~IMG_IR_MINLEN; 267 st_ft |= newminlen << IMG_IR_MINLEN_SHIFT; 268 } 269 if (newmaxlen < maxlen) { 270 st_ft &= ~IMG_IR_MAXLEN; 271 st_ft |= newmaxlen << IMG_IR_MAXLEN_SHIFT; 272 } 273 return st_ft; 274 } 275 276 /** 277 * img_ir_timings_convert() - Convert timings to register values 278 * @regs: Output timing register values 279 * @timings: Input timing data 280 * @tolerance: Timing tolerance where 0-128 represents 0-100% 281 * @clock_hz: Source clock frequency in Hz 282 */ 283 static void img_ir_timings_convert(struct img_ir_timing_regvals *regs, 284 const struct img_ir_timings *timings, 285 unsigned int tolerance, 286 unsigned int clock_hz) 287 { 288 /* leader symbol timings are divided by 16 */ 289 regs->ldr = img_ir_symbol_timing(&timings->ldr, tolerance, clock_hz, 290 4, 4); 291 /* other symbol timings, pd fields only are divided by 2 */ 292 regs->s00 = img_ir_symbol_timing(&timings->s00, tolerance, clock_hz, 293 1, 0); 294 regs->s01 = img_ir_symbol_timing(&timings->s01, tolerance, clock_hz, 295 1, 0); 296 regs->s10 = img_ir_symbol_timing(&timings->s10, tolerance, clock_hz, 297 1, 0); 298 regs->s11 = img_ir_symbol_timing(&timings->s11, tolerance, clock_hz, 299 1, 0); 300 regs->ft = img_ir_free_timing(&timings->ft, clock_hz); 301 } 302 303 /** 304 * img_ir_decoder_preprocess() - Preprocess timings in decoder. 305 * @decoder: Decoder to be preprocessed. 306 * 307 * Ensures that the symbol timing ranges are valid with respect to ordering, and 308 * does some fixed conversion on them. 309 */ 310 static void img_ir_decoder_preprocess(struct img_ir_decoder *decoder) 311 { 312 /* default tolerance */ 313 if (!decoder->tolerance) 314 decoder->tolerance = 10; /* percent */ 315 /* and convert tolerance to fraction out of 128 */ 316 decoder->tolerance = decoder->tolerance * 128 / 100; 317 318 /* fill in implicit fields */ 319 img_ir_timings_preprocess(&decoder->timings, decoder->unit); 320 321 /* do the same for repeat timings if applicable */ 322 if (decoder->repeat) { 323 img_ir_timings_preprocess(&decoder->rtimings, decoder->unit); 324 img_ir_timings_defaults(&decoder->rtimings, &decoder->timings); 325 } 326 } 327 328 /** 329 * img_ir_decoder_convert() - Generate internal timings in decoder. 330 * @decoder: Decoder to be converted to internal timings. 331 * @timings: Timing register values. 332 * @clock_hz: IR clock rate in Hz. 333 * 334 * Fills out the repeat timings and timing register values for a specific clock 335 * rate. 336 */ 337 static void img_ir_decoder_convert(const struct img_ir_decoder *decoder, 338 struct img_ir_reg_timings *reg_timings, 339 unsigned int clock_hz) 340 { 341 /* calculate control value */ 342 reg_timings->ctrl = img_ir_control(&decoder->control); 343 344 /* fill in implicit fields and calculate register values */ 345 img_ir_timings_convert(®_timings->timings, &decoder->timings, 346 decoder->tolerance, clock_hz); 347 348 /* do the same for repeat timings if applicable */ 349 if (decoder->repeat) 350 img_ir_timings_convert(®_timings->rtimings, 351 &decoder->rtimings, decoder->tolerance, 352 clock_hz); 353 } 354 355 /** 356 * img_ir_write_timings() - Write timings to the hardware now 357 * @priv: IR private data 358 * @regs: Timing register values to write 359 * @type: RC filter type (RC_FILTER_*) 360 * 361 * Write timing register values @regs to the hardware, taking into account the 362 * current filter which may impose restrictions on the length of the expected 363 * data. 364 */ 365 static void img_ir_write_timings(struct img_ir_priv *priv, 366 struct img_ir_timing_regvals *regs, 367 enum rc_filter_type type) 368 { 369 struct img_ir_priv_hw *hw = &priv->hw; 370 371 /* filter may be more restrictive to minlen, maxlen */ 372 u32 ft = regs->ft; 373 if (hw->flags & BIT(type)) 374 ft = img_ir_free_timing_dynamic(regs->ft, &hw->filters[type]); 375 /* write to registers */ 376 img_ir_write(priv, IMG_IR_LEAD_SYMB_TIMING, regs->ldr); 377 img_ir_write(priv, IMG_IR_S00_SYMB_TIMING, regs->s00); 378 img_ir_write(priv, IMG_IR_S01_SYMB_TIMING, regs->s01); 379 img_ir_write(priv, IMG_IR_S10_SYMB_TIMING, regs->s10); 380 img_ir_write(priv, IMG_IR_S11_SYMB_TIMING, regs->s11); 381 img_ir_write(priv, IMG_IR_FREE_SYMB_TIMING, ft); 382 dev_dbg(priv->dev, "timings: ldr=%#x, s=[%#x, %#x, %#x, %#x], ft=%#x\n", 383 regs->ldr, regs->s00, regs->s01, regs->s10, regs->s11, ft); 384 } 385 386 static void img_ir_write_filter(struct img_ir_priv *priv, 387 struct img_ir_filter *filter) 388 { 389 if (filter) { 390 dev_dbg(priv->dev, "IR filter=%016llx & %016llx\n", 391 (unsigned long long)filter->data, 392 (unsigned long long)filter->mask); 393 img_ir_write(priv, IMG_IR_IRQ_MSG_DATA_LW, (u32)filter->data); 394 img_ir_write(priv, IMG_IR_IRQ_MSG_DATA_UP, (u32)(filter->data 395 >> 32)); 396 img_ir_write(priv, IMG_IR_IRQ_MSG_MASK_LW, (u32)filter->mask); 397 img_ir_write(priv, IMG_IR_IRQ_MSG_MASK_UP, (u32)(filter->mask 398 >> 32)); 399 } else { 400 dev_dbg(priv->dev, "IR clearing filter\n"); 401 img_ir_write(priv, IMG_IR_IRQ_MSG_MASK_LW, 0); 402 img_ir_write(priv, IMG_IR_IRQ_MSG_MASK_UP, 0); 403 } 404 } 405 406 /* caller must have lock */ 407 static void _img_ir_set_filter(struct img_ir_priv *priv, 408 struct img_ir_filter *filter) 409 { 410 struct img_ir_priv_hw *hw = &priv->hw; 411 u32 irq_en, irq_on; 412 413 irq_en = img_ir_read(priv, IMG_IR_IRQ_ENABLE); 414 if (filter) { 415 /* Only use the match interrupt */ 416 hw->filters[RC_FILTER_NORMAL] = *filter; 417 hw->flags |= IMG_IR_F_FILTER; 418 irq_on = IMG_IR_IRQ_DATA_MATCH; 419 irq_en &= ~(IMG_IR_IRQ_DATA_VALID | IMG_IR_IRQ_DATA2_VALID); 420 } else { 421 /* Only use the valid interrupt */ 422 hw->flags &= ~IMG_IR_F_FILTER; 423 irq_en &= ~IMG_IR_IRQ_DATA_MATCH; 424 irq_on = IMG_IR_IRQ_DATA_VALID | IMG_IR_IRQ_DATA2_VALID; 425 } 426 irq_en |= irq_on; 427 428 img_ir_write_filter(priv, filter); 429 /* clear any interrupts we're enabling so we don't handle old ones */ 430 img_ir_write(priv, IMG_IR_IRQ_CLEAR, irq_on); 431 img_ir_write(priv, IMG_IR_IRQ_ENABLE, irq_en); 432 } 433 434 /* caller must have lock */ 435 static void _img_ir_set_wake_filter(struct img_ir_priv *priv, 436 struct img_ir_filter *filter) 437 { 438 struct img_ir_priv_hw *hw = &priv->hw; 439 if (filter) { 440 /* Enable wake, and copy filter for later */ 441 hw->filters[RC_FILTER_WAKEUP] = *filter; 442 hw->flags |= IMG_IR_F_WAKE; 443 } else { 444 /* Disable wake */ 445 hw->flags &= ~IMG_IR_F_WAKE; 446 } 447 } 448 449 /* Callback for setting scancode filter */ 450 static int img_ir_set_filter(struct rc_dev *dev, enum rc_filter_type type, 451 struct rc_scancode_filter *sc_filter) 452 { 453 struct img_ir_priv *priv = dev->priv; 454 struct img_ir_priv_hw *hw = &priv->hw; 455 struct img_ir_filter filter, *filter_ptr = &filter; 456 int ret = 0; 457 458 dev_dbg(priv->dev, "IR scancode %sfilter=%08x & %08x\n", 459 type == RC_FILTER_WAKEUP ? "wake " : "", 460 sc_filter->data, 461 sc_filter->mask); 462 463 spin_lock_irq(&priv->lock); 464 465 /* filtering can always be disabled */ 466 if (!sc_filter->mask) { 467 filter_ptr = NULL; 468 goto set_unlock; 469 } 470 471 /* current decoder must support scancode filtering */ 472 if (!hw->decoder || !hw->decoder->filter) { 473 ret = -EINVAL; 474 goto unlock; 475 } 476 477 /* convert scancode filter to raw filter */ 478 filter.minlen = 0; 479 filter.maxlen = ~0; 480 ret = hw->decoder->filter(sc_filter, &filter, hw->enabled_protocols); 481 if (ret) 482 goto unlock; 483 dev_dbg(priv->dev, "IR raw %sfilter=%016llx & %016llx\n", 484 type == RC_FILTER_WAKEUP ? "wake " : "", 485 (unsigned long long)filter.data, 486 (unsigned long long)filter.mask); 487 488 set_unlock: 489 /* apply raw filters */ 490 switch (type) { 491 case RC_FILTER_NORMAL: 492 _img_ir_set_filter(priv, filter_ptr); 493 break; 494 case RC_FILTER_WAKEUP: 495 _img_ir_set_wake_filter(priv, filter_ptr); 496 break; 497 default: 498 ret = -EINVAL; 499 } 500 501 unlock: 502 spin_unlock_irq(&priv->lock); 503 return ret; 504 } 505 506 static int img_ir_set_normal_filter(struct rc_dev *dev, 507 struct rc_scancode_filter *sc_filter) 508 { 509 return img_ir_set_filter(dev, RC_FILTER_NORMAL, sc_filter); 510 } 511 512 static int img_ir_set_wakeup_filter(struct rc_dev *dev, 513 struct rc_scancode_filter *sc_filter) 514 { 515 return img_ir_set_filter(dev, RC_FILTER_WAKEUP, sc_filter); 516 } 517 518 /** 519 * img_ir_set_decoder() - Set the current decoder. 520 * @priv: IR private data. 521 * @decoder: Decoder to use with immediate effect. 522 * @proto: Protocol bitmap (or 0 to use decoder->type). 523 */ 524 static void img_ir_set_decoder(struct img_ir_priv *priv, 525 const struct img_ir_decoder *decoder, 526 u64 proto) 527 { 528 struct img_ir_priv_hw *hw = &priv->hw; 529 struct rc_dev *rdev = hw->rdev; 530 u32 ir_status, irq_en; 531 spin_lock_irq(&priv->lock); 532 533 /* 534 * First record that the protocol is being stopped so that the end timer 535 * isn't restarted while we're trying to stop it. 536 */ 537 hw->stopping = true; 538 539 /* 540 * Release the lock to stop the end timer, since the end timer handler 541 * acquires the lock and we don't want to deadlock waiting for it. 542 */ 543 spin_unlock_irq(&priv->lock); 544 del_timer_sync(&hw->end_timer); 545 spin_lock_irq(&priv->lock); 546 547 hw->stopping = false; 548 549 /* switch off and disable interrupts */ 550 img_ir_write(priv, IMG_IR_CONTROL, 0); 551 irq_en = img_ir_read(priv, IMG_IR_IRQ_ENABLE); 552 img_ir_write(priv, IMG_IR_IRQ_ENABLE, irq_en & IMG_IR_IRQ_EDGE); 553 img_ir_write(priv, IMG_IR_IRQ_CLEAR, IMG_IR_IRQ_ALL & ~IMG_IR_IRQ_EDGE); 554 555 /* ack any data already detected */ 556 ir_status = img_ir_read(priv, IMG_IR_STATUS); 557 if (ir_status & (IMG_IR_RXDVAL | IMG_IR_RXDVALD2)) { 558 ir_status &= ~(IMG_IR_RXDVAL | IMG_IR_RXDVALD2); 559 img_ir_write(priv, IMG_IR_STATUS, ir_status); 560 } 561 562 /* always read data to clear buffer if IR wakes the device */ 563 img_ir_read(priv, IMG_IR_DATA_LW); 564 img_ir_read(priv, IMG_IR_DATA_UP); 565 566 /* switch back to normal mode */ 567 hw->mode = IMG_IR_M_NORMAL; 568 569 /* clear the wakeup scancode filter */ 570 rdev->scancode_wakeup_filter.data = 0; 571 rdev->scancode_wakeup_filter.mask = 0; 572 573 /* clear raw filters */ 574 _img_ir_set_filter(priv, NULL); 575 _img_ir_set_wake_filter(priv, NULL); 576 577 /* clear the enabled protocols */ 578 hw->enabled_protocols = 0; 579 580 /* switch decoder */ 581 hw->decoder = decoder; 582 if (!decoder) 583 goto unlock; 584 585 /* set the enabled protocols */ 586 if (!proto) 587 proto = decoder->type; 588 hw->enabled_protocols = proto; 589 590 /* write the new timings */ 591 img_ir_decoder_convert(decoder, &hw->reg_timings, hw->clk_hz); 592 img_ir_write_timings(priv, &hw->reg_timings.timings, RC_FILTER_NORMAL); 593 594 /* set up and enable */ 595 img_ir_write(priv, IMG_IR_CONTROL, hw->reg_timings.ctrl); 596 597 598 unlock: 599 spin_unlock_irq(&priv->lock); 600 } 601 602 /** 603 * img_ir_decoder_compatable() - Find whether a decoder will work with a device. 604 * @priv: IR private data. 605 * @dec: Decoder to check. 606 * 607 * Returns: true if @dec is compatible with the device @priv refers to. 608 */ 609 static bool img_ir_decoder_compatible(struct img_ir_priv *priv, 610 const struct img_ir_decoder *dec) 611 { 612 unsigned int ct; 613 614 /* don't accept decoders using code types which aren't supported */ 615 ct = dec->control.code_type; 616 if (priv->hw.ct_quirks[ct] & IMG_IR_QUIRK_CODE_BROKEN) 617 return false; 618 619 return true; 620 } 621 622 /** 623 * img_ir_allowed_protos() - Get allowed protocols from global decoder list. 624 * @priv: IR private data. 625 * 626 * Returns: Mask of protocols supported by the device @priv refers to. 627 */ 628 static u64 img_ir_allowed_protos(struct img_ir_priv *priv) 629 { 630 u64 protos = 0; 631 struct img_ir_decoder **decp; 632 633 for (decp = img_ir_decoders; *decp; ++decp) { 634 const struct img_ir_decoder *dec = *decp; 635 if (img_ir_decoder_compatible(priv, dec)) 636 protos |= dec->type; 637 } 638 return protos; 639 } 640 641 /* Callback for changing protocol using sysfs */ 642 static int img_ir_change_protocol(struct rc_dev *dev, u64 *ir_type) 643 { 644 struct img_ir_priv *priv = dev->priv; 645 struct img_ir_priv_hw *hw = &priv->hw; 646 struct rc_dev *rdev = hw->rdev; 647 struct img_ir_decoder **decp; 648 u64 wakeup_protocols; 649 650 if (!*ir_type) { 651 /* disable all protocols */ 652 img_ir_set_decoder(priv, NULL, 0); 653 goto success; 654 } 655 for (decp = img_ir_decoders; *decp; ++decp) { 656 const struct img_ir_decoder *dec = *decp; 657 if (!img_ir_decoder_compatible(priv, dec)) 658 continue; 659 if (*ir_type & dec->type) { 660 *ir_type &= dec->type; 661 img_ir_set_decoder(priv, dec, *ir_type); 662 goto success; 663 } 664 } 665 return -EINVAL; 666 667 success: 668 /* 669 * Only allow matching wakeup protocols for now, and only if filtering 670 * is supported. 671 */ 672 wakeup_protocols = *ir_type; 673 if (!hw->decoder || !hw->decoder->filter) 674 wakeup_protocols = 0; 675 rdev->allowed_wakeup_protocols = wakeup_protocols; 676 rdev->enabled_wakeup_protocols = wakeup_protocols; 677 return 0; 678 } 679 680 /* Changes ir-core protocol device attribute */ 681 static void img_ir_set_protocol(struct img_ir_priv *priv, u64 proto) 682 { 683 struct rc_dev *rdev = priv->hw.rdev; 684 685 spin_lock_irq(&rdev->rc_map.lock); 686 rdev->rc_map.rc_type = __ffs64(proto); 687 spin_unlock_irq(&rdev->rc_map.lock); 688 689 mutex_lock(&rdev->lock); 690 rdev->enabled_protocols = proto; 691 rdev->allowed_wakeup_protocols = proto; 692 rdev->enabled_wakeup_protocols = proto; 693 mutex_unlock(&rdev->lock); 694 } 695 696 /* Set up IR decoders */ 697 static void img_ir_init_decoders(void) 698 { 699 struct img_ir_decoder **decp; 700 701 spin_lock(&img_ir_decoders_lock); 702 if (!img_ir_decoders_preprocessed) { 703 for (decp = img_ir_decoders; *decp; ++decp) 704 img_ir_decoder_preprocess(*decp); 705 img_ir_decoders_preprocessed = true; 706 } 707 spin_unlock(&img_ir_decoders_lock); 708 } 709 710 #ifdef CONFIG_PM_SLEEP 711 /** 712 * img_ir_enable_wake() - Switch to wake mode. 713 * @priv: IR private data. 714 * 715 * Returns: non-zero if the IR can wake the system. 716 */ 717 static int img_ir_enable_wake(struct img_ir_priv *priv) 718 { 719 struct img_ir_priv_hw *hw = &priv->hw; 720 int ret = 0; 721 722 spin_lock_irq(&priv->lock); 723 if (hw->flags & IMG_IR_F_WAKE) { 724 /* interrupt only on a match */ 725 hw->suspend_irqen = img_ir_read(priv, IMG_IR_IRQ_ENABLE); 726 img_ir_write(priv, IMG_IR_IRQ_ENABLE, IMG_IR_IRQ_DATA_MATCH); 727 img_ir_write_filter(priv, &hw->filters[RC_FILTER_WAKEUP]); 728 img_ir_write_timings(priv, &hw->reg_timings.timings, 729 RC_FILTER_WAKEUP); 730 hw->mode = IMG_IR_M_WAKE; 731 ret = 1; 732 } 733 spin_unlock_irq(&priv->lock); 734 return ret; 735 } 736 737 /** 738 * img_ir_disable_wake() - Switch out of wake mode. 739 * @priv: IR private data 740 * 741 * Returns: 1 if the hardware should be allowed to wake from a sleep state. 742 * 0 otherwise. 743 */ 744 static int img_ir_disable_wake(struct img_ir_priv *priv) 745 { 746 struct img_ir_priv_hw *hw = &priv->hw; 747 int ret = 0; 748 749 spin_lock_irq(&priv->lock); 750 if (hw->flags & IMG_IR_F_WAKE) { 751 /* restore normal filtering */ 752 if (hw->flags & IMG_IR_F_FILTER) { 753 img_ir_write(priv, IMG_IR_IRQ_ENABLE, 754 (hw->suspend_irqen & IMG_IR_IRQ_EDGE) | 755 IMG_IR_IRQ_DATA_MATCH); 756 img_ir_write_filter(priv, 757 &hw->filters[RC_FILTER_NORMAL]); 758 } else { 759 img_ir_write(priv, IMG_IR_IRQ_ENABLE, 760 (hw->suspend_irqen & IMG_IR_IRQ_EDGE) | 761 IMG_IR_IRQ_DATA_VALID | 762 IMG_IR_IRQ_DATA2_VALID); 763 img_ir_write_filter(priv, NULL); 764 } 765 img_ir_write_timings(priv, &hw->reg_timings.timings, 766 RC_FILTER_NORMAL); 767 hw->mode = IMG_IR_M_NORMAL; 768 ret = 1; 769 } 770 spin_unlock_irq(&priv->lock); 771 return ret; 772 } 773 #endif /* CONFIG_PM_SLEEP */ 774 775 /* lock must be held */ 776 static void img_ir_begin_repeat(struct img_ir_priv *priv) 777 { 778 struct img_ir_priv_hw *hw = &priv->hw; 779 if (hw->mode == IMG_IR_M_NORMAL) { 780 /* switch to repeat timings */ 781 img_ir_write(priv, IMG_IR_CONTROL, 0); 782 hw->mode = IMG_IR_M_REPEATING; 783 img_ir_write_timings(priv, &hw->reg_timings.rtimings, 784 RC_FILTER_NORMAL); 785 img_ir_write(priv, IMG_IR_CONTROL, hw->reg_timings.ctrl); 786 } 787 } 788 789 /* lock must be held */ 790 static void img_ir_end_repeat(struct img_ir_priv *priv) 791 { 792 struct img_ir_priv_hw *hw = &priv->hw; 793 if (hw->mode == IMG_IR_M_REPEATING) { 794 /* switch to normal timings */ 795 img_ir_write(priv, IMG_IR_CONTROL, 0); 796 hw->mode = IMG_IR_M_NORMAL; 797 img_ir_write_timings(priv, &hw->reg_timings.timings, 798 RC_FILTER_NORMAL); 799 img_ir_write(priv, IMG_IR_CONTROL, hw->reg_timings.ctrl); 800 } 801 } 802 803 /* lock must be held */ 804 static void img_ir_handle_data(struct img_ir_priv *priv, u32 len, u64 raw) 805 { 806 struct img_ir_priv_hw *hw = &priv->hw; 807 const struct img_ir_decoder *dec = hw->decoder; 808 int ret = IMG_IR_SCANCODE; 809 u32 scancode; 810 enum rc_type protocol = RC_TYPE_UNKNOWN; 811 812 if (dec->scancode) 813 ret = dec->scancode(len, raw, &protocol, &scancode, hw->enabled_protocols); 814 else if (len >= 32) 815 scancode = (u32)raw; 816 else if (len < 32) 817 scancode = (u32)raw & ((1 << len)-1); 818 dev_dbg(priv->dev, "data (%u bits) = %#llx\n", 819 len, (unsigned long long)raw); 820 if (ret == IMG_IR_SCANCODE) { 821 dev_dbg(priv->dev, "decoded scan code %#x\n", scancode); 822 rc_keydown(hw->rdev, protocol, scancode, 0); 823 img_ir_end_repeat(priv); 824 } else if (ret == IMG_IR_REPEATCODE) { 825 if (hw->mode == IMG_IR_M_REPEATING) { 826 dev_dbg(priv->dev, "decoded repeat code\n"); 827 rc_repeat(hw->rdev); 828 } else { 829 dev_dbg(priv->dev, "decoded unexpected repeat code, ignoring\n"); 830 } 831 } else { 832 dev_dbg(priv->dev, "decode failed (%d)\n", ret); 833 return; 834 } 835 836 837 /* we mustn't update the end timer while trying to stop it */ 838 if (dec->repeat && !hw->stopping) { 839 unsigned long interval; 840 841 img_ir_begin_repeat(priv); 842 843 /* update timer, but allowing for 1/8th tolerance */ 844 interval = dec->repeat + (dec->repeat >> 3); 845 mod_timer(&hw->end_timer, 846 jiffies + msecs_to_jiffies(interval)); 847 } 848 } 849 850 /* timer function to end waiting for repeat. */ 851 static void img_ir_end_timer(unsigned long arg) 852 { 853 struct img_ir_priv *priv = (struct img_ir_priv *)arg; 854 855 spin_lock_irq(&priv->lock); 856 img_ir_end_repeat(priv); 857 spin_unlock_irq(&priv->lock); 858 } 859 860 #ifdef CONFIG_COMMON_CLK 861 static void img_ir_change_frequency(struct img_ir_priv *priv, 862 struct clk_notifier_data *change) 863 { 864 struct img_ir_priv_hw *hw = &priv->hw; 865 866 dev_dbg(priv->dev, "clk changed %lu HZ -> %lu HZ\n", 867 change->old_rate, change->new_rate); 868 869 spin_lock_irq(&priv->lock); 870 if (hw->clk_hz == change->new_rate) 871 goto unlock; 872 hw->clk_hz = change->new_rate; 873 /* refresh current timings */ 874 if (hw->decoder) { 875 img_ir_decoder_convert(hw->decoder, &hw->reg_timings, 876 hw->clk_hz); 877 switch (hw->mode) { 878 case IMG_IR_M_NORMAL: 879 img_ir_write_timings(priv, &hw->reg_timings.timings, 880 RC_FILTER_NORMAL); 881 break; 882 case IMG_IR_M_REPEATING: 883 img_ir_write_timings(priv, &hw->reg_timings.rtimings, 884 RC_FILTER_NORMAL); 885 break; 886 #ifdef CONFIG_PM_SLEEP 887 case IMG_IR_M_WAKE: 888 img_ir_write_timings(priv, &hw->reg_timings.timings, 889 RC_FILTER_WAKEUP); 890 break; 891 #endif 892 } 893 } 894 unlock: 895 spin_unlock_irq(&priv->lock); 896 } 897 898 static int img_ir_clk_notify(struct notifier_block *self, unsigned long action, 899 void *data) 900 { 901 struct img_ir_priv *priv = container_of(self, struct img_ir_priv, 902 hw.clk_nb); 903 switch (action) { 904 case POST_RATE_CHANGE: 905 img_ir_change_frequency(priv, data); 906 break; 907 default: 908 break; 909 } 910 return NOTIFY_OK; 911 } 912 #endif /* CONFIG_COMMON_CLK */ 913 914 /* called with priv->lock held */ 915 void img_ir_isr_hw(struct img_ir_priv *priv, u32 irq_status) 916 { 917 struct img_ir_priv_hw *hw = &priv->hw; 918 u32 ir_status, len, lw, up; 919 unsigned int ct; 920 921 /* use the current decoder */ 922 if (!hw->decoder) 923 return; 924 925 ir_status = img_ir_read(priv, IMG_IR_STATUS); 926 if (!(ir_status & (IMG_IR_RXDVAL | IMG_IR_RXDVALD2))) 927 return; 928 ir_status &= ~(IMG_IR_RXDVAL | IMG_IR_RXDVALD2); 929 img_ir_write(priv, IMG_IR_STATUS, ir_status); 930 931 len = (ir_status & IMG_IR_RXDLEN) >> IMG_IR_RXDLEN_SHIFT; 932 /* some versions report wrong length for certain code types */ 933 ct = hw->decoder->control.code_type; 934 if (hw->ct_quirks[ct] & IMG_IR_QUIRK_CODE_LEN_INCR) 935 ++len; 936 937 lw = img_ir_read(priv, IMG_IR_DATA_LW); 938 up = img_ir_read(priv, IMG_IR_DATA_UP); 939 img_ir_handle_data(priv, len, (u64)up << 32 | lw); 940 } 941 942 void img_ir_setup_hw(struct img_ir_priv *priv) 943 { 944 struct img_ir_decoder **decp; 945 946 if (!priv->hw.rdev) 947 return; 948 949 /* Use the first available decoder (or disable stuff if NULL) */ 950 for (decp = img_ir_decoders; *decp; ++decp) { 951 const struct img_ir_decoder *dec = *decp; 952 if (img_ir_decoder_compatible(priv, dec)) { 953 img_ir_set_protocol(priv, dec->type); 954 img_ir_set_decoder(priv, dec, 0); 955 return; 956 } 957 } 958 img_ir_set_decoder(priv, NULL, 0); 959 } 960 961 /** 962 * img_ir_probe_hw_caps() - Probe capabilities of the hardware. 963 * @priv: IR private data. 964 */ 965 static void img_ir_probe_hw_caps(struct img_ir_priv *priv) 966 { 967 struct img_ir_priv_hw *hw = &priv->hw; 968 /* 969 * When a version of the block becomes available without these quirks, 970 * they'll have to depend on the core revision. 971 */ 972 hw->ct_quirks[IMG_IR_CODETYPE_PULSELEN] 973 |= IMG_IR_QUIRK_CODE_LEN_INCR; 974 hw->ct_quirks[IMG_IR_CODETYPE_BIPHASE] 975 |= IMG_IR_QUIRK_CODE_BROKEN; 976 hw->ct_quirks[IMG_IR_CODETYPE_2BITPULSEPOS] 977 |= IMG_IR_QUIRK_CODE_BROKEN; 978 } 979 980 int img_ir_probe_hw(struct img_ir_priv *priv) 981 { 982 struct img_ir_priv_hw *hw = &priv->hw; 983 struct rc_dev *rdev; 984 int error; 985 986 /* Ensure hardware decoders have been preprocessed */ 987 img_ir_init_decoders(); 988 989 /* Probe hardware capabilities */ 990 img_ir_probe_hw_caps(priv); 991 992 /* Set up the end timer */ 993 setup_timer(&hw->end_timer, img_ir_end_timer, (unsigned long)priv); 994 995 /* Register a clock notifier */ 996 if (!IS_ERR(priv->clk)) { 997 hw->clk_hz = clk_get_rate(priv->clk); 998 #ifdef CONFIG_COMMON_CLK 999 hw->clk_nb.notifier_call = img_ir_clk_notify; 1000 error = clk_notifier_register(priv->clk, &hw->clk_nb); 1001 if (error) 1002 dev_warn(priv->dev, 1003 "failed to register clock notifier\n"); 1004 #endif 1005 } else { 1006 hw->clk_hz = 32768; 1007 } 1008 1009 /* Allocate hardware decoder */ 1010 hw->rdev = rdev = rc_allocate_device(); 1011 if (!rdev) { 1012 dev_err(priv->dev, "cannot allocate input device\n"); 1013 error = -ENOMEM; 1014 goto err_alloc_rc; 1015 } 1016 rdev->priv = priv; 1017 rdev->map_name = RC_MAP_EMPTY; 1018 rdev->allowed_protocols = img_ir_allowed_protos(priv); 1019 rdev->input_name = "IMG Infrared Decoder"; 1020 rdev->s_filter = img_ir_set_normal_filter; 1021 rdev->s_wakeup_filter = img_ir_set_wakeup_filter; 1022 1023 /* Register hardware decoder */ 1024 error = rc_register_device(rdev); 1025 if (error) { 1026 dev_err(priv->dev, "failed to register IR input device\n"); 1027 goto err_register_rc; 1028 } 1029 1030 /* 1031 * Set this after rc_register_device as no protocols have been 1032 * registered yet. 1033 */ 1034 rdev->change_protocol = img_ir_change_protocol; 1035 1036 device_init_wakeup(priv->dev, 1); 1037 1038 return 0; 1039 1040 err_register_rc: 1041 img_ir_set_decoder(priv, NULL, 0); 1042 hw->rdev = NULL; 1043 rc_free_device(rdev); 1044 err_alloc_rc: 1045 #ifdef CONFIG_COMMON_CLK 1046 if (!IS_ERR(priv->clk)) 1047 clk_notifier_unregister(priv->clk, &hw->clk_nb); 1048 #endif 1049 return error; 1050 } 1051 1052 void img_ir_remove_hw(struct img_ir_priv *priv) 1053 { 1054 struct img_ir_priv_hw *hw = &priv->hw; 1055 struct rc_dev *rdev = hw->rdev; 1056 if (!rdev) 1057 return; 1058 img_ir_set_decoder(priv, NULL, 0); 1059 hw->rdev = NULL; 1060 rc_unregister_device(rdev); 1061 #ifdef CONFIG_COMMON_CLK 1062 if (!IS_ERR(priv->clk)) 1063 clk_notifier_unregister(priv->clk, &hw->clk_nb); 1064 #endif 1065 } 1066 1067 #ifdef CONFIG_PM_SLEEP 1068 int img_ir_suspend(struct device *dev) 1069 { 1070 struct img_ir_priv *priv = dev_get_drvdata(dev); 1071 1072 if (device_may_wakeup(dev) && img_ir_enable_wake(priv)) 1073 enable_irq_wake(priv->irq); 1074 return 0; 1075 } 1076 1077 int img_ir_resume(struct device *dev) 1078 { 1079 struct img_ir_priv *priv = dev_get_drvdata(dev); 1080 1081 if (device_may_wakeup(dev) && img_ir_disable_wake(priv)) 1082 disable_irq_wake(priv->irq); 1083 return 0; 1084 } 1085 #endif /* CONFIG_PM_SLEEP */ 1086