1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2013 Texas Instruments Inc. 4 * 5 * David Griego, <dagriego@biglakesoftware.com> 6 * Dale Farnsworth, <dale@farnsworth.org> 7 * Archit Taneja, <archit@ti.com> 8 */ 9 10 #ifndef __TI_VPDMA_H_ 11 #define __TI_VPDMA_H_ 12 13 #define VPDMA_MAX_NUM_LIST 8 14 /* 15 * A vpdma_buf tracks the size, DMA address and mapping status of each 16 * driver DMA area. 17 */ 18 struct vpdma_buf { 19 void *addr; 20 dma_addr_t dma_addr; 21 size_t size; 22 bool mapped; 23 }; 24 25 struct vpdma_desc_list { 26 struct vpdma_buf buf; 27 void *next; 28 int type; 29 }; 30 31 struct vpdma_data { 32 void __iomem *base; 33 34 struct platform_device *pdev; 35 36 spinlock_t lock; 37 bool hwlist_used[VPDMA_MAX_NUM_LIST]; 38 void *hwlist_priv[VPDMA_MAX_NUM_LIST]; 39 /* callback to VPE driver when the firmware is loaded */ 40 void (*cb)(struct platform_device *pdev); 41 }; 42 43 enum vpdma_data_format_type { 44 VPDMA_DATA_FMT_TYPE_YUV, 45 VPDMA_DATA_FMT_TYPE_RGB, 46 VPDMA_DATA_FMT_TYPE_MISC, 47 }; 48 49 struct vpdma_data_format { 50 enum vpdma_data_format_type type; 51 int data_type; 52 u8 depth; 53 }; 54 55 #define VPDMA_DESC_ALIGN 16 /* 16-byte descriptor alignment */ 56 #define VPDMA_STRIDE_ALIGN 16 /* 57 * line stride of source and dest 58 * buffers should be 16 byte aligned 59 */ 60 #define VPDMA_MAX_STRIDE 65520 /* Max line stride 16 byte aligned */ 61 #define VPDMA_DTD_DESC_SIZE 32 /* 8 words */ 62 #define VPDMA_CFD_CTD_DESC_SIZE 16 /* 4 words */ 63 64 #define VPDMA_LIST_TYPE_NORMAL 0 65 #define VPDMA_LIST_TYPE_SELF_MODIFYING 1 66 #define VPDMA_LIST_TYPE_DOORBELL 2 67 68 enum vpdma_yuv_formats { 69 VPDMA_DATA_FMT_Y444 = 0, 70 VPDMA_DATA_FMT_Y422, 71 VPDMA_DATA_FMT_Y420, 72 VPDMA_DATA_FMT_C444, 73 VPDMA_DATA_FMT_C422, 74 VPDMA_DATA_FMT_C420, 75 VPDMA_DATA_FMT_CB420, 76 VPDMA_DATA_FMT_YCR422, 77 VPDMA_DATA_FMT_YC444, 78 VPDMA_DATA_FMT_CRY422, 79 VPDMA_DATA_FMT_CBY422, 80 VPDMA_DATA_FMT_YCB422, 81 }; 82 83 enum vpdma_rgb_formats { 84 VPDMA_DATA_FMT_RGB565 = 0, 85 VPDMA_DATA_FMT_ARGB16_1555, 86 VPDMA_DATA_FMT_ARGB16, 87 VPDMA_DATA_FMT_RGBA16_5551, 88 VPDMA_DATA_FMT_RGBA16, 89 VPDMA_DATA_FMT_ARGB24, 90 VPDMA_DATA_FMT_RGB24, 91 VPDMA_DATA_FMT_ARGB32, 92 VPDMA_DATA_FMT_RGBA24, 93 VPDMA_DATA_FMT_RGBA32, 94 VPDMA_DATA_FMT_BGR565, 95 VPDMA_DATA_FMT_ABGR16_1555, 96 VPDMA_DATA_FMT_ABGR16, 97 VPDMA_DATA_FMT_BGRA16_5551, 98 VPDMA_DATA_FMT_BGRA16, 99 VPDMA_DATA_FMT_ABGR24, 100 VPDMA_DATA_FMT_BGR24, 101 VPDMA_DATA_FMT_ABGR32, 102 VPDMA_DATA_FMT_BGRA24, 103 VPDMA_DATA_FMT_BGRA32, 104 }; 105 106 enum vpdma_raw_formats { 107 VPDMA_DATA_FMT_RAW8 = 0, 108 VPDMA_DATA_FMT_RAW16, 109 }; 110 111 enum vpdma_misc_formats { 112 VPDMA_DATA_FMT_MV = 0, 113 }; 114 115 extern const struct vpdma_data_format vpdma_yuv_fmts[]; 116 extern const struct vpdma_data_format vpdma_rgb_fmts[]; 117 extern const struct vpdma_data_format vpdma_raw_fmts[]; 118 extern const struct vpdma_data_format vpdma_misc_fmts[]; 119 120 enum vpdma_frame_start_event { 121 VPDMA_FSEVENT_HDMI_FID = 0, 122 VPDMA_FSEVENT_DVO2_FID, 123 VPDMA_FSEVENT_HDCOMP_FID, 124 VPDMA_FSEVENT_SD_FID, 125 VPDMA_FSEVENT_LM_FID0, 126 VPDMA_FSEVENT_LM_FID1, 127 VPDMA_FSEVENT_LM_FID2, 128 VPDMA_FSEVENT_CHANNEL_ACTIVE, 129 }; 130 131 /* max width configurations */ 132 enum vpdma_max_width { 133 MAX_OUT_WIDTH_UNLIMITED = 0, 134 MAX_OUT_WIDTH_REG1, 135 MAX_OUT_WIDTH_REG2, 136 MAX_OUT_WIDTH_REG3, 137 MAX_OUT_WIDTH_352, 138 MAX_OUT_WIDTH_768, 139 MAX_OUT_WIDTH_1280, 140 MAX_OUT_WIDTH_1920, 141 }; 142 143 /* max height configurations */ 144 enum vpdma_max_height { 145 MAX_OUT_HEIGHT_UNLIMITED = 0, 146 MAX_OUT_HEIGHT_REG1, 147 MAX_OUT_HEIGHT_REG2, 148 MAX_OUT_HEIGHT_REG3, 149 MAX_OUT_HEIGHT_288, 150 MAX_OUT_HEIGHT_576, 151 MAX_OUT_HEIGHT_720, 152 MAX_OUT_HEIGHT_1080, 153 }; 154 155 /* 156 * VPDMA channel numbers 157 */ 158 enum vpdma_channel { 159 VPE_CHAN_LUMA1_IN, 160 VPE_CHAN_CHROMA1_IN, 161 VPE_CHAN_LUMA2_IN, 162 VPE_CHAN_CHROMA2_IN, 163 VPE_CHAN_LUMA3_IN, 164 VPE_CHAN_CHROMA3_IN, 165 VPE_CHAN_MV_IN, 166 VPE_CHAN_MV_OUT, 167 VPE_CHAN_LUMA_OUT, 168 VPE_CHAN_CHROMA_OUT, 169 VPE_CHAN_RGB_OUT, 170 }; 171 172 #define VIP_CHAN_VIP2_OFFSET 70 173 #define VIP_CHAN_MULT_PORTB_OFFSET 16 174 #define VIP_CHAN_YUV_PORTB_OFFSET 2 175 #define VIP_CHAN_RGB_PORTB_OFFSET 1 176 177 #define VPDMA_MAX_CHANNELS 256 178 179 /* flags for VPDMA data descriptors */ 180 #define VPDMA_DATA_ODD_LINE_SKIP (1 << 0) 181 #define VPDMA_DATA_EVEN_LINE_SKIP (1 << 1) 182 #define VPDMA_DATA_FRAME_1D (1 << 2) 183 #define VPDMA_DATA_MODE_TILED (1 << 3) 184 185 /* 186 * client identifiers used for configuration descriptors 187 */ 188 #define CFD_MMR_CLIENT 0 189 #define CFD_SC_CLIENT 4 190 191 /* Address data block header format */ 192 struct vpdma_adb_hdr { 193 u32 offset; 194 u32 nwords; 195 u32 reserved0; 196 u32 reserved1; 197 }; 198 199 /* helpers for creating ADB headers for config descriptors MMRs as client */ 200 #define ADB_ADDR(dma_buf, str, fld) ((dma_buf)->addr + offsetof(str, fld)) 201 #define MMR_ADB_ADDR(buf, str, fld) ADB_ADDR(&(buf), struct str, fld) 202 203 #define VPDMA_SET_MMR_ADB_HDR(buf, str, hdr, regs, offset_a) \ 204 do { \ 205 struct vpdma_adb_hdr *h; \ 206 struct str *adb = NULL; \ 207 h = MMR_ADB_ADDR(buf, str, hdr); \ 208 h->offset = (offset_a); \ 209 h->nwords = sizeof(adb->regs) >> 2; \ 210 } while (0) 211 212 /* vpdma descriptor buffer allocation and management */ 213 int vpdma_alloc_desc_buf(struct vpdma_buf *buf, size_t size); 214 void vpdma_free_desc_buf(struct vpdma_buf *buf); 215 int vpdma_map_desc_buf(struct vpdma_data *vpdma, struct vpdma_buf *buf); 216 void vpdma_unmap_desc_buf(struct vpdma_data *vpdma, struct vpdma_buf *buf); 217 218 /* vpdma descriptor list funcs */ 219 int vpdma_create_desc_list(struct vpdma_desc_list *list, size_t size, int type); 220 void vpdma_reset_desc_list(struct vpdma_desc_list *list); 221 void vpdma_free_desc_list(struct vpdma_desc_list *list); 222 int vpdma_submit_descs(struct vpdma_data *vpdma, struct vpdma_desc_list *list, 223 int list_num); 224 bool vpdma_list_busy(struct vpdma_data *vpdma, int list_num); 225 void vpdma_update_dma_addr(struct vpdma_data *vpdma, 226 struct vpdma_desc_list *list, dma_addr_t dma_addr, 227 void *write_dtd, int drop, int idx); 228 229 /* VPDMA hardware list funcs */ 230 int vpdma_hwlist_alloc(struct vpdma_data *vpdma, void *priv); 231 void *vpdma_hwlist_get_priv(struct vpdma_data *vpdma, int list_num); 232 void *vpdma_hwlist_release(struct vpdma_data *vpdma, int list_num); 233 234 /* helpers for creating vpdma descriptors */ 235 void vpdma_add_cfd_block(struct vpdma_desc_list *list, int client, 236 struct vpdma_buf *blk, u32 dest_offset); 237 void vpdma_add_cfd_adb(struct vpdma_desc_list *list, int client, 238 struct vpdma_buf *adb); 239 void vpdma_add_sync_on_channel_ctd(struct vpdma_desc_list *list, 240 enum vpdma_channel chan); 241 void vpdma_add_abort_channel_ctd(struct vpdma_desc_list *list, 242 int chan_num); 243 void vpdma_add_out_dtd(struct vpdma_desc_list *list, int width, 244 int stride, const struct v4l2_rect *c_rect, 245 const struct vpdma_data_format *fmt, dma_addr_t dma_addr, 246 int max_w, int max_h, enum vpdma_channel chan, u32 flags); 247 void vpdma_rawchan_add_out_dtd(struct vpdma_desc_list *list, int width, 248 int stride, const struct v4l2_rect *c_rect, 249 const struct vpdma_data_format *fmt, dma_addr_t dma_addr, 250 int max_w, int max_h, int raw_vpdma_chan, u32 flags); 251 252 void vpdma_add_in_dtd(struct vpdma_desc_list *list, int width, 253 int stride, const struct v4l2_rect *c_rect, 254 const struct vpdma_data_format *fmt, dma_addr_t dma_addr, 255 enum vpdma_channel chan, int field, u32 flags, int frame_width, 256 int frame_height, int start_h, int start_v); 257 int vpdma_list_cleanup(struct vpdma_data *vpdma, int list_num, 258 int *channels, int size); 259 260 /* vpdma list interrupt management */ 261 void vpdma_enable_list_complete_irq(struct vpdma_data *vpdma, int irq_num, 262 int list_num, bool enable); 263 void vpdma_clear_list_stat(struct vpdma_data *vpdma, int irq_num, 264 int list_num); 265 unsigned int vpdma_get_list_stat(struct vpdma_data *vpdma, int irq_num); 266 unsigned int vpdma_get_list_mask(struct vpdma_data *vpdma, int irq_num); 267 268 /* vpdma client configuration */ 269 void vpdma_set_line_mode(struct vpdma_data *vpdma, int line_mode, 270 enum vpdma_channel chan); 271 void vpdma_set_frame_start_event(struct vpdma_data *vpdma, 272 enum vpdma_frame_start_event fs_event, enum vpdma_channel chan); 273 void vpdma_set_max_size(struct vpdma_data *vpdma, int reg_addr, 274 u32 width, u32 height); 275 276 void vpdma_set_bg_color(struct vpdma_data *vpdma, 277 struct vpdma_data_format *fmt, u32 color); 278 void vpdma_dump_regs(struct vpdma_data *vpdma); 279 280 /* initialize vpdma, passed with VPE's platform device pointer */ 281 int vpdma_create(struct platform_device *pdev, struct vpdma_data *vpdma, 282 void (*cb)(struct platform_device *pdev)); 283 284 #endif 285