1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * ispccdc.c 4 * 5 * TI OMAP3 ISP - CCDC module 6 * 7 * Copyright (C) 2009-2010 Nokia Corporation 8 * Copyright (C) 2009 Texas Instruments, Inc. 9 * 10 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com> 11 * Sakari Ailus <sakari.ailus@iki.fi> 12 */ 13 14 #include <linux/module.h> 15 #include <linux/uaccess.h> 16 #include <linux/delay.h> 17 #include <linux/device.h> 18 #include <linux/dma-mapping.h> 19 #include <linux/mm.h> 20 #include <linux/sched.h> 21 #include <linux/slab.h> 22 #include <media/v4l2-event.h> 23 24 #include "isp.h" 25 #include "ispreg.h" 26 #include "ispccdc.h" 27 28 #define CCDC_MIN_WIDTH 32 29 #define CCDC_MIN_HEIGHT 32 30 31 static struct v4l2_mbus_framefmt * 32 __ccdc_get_format(struct isp_ccdc_device *ccdc, 33 struct v4l2_subdev_state *sd_state, 34 unsigned int pad, enum v4l2_subdev_format_whence which); 35 36 static const unsigned int ccdc_fmts[] = { 37 MEDIA_BUS_FMT_Y8_1X8, 38 MEDIA_BUS_FMT_Y10_1X10, 39 MEDIA_BUS_FMT_Y12_1X12, 40 MEDIA_BUS_FMT_SGRBG8_1X8, 41 MEDIA_BUS_FMT_SRGGB8_1X8, 42 MEDIA_BUS_FMT_SBGGR8_1X8, 43 MEDIA_BUS_FMT_SGBRG8_1X8, 44 MEDIA_BUS_FMT_SGRBG10_1X10, 45 MEDIA_BUS_FMT_SRGGB10_1X10, 46 MEDIA_BUS_FMT_SBGGR10_1X10, 47 MEDIA_BUS_FMT_SGBRG10_1X10, 48 MEDIA_BUS_FMT_SGRBG12_1X12, 49 MEDIA_BUS_FMT_SRGGB12_1X12, 50 MEDIA_BUS_FMT_SBGGR12_1X12, 51 MEDIA_BUS_FMT_SGBRG12_1X12, 52 MEDIA_BUS_FMT_YUYV8_2X8, 53 MEDIA_BUS_FMT_UYVY8_2X8, 54 }; 55 56 /* 57 * ccdc_print_status - Print current CCDC Module register values. 58 * @ccdc: Pointer to ISP CCDC device. 59 * 60 * Also prints other debug information stored in the CCDC module. 61 */ 62 #define CCDC_PRINT_REGISTER(isp, name)\ 63 dev_dbg(isp->dev, "###CCDC " #name "=0x%08x\n", \ 64 isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_##name)) 65 66 static void ccdc_print_status(struct isp_ccdc_device *ccdc) 67 { 68 struct isp_device *isp = to_isp_device(ccdc); 69 70 dev_dbg(isp->dev, "-------------CCDC Register dump-------------\n"); 71 72 CCDC_PRINT_REGISTER(isp, PCR); 73 CCDC_PRINT_REGISTER(isp, SYN_MODE); 74 CCDC_PRINT_REGISTER(isp, HD_VD_WID); 75 CCDC_PRINT_REGISTER(isp, PIX_LINES); 76 CCDC_PRINT_REGISTER(isp, HORZ_INFO); 77 CCDC_PRINT_REGISTER(isp, VERT_START); 78 CCDC_PRINT_REGISTER(isp, VERT_LINES); 79 CCDC_PRINT_REGISTER(isp, CULLING); 80 CCDC_PRINT_REGISTER(isp, HSIZE_OFF); 81 CCDC_PRINT_REGISTER(isp, SDOFST); 82 CCDC_PRINT_REGISTER(isp, SDR_ADDR); 83 CCDC_PRINT_REGISTER(isp, CLAMP); 84 CCDC_PRINT_REGISTER(isp, DCSUB); 85 CCDC_PRINT_REGISTER(isp, COLPTN); 86 CCDC_PRINT_REGISTER(isp, BLKCMP); 87 CCDC_PRINT_REGISTER(isp, FPC); 88 CCDC_PRINT_REGISTER(isp, FPC_ADDR); 89 CCDC_PRINT_REGISTER(isp, VDINT); 90 CCDC_PRINT_REGISTER(isp, ALAW); 91 CCDC_PRINT_REGISTER(isp, REC656IF); 92 CCDC_PRINT_REGISTER(isp, CFG); 93 CCDC_PRINT_REGISTER(isp, FMTCFG); 94 CCDC_PRINT_REGISTER(isp, FMT_HORZ); 95 CCDC_PRINT_REGISTER(isp, FMT_VERT); 96 CCDC_PRINT_REGISTER(isp, PRGEVEN0); 97 CCDC_PRINT_REGISTER(isp, PRGEVEN1); 98 CCDC_PRINT_REGISTER(isp, PRGODD0); 99 CCDC_PRINT_REGISTER(isp, PRGODD1); 100 CCDC_PRINT_REGISTER(isp, VP_OUT); 101 CCDC_PRINT_REGISTER(isp, LSC_CONFIG); 102 CCDC_PRINT_REGISTER(isp, LSC_INITIAL); 103 CCDC_PRINT_REGISTER(isp, LSC_TABLE_BASE); 104 CCDC_PRINT_REGISTER(isp, LSC_TABLE_OFFSET); 105 106 dev_dbg(isp->dev, "--------------------------------------------\n"); 107 } 108 109 /* 110 * omap3isp_ccdc_busy - Get busy state of the CCDC. 111 * @ccdc: Pointer to ISP CCDC device. 112 */ 113 int omap3isp_ccdc_busy(struct isp_ccdc_device *ccdc) 114 { 115 struct isp_device *isp = to_isp_device(ccdc); 116 117 return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR) & 118 ISPCCDC_PCR_BUSY; 119 } 120 121 /* ----------------------------------------------------------------------------- 122 * Lens Shading Compensation 123 */ 124 125 /* 126 * ccdc_lsc_validate_config - Check that LSC configuration is valid. 127 * @ccdc: Pointer to ISP CCDC device. 128 * @lsc_cfg: the LSC configuration to check. 129 * 130 * Returns 0 if the LSC configuration is valid, or -EINVAL if invalid. 131 */ 132 static int ccdc_lsc_validate_config(struct isp_ccdc_device *ccdc, 133 struct omap3isp_ccdc_lsc_config *lsc_cfg) 134 { 135 struct isp_device *isp = to_isp_device(ccdc); 136 struct v4l2_mbus_framefmt *format; 137 unsigned int paxel_width, paxel_height; 138 unsigned int paxel_shift_x, paxel_shift_y; 139 unsigned int min_width, min_height, min_size; 140 unsigned int input_width, input_height; 141 142 paxel_shift_x = lsc_cfg->gain_mode_m; 143 paxel_shift_y = lsc_cfg->gain_mode_n; 144 145 if ((paxel_shift_x < 2) || (paxel_shift_x > 6) || 146 (paxel_shift_y < 2) || (paxel_shift_y > 6)) { 147 dev_dbg(isp->dev, "CCDC: LSC: Invalid paxel size\n"); 148 return -EINVAL; 149 } 150 151 if (lsc_cfg->offset & 3) { 152 dev_dbg(isp->dev, 153 "CCDC: LSC: Offset must be a multiple of 4\n"); 154 return -EINVAL; 155 } 156 157 if ((lsc_cfg->initial_x & 1) || (lsc_cfg->initial_y & 1)) { 158 dev_dbg(isp->dev, "CCDC: LSC: initial_x and y must be even\n"); 159 return -EINVAL; 160 } 161 162 format = __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK, 163 V4L2_SUBDEV_FORMAT_ACTIVE); 164 input_width = format->width; 165 input_height = format->height; 166 167 /* Calculate minimum bytesize for validation */ 168 paxel_width = 1 << paxel_shift_x; 169 min_width = ((input_width + lsc_cfg->initial_x + paxel_width - 1) 170 >> paxel_shift_x) + 1; 171 172 paxel_height = 1 << paxel_shift_y; 173 min_height = ((input_height + lsc_cfg->initial_y + paxel_height - 1) 174 >> paxel_shift_y) + 1; 175 176 min_size = 4 * min_width * min_height; 177 if (min_size > lsc_cfg->size) { 178 dev_dbg(isp->dev, "CCDC: LSC: too small table\n"); 179 return -EINVAL; 180 } 181 if (lsc_cfg->offset < (min_width * 4)) { 182 dev_dbg(isp->dev, "CCDC: LSC: Offset is too small\n"); 183 return -EINVAL; 184 } 185 if ((lsc_cfg->size / lsc_cfg->offset) < min_height) { 186 dev_dbg(isp->dev, "CCDC: LSC: Wrong size/offset combination\n"); 187 return -EINVAL; 188 } 189 return 0; 190 } 191 192 /* 193 * ccdc_lsc_program_table - Program Lens Shading Compensation table address. 194 * @ccdc: Pointer to ISP CCDC device. 195 */ 196 static void ccdc_lsc_program_table(struct isp_ccdc_device *ccdc, 197 dma_addr_t addr) 198 { 199 isp_reg_writel(to_isp_device(ccdc), addr, 200 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_TABLE_BASE); 201 } 202 203 /* 204 * ccdc_lsc_setup_regs - Configures the lens shading compensation module 205 * @ccdc: Pointer to ISP CCDC device. 206 */ 207 static void ccdc_lsc_setup_regs(struct isp_ccdc_device *ccdc, 208 struct omap3isp_ccdc_lsc_config *cfg) 209 { 210 struct isp_device *isp = to_isp_device(ccdc); 211 int reg; 212 213 isp_reg_writel(isp, cfg->offset, OMAP3_ISP_IOMEM_CCDC, 214 ISPCCDC_LSC_TABLE_OFFSET); 215 216 reg = 0; 217 reg |= cfg->gain_mode_n << ISPCCDC_LSC_GAIN_MODE_N_SHIFT; 218 reg |= cfg->gain_mode_m << ISPCCDC_LSC_GAIN_MODE_M_SHIFT; 219 reg |= cfg->gain_format << ISPCCDC_LSC_GAIN_FORMAT_SHIFT; 220 isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG); 221 222 reg = 0; 223 reg &= ~ISPCCDC_LSC_INITIAL_X_MASK; 224 reg |= cfg->initial_x << ISPCCDC_LSC_INITIAL_X_SHIFT; 225 reg &= ~ISPCCDC_LSC_INITIAL_Y_MASK; 226 reg |= cfg->initial_y << ISPCCDC_LSC_INITIAL_Y_SHIFT; 227 isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC, 228 ISPCCDC_LSC_INITIAL); 229 } 230 231 static int ccdc_lsc_wait_prefetch(struct isp_ccdc_device *ccdc) 232 { 233 struct isp_device *isp = to_isp_device(ccdc); 234 unsigned int wait; 235 236 isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ, 237 OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS); 238 239 /* timeout 1 ms */ 240 for (wait = 0; wait < 1000; wait++) { 241 if (isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS) & 242 IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ) { 243 isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ, 244 OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS); 245 return 0; 246 } 247 248 rmb(); 249 udelay(1); 250 } 251 252 return -ETIMEDOUT; 253 } 254 255 /* 256 * __ccdc_lsc_enable - Enables/Disables the Lens Shading Compensation module. 257 * @ccdc: Pointer to ISP CCDC device. 258 * @enable: 0 Disables LSC, 1 Enables LSC. 259 */ 260 static int __ccdc_lsc_enable(struct isp_ccdc_device *ccdc, int enable) 261 { 262 struct isp_device *isp = to_isp_device(ccdc); 263 const struct v4l2_mbus_framefmt *format = 264 __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK, 265 V4L2_SUBDEV_FORMAT_ACTIVE); 266 267 if ((format->code != MEDIA_BUS_FMT_SGRBG10_1X10) && 268 (format->code != MEDIA_BUS_FMT_SRGGB10_1X10) && 269 (format->code != MEDIA_BUS_FMT_SBGGR10_1X10) && 270 (format->code != MEDIA_BUS_FMT_SGBRG10_1X10)) 271 return -EINVAL; 272 273 if (enable) 274 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_LSC_READ); 275 276 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG, 277 ISPCCDC_LSC_ENABLE, enable ? ISPCCDC_LSC_ENABLE : 0); 278 279 if (enable) { 280 if (ccdc_lsc_wait_prefetch(ccdc) < 0) { 281 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, 282 ISPCCDC_LSC_CONFIG, ISPCCDC_LSC_ENABLE); 283 ccdc->lsc.state = LSC_STATE_STOPPED; 284 dev_warn(to_device(ccdc), "LSC prefetch timeout\n"); 285 return -ETIMEDOUT; 286 } 287 ccdc->lsc.state = LSC_STATE_RUNNING; 288 } else { 289 ccdc->lsc.state = LSC_STATE_STOPPING; 290 } 291 292 return 0; 293 } 294 295 static int ccdc_lsc_busy(struct isp_ccdc_device *ccdc) 296 { 297 struct isp_device *isp = to_isp_device(ccdc); 298 299 return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG) & 300 ISPCCDC_LSC_BUSY; 301 } 302 303 /* 304 * __ccdc_lsc_configure - Apply a new configuration to the LSC engine 305 * @ccdc: Pointer to ISP CCDC device 306 * @req: New configuration request 307 */ 308 static int __ccdc_lsc_configure(struct isp_ccdc_device *ccdc, 309 struct ispccdc_lsc_config_req *req) 310 { 311 if (!req->enable) 312 return -EINVAL; 313 314 if (ccdc_lsc_validate_config(ccdc, &req->config) < 0) { 315 dev_dbg(to_device(ccdc), "Discard LSC configuration\n"); 316 return -EINVAL; 317 } 318 319 if (ccdc_lsc_busy(ccdc)) 320 return -EBUSY; 321 322 ccdc_lsc_setup_regs(ccdc, &req->config); 323 ccdc_lsc_program_table(ccdc, req->table.dma); 324 return 0; 325 } 326 327 /* 328 * ccdc_lsc_error_handler - Handle LSC prefetch error scenario. 329 * @ccdc: Pointer to ISP CCDC device. 330 * 331 * Disables LSC, and defers enablement to shadow registers update time. 332 */ 333 static void ccdc_lsc_error_handler(struct isp_ccdc_device *ccdc) 334 { 335 struct isp_device *isp = to_isp_device(ccdc); 336 /* 337 * From OMAP3 TRM: When this event is pending, the module 338 * goes into transparent mode (output =input). Normal 339 * operation can be resumed at the start of the next frame 340 * after: 341 * 1) Clearing this event 342 * 2) Disabling the LSC module 343 * 3) Enabling it 344 */ 345 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG, 346 ISPCCDC_LSC_ENABLE); 347 ccdc->lsc.state = LSC_STATE_STOPPED; 348 } 349 350 static void ccdc_lsc_free_request(struct isp_ccdc_device *ccdc, 351 struct ispccdc_lsc_config_req *req) 352 { 353 struct isp_device *isp = to_isp_device(ccdc); 354 355 if (req == NULL) 356 return; 357 358 if (req->table.addr) { 359 sg_free_table(&req->table.sgt); 360 dma_free_coherent(isp->dev, req->config.size, req->table.addr, 361 req->table.dma); 362 } 363 364 kfree(req); 365 } 366 367 static void ccdc_lsc_free_queue(struct isp_ccdc_device *ccdc, 368 struct list_head *queue) 369 { 370 struct ispccdc_lsc_config_req *req, *n; 371 unsigned long flags; 372 373 spin_lock_irqsave(&ccdc->lsc.req_lock, flags); 374 list_for_each_entry_safe(req, n, queue, list) { 375 list_del(&req->list); 376 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags); 377 ccdc_lsc_free_request(ccdc, req); 378 spin_lock_irqsave(&ccdc->lsc.req_lock, flags); 379 } 380 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags); 381 } 382 383 static void ccdc_lsc_free_table_work(struct work_struct *work) 384 { 385 struct isp_ccdc_device *ccdc; 386 struct ispccdc_lsc *lsc; 387 388 lsc = container_of(work, struct ispccdc_lsc, table_work); 389 ccdc = container_of(lsc, struct isp_ccdc_device, lsc); 390 391 ccdc_lsc_free_queue(ccdc, &lsc->free_queue); 392 } 393 394 /* 395 * ccdc_lsc_config - Configure the LSC module from a userspace request 396 * 397 * Store the request LSC configuration in the LSC engine request pointer. The 398 * configuration will be applied to the hardware when the CCDC will be enabled, 399 * or at the next LSC interrupt if the CCDC is already running. 400 */ 401 static int ccdc_lsc_config(struct isp_ccdc_device *ccdc, 402 struct omap3isp_ccdc_update_config *config) 403 { 404 struct isp_device *isp = to_isp_device(ccdc); 405 struct ispccdc_lsc_config_req *req; 406 unsigned long flags; 407 u16 update; 408 int ret; 409 410 update = config->update & 411 (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC); 412 if (!update) 413 return 0; 414 415 if (update != (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC)) { 416 dev_dbg(to_device(ccdc), 417 "%s: Both LSC configuration and table need to be supplied\n", 418 __func__); 419 return -EINVAL; 420 } 421 422 req = kzalloc(sizeof(*req), GFP_KERNEL); 423 if (req == NULL) 424 return -ENOMEM; 425 426 if (config->flag & OMAP3ISP_CCDC_CONFIG_LSC) { 427 if (copy_from_user(&req->config, config->lsc_cfg, 428 sizeof(req->config))) { 429 ret = -EFAULT; 430 goto done; 431 } 432 433 req->enable = 1; 434 435 req->table.addr = dma_alloc_coherent(isp->dev, req->config.size, 436 &req->table.dma, 437 GFP_KERNEL); 438 if (req->table.addr == NULL) { 439 ret = -ENOMEM; 440 goto done; 441 } 442 443 ret = dma_get_sgtable(isp->dev, &req->table.sgt, 444 req->table.addr, req->table.dma, 445 req->config.size); 446 if (ret < 0) 447 goto done; 448 449 dma_sync_sg_for_cpu(isp->dev, req->table.sgt.sgl, 450 req->table.sgt.nents, DMA_TO_DEVICE); 451 452 if (copy_from_user(req->table.addr, config->lsc, 453 req->config.size)) { 454 ret = -EFAULT; 455 goto done; 456 } 457 458 dma_sync_sg_for_device(isp->dev, req->table.sgt.sgl, 459 req->table.sgt.nents, DMA_TO_DEVICE); 460 } 461 462 spin_lock_irqsave(&ccdc->lsc.req_lock, flags); 463 if (ccdc->lsc.request) { 464 list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue); 465 schedule_work(&ccdc->lsc.table_work); 466 } 467 ccdc->lsc.request = req; 468 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags); 469 470 ret = 0; 471 472 done: 473 if (ret < 0) 474 ccdc_lsc_free_request(ccdc, req); 475 476 return ret; 477 } 478 479 static inline int ccdc_lsc_is_configured(struct isp_ccdc_device *ccdc) 480 { 481 unsigned long flags; 482 int ret; 483 484 spin_lock_irqsave(&ccdc->lsc.req_lock, flags); 485 ret = ccdc->lsc.active != NULL; 486 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags); 487 488 return ret; 489 } 490 491 static int ccdc_lsc_enable(struct isp_ccdc_device *ccdc) 492 { 493 struct ispccdc_lsc *lsc = &ccdc->lsc; 494 495 if (lsc->state != LSC_STATE_STOPPED) 496 return -EINVAL; 497 498 if (lsc->active) { 499 list_add_tail(&lsc->active->list, &lsc->free_queue); 500 lsc->active = NULL; 501 } 502 503 if (__ccdc_lsc_configure(ccdc, lsc->request) < 0) { 504 omap3isp_sbl_disable(to_isp_device(ccdc), 505 OMAP3_ISP_SBL_CCDC_LSC_READ); 506 list_add_tail(&lsc->request->list, &lsc->free_queue); 507 lsc->request = NULL; 508 goto done; 509 } 510 511 lsc->active = lsc->request; 512 lsc->request = NULL; 513 __ccdc_lsc_enable(ccdc, 1); 514 515 done: 516 if (!list_empty(&lsc->free_queue)) 517 schedule_work(&lsc->table_work); 518 519 return 0; 520 } 521 522 /* ----------------------------------------------------------------------------- 523 * Parameters configuration 524 */ 525 526 /* 527 * ccdc_configure_clamp - Configure optical-black or digital clamping 528 * @ccdc: Pointer to ISP CCDC device. 529 * 530 * The CCDC performs either optical-black or digital clamp. Configure and enable 531 * the selected clamp method. 532 */ 533 static void ccdc_configure_clamp(struct isp_ccdc_device *ccdc) 534 { 535 struct isp_device *isp = to_isp_device(ccdc); 536 u32 clamp; 537 538 if (ccdc->obclamp) { 539 clamp = ccdc->clamp.obgain << ISPCCDC_CLAMP_OBGAIN_SHIFT; 540 clamp |= ccdc->clamp.oblen << ISPCCDC_CLAMP_OBSLEN_SHIFT; 541 clamp |= ccdc->clamp.oblines << ISPCCDC_CLAMP_OBSLN_SHIFT; 542 clamp |= ccdc->clamp.obstpixel << ISPCCDC_CLAMP_OBST_SHIFT; 543 isp_reg_writel(isp, clamp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP); 544 } else { 545 isp_reg_writel(isp, ccdc->clamp.dcsubval, 546 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_DCSUB); 547 } 548 549 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP, 550 ISPCCDC_CLAMP_CLAMPEN, 551 ccdc->obclamp ? ISPCCDC_CLAMP_CLAMPEN : 0); 552 } 553 554 /* 555 * ccdc_configure_fpc - Configure Faulty Pixel Correction 556 * @ccdc: Pointer to ISP CCDC device. 557 */ 558 static void ccdc_configure_fpc(struct isp_ccdc_device *ccdc) 559 { 560 struct isp_device *isp = to_isp_device(ccdc); 561 562 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC, ISPCCDC_FPC_FPCEN); 563 564 if (!ccdc->fpc_en) 565 return; 566 567 isp_reg_writel(isp, ccdc->fpc.dma, OMAP3_ISP_IOMEM_CCDC, 568 ISPCCDC_FPC_ADDR); 569 /* The FPNUM field must be set before enabling FPC. */ 570 isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT), 571 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC); 572 isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT) | 573 ISPCCDC_FPC_FPCEN, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC); 574 } 575 576 /* 577 * ccdc_configure_black_comp - Configure Black Level Compensation. 578 * @ccdc: Pointer to ISP CCDC device. 579 */ 580 static void ccdc_configure_black_comp(struct isp_ccdc_device *ccdc) 581 { 582 struct isp_device *isp = to_isp_device(ccdc); 583 u32 blcomp; 584 585 blcomp = ccdc->blcomp.b_mg << ISPCCDC_BLKCMP_B_MG_SHIFT; 586 blcomp |= ccdc->blcomp.gb_g << ISPCCDC_BLKCMP_GB_G_SHIFT; 587 blcomp |= ccdc->blcomp.gr_cy << ISPCCDC_BLKCMP_GR_CY_SHIFT; 588 blcomp |= ccdc->blcomp.r_ye << ISPCCDC_BLKCMP_R_YE_SHIFT; 589 590 isp_reg_writel(isp, blcomp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_BLKCMP); 591 } 592 593 /* 594 * ccdc_configure_lpf - Configure Low-Pass Filter (LPF). 595 * @ccdc: Pointer to ISP CCDC device. 596 */ 597 static void ccdc_configure_lpf(struct isp_ccdc_device *ccdc) 598 { 599 struct isp_device *isp = to_isp_device(ccdc); 600 601 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE, 602 ISPCCDC_SYN_MODE_LPF, 603 ccdc->lpf ? ISPCCDC_SYN_MODE_LPF : 0); 604 } 605 606 /* 607 * ccdc_configure_alaw - Configure A-law compression. 608 * @ccdc: Pointer to ISP CCDC device. 609 */ 610 static void ccdc_configure_alaw(struct isp_ccdc_device *ccdc) 611 { 612 struct isp_device *isp = to_isp_device(ccdc); 613 const struct isp_format_info *info; 614 u32 alaw = 0; 615 616 info = omap3isp_video_format_info(ccdc->formats[CCDC_PAD_SINK].code); 617 618 switch (info->width) { 619 case 8: 620 return; 621 622 case 10: 623 alaw = ISPCCDC_ALAW_GWDI_9_0; 624 break; 625 case 11: 626 alaw = ISPCCDC_ALAW_GWDI_10_1; 627 break; 628 case 12: 629 alaw = ISPCCDC_ALAW_GWDI_11_2; 630 break; 631 case 13: 632 alaw = ISPCCDC_ALAW_GWDI_12_3; 633 break; 634 } 635 636 if (ccdc->alaw) 637 alaw |= ISPCCDC_ALAW_CCDTBL; 638 639 isp_reg_writel(isp, alaw, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_ALAW); 640 } 641 642 /* 643 * ccdc_config_imgattr - Configure sensor image specific attributes. 644 * @ccdc: Pointer to ISP CCDC device. 645 * @colptn: Color pattern of the sensor. 646 */ 647 static void ccdc_config_imgattr(struct isp_ccdc_device *ccdc, u32 colptn) 648 { 649 struct isp_device *isp = to_isp_device(ccdc); 650 651 isp_reg_writel(isp, colptn, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_COLPTN); 652 } 653 654 /* 655 * ccdc_config - Set CCDC configuration from userspace 656 * @ccdc: Pointer to ISP CCDC device. 657 * @ccdc_struct: Structure containing CCDC configuration sent from userspace. 658 * 659 * Returns 0 if successful, -EINVAL if the pointer to the configuration 660 * structure is null, or the copy_from_user function fails to copy user space 661 * memory to kernel space memory. 662 */ 663 static int ccdc_config(struct isp_ccdc_device *ccdc, 664 struct omap3isp_ccdc_update_config *ccdc_struct) 665 { 666 struct isp_device *isp = to_isp_device(ccdc); 667 unsigned long flags; 668 669 spin_lock_irqsave(&ccdc->lock, flags); 670 ccdc->shadow_update = 1; 671 spin_unlock_irqrestore(&ccdc->lock, flags); 672 673 if (OMAP3ISP_CCDC_ALAW & ccdc_struct->update) { 674 ccdc->alaw = !!(OMAP3ISP_CCDC_ALAW & ccdc_struct->flag); 675 ccdc->update |= OMAP3ISP_CCDC_ALAW; 676 } 677 678 if (OMAP3ISP_CCDC_LPF & ccdc_struct->update) { 679 ccdc->lpf = !!(OMAP3ISP_CCDC_LPF & ccdc_struct->flag); 680 ccdc->update |= OMAP3ISP_CCDC_LPF; 681 } 682 683 if (OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->update) { 684 if (copy_from_user(&ccdc->clamp, ccdc_struct->bclamp, 685 sizeof(ccdc->clamp))) { 686 ccdc->shadow_update = 0; 687 return -EFAULT; 688 } 689 690 ccdc->obclamp = !!(OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->flag); 691 ccdc->update |= OMAP3ISP_CCDC_BLCLAMP; 692 } 693 694 if (OMAP3ISP_CCDC_BCOMP & ccdc_struct->update) { 695 if (copy_from_user(&ccdc->blcomp, ccdc_struct->blcomp, 696 sizeof(ccdc->blcomp))) { 697 ccdc->shadow_update = 0; 698 return -EFAULT; 699 } 700 701 ccdc->update |= OMAP3ISP_CCDC_BCOMP; 702 } 703 704 ccdc->shadow_update = 0; 705 706 if (OMAP3ISP_CCDC_FPC & ccdc_struct->update) { 707 struct omap3isp_ccdc_fpc fpc; 708 struct ispccdc_fpc fpc_old = { .addr = NULL, }; 709 struct ispccdc_fpc fpc_new; 710 u32 size; 711 712 if (ccdc->state != ISP_PIPELINE_STREAM_STOPPED) 713 return -EBUSY; 714 715 ccdc->fpc_en = !!(OMAP3ISP_CCDC_FPC & ccdc_struct->flag); 716 717 if (ccdc->fpc_en) { 718 if (copy_from_user(&fpc, ccdc_struct->fpc, sizeof(fpc))) 719 return -EFAULT; 720 721 size = fpc.fpnum * 4; 722 723 /* 724 * The table address must be 64-bytes aligned, which is 725 * guaranteed by dma_alloc_coherent(). 726 */ 727 fpc_new.fpnum = fpc.fpnum; 728 fpc_new.addr = dma_alloc_coherent(isp->dev, size, 729 &fpc_new.dma, 730 GFP_KERNEL); 731 if (fpc_new.addr == NULL) 732 return -ENOMEM; 733 734 if (copy_from_user(fpc_new.addr, 735 (__force void __user *)(long)fpc.fpcaddr, 736 size)) { 737 dma_free_coherent(isp->dev, size, fpc_new.addr, 738 fpc_new.dma); 739 return -EFAULT; 740 } 741 742 fpc_old = ccdc->fpc; 743 ccdc->fpc = fpc_new; 744 } 745 746 ccdc_configure_fpc(ccdc); 747 748 if (fpc_old.addr != NULL) 749 dma_free_coherent(isp->dev, fpc_old.fpnum * 4, 750 fpc_old.addr, fpc_old.dma); 751 } 752 753 return ccdc_lsc_config(ccdc, ccdc_struct); 754 } 755 756 static void ccdc_apply_controls(struct isp_ccdc_device *ccdc) 757 { 758 if (ccdc->update & OMAP3ISP_CCDC_ALAW) { 759 ccdc_configure_alaw(ccdc); 760 ccdc->update &= ~OMAP3ISP_CCDC_ALAW; 761 } 762 763 if (ccdc->update & OMAP3ISP_CCDC_LPF) { 764 ccdc_configure_lpf(ccdc); 765 ccdc->update &= ~OMAP3ISP_CCDC_LPF; 766 } 767 768 if (ccdc->update & OMAP3ISP_CCDC_BLCLAMP) { 769 ccdc_configure_clamp(ccdc); 770 ccdc->update &= ~OMAP3ISP_CCDC_BLCLAMP; 771 } 772 773 if (ccdc->update & OMAP3ISP_CCDC_BCOMP) { 774 ccdc_configure_black_comp(ccdc); 775 ccdc->update &= ~OMAP3ISP_CCDC_BCOMP; 776 } 777 } 778 779 /* 780 * omap3isp_ccdc_restore_context - Restore values of the CCDC module registers 781 * @isp: Pointer to ISP device 782 */ 783 void omap3isp_ccdc_restore_context(struct isp_device *isp) 784 { 785 struct isp_ccdc_device *ccdc = &isp->isp_ccdc; 786 787 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG, ISPCCDC_CFG_VDLC); 788 789 ccdc->update = OMAP3ISP_CCDC_ALAW | OMAP3ISP_CCDC_LPF 790 | OMAP3ISP_CCDC_BLCLAMP | OMAP3ISP_CCDC_BCOMP; 791 ccdc_apply_controls(ccdc); 792 ccdc_configure_fpc(ccdc); 793 } 794 795 /* ----------------------------------------------------------------------------- 796 * Format- and pipeline-related configuration helpers 797 */ 798 799 /* 800 * ccdc_config_vp - Configure the Video Port. 801 * @ccdc: Pointer to ISP CCDC device. 802 */ 803 static void ccdc_config_vp(struct isp_ccdc_device *ccdc) 804 { 805 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity); 806 struct isp_device *isp = to_isp_device(ccdc); 807 const struct isp_format_info *info; 808 struct v4l2_mbus_framefmt *format; 809 unsigned long l3_ick = pipe->l3_ick; 810 unsigned int max_div = isp->revision == ISP_REVISION_15_0 ? 64 : 8; 811 unsigned int div = 0; 812 u32 fmtcfg = ISPCCDC_FMTCFG_VPEN; 813 814 format = &ccdc->formats[CCDC_PAD_SOURCE_VP]; 815 816 if (!format->code) { 817 /* Disable the video port when the input format isn't supported. 818 * This is indicated by a pixel code set to 0. 819 */ 820 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG); 821 return; 822 } 823 824 isp_reg_writel(isp, (0 << ISPCCDC_FMT_HORZ_FMTSPH_SHIFT) | 825 (format->width << ISPCCDC_FMT_HORZ_FMTLNH_SHIFT), 826 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_HORZ); 827 isp_reg_writel(isp, (0 << ISPCCDC_FMT_VERT_FMTSLV_SHIFT) | 828 ((format->height + 1) << ISPCCDC_FMT_VERT_FMTLNV_SHIFT), 829 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_VERT); 830 831 isp_reg_writel(isp, (format->width << ISPCCDC_VP_OUT_HORZ_NUM_SHIFT) | 832 (format->height << ISPCCDC_VP_OUT_VERT_NUM_SHIFT), 833 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VP_OUT); 834 835 info = omap3isp_video_format_info(ccdc->formats[CCDC_PAD_SINK].code); 836 837 switch (info->width) { 838 case 8: 839 case 10: 840 fmtcfg |= ISPCCDC_FMTCFG_VPIN_9_0; 841 break; 842 case 11: 843 fmtcfg |= ISPCCDC_FMTCFG_VPIN_10_1; 844 break; 845 case 12: 846 fmtcfg |= ISPCCDC_FMTCFG_VPIN_11_2; 847 break; 848 case 13: 849 fmtcfg |= ISPCCDC_FMTCFG_VPIN_12_3; 850 break; 851 } 852 853 if (pipe->input) 854 div = DIV_ROUND_UP(l3_ick, pipe->max_rate); 855 else if (pipe->external_rate) 856 div = l3_ick / pipe->external_rate; 857 858 div = clamp(div, 2U, max_div); 859 fmtcfg |= (div - 2) << ISPCCDC_FMTCFG_VPIF_FRQ_SHIFT; 860 861 isp_reg_writel(isp, fmtcfg, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG); 862 } 863 864 /* 865 * ccdc_config_outlineoffset - Configure memory saving output line offset 866 * @ccdc: Pointer to ISP CCDC device. 867 * @bpl: Number of bytes per line when stored in memory. 868 * @field: Field order when storing interlaced formats in memory. 869 * 870 * Configure the offsets for the line output control: 871 * 872 * - The horizontal line offset is defined as the number of bytes between the 873 * start of two consecutive lines in memory. Set it to the given bytes per 874 * line value. 875 * 876 * - The field offset value is defined as the number of lines to offset the 877 * start of the field identified by FID = 1. Set it to one. 878 * 879 * - The line offset values are defined as the number of lines (as defined by 880 * the horizontal line offset) between the start of two consecutive lines for 881 * all combinations of odd/even lines in odd/even fields. When interleaving 882 * fields set them all to two lines, and to one line otherwise. 883 */ 884 static void ccdc_config_outlineoffset(struct isp_ccdc_device *ccdc, 885 unsigned int bpl, 886 enum v4l2_field field) 887 { 888 struct isp_device *isp = to_isp_device(ccdc); 889 u32 sdofst = 0; 890 891 isp_reg_writel(isp, bpl & 0xffff, OMAP3_ISP_IOMEM_CCDC, 892 ISPCCDC_HSIZE_OFF); 893 894 switch (field) { 895 case V4L2_FIELD_INTERLACED_TB: 896 case V4L2_FIELD_INTERLACED_BT: 897 /* When interleaving fields in memory offset field one by one 898 * line and set the line offset to two lines. 899 */ 900 sdofst |= (1 << ISPCCDC_SDOFST_LOFST0_SHIFT) 901 | (1 << ISPCCDC_SDOFST_LOFST1_SHIFT) 902 | (1 << ISPCCDC_SDOFST_LOFST2_SHIFT) 903 | (1 << ISPCCDC_SDOFST_LOFST3_SHIFT); 904 break; 905 906 default: 907 /* In all other cases set the line offsets to one line. */ 908 break; 909 } 910 911 isp_reg_writel(isp, sdofst, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST); 912 } 913 914 /* 915 * ccdc_set_outaddr - Set memory address to save output image 916 * @ccdc: Pointer to ISP CCDC device. 917 * @addr: ISP MMU Mapped 32-bit memory address aligned on 32 byte boundary. 918 * 919 * Sets the memory address where the output will be saved. 920 */ 921 static void ccdc_set_outaddr(struct isp_ccdc_device *ccdc, u32 addr) 922 { 923 struct isp_device *isp = to_isp_device(ccdc); 924 925 isp_reg_writel(isp, addr, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDR_ADDR); 926 } 927 928 /* 929 * omap3isp_ccdc_max_rate - Calculate maximum input data rate based on the input 930 * @ccdc: Pointer to ISP CCDC device. 931 * @max_rate: Maximum calculated data rate. 932 * 933 * Returns in *max_rate less value between calculated and passed 934 */ 935 void omap3isp_ccdc_max_rate(struct isp_ccdc_device *ccdc, 936 unsigned int *max_rate) 937 { 938 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity); 939 unsigned int rate; 940 941 if (pipe == NULL) 942 return; 943 944 /* 945 * TRM says that for parallel sensors the maximum data rate 946 * should be 90% form L3/2 clock, otherwise just L3/2. 947 */ 948 if (ccdc->input == CCDC_INPUT_PARALLEL) 949 rate = pipe->l3_ick / 2 * 9 / 10; 950 else 951 rate = pipe->l3_ick / 2; 952 953 *max_rate = min(*max_rate, rate); 954 } 955 956 /* 957 * ccdc_config_sync_if - Set CCDC sync interface configuration 958 * @ccdc: Pointer to ISP CCDC device. 959 * @parcfg: Parallel interface platform data (may be NULL) 960 * @data_size: Data size 961 */ 962 static void ccdc_config_sync_if(struct isp_ccdc_device *ccdc, 963 struct isp_parallel_cfg *parcfg, 964 unsigned int data_size) 965 { 966 struct isp_device *isp = to_isp_device(ccdc); 967 const struct v4l2_mbus_framefmt *format; 968 u32 syn_mode = ISPCCDC_SYN_MODE_VDHDEN; 969 970 format = &ccdc->formats[CCDC_PAD_SINK]; 971 972 if (format->code == MEDIA_BUS_FMT_YUYV8_2X8 || 973 format->code == MEDIA_BUS_FMT_UYVY8_2X8) { 974 /* According to the OMAP3 TRM the input mode only affects SYNC 975 * mode, enabling BT.656 mode should take precedence. However, 976 * in practice setting the input mode to YCbCr data on 8 bits 977 * seems to be required in BT.656 mode. In SYNC mode set it to 978 * YCbCr on 16 bits as the bridge is enabled in that case. 979 */ 980 if (ccdc->bt656) 981 syn_mode |= ISPCCDC_SYN_MODE_INPMOD_YCBCR8; 982 else 983 syn_mode |= ISPCCDC_SYN_MODE_INPMOD_YCBCR16; 984 } 985 986 switch (data_size) { 987 case 8: 988 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_8; 989 break; 990 case 10: 991 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_10; 992 break; 993 case 11: 994 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_11; 995 break; 996 case 12: 997 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_12; 998 break; 999 } 1000 1001 if (parcfg && parcfg->data_pol) 1002 syn_mode |= ISPCCDC_SYN_MODE_DATAPOL; 1003 1004 if (parcfg && parcfg->hs_pol) 1005 syn_mode |= ISPCCDC_SYN_MODE_HDPOL; 1006 1007 /* The polarity of the vertical sync signal output by the BT.656 1008 * decoder is not documented and seems to be active low. 1009 */ 1010 if ((parcfg && parcfg->vs_pol) || ccdc->bt656) 1011 syn_mode |= ISPCCDC_SYN_MODE_VDPOL; 1012 1013 if (parcfg && parcfg->fld_pol) 1014 syn_mode |= ISPCCDC_SYN_MODE_FLDPOL; 1015 1016 isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE); 1017 1018 /* The CCDC_CFG.Y8POS bit is used in YCbCr8 input mode only. The 1019 * hardware seems to ignore it in all other input modes. 1020 */ 1021 if (format->code == MEDIA_BUS_FMT_UYVY8_2X8) 1022 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG, 1023 ISPCCDC_CFG_Y8POS); 1024 else 1025 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG, 1026 ISPCCDC_CFG_Y8POS); 1027 1028 /* Enable or disable BT.656 mode, including error correction for the 1029 * synchronization codes. 1030 */ 1031 if (ccdc->bt656) 1032 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_REC656IF, 1033 ISPCCDC_REC656IF_R656ON | ISPCCDC_REC656IF_ECCFVH); 1034 else 1035 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_REC656IF, 1036 ISPCCDC_REC656IF_R656ON | ISPCCDC_REC656IF_ECCFVH); 1037 1038 } 1039 1040 /* CCDC formats descriptions */ 1041 static const u32 ccdc_sgrbg_pattern = 1042 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC0_SHIFT | 1043 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC1_SHIFT | 1044 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC2_SHIFT | 1045 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC3_SHIFT | 1046 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC0_SHIFT | 1047 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC1_SHIFT | 1048 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC2_SHIFT | 1049 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC3_SHIFT | 1050 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC0_SHIFT | 1051 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC1_SHIFT | 1052 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC2_SHIFT | 1053 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC3_SHIFT | 1054 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC0_SHIFT | 1055 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC1_SHIFT | 1056 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC2_SHIFT | 1057 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC3_SHIFT; 1058 1059 static const u32 ccdc_srggb_pattern = 1060 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC0_SHIFT | 1061 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC1_SHIFT | 1062 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC2_SHIFT | 1063 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC3_SHIFT | 1064 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC0_SHIFT | 1065 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC1_SHIFT | 1066 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC2_SHIFT | 1067 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC3_SHIFT | 1068 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC0_SHIFT | 1069 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC1_SHIFT | 1070 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC2_SHIFT | 1071 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC3_SHIFT | 1072 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC0_SHIFT | 1073 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC1_SHIFT | 1074 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC2_SHIFT | 1075 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC3_SHIFT; 1076 1077 static const u32 ccdc_sbggr_pattern = 1078 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC0_SHIFT | 1079 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC1_SHIFT | 1080 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC2_SHIFT | 1081 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC3_SHIFT | 1082 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC0_SHIFT | 1083 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC1_SHIFT | 1084 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC2_SHIFT | 1085 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC3_SHIFT | 1086 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC0_SHIFT | 1087 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC1_SHIFT | 1088 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC2_SHIFT | 1089 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC3_SHIFT | 1090 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC0_SHIFT | 1091 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC1_SHIFT | 1092 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC2_SHIFT | 1093 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC3_SHIFT; 1094 1095 static const u32 ccdc_sgbrg_pattern = 1096 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC0_SHIFT | 1097 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC1_SHIFT | 1098 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC2_SHIFT | 1099 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC3_SHIFT | 1100 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC0_SHIFT | 1101 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC1_SHIFT | 1102 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC2_SHIFT | 1103 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC3_SHIFT | 1104 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC0_SHIFT | 1105 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC1_SHIFT | 1106 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC2_SHIFT | 1107 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC3_SHIFT | 1108 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC0_SHIFT | 1109 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC1_SHIFT | 1110 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC2_SHIFT | 1111 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC3_SHIFT; 1112 1113 static void ccdc_configure(struct isp_ccdc_device *ccdc) 1114 { 1115 struct isp_device *isp = to_isp_device(ccdc); 1116 struct isp_parallel_cfg *parcfg = NULL; 1117 struct v4l2_subdev *sensor; 1118 struct v4l2_mbus_framefmt *format; 1119 const struct v4l2_rect *crop; 1120 const struct isp_format_info *fmt_info; 1121 struct v4l2_subdev_format fmt_src = { 1122 .which = V4L2_SUBDEV_FORMAT_ACTIVE, 1123 }; 1124 unsigned int depth_out; 1125 unsigned int depth_in = 0; 1126 struct media_pad *pad; 1127 unsigned long flags; 1128 unsigned int bridge; 1129 unsigned int shift; 1130 unsigned int nph; 1131 unsigned int sph; 1132 u32 syn_mode; 1133 u32 ccdc_pattern; 1134 1135 ccdc->bt656 = false; 1136 ccdc->fields = 0; 1137 1138 pad = media_pad_remote_pad_first(&ccdc->pads[CCDC_PAD_SINK]); 1139 sensor = media_entity_to_v4l2_subdev(pad->entity); 1140 if (ccdc->input == CCDC_INPUT_PARALLEL) { 1141 struct v4l2_subdev *sd = 1142 to_isp_pipeline(&ccdc->subdev.entity)->external; 1143 1144 parcfg = &v4l2_subdev_to_bus_cfg(sd)->bus.parallel; 1145 ccdc->bt656 = parcfg->bt656; 1146 } 1147 1148 /* CCDC_PAD_SINK */ 1149 format = &ccdc->formats[CCDC_PAD_SINK]; 1150 1151 /* Compute the lane shifter shift value and enable the bridge when the 1152 * input format is a non-BT.656 YUV variant. 1153 */ 1154 fmt_src.pad = pad->index; 1155 if (!v4l2_subdev_call(sensor, pad, get_fmt, NULL, &fmt_src)) { 1156 fmt_info = omap3isp_video_format_info(fmt_src.format.code); 1157 depth_in = fmt_info->width; 1158 } 1159 1160 fmt_info = omap3isp_video_format_info(format->code); 1161 depth_out = fmt_info->width; 1162 shift = depth_in - depth_out; 1163 1164 if (ccdc->bt656) 1165 bridge = ISPCTRL_PAR_BRIDGE_DISABLE; 1166 else if (fmt_info->code == MEDIA_BUS_FMT_YUYV8_2X8) 1167 bridge = ISPCTRL_PAR_BRIDGE_LENDIAN; 1168 else if (fmt_info->code == MEDIA_BUS_FMT_UYVY8_2X8) 1169 bridge = ISPCTRL_PAR_BRIDGE_BENDIAN; 1170 else 1171 bridge = ISPCTRL_PAR_BRIDGE_DISABLE; 1172 1173 omap3isp_configure_bridge(isp, ccdc->input, parcfg, shift, bridge); 1174 1175 /* Configure the sync interface. */ 1176 ccdc_config_sync_if(ccdc, parcfg, depth_out); 1177 1178 syn_mode = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE); 1179 1180 /* Use the raw, unprocessed data when writing to memory. The H3A and 1181 * histogram modules are still fed with lens shading corrected data. 1182 */ 1183 syn_mode &= ~ISPCCDC_SYN_MODE_VP2SDR; 1184 1185 if (ccdc->output & CCDC_OUTPUT_MEMORY) 1186 syn_mode |= ISPCCDC_SYN_MODE_WEN; 1187 else 1188 syn_mode &= ~ISPCCDC_SYN_MODE_WEN; 1189 1190 if (ccdc->output & CCDC_OUTPUT_RESIZER) 1191 syn_mode |= ISPCCDC_SYN_MODE_SDR2RSZ; 1192 else 1193 syn_mode &= ~ISPCCDC_SYN_MODE_SDR2RSZ; 1194 1195 /* Mosaic filter */ 1196 switch (format->code) { 1197 case MEDIA_BUS_FMT_SRGGB10_1X10: 1198 case MEDIA_BUS_FMT_SRGGB12_1X12: 1199 ccdc_pattern = ccdc_srggb_pattern; 1200 break; 1201 case MEDIA_BUS_FMT_SBGGR10_1X10: 1202 case MEDIA_BUS_FMT_SBGGR12_1X12: 1203 ccdc_pattern = ccdc_sbggr_pattern; 1204 break; 1205 case MEDIA_BUS_FMT_SGBRG10_1X10: 1206 case MEDIA_BUS_FMT_SGBRG12_1X12: 1207 ccdc_pattern = ccdc_sgbrg_pattern; 1208 break; 1209 default: 1210 /* Use GRBG */ 1211 ccdc_pattern = ccdc_sgrbg_pattern; 1212 break; 1213 } 1214 ccdc_config_imgattr(ccdc, ccdc_pattern); 1215 1216 /* Generate VD0 on the last line of the image and VD1 on the 1217 * 2/3 height line. 1218 */ 1219 isp_reg_writel(isp, ((format->height - 2) << ISPCCDC_VDINT_0_SHIFT) | 1220 ((format->height * 2 / 3) << ISPCCDC_VDINT_1_SHIFT), 1221 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VDINT); 1222 1223 /* CCDC_PAD_SOURCE_OF */ 1224 format = &ccdc->formats[CCDC_PAD_SOURCE_OF]; 1225 crop = &ccdc->crop; 1226 1227 /* The horizontal coordinates are expressed in pixel clock cycles. We 1228 * need two cycles per pixel in BT.656 mode, and one cycle per pixel in 1229 * SYNC mode regardless of the format as the bridge is enabled for YUV 1230 * formats in that case. 1231 */ 1232 if (ccdc->bt656) { 1233 sph = crop->left * 2; 1234 nph = crop->width * 2 - 1; 1235 } else { 1236 sph = crop->left; 1237 nph = crop->width - 1; 1238 } 1239 1240 isp_reg_writel(isp, (sph << ISPCCDC_HORZ_INFO_SPH_SHIFT) | 1241 (nph << ISPCCDC_HORZ_INFO_NPH_SHIFT), 1242 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HORZ_INFO); 1243 isp_reg_writel(isp, (crop->top << ISPCCDC_VERT_START_SLV0_SHIFT) | 1244 (crop->top << ISPCCDC_VERT_START_SLV1_SHIFT), 1245 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_START); 1246 isp_reg_writel(isp, (crop->height - 1) 1247 << ISPCCDC_VERT_LINES_NLV_SHIFT, 1248 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_LINES); 1249 1250 ccdc_config_outlineoffset(ccdc, ccdc->video_out.bpl_value, 1251 format->field); 1252 1253 /* When interleaving fields enable processing of the field input signal. 1254 * This will cause the line output control module to apply the field 1255 * offset to field 1. 1256 */ 1257 if (ccdc->formats[CCDC_PAD_SINK].field == V4L2_FIELD_ALTERNATE && 1258 (format->field == V4L2_FIELD_INTERLACED_TB || 1259 format->field == V4L2_FIELD_INTERLACED_BT)) 1260 syn_mode |= ISPCCDC_SYN_MODE_FLDMODE; 1261 1262 /* The CCDC outputs data in UYVY order by default. Swap bytes to get 1263 * YUYV. 1264 */ 1265 if (format->code == MEDIA_BUS_FMT_YUYV8_1X16) 1266 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG, 1267 ISPCCDC_CFG_BSWD); 1268 else 1269 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG, 1270 ISPCCDC_CFG_BSWD); 1271 1272 /* Use PACK8 mode for 1byte per pixel formats. Check for BT.656 mode 1273 * explicitly as the driver reports 1X16 instead of 2X8 at the OF pad 1274 * for simplicity. 1275 */ 1276 if (omap3isp_video_format_info(format->code)->width <= 8 || ccdc->bt656) 1277 syn_mode |= ISPCCDC_SYN_MODE_PACK8; 1278 else 1279 syn_mode &= ~ISPCCDC_SYN_MODE_PACK8; 1280 1281 isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE); 1282 1283 /* CCDC_PAD_SOURCE_VP */ 1284 ccdc_config_vp(ccdc); 1285 1286 /* Lens shading correction. */ 1287 spin_lock_irqsave(&ccdc->lsc.req_lock, flags); 1288 if (ccdc->lsc.request == NULL) 1289 goto unlock; 1290 1291 WARN_ON(ccdc->lsc.active); 1292 1293 /* Get last good LSC configuration. If it is not supported for 1294 * the current active resolution discard it. 1295 */ 1296 if (ccdc->lsc.active == NULL && 1297 __ccdc_lsc_configure(ccdc, ccdc->lsc.request) == 0) { 1298 ccdc->lsc.active = ccdc->lsc.request; 1299 } else { 1300 list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue); 1301 schedule_work(&ccdc->lsc.table_work); 1302 } 1303 1304 ccdc->lsc.request = NULL; 1305 1306 unlock: 1307 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags); 1308 1309 ccdc_apply_controls(ccdc); 1310 } 1311 1312 static void __ccdc_enable(struct isp_ccdc_device *ccdc, int enable) 1313 { 1314 struct isp_device *isp = to_isp_device(ccdc); 1315 1316 /* Avoid restarting the CCDC when streaming is stopping. */ 1317 if (enable && ccdc->stopping & CCDC_STOP_REQUEST) 1318 return; 1319 1320 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR, 1321 ISPCCDC_PCR_EN, enable ? ISPCCDC_PCR_EN : 0); 1322 1323 ccdc->running = enable; 1324 } 1325 1326 static int ccdc_disable(struct isp_ccdc_device *ccdc) 1327 { 1328 unsigned long flags; 1329 int ret = 0; 1330 1331 spin_lock_irqsave(&ccdc->lock, flags); 1332 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS) 1333 ccdc->stopping = CCDC_STOP_REQUEST; 1334 if (!ccdc->running) 1335 ccdc->stopping = CCDC_STOP_FINISHED; 1336 spin_unlock_irqrestore(&ccdc->lock, flags); 1337 1338 ret = wait_event_timeout(ccdc->wait, 1339 ccdc->stopping == CCDC_STOP_FINISHED, 1340 msecs_to_jiffies(2000)); 1341 if (ret == 0) { 1342 ret = -ETIMEDOUT; 1343 dev_warn(to_device(ccdc), "CCDC stop timeout!\n"); 1344 } 1345 1346 omap3isp_sbl_disable(to_isp_device(ccdc), OMAP3_ISP_SBL_CCDC_LSC_READ); 1347 1348 mutex_lock(&ccdc->ioctl_lock); 1349 ccdc_lsc_free_request(ccdc, ccdc->lsc.request); 1350 ccdc->lsc.request = ccdc->lsc.active; 1351 ccdc->lsc.active = NULL; 1352 cancel_work_sync(&ccdc->lsc.table_work); 1353 ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue); 1354 mutex_unlock(&ccdc->ioctl_lock); 1355 1356 ccdc->stopping = CCDC_STOP_NOT_REQUESTED; 1357 1358 return ret > 0 ? 0 : ret; 1359 } 1360 1361 static void ccdc_enable(struct isp_ccdc_device *ccdc) 1362 { 1363 if (ccdc_lsc_is_configured(ccdc)) 1364 __ccdc_lsc_enable(ccdc, 1); 1365 __ccdc_enable(ccdc, 1); 1366 } 1367 1368 /* ----------------------------------------------------------------------------- 1369 * Interrupt handling 1370 */ 1371 1372 /* 1373 * ccdc_sbl_busy - Poll idle state of CCDC and related SBL memory write bits 1374 * @ccdc: Pointer to ISP CCDC device. 1375 * 1376 * Returns zero if the CCDC is idle and the image has been written to 1377 * memory, too. 1378 */ 1379 static int ccdc_sbl_busy(struct isp_ccdc_device *ccdc) 1380 { 1381 struct isp_device *isp = to_isp_device(ccdc); 1382 1383 return omap3isp_ccdc_busy(ccdc) 1384 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_0) & 1385 ISPSBL_CCDC_WR_0_DATA_READY) 1386 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_1) & 1387 ISPSBL_CCDC_WR_0_DATA_READY) 1388 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_2) & 1389 ISPSBL_CCDC_WR_0_DATA_READY) 1390 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_3) & 1391 ISPSBL_CCDC_WR_0_DATA_READY); 1392 } 1393 1394 /* 1395 * ccdc_sbl_wait_idle - Wait until the CCDC and related SBL are idle 1396 * @ccdc: Pointer to ISP CCDC device. 1397 * @max_wait: Max retry count in us for wait for idle/busy transition. 1398 */ 1399 static int ccdc_sbl_wait_idle(struct isp_ccdc_device *ccdc, 1400 unsigned int max_wait) 1401 { 1402 unsigned int wait = 0; 1403 1404 if (max_wait == 0) 1405 max_wait = 10000; /* 10 ms */ 1406 1407 for (wait = 0; wait <= max_wait; wait++) { 1408 if (!ccdc_sbl_busy(ccdc)) 1409 return 0; 1410 1411 rmb(); 1412 udelay(1); 1413 } 1414 1415 return -EBUSY; 1416 } 1417 1418 /* ccdc_handle_stopping - Handle CCDC and/or LSC stopping sequence 1419 * @ccdc: Pointer to ISP CCDC device. 1420 * @event: Pointing which event trigger handler 1421 * 1422 * Return 1 when the event and stopping request combination is satisfied, 1423 * zero otherwise. 1424 */ 1425 static int ccdc_handle_stopping(struct isp_ccdc_device *ccdc, u32 event) 1426 { 1427 int rval = 0; 1428 1429 switch ((ccdc->stopping & 3) | event) { 1430 case CCDC_STOP_REQUEST | CCDC_EVENT_VD1: 1431 if (ccdc->lsc.state != LSC_STATE_STOPPED) 1432 __ccdc_lsc_enable(ccdc, 0); 1433 __ccdc_enable(ccdc, 0); 1434 ccdc->stopping = CCDC_STOP_EXECUTED; 1435 return 1; 1436 1437 case CCDC_STOP_EXECUTED | CCDC_EVENT_VD0: 1438 ccdc->stopping |= CCDC_STOP_CCDC_FINISHED; 1439 if (ccdc->lsc.state == LSC_STATE_STOPPED) 1440 ccdc->stopping |= CCDC_STOP_LSC_FINISHED; 1441 rval = 1; 1442 break; 1443 1444 case CCDC_STOP_EXECUTED | CCDC_EVENT_LSC_DONE: 1445 ccdc->stopping |= CCDC_STOP_LSC_FINISHED; 1446 rval = 1; 1447 break; 1448 1449 case CCDC_STOP_EXECUTED | CCDC_EVENT_VD1: 1450 return 1; 1451 } 1452 1453 if (ccdc->stopping == CCDC_STOP_FINISHED) { 1454 wake_up(&ccdc->wait); 1455 rval = 1; 1456 } 1457 1458 return rval; 1459 } 1460 1461 static void ccdc_hs_vs_isr(struct isp_ccdc_device *ccdc) 1462 { 1463 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity); 1464 struct video_device *vdev = ccdc->subdev.devnode; 1465 struct v4l2_event event; 1466 1467 /* Frame number propagation */ 1468 atomic_inc(&pipe->frame_number); 1469 1470 memset(&event, 0, sizeof(event)); 1471 event.type = V4L2_EVENT_FRAME_SYNC; 1472 event.u.frame_sync.frame_sequence = atomic_read(&pipe->frame_number); 1473 1474 v4l2_event_queue(vdev, &event); 1475 } 1476 1477 /* 1478 * ccdc_lsc_isr - Handle LSC events 1479 * @ccdc: Pointer to ISP CCDC device. 1480 * @events: LSC events 1481 */ 1482 static void ccdc_lsc_isr(struct isp_ccdc_device *ccdc, u32 events) 1483 { 1484 unsigned long flags; 1485 1486 if (events & IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ) { 1487 struct isp_pipeline *pipe = 1488 to_isp_pipeline(&ccdc->subdev.entity); 1489 1490 ccdc_lsc_error_handler(ccdc); 1491 pipe->error = true; 1492 dev_dbg(to_device(ccdc), "lsc prefetch error\n"); 1493 } 1494 1495 if (!(events & IRQ0STATUS_CCDC_LSC_DONE_IRQ)) 1496 return; 1497 1498 /* LSC_DONE interrupt occur, there are two cases 1499 * 1. stopping for reconfiguration 1500 * 2. stopping because of STREAM OFF command 1501 */ 1502 spin_lock_irqsave(&ccdc->lsc.req_lock, flags); 1503 1504 if (ccdc->lsc.state == LSC_STATE_STOPPING) 1505 ccdc->lsc.state = LSC_STATE_STOPPED; 1506 1507 if (ccdc_handle_stopping(ccdc, CCDC_EVENT_LSC_DONE)) 1508 goto done; 1509 1510 if (ccdc->lsc.state != LSC_STATE_RECONFIG) 1511 goto done; 1512 1513 /* LSC is in STOPPING state, change to the new state */ 1514 ccdc->lsc.state = LSC_STATE_STOPPED; 1515 1516 /* This is an exception. Start of frame and LSC_DONE interrupt 1517 * have been received on the same time. Skip this event and wait 1518 * for better times. 1519 */ 1520 if (events & IRQ0STATUS_HS_VS_IRQ) 1521 goto done; 1522 1523 /* The LSC engine is stopped at this point. Enable it if there's a 1524 * pending request. 1525 */ 1526 if (ccdc->lsc.request == NULL) 1527 goto done; 1528 1529 ccdc_lsc_enable(ccdc); 1530 1531 done: 1532 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags); 1533 } 1534 1535 /* 1536 * Check whether the CCDC has captured all fields necessary to complete the 1537 * buffer. 1538 */ 1539 static bool ccdc_has_all_fields(struct isp_ccdc_device *ccdc) 1540 { 1541 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity); 1542 struct isp_device *isp = to_isp_device(ccdc); 1543 enum v4l2_field of_field = ccdc->formats[CCDC_PAD_SOURCE_OF].field; 1544 enum v4l2_field field; 1545 1546 /* When the input is progressive fields don't matter. */ 1547 if (of_field == V4L2_FIELD_NONE) 1548 return true; 1549 1550 /* Read the current field identifier. */ 1551 field = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE) 1552 & ISPCCDC_SYN_MODE_FLDSTAT 1553 ? V4L2_FIELD_BOTTOM : V4L2_FIELD_TOP; 1554 1555 /* When capturing fields in alternate order just store the current field 1556 * identifier in the pipeline. 1557 */ 1558 if (of_field == V4L2_FIELD_ALTERNATE) { 1559 pipe->field = field; 1560 return true; 1561 } 1562 1563 /* The format is interlaced. Make sure we've captured both fields. */ 1564 ccdc->fields |= field == V4L2_FIELD_BOTTOM 1565 ? CCDC_FIELD_BOTTOM : CCDC_FIELD_TOP; 1566 1567 if (ccdc->fields != CCDC_FIELD_BOTH) 1568 return false; 1569 1570 /* Verify that the field just captured corresponds to the last field 1571 * needed based on the desired field order. 1572 */ 1573 if ((of_field == V4L2_FIELD_INTERLACED_TB && field == V4L2_FIELD_TOP) || 1574 (of_field == V4L2_FIELD_INTERLACED_BT && field == V4L2_FIELD_BOTTOM)) 1575 return false; 1576 1577 /* The buffer can be completed, reset the fields for the next buffer. */ 1578 ccdc->fields = 0; 1579 1580 return true; 1581 } 1582 1583 static int ccdc_isr_buffer(struct isp_ccdc_device *ccdc) 1584 { 1585 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity); 1586 struct isp_device *isp = to_isp_device(ccdc); 1587 struct isp_buffer *buffer; 1588 1589 /* The CCDC generates VD0 interrupts even when disabled (the datasheet 1590 * doesn't explicitly state if that's supposed to happen or not, so it 1591 * can be considered as a hardware bug or as a feature, but we have to 1592 * deal with it anyway). Disabling the CCDC when no buffer is available 1593 * would thus not be enough, we need to handle the situation explicitly. 1594 */ 1595 if (list_empty(&ccdc->video_out.dmaqueue)) 1596 return 0; 1597 1598 /* We're in continuous mode, and memory writes were disabled due to a 1599 * buffer underrun. Re-enable them now that we have a buffer. The buffer 1600 * address has been set in ccdc_video_queue. 1601 */ 1602 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS && ccdc->underrun) { 1603 ccdc->underrun = 0; 1604 return 1; 1605 } 1606 1607 /* Wait for the CCDC to become idle. */ 1608 if (ccdc_sbl_wait_idle(ccdc, 1000)) { 1609 dev_info(isp->dev, "CCDC won't become idle!\n"); 1610 media_entity_enum_set(&isp->crashed, &ccdc->subdev.entity); 1611 omap3isp_pipeline_cancel_stream(pipe); 1612 return 0; 1613 } 1614 1615 /* Don't restart CCDC if we're just about to stop streaming. */ 1616 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS && 1617 ccdc->stopping & CCDC_STOP_REQUEST) 1618 return 0; 1619 1620 if (!ccdc_has_all_fields(ccdc)) 1621 return 1; 1622 1623 buffer = omap3isp_video_buffer_next(&ccdc->video_out); 1624 if (buffer != NULL) 1625 ccdc_set_outaddr(ccdc, buffer->dma); 1626 1627 pipe->state |= ISP_PIPELINE_IDLE_OUTPUT; 1628 1629 if (ccdc->state == ISP_PIPELINE_STREAM_SINGLESHOT && 1630 isp_pipeline_ready(pipe)) 1631 omap3isp_pipeline_set_stream(pipe, 1632 ISP_PIPELINE_STREAM_SINGLESHOT); 1633 1634 return buffer != NULL; 1635 } 1636 1637 /* 1638 * ccdc_vd0_isr - Handle VD0 event 1639 * @ccdc: Pointer to ISP CCDC device. 1640 * 1641 * Executes LSC deferred enablement before next frame starts. 1642 */ 1643 static void ccdc_vd0_isr(struct isp_ccdc_device *ccdc) 1644 { 1645 unsigned long flags; 1646 int restart = 0; 1647 1648 /* In BT.656 mode the CCDC doesn't generate an HS/VS interrupt. We thus 1649 * need to increment the frame counter here. 1650 */ 1651 if (ccdc->bt656) { 1652 struct isp_pipeline *pipe = 1653 to_isp_pipeline(&ccdc->subdev.entity); 1654 1655 atomic_inc(&pipe->frame_number); 1656 } 1657 1658 /* Emulate a VD1 interrupt for BT.656 mode, as we can't stop the CCDC in 1659 * the VD1 interrupt handler in that mode without risking a CCDC stall 1660 * if a short frame is received. 1661 */ 1662 if (ccdc->bt656) { 1663 spin_lock_irqsave(&ccdc->lock, flags); 1664 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS && 1665 ccdc->output & CCDC_OUTPUT_MEMORY) { 1666 if (ccdc->lsc.state != LSC_STATE_STOPPED) 1667 __ccdc_lsc_enable(ccdc, 0); 1668 __ccdc_enable(ccdc, 0); 1669 } 1670 ccdc_handle_stopping(ccdc, CCDC_EVENT_VD1); 1671 spin_unlock_irqrestore(&ccdc->lock, flags); 1672 } 1673 1674 spin_lock_irqsave(&ccdc->lock, flags); 1675 if (ccdc_handle_stopping(ccdc, CCDC_EVENT_VD0)) { 1676 spin_unlock_irqrestore(&ccdc->lock, flags); 1677 return; 1678 } 1679 1680 if (ccdc->output & CCDC_OUTPUT_MEMORY) 1681 restart = ccdc_isr_buffer(ccdc); 1682 1683 if (!ccdc->shadow_update) 1684 ccdc_apply_controls(ccdc); 1685 spin_unlock_irqrestore(&ccdc->lock, flags); 1686 1687 if (restart) 1688 ccdc_enable(ccdc); 1689 } 1690 1691 /* 1692 * ccdc_vd1_isr - Handle VD1 event 1693 * @ccdc: Pointer to ISP CCDC device. 1694 */ 1695 static void ccdc_vd1_isr(struct isp_ccdc_device *ccdc) 1696 { 1697 unsigned long flags; 1698 1699 /* In BT.656 mode the synchronization signals are generated by the CCDC 1700 * from the embedded sync codes. The VD0 and VD1 interrupts are thus 1701 * only triggered when the CCDC is enabled, unlike external sync mode 1702 * where the line counter runs even when the CCDC is stopped. We can't 1703 * disable the CCDC at VD1 time, as no VD0 interrupt would be generated 1704 * for a short frame, which would result in the CCDC being stopped and 1705 * no VD interrupt generated anymore. The CCDC is stopped from the VD0 1706 * interrupt handler instead for BT.656. 1707 */ 1708 if (ccdc->bt656) 1709 return; 1710 1711 spin_lock_irqsave(&ccdc->lsc.req_lock, flags); 1712 1713 /* 1714 * Depending on the CCDC pipeline state, CCDC stopping should be 1715 * handled differently. In SINGLESHOT we emulate an internal CCDC 1716 * stopping because the CCDC hw works only in continuous mode. 1717 * When CONTINUOUS pipeline state is used and the CCDC writes it's 1718 * data to memory the CCDC and LSC are stopped immediately but 1719 * without change the CCDC stopping state machine. The CCDC 1720 * stopping state machine should be used only when user request 1721 * for stopping is received (SINGLESHOT is an exception). 1722 */ 1723 switch (ccdc->state) { 1724 case ISP_PIPELINE_STREAM_SINGLESHOT: 1725 ccdc->stopping = CCDC_STOP_REQUEST; 1726 break; 1727 1728 case ISP_PIPELINE_STREAM_CONTINUOUS: 1729 if (ccdc->output & CCDC_OUTPUT_MEMORY) { 1730 if (ccdc->lsc.state != LSC_STATE_STOPPED) 1731 __ccdc_lsc_enable(ccdc, 0); 1732 __ccdc_enable(ccdc, 0); 1733 } 1734 break; 1735 1736 case ISP_PIPELINE_STREAM_STOPPED: 1737 break; 1738 } 1739 1740 if (ccdc_handle_stopping(ccdc, CCDC_EVENT_VD1)) 1741 goto done; 1742 1743 if (ccdc->lsc.request == NULL) 1744 goto done; 1745 1746 /* 1747 * LSC need to be reconfigured. Stop it here and on next LSC_DONE IRQ 1748 * do the appropriate changes in registers 1749 */ 1750 if (ccdc->lsc.state == LSC_STATE_RUNNING) { 1751 __ccdc_lsc_enable(ccdc, 0); 1752 ccdc->lsc.state = LSC_STATE_RECONFIG; 1753 goto done; 1754 } 1755 1756 /* LSC has been in STOPPED state, enable it */ 1757 if (ccdc->lsc.state == LSC_STATE_STOPPED) 1758 ccdc_lsc_enable(ccdc); 1759 1760 done: 1761 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags); 1762 } 1763 1764 /* 1765 * omap3isp_ccdc_isr - Configure CCDC during interframe time. 1766 * @ccdc: Pointer to ISP CCDC device. 1767 * @events: CCDC events 1768 */ 1769 int omap3isp_ccdc_isr(struct isp_ccdc_device *ccdc, u32 events) 1770 { 1771 if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED) 1772 return 0; 1773 1774 if (events & IRQ0STATUS_CCDC_VD1_IRQ) 1775 ccdc_vd1_isr(ccdc); 1776 1777 ccdc_lsc_isr(ccdc, events); 1778 1779 if (events & IRQ0STATUS_CCDC_VD0_IRQ) 1780 ccdc_vd0_isr(ccdc); 1781 1782 if (events & IRQ0STATUS_HS_VS_IRQ) 1783 ccdc_hs_vs_isr(ccdc); 1784 1785 return 0; 1786 } 1787 1788 /* ----------------------------------------------------------------------------- 1789 * ISP video operations 1790 */ 1791 1792 static int ccdc_video_queue(struct isp_video *video, struct isp_buffer *buffer) 1793 { 1794 struct isp_ccdc_device *ccdc = &video->isp->isp_ccdc; 1795 unsigned long flags; 1796 bool restart = false; 1797 1798 if (!(ccdc->output & CCDC_OUTPUT_MEMORY)) 1799 return -ENODEV; 1800 1801 ccdc_set_outaddr(ccdc, buffer->dma); 1802 1803 /* We now have a buffer queued on the output, restart the pipeline 1804 * on the next CCDC interrupt if running in continuous mode (or when 1805 * starting the stream) in external sync mode, or immediately in BT.656 1806 * sync mode as no CCDC interrupt is generated when the CCDC is stopped 1807 * in that case. 1808 */ 1809 spin_lock_irqsave(&ccdc->lock, flags); 1810 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS && !ccdc->running && 1811 ccdc->bt656) 1812 restart = true; 1813 else 1814 ccdc->underrun = 1; 1815 spin_unlock_irqrestore(&ccdc->lock, flags); 1816 1817 if (restart) 1818 ccdc_enable(ccdc); 1819 1820 return 0; 1821 } 1822 1823 static const struct isp_video_operations ccdc_video_ops = { 1824 .queue = ccdc_video_queue, 1825 }; 1826 1827 /* ----------------------------------------------------------------------------- 1828 * V4L2 subdev operations 1829 */ 1830 1831 /* 1832 * ccdc_ioctl - CCDC module private ioctl's 1833 * @sd: ISP CCDC V4L2 subdevice 1834 * @cmd: ioctl command 1835 * @arg: ioctl argument 1836 * 1837 * Return 0 on success or a negative error code otherwise. 1838 */ 1839 static long ccdc_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) 1840 { 1841 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd); 1842 int ret; 1843 1844 switch (cmd) { 1845 case VIDIOC_OMAP3ISP_CCDC_CFG: 1846 mutex_lock(&ccdc->ioctl_lock); 1847 ret = ccdc_config(ccdc, arg); 1848 mutex_unlock(&ccdc->ioctl_lock); 1849 break; 1850 1851 default: 1852 return -ENOIOCTLCMD; 1853 } 1854 1855 return ret; 1856 } 1857 1858 static int ccdc_subscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh, 1859 struct v4l2_event_subscription *sub) 1860 { 1861 if (sub->type != V4L2_EVENT_FRAME_SYNC) 1862 return -EINVAL; 1863 1864 /* line number is zero at frame start */ 1865 if (sub->id != 0) 1866 return -EINVAL; 1867 1868 return v4l2_event_subscribe(fh, sub, OMAP3ISP_CCDC_NEVENTS, NULL); 1869 } 1870 1871 static int ccdc_unsubscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh, 1872 struct v4l2_event_subscription *sub) 1873 { 1874 return v4l2_event_unsubscribe(fh, sub); 1875 } 1876 1877 /* 1878 * ccdc_set_stream - Enable/Disable streaming on the CCDC module 1879 * @sd: ISP CCDC V4L2 subdevice 1880 * @enable: Enable/disable stream 1881 * 1882 * When writing to memory, the CCDC hardware can't be enabled without a memory 1883 * buffer to write to. As the s_stream operation is called in response to a 1884 * STREAMON call without any buffer queued yet, just update the enabled field 1885 * and return immediately. The CCDC will be enabled in ccdc_isr_buffer(). 1886 * 1887 * When not writing to memory enable the CCDC immediately. 1888 */ 1889 static int ccdc_set_stream(struct v4l2_subdev *sd, int enable) 1890 { 1891 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd); 1892 struct isp_device *isp = to_isp_device(ccdc); 1893 int ret = 0; 1894 1895 if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED) { 1896 if (enable == ISP_PIPELINE_STREAM_STOPPED) 1897 return 0; 1898 1899 omap3isp_subclk_enable(isp, OMAP3_ISP_SUBCLK_CCDC); 1900 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG, 1901 ISPCCDC_CFG_VDLC); 1902 1903 ccdc_configure(ccdc); 1904 1905 ccdc_print_status(ccdc); 1906 } 1907 1908 switch (enable) { 1909 case ISP_PIPELINE_STREAM_CONTINUOUS: 1910 if (ccdc->output & CCDC_OUTPUT_MEMORY) 1911 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE); 1912 1913 if (ccdc->underrun || !(ccdc->output & CCDC_OUTPUT_MEMORY)) 1914 ccdc_enable(ccdc); 1915 1916 ccdc->underrun = 0; 1917 break; 1918 1919 case ISP_PIPELINE_STREAM_SINGLESHOT: 1920 if (ccdc->output & CCDC_OUTPUT_MEMORY && 1921 ccdc->state != ISP_PIPELINE_STREAM_SINGLESHOT) 1922 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE); 1923 1924 ccdc_enable(ccdc); 1925 break; 1926 1927 case ISP_PIPELINE_STREAM_STOPPED: 1928 ret = ccdc_disable(ccdc); 1929 if (ccdc->output & CCDC_OUTPUT_MEMORY) 1930 omap3isp_sbl_disable(isp, OMAP3_ISP_SBL_CCDC_WRITE); 1931 omap3isp_subclk_disable(isp, OMAP3_ISP_SUBCLK_CCDC); 1932 ccdc->underrun = 0; 1933 break; 1934 } 1935 1936 ccdc->state = enable; 1937 return ret; 1938 } 1939 1940 static struct v4l2_mbus_framefmt * 1941 __ccdc_get_format(struct isp_ccdc_device *ccdc, 1942 struct v4l2_subdev_state *sd_state, 1943 unsigned int pad, enum v4l2_subdev_format_whence which) 1944 { 1945 if (which == V4L2_SUBDEV_FORMAT_TRY) 1946 return v4l2_subdev_get_try_format(&ccdc->subdev, sd_state, 1947 pad); 1948 else 1949 return &ccdc->formats[pad]; 1950 } 1951 1952 static struct v4l2_rect * 1953 __ccdc_get_crop(struct isp_ccdc_device *ccdc, 1954 struct v4l2_subdev_state *sd_state, 1955 enum v4l2_subdev_format_whence which) 1956 { 1957 if (which == V4L2_SUBDEV_FORMAT_TRY) 1958 return v4l2_subdev_get_try_crop(&ccdc->subdev, sd_state, 1959 CCDC_PAD_SOURCE_OF); 1960 else 1961 return &ccdc->crop; 1962 } 1963 1964 /* 1965 * ccdc_try_format - Try video format on a pad 1966 * @ccdc: ISP CCDC device 1967 * @cfg : V4L2 subdev pad configuration 1968 * @pad: Pad number 1969 * @fmt: Format 1970 */ 1971 static void 1972 ccdc_try_format(struct isp_ccdc_device *ccdc, 1973 struct v4l2_subdev_state *sd_state, 1974 unsigned int pad, struct v4l2_mbus_framefmt *fmt, 1975 enum v4l2_subdev_format_whence which) 1976 { 1977 const struct isp_format_info *info; 1978 u32 pixelcode; 1979 unsigned int width = fmt->width; 1980 unsigned int height = fmt->height; 1981 struct v4l2_rect *crop; 1982 enum v4l2_field field; 1983 unsigned int i; 1984 1985 switch (pad) { 1986 case CCDC_PAD_SINK: 1987 for (i = 0; i < ARRAY_SIZE(ccdc_fmts); i++) { 1988 if (fmt->code == ccdc_fmts[i]) 1989 break; 1990 } 1991 1992 /* If not found, use SGRBG10 as default */ 1993 if (i >= ARRAY_SIZE(ccdc_fmts)) 1994 fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10; 1995 1996 /* Clamp the input size. */ 1997 fmt->width = clamp_t(u32, width, 32, 4096); 1998 fmt->height = clamp_t(u32, height, 32, 4096); 1999 2000 /* Default to progressive field order. */ 2001 if (fmt->field == V4L2_FIELD_ANY) 2002 fmt->field = V4L2_FIELD_NONE; 2003 2004 break; 2005 2006 case CCDC_PAD_SOURCE_OF: 2007 pixelcode = fmt->code; 2008 field = fmt->field; 2009 *fmt = *__ccdc_get_format(ccdc, sd_state, CCDC_PAD_SINK, 2010 which); 2011 2012 /* In SYNC mode the bridge converts YUV formats from 2X8 to 2013 * 1X16. In BT.656 no such conversion occurs. As we don't know 2014 * at this point whether the source will use SYNC or BT.656 mode 2015 * let's pretend the conversion always occurs. The CCDC will be 2016 * configured to pack bytes in BT.656, hiding the inaccuracy. 2017 * In all cases bytes can be swapped. 2018 */ 2019 if (fmt->code == MEDIA_BUS_FMT_YUYV8_2X8 || 2020 fmt->code == MEDIA_BUS_FMT_UYVY8_2X8) { 2021 /* Use the user requested format if YUV. */ 2022 if (pixelcode == MEDIA_BUS_FMT_YUYV8_2X8 || 2023 pixelcode == MEDIA_BUS_FMT_UYVY8_2X8 || 2024 pixelcode == MEDIA_BUS_FMT_YUYV8_1X16 || 2025 pixelcode == MEDIA_BUS_FMT_UYVY8_1X16) 2026 fmt->code = pixelcode; 2027 2028 if (fmt->code == MEDIA_BUS_FMT_YUYV8_2X8) 2029 fmt->code = MEDIA_BUS_FMT_YUYV8_1X16; 2030 else if (fmt->code == MEDIA_BUS_FMT_UYVY8_2X8) 2031 fmt->code = MEDIA_BUS_FMT_UYVY8_1X16; 2032 } 2033 2034 /* Hardcode the output size to the crop rectangle size. */ 2035 crop = __ccdc_get_crop(ccdc, sd_state, which); 2036 fmt->width = crop->width; 2037 fmt->height = crop->height; 2038 2039 /* When input format is interlaced with alternating fields the 2040 * CCDC can interleave the fields. 2041 */ 2042 if (fmt->field == V4L2_FIELD_ALTERNATE && 2043 (field == V4L2_FIELD_INTERLACED_TB || 2044 field == V4L2_FIELD_INTERLACED_BT)) { 2045 fmt->field = field; 2046 fmt->height *= 2; 2047 } 2048 2049 break; 2050 2051 case CCDC_PAD_SOURCE_VP: 2052 *fmt = *__ccdc_get_format(ccdc, sd_state, CCDC_PAD_SINK, 2053 which); 2054 2055 /* The video port interface truncates the data to 10 bits. */ 2056 info = omap3isp_video_format_info(fmt->code); 2057 fmt->code = info->truncated; 2058 2059 /* YUV formats are not supported by the video port. */ 2060 if (fmt->code == MEDIA_BUS_FMT_YUYV8_2X8 || 2061 fmt->code == MEDIA_BUS_FMT_UYVY8_2X8) 2062 fmt->code = 0; 2063 2064 /* The number of lines that can be clocked out from the video 2065 * port output must be at least one line less than the number 2066 * of input lines. 2067 */ 2068 fmt->width = clamp_t(u32, width, 32, fmt->width); 2069 fmt->height = clamp_t(u32, height, 32, fmt->height - 1); 2070 break; 2071 } 2072 2073 /* Data is written to memory unpacked, each 10-bit or 12-bit pixel is 2074 * stored on 2 bytes. 2075 */ 2076 fmt->colorspace = V4L2_COLORSPACE_SRGB; 2077 } 2078 2079 /* 2080 * ccdc_try_crop - Validate a crop rectangle 2081 * @ccdc: ISP CCDC device 2082 * @sink: format on the sink pad 2083 * @crop: crop rectangle to be validated 2084 */ 2085 static void ccdc_try_crop(struct isp_ccdc_device *ccdc, 2086 const struct v4l2_mbus_framefmt *sink, 2087 struct v4l2_rect *crop) 2088 { 2089 const struct isp_format_info *info; 2090 unsigned int max_width; 2091 2092 /* For Bayer formats, restrict left/top and width/height to even values 2093 * to keep the Bayer pattern. 2094 */ 2095 info = omap3isp_video_format_info(sink->code); 2096 if (info->flavor != MEDIA_BUS_FMT_Y8_1X8) { 2097 crop->left &= ~1; 2098 crop->top &= ~1; 2099 } 2100 2101 crop->left = clamp_t(u32, crop->left, 0, sink->width - CCDC_MIN_WIDTH); 2102 crop->top = clamp_t(u32, crop->top, 0, sink->height - CCDC_MIN_HEIGHT); 2103 2104 /* The data formatter truncates the number of horizontal output pixels 2105 * to a multiple of 16. To avoid clipping data, allow callers to request 2106 * an output size bigger than the input size up to the nearest multiple 2107 * of 16. 2108 */ 2109 max_width = (sink->width - crop->left + 15) & ~15; 2110 crop->width = clamp_t(u32, crop->width, CCDC_MIN_WIDTH, max_width) 2111 & ~15; 2112 crop->height = clamp_t(u32, crop->height, CCDC_MIN_HEIGHT, 2113 sink->height - crop->top); 2114 2115 /* Odd width/height values don't make sense for Bayer formats. */ 2116 if (info->flavor != MEDIA_BUS_FMT_Y8_1X8) { 2117 crop->width &= ~1; 2118 crop->height &= ~1; 2119 } 2120 } 2121 2122 /* 2123 * ccdc_enum_mbus_code - Handle pixel format enumeration 2124 * @sd : pointer to v4l2 subdev structure 2125 * @cfg : V4L2 subdev pad configuration 2126 * @code : pointer to v4l2_subdev_mbus_code_enum structure 2127 * return -EINVAL or zero on success 2128 */ 2129 static int ccdc_enum_mbus_code(struct v4l2_subdev *sd, 2130 struct v4l2_subdev_state *sd_state, 2131 struct v4l2_subdev_mbus_code_enum *code) 2132 { 2133 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd); 2134 struct v4l2_mbus_framefmt *format; 2135 2136 switch (code->pad) { 2137 case CCDC_PAD_SINK: 2138 if (code->index >= ARRAY_SIZE(ccdc_fmts)) 2139 return -EINVAL; 2140 2141 code->code = ccdc_fmts[code->index]; 2142 break; 2143 2144 case CCDC_PAD_SOURCE_OF: 2145 format = __ccdc_get_format(ccdc, sd_state, code->pad, 2146 code->which); 2147 2148 if (format->code == MEDIA_BUS_FMT_YUYV8_2X8 || 2149 format->code == MEDIA_BUS_FMT_UYVY8_2X8) { 2150 /* In YUV mode the CCDC can swap bytes. */ 2151 if (code->index == 0) 2152 code->code = MEDIA_BUS_FMT_YUYV8_1X16; 2153 else if (code->index == 1) 2154 code->code = MEDIA_BUS_FMT_UYVY8_1X16; 2155 else 2156 return -EINVAL; 2157 } else { 2158 /* In raw mode, no configurable format confversion is 2159 * available. 2160 */ 2161 if (code->index == 0) 2162 code->code = format->code; 2163 else 2164 return -EINVAL; 2165 } 2166 break; 2167 2168 case CCDC_PAD_SOURCE_VP: 2169 /* The CCDC supports no configurable format conversion 2170 * compatible with the video port. Enumerate a single output 2171 * format code. 2172 */ 2173 if (code->index != 0) 2174 return -EINVAL; 2175 2176 format = __ccdc_get_format(ccdc, sd_state, code->pad, 2177 code->which); 2178 2179 /* A pixel code equal to 0 means that the video port doesn't 2180 * support the input format. Don't enumerate any pixel code. 2181 */ 2182 if (format->code == 0) 2183 return -EINVAL; 2184 2185 code->code = format->code; 2186 break; 2187 2188 default: 2189 return -EINVAL; 2190 } 2191 2192 return 0; 2193 } 2194 2195 static int ccdc_enum_frame_size(struct v4l2_subdev *sd, 2196 struct v4l2_subdev_state *sd_state, 2197 struct v4l2_subdev_frame_size_enum *fse) 2198 { 2199 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd); 2200 struct v4l2_mbus_framefmt format; 2201 2202 if (fse->index != 0) 2203 return -EINVAL; 2204 2205 format.code = fse->code; 2206 format.width = 1; 2207 format.height = 1; 2208 ccdc_try_format(ccdc, sd_state, fse->pad, &format, fse->which); 2209 fse->min_width = format.width; 2210 fse->min_height = format.height; 2211 2212 if (format.code != fse->code) 2213 return -EINVAL; 2214 2215 format.code = fse->code; 2216 format.width = -1; 2217 format.height = -1; 2218 ccdc_try_format(ccdc, sd_state, fse->pad, &format, fse->which); 2219 fse->max_width = format.width; 2220 fse->max_height = format.height; 2221 2222 return 0; 2223 } 2224 2225 /* 2226 * ccdc_get_selection - Retrieve a selection rectangle on a pad 2227 * @sd: ISP CCDC V4L2 subdevice 2228 * @cfg: V4L2 subdev pad configuration 2229 * @sel: Selection rectangle 2230 * 2231 * The only supported rectangles are the crop rectangles on the output formatter 2232 * source pad. 2233 * 2234 * Return 0 on success or a negative error code otherwise. 2235 */ 2236 static int ccdc_get_selection(struct v4l2_subdev *sd, 2237 struct v4l2_subdev_state *sd_state, 2238 struct v4l2_subdev_selection *sel) 2239 { 2240 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd); 2241 struct v4l2_mbus_framefmt *format; 2242 2243 if (sel->pad != CCDC_PAD_SOURCE_OF) 2244 return -EINVAL; 2245 2246 switch (sel->target) { 2247 case V4L2_SEL_TGT_CROP_BOUNDS: 2248 sel->r.left = 0; 2249 sel->r.top = 0; 2250 sel->r.width = INT_MAX; 2251 sel->r.height = INT_MAX; 2252 2253 format = __ccdc_get_format(ccdc, sd_state, CCDC_PAD_SINK, 2254 sel->which); 2255 ccdc_try_crop(ccdc, format, &sel->r); 2256 break; 2257 2258 case V4L2_SEL_TGT_CROP: 2259 sel->r = *__ccdc_get_crop(ccdc, sd_state, sel->which); 2260 break; 2261 2262 default: 2263 return -EINVAL; 2264 } 2265 2266 return 0; 2267 } 2268 2269 /* 2270 * ccdc_set_selection - Set a selection rectangle on a pad 2271 * @sd: ISP CCDC V4L2 subdevice 2272 * @cfg: V4L2 subdev pad configuration 2273 * @sel: Selection rectangle 2274 * 2275 * The only supported rectangle is the actual crop rectangle on the output 2276 * formatter source pad. 2277 * 2278 * Return 0 on success or a negative error code otherwise. 2279 */ 2280 static int ccdc_set_selection(struct v4l2_subdev *sd, 2281 struct v4l2_subdev_state *sd_state, 2282 struct v4l2_subdev_selection *sel) 2283 { 2284 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd); 2285 struct v4l2_mbus_framefmt *format; 2286 2287 if (sel->target != V4L2_SEL_TGT_CROP || 2288 sel->pad != CCDC_PAD_SOURCE_OF) 2289 return -EINVAL; 2290 2291 /* The crop rectangle can't be changed while streaming. */ 2292 if (ccdc->state != ISP_PIPELINE_STREAM_STOPPED) 2293 return -EBUSY; 2294 2295 /* Modifying the crop rectangle always changes the format on the source 2296 * pad. If the KEEP_CONFIG flag is set, just return the current crop 2297 * rectangle. 2298 */ 2299 if (sel->flags & V4L2_SEL_FLAG_KEEP_CONFIG) { 2300 sel->r = *__ccdc_get_crop(ccdc, sd_state, sel->which); 2301 return 0; 2302 } 2303 2304 format = __ccdc_get_format(ccdc, sd_state, CCDC_PAD_SINK, sel->which); 2305 ccdc_try_crop(ccdc, format, &sel->r); 2306 *__ccdc_get_crop(ccdc, sd_state, sel->which) = sel->r; 2307 2308 /* Update the source format. */ 2309 format = __ccdc_get_format(ccdc, sd_state, CCDC_PAD_SOURCE_OF, 2310 sel->which); 2311 ccdc_try_format(ccdc, sd_state, CCDC_PAD_SOURCE_OF, format, 2312 sel->which); 2313 2314 return 0; 2315 } 2316 2317 /* 2318 * ccdc_get_format - Retrieve the video format on a pad 2319 * @sd : ISP CCDC V4L2 subdevice 2320 * @cfg: V4L2 subdev pad configuration 2321 * @fmt: Format 2322 * 2323 * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond 2324 * to the format type. 2325 */ 2326 static int ccdc_get_format(struct v4l2_subdev *sd, 2327 struct v4l2_subdev_state *sd_state, 2328 struct v4l2_subdev_format *fmt) 2329 { 2330 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd); 2331 struct v4l2_mbus_framefmt *format; 2332 2333 format = __ccdc_get_format(ccdc, sd_state, fmt->pad, fmt->which); 2334 if (format == NULL) 2335 return -EINVAL; 2336 2337 fmt->format = *format; 2338 return 0; 2339 } 2340 2341 /* 2342 * ccdc_set_format - Set the video format on a pad 2343 * @sd : ISP CCDC V4L2 subdevice 2344 * @cfg: V4L2 subdev pad configuration 2345 * @fmt: Format 2346 * 2347 * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond 2348 * to the format type. 2349 */ 2350 static int ccdc_set_format(struct v4l2_subdev *sd, 2351 struct v4l2_subdev_state *sd_state, 2352 struct v4l2_subdev_format *fmt) 2353 { 2354 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd); 2355 struct v4l2_mbus_framefmt *format; 2356 struct v4l2_rect *crop; 2357 2358 format = __ccdc_get_format(ccdc, sd_state, fmt->pad, fmt->which); 2359 if (format == NULL) 2360 return -EINVAL; 2361 2362 ccdc_try_format(ccdc, sd_state, fmt->pad, &fmt->format, fmt->which); 2363 *format = fmt->format; 2364 2365 /* Propagate the format from sink to source */ 2366 if (fmt->pad == CCDC_PAD_SINK) { 2367 /* Reset the crop rectangle. */ 2368 crop = __ccdc_get_crop(ccdc, sd_state, fmt->which); 2369 crop->left = 0; 2370 crop->top = 0; 2371 crop->width = fmt->format.width; 2372 crop->height = fmt->format.height; 2373 2374 ccdc_try_crop(ccdc, &fmt->format, crop); 2375 2376 /* Update the source formats. */ 2377 format = __ccdc_get_format(ccdc, sd_state, CCDC_PAD_SOURCE_OF, 2378 fmt->which); 2379 *format = fmt->format; 2380 ccdc_try_format(ccdc, sd_state, CCDC_PAD_SOURCE_OF, format, 2381 fmt->which); 2382 2383 format = __ccdc_get_format(ccdc, sd_state, CCDC_PAD_SOURCE_VP, 2384 fmt->which); 2385 *format = fmt->format; 2386 ccdc_try_format(ccdc, sd_state, CCDC_PAD_SOURCE_VP, format, 2387 fmt->which); 2388 } 2389 2390 return 0; 2391 } 2392 2393 /* 2394 * Decide whether desired output pixel code can be obtained with 2395 * the lane shifter by shifting the input pixel code. 2396 * @in: input pixelcode to shifter 2397 * @out: output pixelcode from shifter 2398 * @additional_shift: # of bits the sensor's LSB is offset from CAMEXT[0] 2399 * 2400 * return true if the combination is possible 2401 * return false otherwise 2402 */ 2403 static bool ccdc_is_shiftable(u32 in, u32 out, unsigned int additional_shift) 2404 { 2405 const struct isp_format_info *in_info, *out_info; 2406 2407 if (in == out) 2408 return true; 2409 2410 in_info = omap3isp_video_format_info(in); 2411 out_info = omap3isp_video_format_info(out); 2412 2413 if ((in_info->flavor == 0) || (out_info->flavor == 0)) 2414 return false; 2415 2416 if (in_info->flavor != out_info->flavor) 2417 return false; 2418 2419 return in_info->width - out_info->width + additional_shift <= 6; 2420 } 2421 2422 static int ccdc_link_validate(struct v4l2_subdev *sd, 2423 struct media_link *link, 2424 struct v4l2_subdev_format *source_fmt, 2425 struct v4l2_subdev_format *sink_fmt) 2426 { 2427 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd); 2428 unsigned long parallel_shift; 2429 2430 /* Check if the two ends match */ 2431 if (source_fmt->format.width != sink_fmt->format.width || 2432 source_fmt->format.height != sink_fmt->format.height) 2433 return -EPIPE; 2434 2435 /* We've got a parallel sensor here. */ 2436 if (ccdc->input == CCDC_INPUT_PARALLEL) { 2437 struct v4l2_subdev *sd = 2438 media_entity_to_v4l2_subdev(link->source->entity); 2439 struct isp_bus_cfg *bus_cfg = v4l2_subdev_to_bus_cfg(sd); 2440 2441 parallel_shift = bus_cfg->bus.parallel.data_lane_shift; 2442 } else { 2443 parallel_shift = 0; 2444 } 2445 2446 /* Lane shifter may be used to drop bits on CCDC sink pad */ 2447 if (!ccdc_is_shiftable(source_fmt->format.code, 2448 sink_fmt->format.code, parallel_shift)) 2449 return -EPIPE; 2450 2451 return 0; 2452 } 2453 2454 /* 2455 * ccdc_init_formats - Initialize formats on all pads 2456 * @sd: ISP CCDC V4L2 subdevice 2457 * @fh: V4L2 subdev file handle 2458 * 2459 * Initialize all pad formats with default values. If fh is not NULL, try 2460 * formats are initialized on the file handle. Otherwise active formats are 2461 * initialized on the device. 2462 */ 2463 static int ccdc_init_formats(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) 2464 { 2465 struct v4l2_subdev_format format; 2466 2467 memset(&format, 0, sizeof(format)); 2468 format.pad = CCDC_PAD_SINK; 2469 format.which = fh ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE; 2470 format.format.code = MEDIA_BUS_FMT_SGRBG10_1X10; 2471 format.format.width = 4096; 2472 format.format.height = 4096; 2473 ccdc_set_format(sd, fh ? fh->state : NULL, &format); 2474 2475 return 0; 2476 } 2477 2478 /* V4L2 subdev core operations */ 2479 static const struct v4l2_subdev_core_ops ccdc_v4l2_core_ops = { 2480 .ioctl = ccdc_ioctl, 2481 .subscribe_event = ccdc_subscribe_event, 2482 .unsubscribe_event = ccdc_unsubscribe_event, 2483 }; 2484 2485 /* V4L2 subdev video operations */ 2486 static const struct v4l2_subdev_video_ops ccdc_v4l2_video_ops = { 2487 .s_stream = ccdc_set_stream, 2488 }; 2489 2490 /* V4L2 subdev pad operations */ 2491 static const struct v4l2_subdev_pad_ops ccdc_v4l2_pad_ops = { 2492 .enum_mbus_code = ccdc_enum_mbus_code, 2493 .enum_frame_size = ccdc_enum_frame_size, 2494 .get_fmt = ccdc_get_format, 2495 .set_fmt = ccdc_set_format, 2496 .get_selection = ccdc_get_selection, 2497 .set_selection = ccdc_set_selection, 2498 .link_validate = ccdc_link_validate, 2499 }; 2500 2501 /* V4L2 subdev operations */ 2502 static const struct v4l2_subdev_ops ccdc_v4l2_ops = { 2503 .core = &ccdc_v4l2_core_ops, 2504 .video = &ccdc_v4l2_video_ops, 2505 .pad = &ccdc_v4l2_pad_ops, 2506 }; 2507 2508 /* V4L2 subdev internal operations */ 2509 static const struct v4l2_subdev_internal_ops ccdc_v4l2_internal_ops = { 2510 .open = ccdc_init_formats, 2511 }; 2512 2513 /* ----------------------------------------------------------------------------- 2514 * Media entity operations 2515 */ 2516 2517 /* 2518 * ccdc_link_setup - Setup CCDC connections 2519 * @entity: CCDC media entity 2520 * @local: Pad at the local end of the link 2521 * @remote: Pad at the remote end of the link 2522 * @flags: Link flags 2523 * 2524 * return -EINVAL or zero on success 2525 */ 2526 static int ccdc_link_setup(struct media_entity *entity, 2527 const struct media_pad *local, 2528 const struct media_pad *remote, u32 flags) 2529 { 2530 struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity); 2531 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd); 2532 struct isp_device *isp = to_isp_device(ccdc); 2533 unsigned int index = local->index; 2534 2535 /* FIXME: this is actually a hack! */ 2536 if (is_media_entity_v4l2_subdev(remote->entity)) 2537 index |= 2 << 16; 2538 2539 switch (index) { 2540 case CCDC_PAD_SINK | 2 << 16: 2541 /* Read from the sensor (parallel interface), CCP2, CSI2a or 2542 * CSI2c. 2543 */ 2544 if (!(flags & MEDIA_LNK_FL_ENABLED)) { 2545 ccdc->input = CCDC_INPUT_NONE; 2546 break; 2547 } 2548 2549 if (ccdc->input != CCDC_INPUT_NONE) 2550 return -EBUSY; 2551 2552 if (remote->entity == &isp->isp_ccp2.subdev.entity) 2553 ccdc->input = CCDC_INPUT_CCP2B; 2554 else if (remote->entity == &isp->isp_csi2a.subdev.entity) 2555 ccdc->input = CCDC_INPUT_CSI2A; 2556 else if (remote->entity == &isp->isp_csi2c.subdev.entity) 2557 ccdc->input = CCDC_INPUT_CSI2C; 2558 else 2559 ccdc->input = CCDC_INPUT_PARALLEL; 2560 2561 break; 2562 2563 /* 2564 * The ISP core doesn't support pipelines with multiple video outputs. 2565 * Revisit this when it will be implemented, and return -EBUSY for now. 2566 */ 2567 2568 case CCDC_PAD_SOURCE_VP | 2 << 16: 2569 /* Write to preview engine, histogram and H3A. When none of 2570 * those links are active, the video port can be disabled. 2571 */ 2572 if (flags & MEDIA_LNK_FL_ENABLED) { 2573 if (ccdc->output & ~CCDC_OUTPUT_PREVIEW) 2574 return -EBUSY; 2575 ccdc->output |= CCDC_OUTPUT_PREVIEW; 2576 } else { 2577 ccdc->output &= ~CCDC_OUTPUT_PREVIEW; 2578 } 2579 break; 2580 2581 case CCDC_PAD_SOURCE_OF: 2582 /* Write to memory */ 2583 if (flags & MEDIA_LNK_FL_ENABLED) { 2584 if (ccdc->output & ~CCDC_OUTPUT_MEMORY) 2585 return -EBUSY; 2586 ccdc->output |= CCDC_OUTPUT_MEMORY; 2587 } else { 2588 ccdc->output &= ~CCDC_OUTPUT_MEMORY; 2589 } 2590 break; 2591 2592 case CCDC_PAD_SOURCE_OF | 2 << 16: 2593 /* Write to resizer */ 2594 if (flags & MEDIA_LNK_FL_ENABLED) { 2595 if (ccdc->output & ~CCDC_OUTPUT_RESIZER) 2596 return -EBUSY; 2597 ccdc->output |= CCDC_OUTPUT_RESIZER; 2598 } else { 2599 ccdc->output &= ~CCDC_OUTPUT_RESIZER; 2600 } 2601 break; 2602 2603 default: 2604 return -EINVAL; 2605 } 2606 2607 return 0; 2608 } 2609 2610 /* media operations */ 2611 static const struct media_entity_operations ccdc_media_ops = { 2612 .link_setup = ccdc_link_setup, 2613 .link_validate = v4l2_subdev_link_validate, 2614 }; 2615 2616 void omap3isp_ccdc_unregister_entities(struct isp_ccdc_device *ccdc) 2617 { 2618 v4l2_device_unregister_subdev(&ccdc->subdev); 2619 omap3isp_video_unregister(&ccdc->video_out); 2620 } 2621 2622 int omap3isp_ccdc_register_entities(struct isp_ccdc_device *ccdc, 2623 struct v4l2_device *vdev) 2624 { 2625 int ret; 2626 2627 /* Register the subdev and video node. */ 2628 ccdc->subdev.dev = vdev->mdev->dev; 2629 ret = v4l2_device_register_subdev(vdev, &ccdc->subdev); 2630 if (ret < 0) 2631 goto error; 2632 2633 ret = omap3isp_video_register(&ccdc->video_out, vdev); 2634 if (ret < 0) 2635 goto error; 2636 2637 return 0; 2638 2639 error: 2640 omap3isp_ccdc_unregister_entities(ccdc); 2641 return ret; 2642 } 2643 2644 /* ----------------------------------------------------------------------------- 2645 * ISP CCDC initialisation and cleanup 2646 */ 2647 2648 /* 2649 * ccdc_init_entities - Initialize V4L2 subdev and media entity 2650 * @ccdc: ISP CCDC module 2651 * 2652 * Return 0 on success and a negative error code on failure. 2653 */ 2654 static int ccdc_init_entities(struct isp_ccdc_device *ccdc) 2655 { 2656 struct v4l2_subdev *sd = &ccdc->subdev; 2657 struct media_pad *pads = ccdc->pads; 2658 struct media_entity *me = &sd->entity; 2659 int ret; 2660 2661 ccdc->input = CCDC_INPUT_NONE; 2662 2663 v4l2_subdev_init(sd, &ccdc_v4l2_ops); 2664 sd->internal_ops = &ccdc_v4l2_internal_ops; 2665 strscpy(sd->name, "OMAP3 ISP CCDC", sizeof(sd->name)); 2666 sd->grp_id = 1 << 16; /* group ID for isp subdevs */ 2667 v4l2_set_subdevdata(sd, ccdc); 2668 sd->flags |= V4L2_SUBDEV_FL_HAS_EVENTS | V4L2_SUBDEV_FL_HAS_DEVNODE; 2669 2670 pads[CCDC_PAD_SINK].flags = MEDIA_PAD_FL_SINK 2671 | MEDIA_PAD_FL_MUST_CONNECT; 2672 pads[CCDC_PAD_SOURCE_VP].flags = MEDIA_PAD_FL_SOURCE; 2673 pads[CCDC_PAD_SOURCE_OF].flags = MEDIA_PAD_FL_SOURCE; 2674 2675 me->ops = &ccdc_media_ops; 2676 ret = media_entity_pads_init(me, CCDC_PADS_NUM, pads); 2677 if (ret < 0) 2678 return ret; 2679 2680 ccdc_init_formats(sd, NULL); 2681 2682 ccdc->video_out.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; 2683 ccdc->video_out.ops = &ccdc_video_ops; 2684 ccdc->video_out.isp = to_isp_device(ccdc); 2685 ccdc->video_out.capture_mem = PAGE_ALIGN(4096 * 4096) * 3; 2686 ccdc->video_out.bpl_alignment = 32; 2687 2688 ret = omap3isp_video_init(&ccdc->video_out, "CCDC"); 2689 if (ret < 0) 2690 goto error; 2691 2692 return 0; 2693 2694 error: 2695 media_entity_cleanup(me); 2696 return ret; 2697 } 2698 2699 /* 2700 * omap3isp_ccdc_init - CCDC module initialization. 2701 * @isp: Device pointer specific to the OMAP3 ISP. 2702 * 2703 * TODO: Get the initialisation values from platform data. 2704 * 2705 * Return 0 on success or a negative error code otherwise. 2706 */ 2707 int omap3isp_ccdc_init(struct isp_device *isp) 2708 { 2709 struct isp_ccdc_device *ccdc = &isp->isp_ccdc; 2710 int ret; 2711 2712 spin_lock_init(&ccdc->lock); 2713 init_waitqueue_head(&ccdc->wait); 2714 mutex_init(&ccdc->ioctl_lock); 2715 2716 ccdc->stopping = CCDC_STOP_NOT_REQUESTED; 2717 2718 INIT_WORK(&ccdc->lsc.table_work, ccdc_lsc_free_table_work); 2719 ccdc->lsc.state = LSC_STATE_STOPPED; 2720 INIT_LIST_HEAD(&ccdc->lsc.free_queue); 2721 spin_lock_init(&ccdc->lsc.req_lock); 2722 2723 ccdc->clamp.oblen = 0; 2724 ccdc->clamp.dcsubval = 0; 2725 2726 ccdc->update = OMAP3ISP_CCDC_BLCLAMP; 2727 ccdc_apply_controls(ccdc); 2728 2729 ret = ccdc_init_entities(ccdc); 2730 if (ret < 0) { 2731 mutex_destroy(&ccdc->ioctl_lock); 2732 return ret; 2733 } 2734 2735 return 0; 2736 } 2737 2738 /* 2739 * omap3isp_ccdc_cleanup - CCDC module cleanup. 2740 * @isp: Device pointer specific to the OMAP3 ISP. 2741 */ 2742 void omap3isp_ccdc_cleanup(struct isp_device *isp) 2743 { 2744 struct isp_ccdc_device *ccdc = &isp->isp_ccdc; 2745 2746 omap3isp_video_cleanup(&ccdc->video_out); 2747 media_entity_cleanup(&ccdc->subdev.entity); 2748 2749 /* Free LSC requests. As the CCDC is stopped there's no active request, 2750 * so only the pending request and the free queue need to be handled. 2751 */ 2752 ccdc_lsc_free_request(ccdc, ccdc->lsc.request); 2753 cancel_work_sync(&ccdc->lsc.table_work); 2754 ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue); 2755 2756 if (ccdc->fpc.addr != NULL) 2757 dma_free_coherent(isp->dev, ccdc->fpc.fpnum * 4, ccdc->fpc.addr, 2758 ccdc->fpc.dma); 2759 2760 mutex_destroy(&ccdc->ioctl_lock); 2761 } 2762