1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * ispccdc.c
4  *
5  * TI OMAP3 ISP - CCDC module
6  *
7  * Copyright (C) 2009-2010 Nokia Corporation
8  * Copyright (C) 2009 Texas Instruments, Inc.
9  *
10  * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
11  *	     Sakari Ailus <sakari.ailus@iki.fi>
12  */
13 
14 #include <linux/module.h>
15 #include <linux/uaccess.h>
16 #include <linux/delay.h>
17 #include <linux/device.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/mm.h>
20 #include <linux/sched.h>
21 #include <linux/slab.h>
22 #include <media/v4l2-event.h>
23 
24 #include "isp.h"
25 #include "ispreg.h"
26 #include "ispccdc.h"
27 
28 #define CCDC_MIN_WIDTH		32
29 #define CCDC_MIN_HEIGHT		32
30 
31 static struct v4l2_mbus_framefmt *
32 __ccdc_get_format(struct isp_ccdc_device *ccdc,
33 		  struct v4l2_subdev_state *sd_state,
34 		  unsigned int pad, enum v4l2_subdev_format_whence which);
35 
36 static const unsigned int ccdc_fmts[] = {
37 	MEDIA_BUS_FMT_Y8_1X8,
38 	MEDIA_BUS_FMT_Y10_1X10,
39 	MEDIA_BUS_FMT_Y12_1X12,
40 	MEDIA_BUS_FMT_SGRBG8_1X8,
41 	MEDIA_BUS_FMT_SRGGB8_1X8,
42 	MEDIA_BUS_FMT_SBGGR8_1X8,
43 	MEDIA_BUS_FMT_SGBRG8_1X8,
44 	MEDIA_BUS_FMT_SGRBG10_1X10,
45 	MEDIA_BUS_FMT_SRGGB10_1X10,
46 	MEDIA_BUS_FMT_SBGGR10_1X10,
47 	MEDIA_BUS_FMT_SGBRG10_1X10,
48 	MEDIA_BUS_FMT_SGRBG12_1X12,
49 	MEDIA_BUS_FMT_SRGGB12_1X12,
50 	MEDIA_BUS_FMT_SBGGR12_1X12,
51 	MEDIA_BUS_FMT_SGBRG12_1X12,
52 	MEDIA_BUS_FMT_YUYV8_2X8,
53 	MEDIA_BUS_FMT_UYVY8_2X8,
54 };
55 
56 /*
57  * ccdc_print_status - Print current CCDC Module register values.
58  * @ccdc: Pointer to ISP CCDC device.
59  *
60  * Also prints other debug information stored in the CCDC module.
61  */
62 #define CCDC_PRINT_REGISTER(isp, name)\
63 	dev_dbg(isp->dev, "###CCDC " #name "=0x%08x\n", \
64 		isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_##name))
65 
66 static void ccdc_print_status(struct isp_ccdc_device *ccdc)
67 {
68 	struct isp_device *isp = to_isp_device(ccdc);
69 
70 	dev_dbg(isp->dev, "-------------CCDC Register dump-------------\n");
71 
72 	CCDC_PRINT_REGISTER(isp, PCR);
73 	CCDC_PRINT_REGISTER(isp, SYN_MODE);
74 	CCDC_PRINT_REGISTER(isp, HD_VD_WID);
75 	CCDC_PRINT_REGISTER(isp, PIX_LINES);
76 	CCDC_PRINT_REGISTER(isp, HORZ_INFO);
77 	CCDC_PRINT_REGISTER(isp, VERT_START);
78 	CCDC_PRINT_REGISTER(isp, VERT_LINES);
79 	CCDC_PRINT_REGISTER(isp, CULLING);
80 	CCDC_PRINT_REGISTER(isp, HSIZE_OFF);
81 	CCDC_PRINT_REGISTER(isp, SDOFST);
82 	CCDC_PRINT_REGISTER(isp, SDR_ADDR);
83 	CCDC_PRINT_REGISTER(isp, CLAMP);
84 	CCDC_PRINT_REGISTER(isp, DCSUB);
85 	CCDC_PRINT_REGISTER(isp, COLPTN);
86 	CCDC_PRINT_REGISTER(isp, BLKCMP);
87 	CCDC_PRINT_REGISTER(isp, FPC);
88 	CCDC_PRINT_REGISTER(isp, FPC_ADDR);
89 	CCDC_PRINT_REGISTER(isp, VDINT);
90 	CCDC_PRINT_REGISTER(isp, ALAW);
91 	CCDC_PRINT_REGISTER(isp, REC656IF);
92 	CCDC_PRINT_REGISTER(isp, CFG);
93 	CCDC_PRINT_REGISTER(isp, FMTCFG);
94 	CCDC_PRINT_REGISTER(isp, FMT_HORZ);
95 	CCDC_PRINT_REGISTER(isp, FMT_VERT);
96 	CCDC_PRINT_REGISTER(isp, PRGEVEN0);
97 	CCDC_PRINT_REGISTER(isp, PRGEVEN1);
98 	CCDC_PRINT_REGISTER(isp, PRGODD0);
99 	CCDC_PRINT_REGISTER(isp, PRGODD1);
100 	CCDC_PRINT_REGISTER(isp, VP_OUT);
101 	CCDC_PRINT_REGISTER(isp, LSC_CONFIG);
102 	CCDC_PRINT_REGISTER(isp, LSC_INITIAL);
103 	CCDC_PRINT_REGISTER(isp, LSC_TABLE_BASE);
104 	CCDC_PRINT_REGISTER(isp, LSC_TABLE_OFFSET);
105 
106 	dev_dbg(isp->dev, "--------------------------------------------\n");
107 }
108 
109 /*
110  * omap3isp_ccdc_busy - Get busy state of the CCDC.
111  * @ccdc: Pointer to ISP CCDC device.
112  */
113 int omap3isp_ccdc_busy(struct isp_ccdc_device *ccdc)
114 {
115 	struct isp_device *isp = to_isp_device(ccdc);
116 
117 	return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR) &
118 		ISPCCDC_PCR_BUSY;
119 }
120 
121 /* -----------------------------------------------------------------------------
122  * Lens Shading Compensation
123  */
124 
125 /*
126  * ccdc_lsc_validate_config - Check that LSC configuration is valid.
127  * @ccdc: Pointer to ISP CCDC device.
128  * @lsc_cfg: the LSC configuration to check.
129  *
130  * Returns 0 if the LSC configuration is valid, or -EINVAL if invalid.
131  */
132 static int ccdc_lsc_validate_config(struct isp_ccdc_device *ccdc,
133 				    struct omap3isp_ccdc_lsc_config *lsc_cfg)
134 {
135 	struct isp_device *isp = to_isp_device(ccdc);
136 	struct v4l2_mbus_framefmt *format;
137 	unsigned int paxel_width, paxel_height;
138 	unsigned int paxel_shift_x, paxel_shift_y;
139 	unsigned int min_width, min_height, min_size;
140 	unsigned int input_width, input_height;
141 
142 	paxel_shift_x = lsc_cfg->gain_mode_m;
143 	paxel_shift_y = lsc_cfg->gain_mode_n;
144 
145 	if ((paxel_shift_x < 2) || (paxel_shift_x > 6) ||
146 	    (paxel_shift_y < 2) || (paxel_shift_y > 6)) {
147 		dev_dbg(isp->dev, "CCDC: LSC: Invalid paxel size\n");
148 		return -EINVAL;
149 	}
150 
151 	if (lsc_cfg->offset & 3) {
152 		dev_dbg(isp->dev,
153 			"CCDC: LSC: Offset must be a multiple of 4\n");
154 		return -EINVAL;
155 	}
156 
157 	if ((lsc_cfg->initial_x & 1) || (lsc_cfg->initial_y & 1)) {
158 		dev_dbg(isp->dev, "CCDC: LSC: initial_x and y must be even\n");
159 		return -EINVAL;
160 	}
161 
162 	format = __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
163 				   V4L2_SUBDEV_FORMAT_ACTIVE);
164 	input_width = format->width;
165 	input_height = format->height;
166 
167 	/* Calculate minimum bytesize for validation */
168 	paxel_width = 1 << paxel_shift_x;
169 	min_width = ((input_width + lsc_cfg->initial_x + paxel_width - 1)
170 		     >> paxel_shift_x) + 1;
171 
172 	paxel_height = 1 << paxel_shift_y;
173 	min_height = ((input_height + lsc_cfg->initial_y + paxel_height - 1)
174 		     >> paxel_shift_y) + 1;
175 
176 	min_size = 4 * min_width * min_height;
177 	if (min_size > lsc_cfg->size) {
178 		dev_dbg(isp->dev, "CCDC: LSC: too small table\n");
179 		return -EINVAL;
180 	}
181 	if (lsc_cfg->offset < (min_width * 4)) {
182 		dev_dbg(isp->dev, "CCDC: LSC: Offset is too small\n");
183 		return -EINVAL;
184 	}
185 	if ((lsc_cfg->size / lsc_cfg->offset) < min_height) {
186 		dev_dbg(isp->dev, "CCDC: LSC: Wrong size/offset combination\n");
187 		return -EINVAL;
188 	}
189 	return 0;
190 }
191 
192 /*
193  * ccdc_lsc_program_table - Program Lens Shading Compensation table address.
194  * @ccdc: Pointer to ISP CCDC device.
195  */
196 static void ccdc_lsc_program_table(struct isp_ccdc_device *ccdc,
197 				   dma_addr_t addr)
198 {
199 	isp_reg_writel(to_isp_device(ccdc), addr,
200 		       OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_TABLE_BASE);
201 }
202 
203 /*
204  * ccdc_lsc_setup_regs - Configures the lens shading compensation module
205  * @ccdc: Pointer to ISP CCDC device.
206  */
207 static void ccdc_lsc_setup_regs(struct isp_ccdc_device *ccdc,
208 				struct omap3isp_ccdc_lsc_config *cfg)
209 {
210 	struct isp_device *isp = to_isp_device(ccdc);
211 	int reg;
212 
213 	isp_reg_writel(isp, cfg->offset, OMAP3_ISP_IOMEM_CCDC,
214 		       ISPCCDC_LSC_TABLE_OFFSET);
215 
216 	reg = 0;
217 	reg |= cfg->gain_mode_n << ISPCCDC_LSC_GAIN_MODE_N_SHIFT;
218 	reg |= cfg->gain_mode_m << ISPCCDC_LSC_GAIN_MODE_M_SHIFT;
219 	reg |= cfg->gain_format << ISPCCDC_LSC_GAIN_FORMAT_SHIFT;
220 	isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG);
221 
222 	reg = 0;
223 	reg &= ~ISPCCDC_LSC_INITIAL_X_MASK;
224 	reg |= cfg->initial_x << ISPCCDC_LSC_INITIAL_X_SHIFT;
225 	reg &= ~ISPCCDC_LSC_INITIAL_Y_MASK;
226 	reg |= cfg->initial_y << ISPCCDC_LSC_INITIAL_Y_SHIFT;
227 	isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC,
228 		       ISPCCDC_LSC_INITIAL);
229 }
230 
231 static int ccdc_lsc_wait_prefetch(struct isp_ccdc_device *ccdc)
232 {
233 	struct isp_device *isp = to_isp_device(ccdc);
234 	unsigned int wait;
235 
236 	isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
237 		       OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
238 
239 	/* timeout 1 ms */
240 	for (wait = 0; wait < 1000; wait++) {
241 		if (isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS) &
242 				  IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ) {
243 			isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
244 				       OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
245 			return 0;
246 		}
247 
248 		rmb();
249 		udelay(1);
250 	}
251 
252 	return -ETIMEDOUT;
253 }
254 
255 /*
256  * __ccdc_lsc_enable - Enables/Disables the Lens Shading Compensation module.
257  * @ccdc: Pointer to ISP CCDC device.
258  * @enable: 0 Disables LSC, 1 Enables LSC.
259  */
260 static int __ccdc_lsc_enable(struct isp_ccdc_device *ccdc, int enable)
261 {
262 	struct isp_device *isp = to_isp_device(ccdc);
263 	const struct v4l2_mbus_framefmt *format =
264 		__ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
265 				  V4L2_SUBDEV_FORMAT_ACTIVE);
266 
267 	if ((format->code != MEDIA_BUS_FMT_SGRBG10_1X10) &&
268 	    (format->code != MEDIA_BUS_FMT_SRGGB10_1X10) &&
269 	    (format->code != MEDIA_BUS_FMT_SBGGR10_1X10) &&
270 	    (format->code != MEDIA_BUS_FMT_SGBRG10_1X10))
271 		return -EINVAL;
272 
273 	if (enable)
274 		omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_LSC_READ);
275 
276 	isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
277 			ISPCCDC_LSC_ENABLE, enable ? ISPCCDC_LSC_ENABLE : 0);
278 
279 	if (enable) {
280 		if (ccdc_lsc_wait_prefetch(ccdc) < 0) {
281 			isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC,
282 				    ISPCCDC_LSC_CONFIG, ISPCCDC_LSC_ENABLE);
283 			ccdc->lsc.state = LSC_STATE_STOPPED;
284 			dev_warn(to_device(ccdc), "LSC prefetch timeout\n");
285 			return -ETIMEDOUT;
286 		}
287 		ccdc->lsc.state = LSC_STATE_RUNNING;
288 	} else {
289 		ccdc->lsc.state = LSC_STATE_STOPPING;
290 	}
291 
292 	return 0;
293 }
294 
295 static int ccdc_lsc_busy(struct isp_ccdc_device *ccdc)
296 {
297 	struct isp_device *isp = to_isp_device(ccdc);
298 
299 	return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG) &
300 			     ISPCCDC_LSC_BUSY;
301 }
302 
303 /*
304  * __ccdc_lsc_configure - Apply a new configuration to the LSC engine
305  * @ccdc: Pointer to ISP CCDC device
306  * @req: New configuration request
307  */
308 static int __ccdc_lsc_configure(struct isp_ccdc_device *ccdc,
309 				struct ispccdc_lsc_config_req *req)
310 {
311 	if (!req->enable)
312 		return -EINVAL;
313 
314 	if (ccdc_lsc_validate_config(ccdc, &req->config) < 0) {
315 		dev_dbg(to_device(ccdc), "Discard LSC configuration\n");
316 		return -EINVAL;
317 	}
318 
319 	if (ccdc_lsc_busy(ccdc))
320 		return -EBUSY;
321 
322 	ccdc_lsc_setup_regs(ccdc, &req->config);
323 	ccdc_lsc_program_table(ccdc, req->table.dma);
324 	return 0;
325 }
326 
327 /*
328  * ccdc_lsc_error_handler - Handle LSC prefetch error scenario.
329  * @ccdc: Pointer to ISP CCDC device.
330  *
331  * Disables LSC, and defers enablement to shadow registers update time.
332  */
333 static void ccdc_lsc_error_handler(struct isp_ccdc_device *ccdc)
334 {
335 	struct isp_device *isp = to_isp_device(ccdc);
336 	/*
337 	 * From OMAP3 TRM: When this event is pending, the module
338 	 * goes into transparent mode (output =input). Normal
339 	 * operation can be resumed at the start of the next frame
340 	 * after:
341 	 *  1) Clearing this event
342 	 *  2) Disabling the LSC module
343 	 *  3) Enabling it
344 	 */
345 	isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
346 		    ISPCCDC_LSC_ENABLE);
347 	ccdc->lsc.state = LSC_STATE_STOPPED;
348 }
349 
350 static void ccdc_lsc_free_request(struct isp_ccdc_device *ccdc,
351 				  struct ispccdc_lsc_config_req *req)
352 {
353 	struct isp_device *isp = to_isp_device(ccdc);
354 
355 	if (req == NULL)
356 		return;
357 
358 	if (req->table.addr) {
359 		sg_free_table(&req->table.sgt);
360 		dma_free_coherent(isp->dev, req->config.size, req->table.addr,
361 				  req->table.dma);
362 	}
363 
364 	kfree(req);
365 }
366 
367 static void ccdc_lsc_free_queue(struct isp_ccdc_device *ccdc,
368 				struct list_head *queue)
369 {
370 	struct ispccdc_lsc_config_req *req, *n;
371 	unsigned long flags;
372 
373 	spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
374 	list_for_each_entry_safe(req, n, queue, list) {
375 		list_del(&req->list);
376 		spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
377 		ccdc_lsc_free_request(ccdc, req);
378 		spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
379 	}
380 	spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
381 }
382 
383 static void ccdc_lsc_free_table_work(struct work_struct *work)
384 {
385 	struct isp_ccdc_device *ccdc;
386 	struct ispccdc_lsc *lsc;
387 
388 	lsc = container_of(work, struct ispccdc_lsc, table_work);
389 	ccdc = container_of(lsc, struct isp_ccdc_device, lsc);
390 
391 	ccdc_lsc_free_queue(ccdc, &lsc->free_queue);
392 }
393 
394 /*
395  * ccdc_lsc_config - Configure the LSC module from a userspace request
396  *
397  * Store the request LSC configuration in the LSC engine request pointer. The
398  * configuration will be applied to the hardware when the CCDC will be enabled,
399  * or at the next LSC interrupt if the CCDC is already running.
400  */
401 static int ccdc_lsc_config(struct isp_ccdc_device *ccdc,
402 			   struct omap3isp_ccdc_update_config *config)
403 {
404 	struct isp_device *isp = to_isp_device(ccdc);
405 	struct ispccdc_lsc_config_req *req;
406 	unsigned long flags;
407 	u16 update;
408 	int ret;
409 
410 	update = config->update &
411 		 (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC);
412 	if (!update)
413 		return 0;
414 
415 	if (update != (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC)) {
416 		dev_dbg(to_device(ccdc),
417 			"%s: Both LSC configuration and table need to be supplied\n",
418 			__func__);
419 		return -EINVAL;
420 	}
421 
422 	req = kzalloc(sizeof(*req), GFP_KERNEL);
423 	if (req == NULL)
424 		return -ENOMEM;
425 
426 	if (config->flag & OMAP3ISP_CCDC_CONFIG_LSC) {
427 		if (copy_from_user(&req->config, config->lsc_cfg,
428 				   sizeof(req->config))) {
429 			ret = -EFAULT;
430 			goto done;
431 		}
432 
433 		req->enable = 1;
434 
435 		req->table.addr = dma_alloc_coherent(isp->dev, req->config.size,
436 						     &req->table.dma,
437 						     GFP_KERNEL);
438 		if (req->table.addr == NULL) {
439 			ret = -ENOMEM;
440 			goto done;
441 		}
442 
443 		ret = dma_get_sgtable(isp->dev, &req->table.sgt,
444 				      req->table.addr, req->table.dma,
445 				      req->config.size);
446 		if (ret < 0)
447 			goto done;
448 
449 		dma_sync_sg_for_cpu(isp->dev, req->table.sgt.sgl,
450 				    req->table.sgt.nents, DMA_TO_DEVICE);
451 
452 		if (copy_from_user(req->table.addr, config->lsc,
453 				   req->config.size)) {
454 			ret = -EFAULT;
455 			goto done;
456 		}
457 
458 		dma_sync_sg_for_device(isp->dev, req->table.sgt.sgl,
459 				       req->table.sgt.nents, DMA_TO_DEVICE);
460 	}
461 
462 	spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
463 	if (ccdc->lsc.request) {
464 		list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
465 		schedule_work(&ccdc->lsc.table_work);
466 	}
467 	ccdc->lsc.request = req;
468 	spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
469 
470 	ret = 0;
471 
472 done:
473 	if (ret < 0)
474 		ccdc_lsc_free_request(ccdc, req);
475 
476 	return ret;
477 }
478 
479 static inline int ccdc_lsc_is_configured(struct isp_ccdc_device *ccdc)
480 {
481 	unsigned long flags;
482 	int ret;
483 
484 	spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
485 	ret = ccdc->lsc.active != NULL;
486 	spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
487 
488 	return ret;
489 }
490 
491 static int ccdc_lsc_enable(struct isp_ccdc_device *ccdc)
492 {
493 	struct ispccdc_lsc *lsc = &ccdc->lsc;
494 
495 	if (lsc->state != LSC_STATE_STOPPED)
496 		return -EINVAL;
497 
498 	if (lsc->active) {
499 		list_add_tail(&lsc->active->list, &lsc->free_queue);
500 		lsc->active = NULL;
501 	}
502 
503 	if (__ccdc_lsc_configure(ccdc, lsc->request) < 0) {
504 		omap3isp_sbl_disable(to_isp_device(ccdc),
505 				OMAP3_ISP_SBL_CCDC_LSC_READ);
506 		list_add_tail(&lsc->request->list, &lsc->free_queue);
507 		lsc->request = NULL;
508 		goto done;
509 	}
510 
511 	lsc->active = lsc->request;
512 	lsc->request = NULL;
513 	__ccdc_lsc_enable(ccdc, 1);
514 
515 done:
516 	if (!list_empty(&lsc->free_queue))
517 		schedule_work(&lsc->table_work);
518 
519 	return 0;
520 }
521 
522 /* -----------------------------------------------------------------------------
523  * Parameters configuration
524  */
525 
526 /*
527  * ccdc_configure_clamp - Configure optical-black or digital clamping
528  * @ccdc: Pointer to ISP CCDC device.
529  *
530  * The CCDC performs either optical-black or digital clamp. Configure and enable
531  * the selected clamp method.
532  */
533 static void ccdc_configure_clamp(struct isp_ccdc_device *ccdc)
534 {
535 	struct isp_device *isp = to_isp_device(ccdc);
536 	u32 clamp;
537 
538 	if (ccdc->obclamp) {
539 		clamp  = ccdc->clamp.obgain << ISPCCDC_CLAMP_OBGAIN_SHIFT;
540 		clamp |= ccdc->clamp.oblen << ISPCCDC_CLAMP_OBSLEN_SHIFT;
541 		clamp |= ccdc->clamp.oblines << ISPCCDC_CLAMP_OBSLN_SHIFT;
542 		clamp |= ccdc->clamp.obstpixel << ISPCCDC_CLAMP_OBST_SHIFT;
543 		isp_reg_writel(isp, clamp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP);
544 	} else {
545 		isp_reg_writel(isp, ccdc->clamp.dcsubval,
546 			       OMAP3_ISP_IOMEM_CCDC, ISPCCDC_DCSUB);
547 	}
548 
549 	isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP,
550 			ISPCCDC_CLAMP_CLAMPEN,
551 			ccdc->obclamp ? ISPCCDC_CLAMP_CLAMPEN : 0);
552 }
553 
554 /*
555  * ccdc_configure_fpc - Configure Faulty Pixel Correction
556  * @ccdc: Pointer to ISP CCDC device.
557  */
558 static void ccdc_configure_fpc(struct isp_ccdc_device *ccdc)
559 {
560 	struct isp_device *isp = to_isp_device(ccdc);
561 
562 	isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC, ISPCCDC_FPC_FPCEN);
563 
564 	if (!ccdc->fpc_en)
565 		return;
566 
567 	isp_reg_writel(isp, ccdc->fpc.dma, OMAP3_ISP_IOMEM_CCDC,
568 		       ISPCCDC_FPC_ADDR);
569 	/* The FPNUM field must be set before enabling FPC. */
570 	isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT),
571 		       OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
572 	isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT) |
573 		       ISPCCDC_FPC_FPCEN, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
574 }
575 
576 /*
577  * ccdc_configure_black_comp - Configure Black Level Compensation.
578  * @ccdc: Pointer to ISP CCDC device.
579  */
580 static void ccdc_configure_black_comp(struct isp_ccdc_device *ccdc)
581 {
582 	struct isp_device *isp = to_isp_device(ccdc);
583 	u32 blcomp;
584 
585 	blcomp  = ccdc->blcomp.b_mg << ISPCCDC_BLKCMP_B_MG_SHIFT;
586 	blcomp |= ccdc->blcomp.gb_g << ISPCCDC_BLKCMP_GB_G_SHIFT;
587 	blcomp |= ccdc->blcomp.gr_cy << ISPCCDC_BLKCMP_GR_CY_SHIFT;
588 	blcomp |= ccdc->blcomp.r_ye << ISPCCDC_BLKCMP_R_YE_SHIFT;
589 
590 	isp_reg_writel(isp, blcomp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_BLKCMP);
591 }
592 
593 /*
594  * ccdc_configure_lpf - Configure Low-Pass Filter (LPF).
595  * @ccdc: Pointer to ISP CCDC device.
596  */
597 static void ccdc_configure_lpf(struct isp_ccdc_device *ccdc)
598 {
599 	struct isp_device *isp = to_isp_device(ccdc);
600 
601 	isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE,
602 			ISPCCDC_SYN_MODE_LPF,
603 			ccdc->lpf ? ISPCCDC_SYN_MODE_LPF : 0);
604 }
605 
606 /*
607  * ccdc_configure_alaw - Configure A-law compression.
608  * @ccdc: Pointer to ISP CCDC device.
609  */
610 static void ccdc_configure_alaw(struct isp_ccdc_device *ccdc)
611 {
612 	struct isp_device *isp = to_isp_device(ccdc);
613 	const struct isp_format_info *info;
614 	u32 alaw = 0;
615 
616 	info = omap3isp_video_format_info(ccdc->formats[CCDC_PAD_SINK].code);
617 
618 	switch (info->width) {
619 	case 8:
620 		return;
621 
622 	case 10:
623 		alaw = ISPCCDC_ALAW_GWDI_9_0;
624 		break;
625 	case 11:
626 		alaw = ISPCCDC_ALAW_GWDI_10_1;
627 		break;
628 	case 12:
629 		alaw = ISPCCDC_ALAW_GWDI_11_2;
630 		break;
631 	case 13:
632 		alaw = ISPCCDC_ALAW_GWDI_12_3;
633 		break;
634 	}
635 
636 	if (ccdc->alaw)
637 		alaw |= ISPCCDC_ALAW_CCDTBL;
638 
639 	isp_reg_writel(isp, alaw, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_ALAW);
640 }
641 
642 /*
643  * ccdc_config_imgattr - Configure sensor image specific attributes.
644  * @ccdc: Pointer to ISP CCDC device.
645  * @colptn: Color pattern of the sensor.
646  */
647 static void ccdc_config_imgattr(struct isp_ccdc_device *ccdc, u32 colptn)
648 {
649 	struct isp_device *isp = to_isp_device(ccdc);
650 
651 	isp_reg_writel(isp, colptn, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_COLPTN);
652 }
653 
654 /*
655  * ccdc_config - Set CCDC configuration from userspace
656  * @ccdc: Pointer to ISP CCDC device.
657  * @ccdc_struct: Structure containing CCDC configuration sent from userspace.
658  *
659  * Returns 0 if successful, -EINVAL if the pointer to the configuration
660  * structure is null, or the copy_from_user function fails to copy user space
661  * memory to kernel space memory.
662  */
663 static int ccdc_config(struct isp_ccdc_device *ccdc,
664 		       struct omap3isp_ccdc_update_config *ccdc_struct)
665 {
666 	struct isp_device *isp = to_isp_device(ccdc);
667 	unsigned long flags;
668 
669 	spin_lock_irqsave(&ccdc->lock, flags);
670 	ccdc->shadow_update = 1;
671 	spin_unlock_irqrestore(&ccdc->lock, flags);
672 
673 	if (OMAP3ISP_CCDC_ALAW & ccdc_struct->update) {
674 		ccdc->alaw = !!(OMAP3ISP_CCDC_ALAW & ccdc_struct->flag);
675 		ccdc->update |= OMAP3ISP_CCDC_ALAW;
676 	}
677 
678 	if (OMAP3ISP_CCDC_LPF & ccdc_struct->update) {
679 		ccdc->lpf = !!(OMAP3ISP_CCDC_LPF & ccdc_struct->flag);
680 		ccdc->update |= OMAP3ISP_CCDC_LPF;
681 	}
682 
683 	if (OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->update) {
684 		if (copy_from_user(&ccdc->clamp, ccdc_struct->bclamp,
685 				   sizeof(ccdc->clamp))) {
686 			ccdc->shadow_update = 0;
687 			return -EFAULT;
688 		}
689 
690 		ccdc->obclamp = !!(OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->flag);
691 		ccdc->update |= OMAP3ISP_CCDC_BLCLAMP;
692 	}
693 
694 	if (OMAP3ISP_CCDC_BCOMP & ccdc_struct->update) {
695 		if (copy_from_user(&ccdc->blcomp, ccdc_struct->blcomp,
696 				   sizeof(ccdc->blcomp))) {
697 			ccdc->shadow_update = 0;
698 			return -EFAULT;
699 		}
700 
701 		ccdc->update |= OMAP3ISP_CCDC_BCOMP;
702 	}
703 
704 	ccdc->shadow_update = 0;
705 
706 	if (OMAP3ISP_CCDC_FPC & ccdc_struct->update) {
707 		struct omap3isp_ccdc_fpc fpc;
708 		struct ispccdc_fpc fpc_old = { .addr = NULL, };
709 		struct ispccdc_fpc fpc_new;
710 		u32 size;
711 
712 		if (ccdc->state != ISP_PIPELINE_STREAM_STOPPED)
713 			return -EBUSY;
714 
715 		ccdc->fpc_en = !!(OMAP3ISP_CCDC_FPC & ccdc_struct->flag);
716 
717 		if (ccdc->fpc_en) {
718 			if (copy_from_user(&fpc, ccdc_struct->fpc, sizeof(fpc)))
719 				return -EFAULT;
720 
721 			size = fpc.fpnum * 4;
722 
723 			/*
724 			 * The table address must be 64-bytes aligned, which is
725 			 * guaranteed by dma_alloc_coherent().
726 			 */
727 			fpc_new.fpnum = fpc.fpnum;
728 			fpc_new.addr = dma_alloc_coherent(isp->dev, size,
729 							  &fpc_new.dma,
730 							  GFP_KERNEL);
731 			if (fpc_new.addr == NULL)
732 				return -ENOMEM;
733 
734 			if (copy_from_user(fpc_new.addr,
735 					   (__force void __user *)(long)fpc.fpcaddr,
736 					   size)) {
737 				dma_free_coherent(isp->dev, size, fpc_new.addr,
738 						  fpc_new.dma);
739 				return -EFAULT;
740 			}
741 
742 			fpc_old = ccdc->fpc;
743 			ccdc->fpc = fpc_new;
744 		}
745 
746 		ccdc_configure_fpc(ccdc);
747 
748 		if (fpc_old.addr != NULL)
749 			dma_free_coherent(isp->dev, fpc_old.fpnum * 4,
750 					  fpc_old.addr, fpc_old.dma);
751 	}
752 
753 	return ccdc_lsc_config(ccdc, ccdc_struct);
754 }
755 
756 static void ccdc_apply_controls(struct isp_ccdc_device *ccdc)
757 {
758 	if (ccdc->update & OMAP3ISP_CCDC_ALAW) {
759 		ccdc_configure_alaw(ccdc);
760 		ccdc->update &= ~OMAP3ISP_CCDC_ALAW;
761 	}
762 
763 	if (ccdc->update & OMAP3ISP_CCDC_LPF) {
764 		ccdc_configure_lpf(ccdc);
765 		ccdc->update &= ~OMAP3ISP_CCDC_LPF;
766 	}
767 
768 	if (ccdc->update & OMAP3ISP_CCDC_BLCLAMP) {
769 		ccdc_configure_clamp(ccdc);
770 		ccdc->update &= ~OMAP3ISP_CCDC_BLCLAMP;
771 	}
772 
773 	if (ccdc->update & OMAP3ISP_CCDC_BCOMP) {
774 		ccdc_configure_black_comp(ccdc);
775 		ccdc->update &= ~OMAP3ISP_CCDC_BCOMP;
776 	}
777 }
778 
779 /*
780  * omap3isp_ccdc_restore_context - Restore values of the CCDC module registers
781  * @isp: Pointer to ISP device
782  */
783 void omap3isp_ccdc_restore_context(struct isp_device *isp)
784 {
785 	struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
786 
787 	isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG, ISPCCDC_CFG_VDLC);
788 
789 	ccdc->update = OMAP3ISP_CCDC_ALAW | OMAP3ISP_CCDC_LPF
790 		     | OMAP3ISP_CCDC_BLCLAMP | OMAP3ISP_CCDC_BCOMP;
791 	ccdc_apply_controls(ccdc);
792 	ccdc_configure_fpc(ccdc);
793 }
794 
795 /* -----------------------------------------------------------------------------
796  * Format- and pipeline-related configuration helpers
797  */
798 
799 /*
800  * ccdc_config_vp - Configure the Video Port.
801  * @ccdc: Pointer to ISP CCDC device.
802  */
803 static void ccdc_config_vp(struct isp_ccdc_device *ccdc)
804 {
805 	struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
806 	struct isp_device *isp = to_isp_device(ccdc);
807 	const struct isp_format_info *info;
808 	struct v4l2_mbus_framefmt *format;
809 	unsigned long l3_ick = pipe->l3_ick;
810 	unsigned int max_div = isp->revision == ISP_REVISION_15_0 ? 64 : 8;
811 	unsigned int div = 0;
812 	u32 fmtcfg = ISPCCDC_FMTCFG_VPEN;
813 
814 	format = &ccdc->formats[CCDC_PAD_SOURCE_VP];
815 
816 	if (!format->code) {
817 		/* Disable the video port when the input format isn't supported.
818 		 * This is indicated by a pixel code set to 0.
819 		 */
820 		isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG);
821 		return;
822 	}
823 
824 	isp_reg_writel(isp, (0 << ISPCCDC_FMT_HORZ_FMTSPH_SHIFT) |
825 		       (format->width << ISPCCDC_FMT_HORZ_FMTLNH_SHIFT),
826 		       OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_HORZ);
827 	isp_reg_writel(isp, (0 << ISPCCDC_FMT_VERT_FMTSLV_SHIFT) |
828 		       ((format->height + 1) << ISPCCDC_FMT_VERT_FMTLNV_SHIFT),
829 		       OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_VERT);
830 
831 	isp_reg_writel(isp, (format->width << ISPCCDC_VP_OUT_HORZ_NUM_SHIFT) |
832 		       (format->height << ISPCCDC_VP_OUT_VERT_NUM_SHIFT),
833 		       OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VP_OUT);
834 
835 	info = omap3isp_video_format_info(ccdc->formats[CCDC_PAD_SINK].code);
836 
837 	switch (info->width) {
838 	case 8:
839 	case 10:
840 		fmtcfg |= ISPCCDC_FMTCFG_VPIN_9_0;
841 		break;
842 	case 11:
843 		fmtcfg |= ISPCCDC_FMTCFG_VPIN_10_1;
844 		break;
845 	case 12:
846 		fmtcfg |= ISPCCDC_FMTCFG_VPIN_11_2;
847 		break;
848 	case 13:
849 		fmtcfg |= ISPCCDC_FMTCFG_VPIN_12_3;
850 		break;
851 	}
852 
853 	if (pipe->input)
854 		div = DIV_ROUND_UP(l3_ick, pipe->max_rate);
855 	else if (pipe->external_rate)
856 		div = l3_ick / pipe->external_rate;
857 
858 	div = clamp(div, 2U, max_div);
859 	fmtcfg |= (div - 2) << ISPCCDC_FMTCFG_VPIF_FRQ_SHIFT;
860 
861 	isp_reg_writel(isp, fmtcfg, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG);
862 }
863 
864 /*
865  * ccdc_config_outlineoffset - Configure memory saving output line offset
866  * @ccdc: Pointer to ISP CCDC device.
867  * @bpl: Number of bytes per line when stored in memory.
868  * @field: Field order when storing interlaced formats in memory.
869  *
870  * Configure the offsets for the line output control:
871  *
872  * - The horizontal line offset is defined as the number of bytes between the
873  *   start of two consecutive lines in memory. Set it to the given bytes per
874  *   line value.
875  *
876  * - The field offset value is defined as the number of lines to offset the
877  *   start of the field identified by FID = 1. Set it to one.
878  *
879  * - The line offset values are defined as the number of lines (as defined by
880  *   the horizontal line offset) between the start of two consecutive lines for
881  *   all combinations of odd/even lines in odd/even fields. When interleaving
882  *   fields set them all to two lines, and to one line otherwise.
883  */
884 static void ccdc_config_outlineoffset(struct isp_ccdc_device *ccdc,
885 				      unsigned int bpl,
886 				      enum v4l2_field field)
887 {
888 	struct isp_device *isp = to_isp_device(ccdc);
889 	u32 sdofst = 0;
890 
891 	isp_reg_writel(isp, bpl & 0xffff, OMAP3_ISP_IOMEM_CCDC,
892 		       ISPCCDC_HSIZE_OFF);
893 
894 	switch (field) {
895 	case V4L2_FIELD_INTERLACED_TB:
896 	case V4L2_FIELD_INTERLACED_BT:
897 		/* When interleaving fields in memory offset field one by one
898 		 * line and set the line offset to two lines.
899 		 */
900 		sdofst |= (1 << ISPCCDC_SDOFST_LOFST0_SHIFT)
901 		       |  (1 << ISPCCDC_SDOFST_LOFST1_SHIFT)
902 		       |  (1 << ISPCCDC_SDOFST_LOFST2_SHIFT)
903 		       |  (1 << ISPCCDC_SDOFST_LOFST3_SHIFT);
904 		break;
905 
906 	default:
907 		/* In all other cases set the line offsets to one line. */
908 		break;
909 	}
910 
911 	isp_reg_writel(isp, sdofst, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST);
912 }
913 
914 /*
915  * ccdc_set_outaddr - Set memory address to save output image
916  * @ccdc: Pointer to ISP CCDC device.
917  * @addr: ISP MMU Mapped 32-bit memory address aligned on 32 byte boundary.
918  *
919  * Sets the memory address where the output will be saved.
920  */
921 static void ccdc_set_outaddr(struct isp_ccdc_device *ccdc, u32 addr)
922 {
923 	struct isp_device *isp = to_isp_device(ccdc);
924 
925 	isp_reg_writel(isp, addr, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDR_ADDR);
926 }
927 
928 /*
929  * omap3isp_ccdc_max_rate - Calculate maximum input data rate based on the input
930  * @ccdc: Pointer to ISP CCDC device.
931  * @max_rate: Maximum calculated data rate.
932  *
933  * Returns in *max_rate less value between calculated and passed
934  */
935 void omap3isp_ccdc_max_rate(struct isp_ccdc_device *ccdc,
936 			    unsigned int *max_rate)
937 {
938 	struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
939 	unsigned int rate;
940 
941 	if (pipe == NULL)
942 		return;
943 
944 	/*
945 	 * TRM says that for parallel sensors the maximum data rate
946 	 * should be 90% form L3/2 clock, otherwise just L3/2.
947 	 */
948 	if (ccdc->input == CCDC_INPUT_PARALLEL)
949 		rate = pipe->l3_ick / 2 * 9 / 10;
950 	else
951 		rate = pipe->l3_ick / 2;
952 
953 	*max_rate = min(*max_rate, rate);
954 }
955 
956 /*
957  * ccdc_config_sync_if - Set CCDC sync interface configuration
958  * @ccdc: Pointer to ISP CCDC device.
959  * @parcfg: Parallel interface platform data (may be NULL)
960  * @data_size: Data size
961  */
962 static void ccdc_config_sync_if(struct isp_ccdc_device *ccdc,
963 				struct isp_parallel_cfg *parcfg,
964 				unsigned int data_size)
965 {
966 	struct isp_device *isp = to_isp_device(ccdc);
967 	const struct v4l2_mbus_framefmt *format;
968 	u32 syn_mode = ISPCCDC_SYN_MODE_VDHDEN;
969 
970 	format = &ccdc->formats[CCDC_PAD_SINK];
971 
972 	if (format->code == MEDIA_BUS_FMT_YUYV8_2X8 ||
973 	    format->code == MEDIA_BUS_FMT_UYVY8_2X8) {
974 		/* According to the OMAP3 TRM the input mode only affects SYNC
975 		 * mode, enabling BT.656 mode should take precedence. However,
976 		 * in practice setting the input mode to YCbCr data on 8 bits
977 		 * seems to be required in BT.656 mode. In SYNC mode set it to
978 		 * YCbCr on 16 bits as the bridge is enabled in that case.
979 		 */
980 		if (ccdc->bt656)
981 			syn_mode |= ISPCCDC_SYN_MODE_INPMOD_YCBCR8;
982 		else
983 			syn_mode |= ISPCCDC_SYN_MODE_INPMOD_YCBCR16;
984 	}
985 
986 	switch (data_size) {
987 	case 8:
988 		syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_8;
989 		break;
990 	case 10:
991 		syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_10;
992 		break;
993 	case 11:
994 		syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_11;
995 		break;
996 	case 12:
997 		syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_12;
998 		break;
999 	}
1000 
1001 	if (parcfg && parcfg->data_pol)
1002 		syn_mode |= ISPCCDC_SYN_MODE_DATAPOL;
1003 
1004 	if (parcfg && parcfg->hs_pol)
1005 		syn_mode |= ISPCCDC_SYN_MODE_HDPOL;
1006 
1007 	/* The polarity of the vertical sync signal output by the BT.656
1008 	 * decoder is not documented and seems to be active low.
1009 	 */
1010 	if ((parcfg && parcfg->vs_pol) || ccdc->bt656)
1011 		syn_mode |= ISPCCDC_SYN_MODE_VDPOL;
1012 
1013 	if (parcfg && parcfg->fld_pol)
1014 		syn_mode |= ISPCCDC_SYN_MODE_FLDPOL;
1015 
1016 	isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
1017 
1018 	/* The CCDC_CFG.Y8POS bit is used in YCbCr8 input mode only. The
1019 	 * hardware seems to ignore it in all other input modes.
1020 	 */
1021 	if (format->code == MEDIA_BUS_FMT_UYVY8_2X8)
1022 		isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1023 			    ISPCCDC_CFG_Y8POS);
1024 	else
1025 		isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1026 			    ISPCCDC_CFG_Y8POS);
1027 
1028 	/* Enable or disable BT.656 mode, including error correction for the
1029 	 * synchronization codes.
1030 	 */
1031 	if (ccdc->bt656)
1032 		isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_REC656IF,
1033 			    ISPCCDC_REC656IF_R656ON | ISPCCDC_REC656IF_ECCFVH);
1034 	else
1035 		isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_REC656IF,
1036 			    ISPCCDC_REC656IF_R656ON | ISPCCDC_REC656IF_ECCFVH);
1037 
1038 }
1039 
1040 /* CCDC formats descriptions */
1041 static const u32 ccdc_sgrbg_pattern =
1042 	ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1043 	ISPCCDC_COLPTN_R_Ye  << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1044 	ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1045 	ISPCCDC_COLPTN_R_Ye  << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1046 	ISPCCDC_COLPTN_B_Mg  << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1047 	ISPCCDC_COLPTN_Gb_G  << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1048 	ISPCCDC_COLPTN_B_Mg  << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1049 	ISPCCDC_COLPTN_Gb_G  << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1050 	ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1051 	ISPCCDC_COLPTN_R_Ye  << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1052 	ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1053 	ISPCCDC_COLPTN_R_Ye  << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1054 	ISPCCDC_COLPTN_B_Mg  << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1055 	ISPCCDC_COLPTN_Gb_G  << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1056 	ISPCCDC_COLPTN_B_Mg  << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1057 	ISPCCDC_COLPTN_Gb_G  << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1058 
1059 static const u32 ccdc_srggb_pattern =
1060 	ISPCCDC_COLPTN_R_Ye  << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1061 	ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1062 	ISPCCDC_COLPTN_R_Ye  << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1063 	ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1064 	ISPCCDC_COLPTN_Gb_G  << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1065 	ISPCCDC_COLPTN_B_Mg  << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1066 	ISPCCDC_COLPTN_Gb_G  << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1067 	ISPCCDC_COLPTN_B_Mg  << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1068 	ISPCCDC_COLPTN_R_Ye  << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1069 	ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1070 	ISPCCDC_COLPTN_R_Ye  << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1071 	ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1072 	ISPCCDC_COLPTN_Gb_G  << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1073 	ISPCCDC_COLPTN_B_Mg  << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1074 	ISPCCDC_COLPTN_Gb_G  << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1075 	ISPCCDC_COLPTN_B_Mg  << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1076 
1077 static const u32 ccdc_sbggr_pattern =
1078 	ISPCCDC_COLPTN_B_Mg  << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1079 	ISPCCDC_COLPTN_Gb_G  << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1080 	ISPCCDC_COLPTN_B_Mg  << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1081 	ISPCCDC_COLPTN_Gb_G  << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1082 	ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1083 	ISPCCDC_COLPTN_R_Ye  << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1084 	ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1085 	ISPCCDC_COLPTN_R_Ye  << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1086 	ISPCCDC_COLPTN_B_Mg  << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1087 	ISPCCDC_COLPTN_Gb_G  << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1088 	ISPCCDC_COLPTN_B_Mg  << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1089 	ISPCCDC_COLPTN_Gb_G  << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1090 	ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1091 	ISPCCDC_COLPTN_R_Ye  << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1092 	ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1093 	ISPCCDC_COLPTN_R_Ye  << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1094 
1095 static const u32 ccdc_sgbrg_pattern =
1096 	ISPCCDC_COLPTN_Gb_G  << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1097 	ISPCCDC_COLPTN_B_Mg  << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1098 	ISPCCDC_COLPTN_Gb_G  << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1099 	ISPCCDC_COLPTN_B_Mg  << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1100 	ISPCCDC_COLPTN_R_Ye  << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1101 	ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1102 	ISPCCDC_COLPTN_R_Ye  << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1103 	ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1104 	ISPCCDC_COLPTN_Gb_G  << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1105 	ISPCCDC_COLPTN_B_Mg  << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1106 	ISPCCDC_COLPTN_Gb_G  << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1107 	ISPCCDC_COLPTN_B_Mg  << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1108 	ISPCCDC_COLPTN_R_Ye  << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1109 	ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1110 	ISPCCDC_COLPTN_R_Ye  << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1111 	ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1112 
1113 static void ccdc_configure(struct isp_ccdc_device *ccdc)
1114 {
1115 	struct isp_device *isp = to_isp_device(ccdc);
1116 	struct isp_parallel_cfg *parcfg = NULL;
1117 	struct v4l2_subdev *sensor;
1118 	struct v4l2_mbus_framefmt *format;
1119 	const struct v4l2_rect *crop;
1120 	const struct isp_format_info *fmt_info;
1121 	struct v4l2_subdev_format fmt_src = {
1122 		.which = V4L2_SUBDEV_FORMAT_ACTIVE,
1123 	};
1124 	unsigned int depth_out;
1125 	unsigned int depth_in = 0;
1126 	struct media_pad *pad;
1127 	unsigned long flags;
1128 	unsigned int bridge;
1129 	unsigned int shift;
1130 	unsigned int nph;
1131 	unsigned int sph;
1132 	u32 syn_mode;
1133 	u32 ccdc_pattern;
1134 
1135 	ccdc->bt656 = false;
1136 	ccdc->fields = 0;
1137 
1138 	pad = media_pad_remote_pad_first(&ccdc->pads[CCDC_PAD_SINK]);
1139 	sensor = media_entity_to_v4l2_subdev(pad->entity);
1140 	if (ccdc->input == CCDC_INPUT_PARALLEL) {
1141 		struct v4l2_subdev *sd =
1142 			to_isp_pipeline(&ccdc->subdev.entity)->external;
1143 		struct isp_bus_cfg *bus_cfg;
1144 
1145 		bus_cfg = v4l2_subdev_to_bus_cfg(sd);
1146 		if (WARN_ON(!bus_cfg))
1147 			return;
1148 
1149 		parcfg = &bus_cfg->bus.parallel;
1150 		ccdc->bt656 = parcfg->bt656;
1151 	}
1152 
1153 	/* CCDC_PAD_SINK */
1154 	format = &ccdc->formats[CCDC_PAD_SINK];
1155 
1156 	/* Compute the lane shifter shift value and enable the bridge when the
1157 	 * input format is a non-BT.656 YUV variant.
1158 	 */
1159 	fmt_src.pad = pad->index;
1160 	if (!v4l2_subdev_call(sensor, pad, get_fmt, NULL, &fmt_src)) {
1161 		fmt_info = omap3isp_video_format_info(fmt_src.format.code);
1162 		depth_in = fmt_info->width;
1163 	}
1164 
1165 	fmt_info = omap3isp_video_format_info(format->code);
1166 	depth_out = fmt_info->width;
1167 	shift = depth_in - depth_out;
1168 
1169 	if (ccdc->bt656)
1170 		bridge = ISPCTRL_PAR_BRIDGE_DISABLE;
1171 	else if (fmt_info->code == MEDIA_BUS_FMT_YUYV8_2X8)
1172 		bridge = ISPCTRL_PAR_BRIDGE_LENDIAN;
1173 	else if (fmt_info->code == MEDIA_BUS_FMT_UYVY8_2X8)
1174 		bridge = ISPCTRL_PAR_BRIDGE_BENDIAN;
1175 	else
1176 		bridge = ISPCTRL_PAR_BRIDGE_DISABLE;
1177 
1178 	omap3isp_configure_bridge(isp, ccdc->input, parcfg, shift, bridge);
1179 
1180 	/* Configure the sync interface. */
1181 	ccdc_config_sync_if(ccdc, parcfg, depth_out);
1182 
1183 	syn_mode = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
1184 
1185 	/* Use the raw, unprocessed data when writing to memory. The H3A and
1186 	 * histogram modules are still fed with lens shading corrected data.
1187 	 */
1188 	syn_mode &= ~ISPCCDC_SYN_MODE_VP2SDR;
1189 
1190 	if (ccdc->output & CCDC_OUTPUT_MEMORY)
1191 		syn_mode |= ISPCCDC_SYN_MODE_WEN;
1192 	else
1193 		syn_mode &= ~ISPCCDC_SYN_MODE_WEN;
1194 
1195 	if (ccdc->output & CCDC_OUTPUT_RESIZER)
1196 		syn_mode |= ISPCCDC_SYN_MODE_SDR2RSZ;
1197 	else
1198 		syn_mode &= ~ISPCCDC_SYN_MODE_SDR2RSZ;
1199 
1200 	/* Mosaic filter */
1201 	switch (format->code) {
1202 	case MEDIA_BUS_FMT_SRGGB10_1X10:
1203 	case MEDIA_BUS_FMT_SRGGB12_1X12:
1204 		ccdc_pattern = ccdc_srggb_pattern;
1205 		break;
1206 	case MEDIA_BUS_FMT_SBGGR10_1X10:
1207 	case MEDIA_BUS_FMT_SBGGR12_1X12:
1208 		ccdc_pattern = ccdc_sbggr_pattern;
1209 		break;
1210 	case MEDIA_BUS_FMT_SGBRG10_1X10:
1211 	case MEDIA_BUS_FMT_SGBRG12_1X12:
1212 		ccdc_pattern = ccdc_sgbrg_pattern;
1213 		break;
1214 	default:
1215 		/* Use GRBG */
1216 		ccdc_pattern = ccdc_sgrbg_pattern;
1217 		break;
1218 	}
1219 	ccdc_config_imgattr(ccdc, ccdc_pattern);
1220 
1221 	/* Generate VD0 on the last line of the image and VD1 on the
1222 	 * 2/3 height line.
1223 	 */
1224 	isp_reg_writel(isp, ((format->height - 2) << ISPCCDC_VDINT_0_SHIFT) |
1225 		       ((format->height * 2 / 3) << ISPCCDC_VDINT_1_SHIFT),
1226 		       OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VDINT);
1227 
1228 	/* CCDC_PAD_SOURCE_OF */
1229 	format = &ccdc->formats[CCDC_PAD_SOURCE_OF];
1230 	crop = &ccdc->crop;
1231 
1232 	/* The horizontal coordinates are expressed in pixel clock cycles. We
1233 	 * need two cycles per pixel in BT.656 mode, and one cycle per pixel in
1234 	 * SYNC mode regardless of the format as the bridge is enabled for YUV
1235 	 * formats in that case.
1236 	 */
1237 	if (ccdc->bt656) {
1238 		sph = crop->left * 2;
1239 		nph = crop->width * 2 - 1;
1240 	} else {
1241 		sph = crop->left;
1242 		nph = crop->width - 1;
1243 	}
1244 
1245 	isp_reg_writel(isp, (sph << ISPCCDC_HORZ_INFO_SPH_SHIFT) |
1246 		       (nph << ISPCCDC_HORZ_INFO_NPH_SHIFT),
1247 		       OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HORZ_INFO);
1248 	isp_reg_writel(isp, (crop->top << ISPCCDC_VERT_START_SLV0_SHIFT) |
1249 		       (crop->top << ISPCCDC_VERT_START_SLV1_SHIFT),
1250 		       OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_START);
1251 	isp_reg_writel(isp, (crop->height - 1)
1252 			<< ISPCCDC_VERT_LINES_NLV_SHIFT,
1253 		       OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_LINES);
1254 
1255 	ccdc_config_outlineoffset(ccdc, ccdc->video_out.bpl_value,
1256 				  format->field);
1257 
1258 	/* When interleaving fields enable processing of the field input signal.
1259 	 * This will cause the line output control module to apply the field
1260 	 * offset to field 1.
1261 	 */
1262 	if (ccdc->formats[CCDC_PAD_SINK].field == V4L2_FIELD_ALTERNATE &&
1263 	    (format->field == V4L2_FIELD_INTERLACED_TB ||
1264 	     format->field == V4L2_FIELD_INTERLACED_BT))
1265 		syn_mode |= ISPCCDC_SYN_MODE_FLDMODE;
1266 
1267 	/* The CCDC outputs data in UYVY order by default. Swap bytes to get
1268 	 * YUYV.
1269 	 */
1270 	if (format->code == MEDIA_BUS_FMT_YUYV8_1X16)
1271 		isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1272 			    ISPCCDC_CFG_BSWD);
1273 	else
1274 		isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1275 			    ISPCCDC_CFG_BSWD);
1276 
1277 	/* Use PACK8 mode for 1byte per pixel formats. Check for BT.656 mode
1278 	 * explicitly as the driver reports 1X16 instead of 2X8 at the OF pad
1279 	 * for simplicity.
1280 	 */
1281 	if (omap3isp_video_format_info(format->code)->width <= 8 || ccdc->bt656)
1282 		syn_mode |= ISPCCDC_SYN_MODE_PACK8;
1283 	else
1284 		syn_mode &= ~ISPCCDC_SYN_MODE_PACK8;
1285 
1286 	isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
1287 
1288 	/* CCDC_PAD_SOURCE_VP */
1289 	ccdc_config_vp(ccdc);
1290 
1291 	/* Lens shading correction. */
1292 	spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1293 	if (ccdc->lsc.request == NULL)
1294 		goto unlock;
1295 
1296 	WARN_ON(ccdc->lsc.active);
1297 
1298 	/* Get last good LSC configuration. If it is not supported for
1299 	 * the current active resolution discard it.
1300 	 */
1301 	if (ccdc->lsc.active == NULL &&
1302 	    __ccdc_lsc_configure(ccdc, ccdc->lsc.request) == 0) {
1303 		ccdc->lsc.active = ccdc->lsc.request;
1304 	} else {
1305 		list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
1306 		schedule_work(&ccdc->lsc.table_work);
1307 	}
1308 
1309 	ccdc->lsc.request = NULL;
1310 
1311 unlock:
1312 	spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1313 
1314 	ccdc_apply_controls(ccdc);
1315 }
1316 
1317 static void __ccdc_enable(struct isp_ccdc_device *ccdc, int enable)
1318 {
1319 	struct isp_device *isp = to_isp_device(ccdc);
1320 
1321 	/* Avoid restarting the CCDC when streaming is stopping. */
1322 	if (enable && ccdc->stopping & CCDC_STOP_REQUEST)
1323 		return;
1324 
1325 	isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR,
1326 			ISPCCDC_PCR_EN, enable ? ISPCCDC_PCR_EN : 0);
1327 
1328 	ccdc->running = enable;
1329 }
1330 
1331 static int ccdc_disable(struct isp_ccdc_device *ccdc)
1332 {
1333 	unsigned long flags;
1334 	int ret = 0;
1335 
1336 	spin_lock_irqsave(&ccdc->lock, flags);
1337 	if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS)
1338 		ccdc->stopping = CCDC_STOP_REQUEST;
1339 	if (!ccdc->running)
1340 		ccdc->stopping = CCDC_STOP_FINISHED;
1341 	spin_unlock_irqrestore(&ccdc->lock, flags);
1342 
1343 	ret = wait_event_timeout(ccdc->wait,
1344 				 ccdc->stopping == CCDC_STOP_FINISHED,
1345 				 msecs_to_jiffies(2000));
1346 	if (ret == 0) {
1347 		ret = -ETIMEDOUT;
1348 		dev_warn(to_device(ccdc), "CCDC stop timeout!\n");
1349 	}
1350 
1351 	omap3isp_sbl_disable(to_isp_device(ccdc), OMAP3_ISP_SBL_CCDC_LSC_READ);
1352 
1353 	mutex_lock(&ccdc->ioctl_lock);
1354 	ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
1355 	ccdc->lsc.request = ccdc->lsc.active;
1356 	ccdc->lsc.active = NULL;
1357 	cancel_work_sync(&ccdc->lsc.table_work);
1358 	ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
1359 	mutex_unlock(&ccdc->ioctl_lock);
1360 
1361 	ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
1362 
1363 	return ret > 0 ? 0 : ret;
1364 }
1365 
1366 static void ccdc_enable(struct isp_ccdc_device *ccdc)
1367 {
1368 	if (ccdc_lsc_is_configured(ccdc))
1369 		__ccdc_lsc_enable(ccdc, 1);
1370 	__ccdc_enable(ccdc, 1);
1371 }
1372 
1373 /* -----------------------------------------------------------------------------
1374  * Interrupt handling
1375  */
1376 
1377 /*
1378  * ccdc_sbl_busy - Poll idle state of CCDC and related SBL memory write bits
1379  * @ccdc: Pointer to ISP CCDC device.
1380  *
1381  * Returns zero if the CCDC is idle and the image has been written to
1382  * memory, too.
1383  */
1384 static int ccdc_sbl_busy(struct isp_ccdc_device *ccdc)
1385 {
1386 	struct isp_device *isp = to_isp_device(ccdc);
1387 
1388 	return omap3isp_ccdc_busy(ccdc)
1389 		| (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_0) &
1390 		   ISPSBL_CCDC_WR_0_DATA_READY)
1391 		| (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_1) &
1392 		   ISPSBL_CCDC_WR_0_DATA_READY)
1393 		| (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_2) &
1394 		   ISPSBL_CCDC_WR_0_DATA_READY)
1395 		| (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_3) &
1396 		   ISPSBL_CCDC_WR_0_DATA_READY);
1397 }
1398 
1399 /*
1400  * ccdc_sbl_wait_idle - Wait until the CCDC and related SBL are idle
1401  * @ccdc: Pointer to ISP CCDC device.
1402  * @max_wait: Max retry count in us for wait for idle/busy transition.
1403  */
1404 static int ccdc_sbl_wait_idle(struct isp_ccdc_device *ccdc,
1405 			      unsigned int max_wait)
1406 {
1407 	unsigned int wait = 0;
1408 
1409 	if (max_wait == 0)
1410 		max_wait = 10000; /* 10 ms */
1411 
1412 	for (wait = 0; wait <= max_wait; wait++) {
1413 		if (!ccdc_sbl_busy(ccdc))
1414 			return 0;
1415 
1416 		rmb();
1417 		udelay(1);
1418 	}
1419 
1420 	return -EBUSY;
1421 }
1422 
1423 /* ccdc_handle_stopping - Handle CCDC and/or LSC stopping sequence
1424  * @ccdc: Pointer to ISP CCDC device.
1425  * @event: Pointing which event trigger handler
1426  *
1427  * Return 1 when the event and stopping request combination is satisfied,
1428  * zero otherwise.
1429  */
1430 static int ccdc_handle_stopping(struct isp_ccdc_device *ccdc, u32 event)
1431 {
1432 	int rval = 0;
1433 
1434 	switch ((ccdc->stopping & 3) | event) {
1435 	case CCDC_STOP_REQUEST | CCDC_EVENT_VD1:
1436 		if (ccdc->lsc.state != LSC_STATE_STOPPED)
1437 			__ccdc_lsc_enable(ccdc, 0);
1438 		__ccdc_enable(ccdc, 0);
1439 		ccdc->stopping = CCDC_STOP_EXECUTED;
1440 		return 1;
1441 
1442 	case CCDC_STOP_EXECUTED | CCDC_EVENT_VD0:
1443 		ccdc->stopping |= CCDC_STOP_CCDC_FINISHED;
1444 		if (ccdc->lsc.state == LSC_STATE_STOPPED)
1445 			ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
1446 		rval = 1;
1447 		break;
1448 
1449 	case CCDC_STOP_EXECUTED | CCDC_EVENT_LSC_DONE:
1450 		ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
1451 		rval = 1;
1452 		break;
1453 
1454 	case CCDC_STOP_EXECUTED | CCDC_EVENT_VD1:
1455 		return 1;
1456 	}
1457 
1458 	if (ccdc->stopping == CCDC_STOP_FINISHED) {
1459 		wake_up(&ccdc->wait);
1460 		rval = 1;
1461 	}
1462 
1463 	return rval;
1464 }
1465 
1466 static void ccdc_hs_vs_isr(struct isp_ccdc_device *ccdc)
1467 {
1468 	struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
1469 	struct video_device *vdev = ccdc->subdev.devnode;
1470 	struct v4l2_event event;
1471 
1472 	/* Frame number propagation */
1473 	atomic_inc(&pipe->frame_number);
1474 
1475 	memset(&event, 0, sizeof(event));
1476 	event.type = V4L2_EVENT_FRAME_SYNC;
1477 	event.u.frame_sync.frame_sequence = atomic_read(&pipe->frame_number);
1478 
1479 	v4l2_event_queue(vdev, &event);
1480 }
1481 
1482 /*
1483  * ccdc_lsc_isr - Handle LSC events
1484  * @ccdc: Pointer to ISP CCDC device.
1485  * @events: LSC events
1486  */
1487 static void ccdc_lsc_isr(struct isp_ccdc_device *ccdc, u32 events)
1488 {
1489 	unsigned long flags;
1490 
1491 	if (events & IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ) {
1492 		struct isp_pipeline *pipe =
1493 			to_isp_pipeline(&ccdc->subdev.entity);
1494 
1495 		ccdc_lsc_error_handler(ccdc);
1496 		pipe->error = true;
1497 		dev_dbg(to_device(ccdc), "lsc prefetch error\n");
1498 	}
1499 
1500 	if (!(events & IRQ0STATUS_CCDC_LSC_DONE_IRQ))
1501 		return;
1502 
1503 	/* LSC_DONE interrupt occur, there are two cases
1504 	 * 1. stopping for reconfiguration
1505 	 * 2. stopping because of STREAM OFF command
1506 	 */
1507 	spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1508 
1509 	if (ccdc->lsc.state == LSC_STATE_STOPPING)
1510 		ccdc->lsc.state = LSC_STATE_STOPPED;
1511 
1512 	if (ccdc_handle_stopping(ccdc, CCDC_EVENT_LSC_DONE))
1513 		goto done;
1514 
1515 	if (ccdc->lsc.state != LSC_STATE_RECONFIG)
1516 		goto done;
1517 
1518 	/* LSC is in STOPPING state, change to the new state */
1519 	ccdc->lsc.state = LSC_STATE_STOPPED;
1520 
1521 	/* This is an exception. Start of frame and LSC_DONE interrupt
1522 	 * have been received on the same time. Skip this event and wait
1523 	 * for better times.
1524 	 */
1525 	if (events & IRQ0STATUS_HS_VS_IRQ)
1526 		goto done;
1527 
1528 	/* The LSC engine is stopped at this point. Enable it if there's a
1529 	 * pending request.
1530 	 */
1531 	if (ccdc->lsc.request == NULL)
1532 		goto done;
1533 
1534 	ccdc_lsc_enable(ccdc);
1535 
1536 done:
1537 	spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1538 }
1539 
1540 /*
1541  * Check whether the CCDC has captured all fields necessary to complete the
1542  * buffer.
1543  */
1544 static bool ccdc_has_all_fields(struct isp_ccdc_device *ccdc)
1545 {
1546 	struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
1547 	struct isp_device *isp = to_isp_device(ccdc);
1548 	enum v4l2_field of_field = ccdc->formats[CCDC_PAD_SOURCE_OF].field;
1549 	enum v4l2_field field;
1550 
1551 	/* When the input is progressive fields don't matter. */
1552 	if (of_field == V4L2_FIELD_NONE)
1553 		return true;
1554 
1555 	/* Read the current field identifier. */
1556 	field = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE)
1557 	      & ISPCCDC_SYN_MODE_FLDSTAT
1558 	      ? V4L2_FIELD_BOTTOM : V4L2_FIELD_TOP;
1559 
1560 	/* When capturing fields in alternate order just store the current field
1561 	 * identifier in the pipeline.
1562 	 */
1563 	if (of_field == V4L2_FIELD_ALTERNATE) {
1564 		pipe->field = field;
1565 		return true;
1566 	}
1567 
1568 	/* The format is interlaced. Make sure we've captured both fields. */
1569 	ccdc->fields |= field == V4L2_FIELD_BOTTOM
1570 		      ? CCDC_FIELD_BOTTOM : CCDC_FIELD_TOP;
1571 
1572 	if (ccdc->fields != CCDC_FIELD_BOTH)
1573 		return false;
1574 
1575 	/* Verify that the field just captured corresponds to the last field
1576 	 * needed based on the desired field order.
1577 	 */
1578 	if ((of_field == V4L2_FIELD_INTERLACED_TB && field == V4L2_FIELD_TOP) ||
1579 	    (of_field == V4L2_FIELD_INTERLACED_BT && field == V4L2_FIELD_BOTTOM))
1580 		return false;
1581 
1582 	/* The buffer can be completed, reset the fields for the next buffer. */
1583 	ccdc->fields = 0;
1584 
1585 	return true;
1586 }
1587 
1588 static int ccdc_isr_buffer(struct isp_ccdc_device *ccdc)
1589 {
1590 	struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
1591 	struct isp_device *isp = to_isp_device(ccdc);
1592 	struct isp_buffer *buffer;
1593 
1594 	/* The CCDC generates VD0 interrupts even when disabled (the datasheet
1595 	 * doesn't explicitly state if that's supposed to happen or not, so it
1596 	 * can be considered as a hardware bug or as a feature, but we have to
1597 	 * deal with it anyway). Disabling the CCDC when no buffer is available
1598 	 * would thus not be enough, we need to handle the situation explicitly.
1599 	 */
1600 	if (list_empty(&ccdc->video_out.dmaqueue))
1601 		return 0;
1602 
1603 	/* We're in continuous mode, and memory writes were disabled due to a
1604 	 * buffer underrun. Re-enable them now that we have a buffer. The buffer
1605 	 * address has been set in ccdc_video_queue.
1606 	 */
1607 	if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS && ccdc->underrun) {
1608 		ccdc->underrun = 0;
1609 		return 1;
1610 	}
1611 
1612 	/* Wait for the CCDC to become idle. */
1613 	if (ccdc_sbl_wait_idle(ccdc, 1000)) {
1614 		dev_info(isp->dev, "CCDC won't become idle!\n");
1615 		media_entity_enum_set(&isp->crashed, &ccdc->subdev.entity);
1616 		omap3isp_pipeline_cancel_stream(pipe);
1617 		return 0;
1618 	}
1619 
1620 	/* Don't restart CCDC if we're just about to stop streaming. */
1621 	if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS &&
1622 	    ccdc->stopping & CCDC_STOP_REQUEST)
1623 		return 0;
1624 
1625 	if (!ccdc_has_all_fields(ccdc))
1626 		return 1;
1627 
1628 	buffer = omap3isp_video_buffer_next(&ccdc->video_out);
1629 	if (buffer != NULL)
1630 		ccdc_set_outaddr(ccdc, buffer->dma);
1631 
1632 	pipe->state |= ISP_PIPELINE_IDLE_OUTPUT;
1633 
1634 	if (ccdc->state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1635 	    isp_pipeline_ready(pipe))
1636 		omap3isp_pipeline_set_stream(pipe,
1637 					ISP_PIPELINE_STREAM_SINGLESHOT);
1638 
1639 	return buffer != NULL;
1640 }
1641 
1642 /*
1643  * ccdc_vd0_isr - Handle VD0 event
1644  * @ccdc: Pointer to ISP CCDC device.
1645  *
1646  * Executes LSC deferred enablement before next frame starts.
1647  */
1648 static void ccdc_vd0_isr(struct isp_ccdc_device *ccdc)
1649 {
1650 	unsigned long flags;
1651 	int restart = 0;
1652 
1653 	/* In BT.656 mode the CCDC doesn't generate an HS/VS interrupt. We thus
1654 	 * need to increment the frame counter here.
1655 	 */
1656 	if (ccdc->bt656) {
1657 		struct isp_pipeline *pipe =
1658 			to_isp_pipeline(&ccdc->subdev.entity);
1659 
1660 		atomic_inc(&pipe->frame_number);
1661 	}
1662 
1663 	/* Emulate a VD1 interrupt for BT.656 mode, as we can't stop the CCDC in
1664 	 * the VD1 interrupt handler in that mode without risking a CCDC stall
1665 	 * if a short frame is received.
1666 	 */
1667 	if (ccdc->bt656) {
1668 		spin_lock_irqsave(&ccdc->lock, flags);
1669 		if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS &&
1670 		    ccdc->output & CCDC_OUTPUT_MEMORY) {
1671 			if (ccdc->lsc.state != LSC_STATE_STOPPED)
1672 				__ccdc_lsc_enable(ccdc, 0);
1673 			__ccdc_enable(ccdc, 0);
1674 		}
1675 		ccdc_handle_stopping(ccdc, CCDC_EVENT_VD1);
1676 		spin_unlock_irqrestore(&ccdc->lock, flags);
1677 	}
1678 
1679 	spin_lock_irqsave(&ccdc->lock, flags);
1680 	if (ccdc_handle_stopping(ccdc, CCDC_EVENT_VD0)) {
1681 		spin_unlock_irqrestore(&ccdc->lock, flags);
1682 		return;
1683 	}
1684 
1685 	if (ccdc->output & CCDC_OUTPUT_MEMORY)
1686 		restart = ccdc_isr_buffer(ccdc);
1687 
1688 	if (!ccdc->shadow_update)
1689 		ccdc_apply_controls(ccdc);
1690 	spin_unlock_irqrestore(&ccdc->lock, flags);
1691 
1692 	if (restart)
1693 		ccdc_enable(ccdc);
1694 }
1695 
1696 /*
1697  * ccdc_vd1_isr - Handle VD1 event
1698  * @ccdc: Pointer to ISP CCDC device.
1699  */
1700 static void ccdc_vd1_isr(struct isp_ccdc_device *ccdc)
1701 {
1702 	unsigned long flags;
1703 
1704 	/* In BT.656 mode the synchronization signals are generated by the CCDC
1705 	 * from the embedded sync codes. The VD0 and VD1 interrupts are thus
1706 	 * only triggered when the CCDC is enabled, unlike external sync mode
1707 	 * where the line counter runs even when the CCDC is stopped. We can't
1708 	 * disable the CCDC at VD1 time, as no VD0 interrupt would be generated
1709 	 * for a short frame, which would result in the CCDC being stopped and
1710 	 * no VD interrupt generated anymore. The CCDC is stopped from the VD0
1711 	 * interrupt handler instead for BT.656.
1712 	 */
1713 	if (ccdc->bt656)
1714 		return;
1715 
1716 	spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1717 
1718 	/*
1719 	 * Depending on the CCDC pipeline state, CCDC stopping should be
1720 	 * handled differently. In SINGLESHOT we emulate an internal CCDC
1721 	 * stopping because the CCDC hw works only in continuous mode.
1722 	 * When CONTINUOUS pipeline state is used and the CCDC writes it's
1723 	 * data to memory the CCDC and LSC are stopped immediately but
1724 	 * without change the CCDC stopping state machine. The CCDC
1725 	 * stopping state machine should be used only when user request
1726 	 * for stopping is received (SINGLESHOT is an exception).
1727 	 */
1728 	switch (ccdc->state) {
1729 	case ISP_PIPELINE_STREAM_SINGLESHOT:
1730 		ccdc->stopping = CCDC_STOP_REQUEST;
1731 		break;
1732 
1733 	case ISP_PIPELINE_STREAM_CONTINUOUS:
1734 		if (ccdc->output & CCDC_OUTPUT_MEMORY) {
1735 			if (ccdc->lsc.state != LSC_STATE_STOPPED)
1736 				__ccdc_lsc_enable(ccdc, 0);
1737 			__ccdc_enable(ccdc, 0);
1738 		}
1739 		break;
1740 
1741 	case ISP_PIPELINE_STREAM_STOPPED:
1742 		break;
1743 	}
1744 
1745 	if (ccdc_handle_stopping(ccdc, CCDC_EVENT_VD1))
1746 		goto done;
1747 
1748 	if (ccdc->lsc.request == NULL)
1749 		goto done;
1750 
1751 	/*
1752 	 * LSC need to be reconfigured. Stop it here and on next LSC_DONE IRQ
1753 	 * do the appropriate changes in registers
1754 	 */
1755 	if (ccdc->lsc.state == LSC_STATE_RUNNING) {
1756 		__ccdc_lsc_enable(ccdc, 0);
1757 		ccdc->lsc.state = LSC_STATE_RECONFIG;
1758 		goto done;
1759 	}
1760 
1761 	/* LSC has been in STOPPED state, enable it */
1762 	if (ccdc->lsc.state == LSC_STATE_STOPPED)
1763 		ccdc_lsc_enable(ccdc);
1764 
1765 done:
1766 	spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1767 }
1768 
1769 /*
1770  * omap3isp_ccdc_isr - Configure CCDC during interframe time.
1771  * @ccdc: Pointer to ISP CCDC device.
1772  * @events: CCDC events
1773  */
1774 int omap3isp_ccdc_isr(struct isp_ccdc_device *ccdc, u32 events)
1775 {
1776 	if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED)
1777 		return 0;
1778 
1779 	if (events & IRQ0STATUS_CCDC_VD1_IRQ)
1780 		ccdc_vd1_isr(ccdc);
1781 
1782 	ccdc_lsc_isr(ccdc, events);
1783 
1784 	if (events & IRQ0STATUS_CCDC_VD0_IRQ)
1785 		ccdc_vd0_isr(ccdc);
1786 
1787 	if (events & IRQ0STATUS_HS_VS_IRQ)
1788 		ccdc_hs_vs_isr(ccdc);
1789 
1790 	return 0;
1791 }
1792 
1793 /* -----------------------------------------------------------------------------
1794  * ISP video operations
1795  */
1796 
1797 static int ccdc_video_queue(struct isp_video *video, struct isp_buffer *buffer)
1798 {
1799 	struct isp_ccdc_device *ccdc = &video->isp->isp_ccdc;
1800 	unsigned long flags;
1801 	bool restart = false;
1802 
1803 	if (!(ccdc->output & CCDC_OUTPUT_MEMORY))
1804 		return -ENODEV;
1805 
1806 	ccdc_set_outaddr(ccdc, buffer->dma);
1807 
1808 	/* We now have a buffer queued on the output, restart the pipeline
1809 	 * on the next CCDC interrupt if running in continuous mode (or when
1810 	 * starting the stream) in external sync mode, or immediately in BT.656
1811 	 * sync mode as no CCDC interrupt is generated when the CCDC is stopped
1812 	 * in that case.
1813 	 */
1814 	spin_lock_irqsave(&ccdc->lock, flags);
1815 	if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS && !ccdc->running &&
1816 	    ccdc->bt656)
1817 		restart = true;
1818 	else
1819 		ccdc->underrun = 1;
1820 	spin_unlock_irqrestore(&ccdc->lock, flags);
1821 
1822 	if (restart)
1823 		ccdc_enable(ccdc);
1824 
1825 	return 0;
1826 }
1827 
1828 static const struct isp_video_operations ccdc_video_ops = {
1829 	.queue = ccdc_video_queue,
1830 };
1831 
1832 /* -----------------------------------------------------------------------------
1833  * V4L2 subdev operations
1834  */
1835 
1836 /*
1837  * ccdc_ioctl - CCDC module private ioctl's
1838  * @sd: ISP CCDC V4L2 subdevice
1839  * @cmd: ioctl command
1840  * @arg: ioctl argument
1841  *
1842  * Return 0 on success or a negative error code otherwise.
1843  */
1844 static long ccdc_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
1845 {
1846 	struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1847 	int ret;
1848 
1849 	switch (cmd) {
1850 	case VIDIOC_OMAP3ISP_CCDC_CFG:
1851 		mutex_lock(&ccdc->ioctl_lock);
1852 		ret = ccdc_config(ccdc, arg);
1853 		mutex_unlock(&ccdc->ioctl_lock);
1854 		break;
1855 
1856 	default:
1857 		return -ENOIOCTLCMD;
1858 	}
1859 
1860 	return ret;
1861 }
1862 
1863 static int ccdc_subscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
1864 				struct v4l2_event_subscription *sub)
1865 {
1866 	if (sub->type != V4L2_EVENT_FRAME_SYNC)
1867 		return -EINVAL;
1868 
1869 	/* line number is zero at frame start */
1870 	if (sub->id != 0)
1871 		return -EINVAL;
1872 
1873 	return v4l2_event_subscribe(fh, sub, OMAP3ISP_CCDC_NEVENTS, NULL);
1874 }
1875 
1876 static int ccdc_unsubscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
1877 				  struct v4l2_event_subscription *sub)
1878 {
1879 	return v4l2_event_unsubscribe(fh, sub);
1880 }
1881 
1882 /*
1883  * ccdc_set_stream - Enable/Disable streaming on the CCDC module
1884  * @sd: ISP CCDC V4L2 subdevice
1885  * @enable: Enable/disable stream
1886  *
1887  * When writing to memory, the CCDC hardware can't be enabled without a memory
1888  * buffer to write to. As the s_stream operation is called in response to a
1889  * STREAMON call without any buffer queued yet, just update the enabled field
1890  * and return immediately. The CCDC will be enabled in ccdc_isr_buffer().
1891  *
1892  * When not writing to memory enable the CCDC immediately.
1893  */
1894 static int ccdc_set_stream(struct v4l2_subdev *sd, int enable)
1895 {
1896 	struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1897 	struct isp_device *isp = to_isp_device(ccdc);
1898 	int ret = 0;
1899 
1900 	if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED) {
1901 		if (enable == ISP_PIPELINE_STREAM_STOPPED)
1902 			return 0;
1903 
1904 		omap3isp_subclk_enable(isp, OMAP3_ISP_SUBCLK_CCDC);
1905 		isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1906 			    ISPCCDC_CFG_VDLC);
1907 
1908 		ccdc_configure(ccdc);
1909 
1910 		ccdc_print_status(ccdc);
1911 	}
1912 
1913 	switch (enable) {
1914 	case ISP_PIPELINE_STREAM_CONTINUOUS:
1915 		if (ccdc->output & CCDC_OUTPUT_MEMORY)
1916 			omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1917 
1918 		if (ccdc->underrun || !(ccdc->output & CCDC_OUTPUT_MEMORY))
1919 			ccdc_enable(ccdc);
1920 
1921 		ccdc->underrun = 0;
1922 		break;
1923 
1924 	case ISP_PIPELINE_STREAM_SINGLESHOT:
1925 		if (ccdc->output & CCDC_OUTPUT_MEMORY &&
1926 		    ccdc->state != ISP_PIPELINE_STREAM_SINGLESHOT)
1927 			omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1928 
1929 		ccdc_enable(ccdc);
1930 		break;
1931 
1932 	case ISP_PIPELINE_STREAM_STOPPED:
1933 		ret = ccdc_disable(ccdc);
1934 		if (ccdc->output & CCDC_OUTPUT_MEMORY)
1935 			omap3isp_sbl_disable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1936 		omap3isp_subclk_disable(isp, OMAP3_ISP_SUBCLK_CCDC);
1937 		ccdc->underrun = 0;
1938 		break;
1939 	}
1940 
1941 	ccdc->state = enable;
1942 	return ret;
1943 }
1944 
1945 static struct v4l2_mbus_framefmt *
1946 __ccdc_get_format(struct isp_ccdc_device *ccdc,
1947 		  struct v4l2_subdev_state *sd_state,
1948 		  unsigned int pad, enum v4l2_subdev_format_whence which)
1949 {
1950 	if (which == V4L2_SUBDEV_FORMAT_TRY)
1951 		return v4l2_subdev_get_try_format(&ccdc->subdev, sd_state,
1952 						  pad);
1953 	else
1954 		return &ccdc->formats[pad];
1955 }
1956 
1957 static struct v4l2_rect *
1958 __ccdc_get_crop(struct isp_ccdc_device *ccdc,
1959 		struct v4l2_subdev_state *sd_state,
1960 		enum v4l2_subdev_format_whence which)
1961 {
1962 	if (which == V4L2_SUBDEV_FORMAT_TRY)
1963 		return v4l2_subdev_get_try_crop(&ccdc->subdev, sd_state,
1964 						CCDC_PAD_SOURCE_OF);
1965 	else
1966 		return &ccdc->crop;
1967 }
1968 
1969 /*
1970  * ccdc_try_format - Try video format on a pad
1971  * @ccdc: ISP CCDC device
1972  * @cfg : V4L2 subdev pad configuration
1973  * @pad: Pad number
1974  * @fmt: Format
1975  */
1976 static void
1977 ccdc_try_format(struct isp_ccdc_device *ccdc,
1978 		struct v4l2_subdev_state *sd_state,
1979 		unsigned int pad, struct v4l2_mbus_framefmt *fmt,
1980 		enum v4l2_subdev_format_whence which)
1981 {
1982 	const struct isp_format_info *info;
1983 	u32 pixelcode;
1984 	unsigned int width = fmt->width;
1985 	unsigned int height = fmt->height;
1986 	struct v4l2_rect *crop;
1987 	enum v4l2_field field;
1988 	unsigned int i;
1989 
1990 	switch (pad) {
1991 	case CCDC_PAD_SINK:
1992 		for (i = 0; i < ARRAY_SIZE(ccdc_fmts); i++) {
1993 			if (fmt->code == ccdc_fmts[i])
1994 				break;
1995 		}
1996 
1997 		/* If not found, use SGRBG10 as default */
1998 		if (i >= ARRAY_SIZE(ccdc_fmts))
1999 			fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10;
2000 
2001 		/* Clamp the input size. */
2002 		fmt->width = clamp_t(u32, width, 32, 4096);
2003 		fmt->height = clamp_t(u32, height, 32, 4096);
2004 
2005 		/* Default to progressive field order. */
2006 		if (fmt->field == V4L2_FIELD_ANY)
2007 			fmt->field = V4L2_FIELD_NONE;
2008 
2009 		break;
2010 
2011 	case CCDC_PAD_SOURCE_OF:
2012 		pixelcode = fmt->code;
2013 		field = fmt->field;
2014 		*fmt = *__ccdc_get_format(ccdc, sd_state, CCDC_PAD_SINK,
2015 					  which);
2016 
2017 		/* In SYNC mode the bridge converts YUV formats from 2X8 to
2018 		 * 1X16. In BT.656 no such conversion occurs. As we don't know
2019 		 * at this point whether the source will use SYNC or BT.656 mode
2020 		 * let's pretend the conversion always occurs. The CCDC will be
2021 		 * configured to pack bytes in BT.656, hiding the inaccuracy.
2022 		 * In all cases bytes can be swapped.
2023 		 */
2024 		if (fmt->code == MEDIA_BUS_FMT_YUYV8_2X8 ||
2025 		    fmt->code == MEDIA_BUS_FMT_UYVY8_2X8) {
2026 			/* Use the user requested format if YUV. */
2027 			if (pixelcode == MEDIA_BUS_FMT_YUYV8_2X8 ||
2028 			    pixelcode == MEDIA_BUS_FMT_UYVY8_2X8 ||
2029 			    pixelcode == MEDIA_BUS_FMT_YUYV8_1X16 ||
2030 			    pixelcode == MEDIA_BUS_FMT_UYVY8_1X16)
2031 				fmt->code = pixelcode;
2032 
2033 			if (fmt->code == MEDIA_BUS_FMT_YUYV8_2X8)
2034 				fmt->code = MEDIA_BUS_FMT_YUYV8_1X16;
2035 			else if (fmt->code == MEDIA_BUS_FMT_UYVY8_2X8)
2036 				fmt->code = MEDIA_BUS_FMT_UYVY8_1X16;
2037 		}
2038 
2039 		/* Hardcode the output size to the crop rectangle size. */
2040 		crop = __ccdc_get_crop(ccdc, sd_state, which);
2041 		fmt->width = crop->width;
2042 		fmt->height = crop->height;
2043 
2044 		/* When input format is interlaced with alternating fields the
2045 		 * CCDC can interleave the fields.
2046 		 */
2047 		if (fmt->field == V4L2_FIELD_ALTERNATE &&
2048 		    (field == V4L2_FIELD_INTERLACED_TB ||
2049 		     field == V4L2_FIELD_INTERLACED_BT)) {
2050 			fmt->field = field;
2051 			fmt->height *= 2;
2052 		}
2053 
2054 		break;
2055 
2056 	case CCDC_PAD_SOURCE_VP:
2057 		*fmt = *__ccdc_get_format(ccdc, sd_state, CCDC_PAD_SINK,
2058 					  which);
2059 
2060 		/* The video port interface truncates the data to 10 bits. */
2061 		info = omap3isp_video_format_info(fmt->code);
2062 		fmt->code = info->truncated;
2063 
2064 		/* YUV formats are not supported by the video port. */
2065 		if (fmt->code == MEDIA_BUS_FMT_YUYV8_2X8 ||
2066 		    fmt->code == MEDIA_BUS_FMT_UYVY8_2X8)
2067 			fmt->code = 0;
2068 
2069 		/* The number of lines that can be clocked out from the video
2070 		 * port output must be at least one line less than the number
2071 		 * of input lines.
2072 		 */
2073 		fmt->width = clamp_t(u32, width, 32, fmt->width);
2074 		fmt->height = clamp_t(u32, height, 32, fmt->height - 1);
2075 		break;
2076 	}
2077 
2078 	/* Data is written to memory unpacked, each 10-bit or 12-bit pixel is
2079 	 * stored on 2 bytes.
2080 	 */
2081 	fmt->colorspace = V4L2_COLORSPACE_SRGB;
2082 }
2083 
2084 /*
2085  * ccdc_try_crop - Validate a crop rectangle
2086  * @ccdc: ISP CCDC device
2087  * @sink: format on the sink pad
2088  * @crop: crop rectangle to be validated
2089  */
2090 static void ccdc_try_crop(struct isp_ccdc_device *ccdc,
2091 			  const struct v4l2_mbus_framefmt *sink,
2092 			  struct v4l2_rect *crop)
2093 {
2094 	const struct isp_format_info *info;
2095 	unsigned int max_width;
2096 
2097 	/* For Bayer formats, restrict left/top and width/height to even values
2098 	 * to keep the Bayer pattern.
2099 	 */
2100 	info = omap3isp_video_format_info(sink->code);
2101 	if (info->flavor != MEDIA_BUS_FMT_Y8_1X8) {
2102 		crop->left &= ~1;
2103 		crop->top &= ~1;
2104 	}
2105 
2106 	crop->left = clamp_t(u32, crop->left, 0, sink->width - CCDC_MIN_WIDTH);
2107 	crop->top = clamp_t(u32, crop->top, 0, sink->height - CCDC_MIN_HEIGHT);
2108 
2109 	/* The data formatter truncates the number of horizontal output pixels
2110 	 * to a multiple of 16. To avoid clipping data, allow callers to request
2111 	 * an output size bigger than the input size up to the nearest multiple
2112 	 * of 16.
2113 	 */
2114 	max_width = (sink->width - crop->left + 15) & ~15;
2115 	crop->width = clamp_t(u32, crop->width, CCDC_MIN_WIDTH, max_width)
2116 		    & ~15;
2117 	crop->height = clamp_t(u32, crop->height, CCDC_MIN_HEIGHT,
2118 			       sink->height - crop->top);
2119 
2120 	/* Odd width/height values don't make sense for Bayer formats. */
2121 	if (info->flavor != MEDIA_BUS_FMT_Y8_1X8) {
2122 		crop->width &= ~1;
2123 		crop->height &= ~1;
2124 	}
2125 }
2126 
2127 /*
2128  * ccdc_enum_mbus_code - Handle pixel format enumeration
2129  * @sd     : pointer to v4l2 subdev structure
2130  * @cfg : V4L2 subdev pad configuration
2131  * @code   : pointer to v4l2_subdev_mbus_code_enum structure
2132  * return -EINVAL or zero on success
2133  */
2134 static int ccdc_enum_mbus_code(struct v4l2_subdev *sd,
2135 			       struct v4l2_subdev_state *sd_state,
2136 			       struct v4l2_subdev_mbus_code_enum *code)
2137 {
2138 	struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2139 	struct v4l2_mbus_framefmt *format;
2140 
2141 	switch (code->pad) {
2142 	case CCDC_PAD_SINK:
2143 		if (code->index >= ARRAY_SIZE(ccdc_fmts))
2144 			return -EINVAL;
2145 
2146 		code->code = ccdc_fmts[code->index];
2147 		break;
2148 
2149 	case CCDC_PAD_SOURCE_OF:
2150 		format = __ccdc_get_format(ccdc, sd_state, code->pad,
2151 					   code->which);
2152 
2153 		if (format->code == MEDIA_BUS_FMT_YUYV8_2X8 ||
2154 		    format->code == MEDIA_BUS_FMT_UYVY8_2X8) {
2155 			/* In YUV mode the CCDC can swap bytes. */
2156 			if (code->index == 0)
2157 				code->code = MEDIA_BUS_FMT_YUYV8_1X16;
2158 			else if (code->index == 1)
2159 				code->code = MEDIA_BUS_FMT_UYVY8_1X16;
2160 			else
2161 				return -EINVAL;
2162 		} else {
2163 			/* In raw mode, no configurable format confversion is
2164 			 * available.
2165 			 */
2166 			if (code->index == 0)
2167 				code->code = format->code;
2168 			else
2169 				return -EINVAL;
2170 		}
2171 		break;
2172 
2173 	case CCDC_PAD_SOURCE_VP:
2174 		/* The CCDC supports no configurable format conversion
2175 		 * compatible with the video port. Enumerate a single output
2176 		 * format code.
2177 		 */
2178 		if (code->index != 0)
2179 			return -EINVAL;
2180 
2181 		format = __ccdc_get_format(ccdc, sd_state, code->pad,
2182 					   code->which);
2183 
2184 		/* A pixel code equal to 0 means that the video port doesn't
2185 		 * support the input format. Don't enumerate any pixel code.
2186 		 */
2187 		if (format->code == 0)
2188 			return -EINVAL;
2189 
2190 		code->code = format->code;
2191 		break;
2192 
2193 	default:
2194 		return -EINVAL;
2195 	}
2196 
2197 	return 0;
2198 }
2199 
2200 static int ccdc_enum_frame_size(struct v4l2_subdev *sd,
2201 				struct v4l2_subdev_state *sd_state,
2202 				struct v4l2_subdev_frame_size_enum *fse)
2203 {
2204 	struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2205 	struct v4l2_mbus_framefmt format;
2206 
2207 	if (fse->index != 0)
2208 		return -EINVAL;
2209 
2210 	format.code = fse->code;
2211 	format.width = 1;
2212 	format.height = 1;
2213 	ccdc_try_format(ccdc, sd_state, fse->pad, &format, fse->which);
2214 	fse->min_width = format.width;
2215 	fse->min_height = format.height;
2216 
2217 	if (format.code != fse->code)
2218 		return -EINVAL;
2219 
2220 	format.code = fse->code;
2221 	format.width = -1;
2222 	format.height = -1;
2223 	ccdc_try_format(ccdc, sd_state, fse->pad, &format, fse->which);
2224 	fse->max_width = format.width;
2225 	fse->max_height = format.height;
2226 
2227 	return 0;
2228 }
2229 
2230 /*
2231  * ccdc_get_selection - Retrieve a selection rectangle on a pad
2232  * @sd: ISP CCDC V4L2 subdevice
2233  * @cfg: V4L2 subdev pad configuration
2234  * @sel: Selection rectangle
2235  *
2236  * The only supported rectangles are the crop rectangles on the output formatter
2237  * source pad.
2238  *
2239  * Return 0 on success or a negative error code otherwise.
2240  */
2241 static int ccdc_get_selection(struct v4l2_subdev *sd,
2242 			      struct v4l2_subdev_state *sd_state,
2243 			      struct v4l2_subdev_selection *sel)
2244 {
2245 	struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2246 	struct v4l2_mbus_framefmt *format;
2247 
2248 	if (sel->pad != CCDC_PAD_SOURCE_OF)
2249 		return -EINVAL;
2250 
2251 	switch (sel->target) {
2252 	case V4L2_SEL_TGT_CROP_BOUNDS:
2253 		sel->r.left = 0;
2254 		sel->r.top = 0;
2255 		sel->r.width = INT_MAX;
2256 		sel->r.height = INT_MAX;
2257 
2258 		format = __ccdc_get_format(ccdc, sd_state, CCDC_PAD_SINK,
2259 					   sel->which);
2260 		ccdc_try_crop(ccdc, format, &sel->r);
2261 		break;
2262 
2263 	case V4L2_SEL_TGT_CROP:
2264 		sel->r = *__ccdc_get_crop(ccdc, sd_state, sel->which);
2265 		break;
2266 
2267 	default:
2268 		return -EINVAL;
2269 	}
2270 
2271 	return 0;
2272 }
2273 
2274 /*
2275  * ccdc_set_selection - Set a selection rectangle on a pad
2276  * @sd: ISP CCDC V4L2 subdevice
2277  * @cfg: V4L2 subdev pad configuration
2278  * @sel: Selection rectangle
2279  *
2280  * The only supported rectangle is the actual crop rectangle on the output
2281  * formatter source pad.
2282  *
2283  * Return 0 on success or a negative error code otherwise.
2284  */
2285 static int ccdc_set_selection(struct v4l2_subdev *sd,
2286 			      struct v4l2_subdev_state *sd_state,
2287 			      struct v4l2_subdev_selection *sel)
2288 {
2289 	struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2290 	struct v4l2_mbus_framefmt *format;
2291 
2292 	if (sel->target != V4L2_SEL_TGT_CROP ||
2293 	    sel->pad != CCDC_PAD_SOURCE_OF)
2294 		return -EINVAL;
2295 
2296 	/* The crop rectangle can't be changed while streaming. */
2297 	if (ccdc->state != ISP_PIPELINE_STREAM_STOPPED)
2298 		return -EBUSY;
2299 
2300 	/* Modifying the crop rectangle always changes the format on the source
2301 	 * pad. If the KEEP_CONFIG flag is set, just return the current crop
2302 	 * rectangle.
2303 	 */
2304 	if (sel->flags & V4L2_SEL_FLAG_KEEP_CONFIG) {
2305 		sel->r = *__ccdc_get_crop(ccdc, sd_state, sel->which);
2306 		return 0;
2307 	}
2308 
2309 	format = __ccdc_get_format(ccdc, sd_state, CCDC_PAD_SINK, sel->which);
2310 	ccdc_try_crop(ccdc, format, &sel->r);
2311 	*__ccdc_get_crop(ccdc, sd_state, sel->which) = sel->r;
2312 
2313 	/* Update the source format. */
2314 	format = __ccdc_get_format(ccdc, sd_state, CCDC_PAD_SOURCE_OF,
2315 				   sel->which);
2316 	ccdc_try_format(ccdc, sd_state, CCDC_PAD_SOURCE_OF, format,
2317 			sel->which);
2318 
2319 	return 0;
2320 }
2321 
2322 /*
2323  * ccdc_get_format - Retrieve the video format on a pad
2324  * @sd : ISP CCDC V4L2 subdevice
2325  * @cfg: V4L2 subdev pad configuration
2326  * @fmt: Format
2327  *
2328  * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
2329  * to the format type.
2330  */
2331 static int ccdc_get_format(struct v4l2_subdev *sd,
2332 			   struct v4l2_subdev_state *sd_state,
2333 			   struct v4l2_subdev_format *fmt)
2334 {
2335 	struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2336 	struct v4l2_mbus_framefmt *format;
2337 
2338 	format = __ccdc_get_format(ccdc, sd_state, fmt->pad, fmt->which);
2339 	if (format == NULL)
2340 		return -EINVAL;
2341 
2342 	fmt->format = *format;
2343 	return 0;
2344 }
2345 
2346 /*
2347  * ccdc_set_format - Set the video format on a pad
2348  * @sd : ISP CCDC V4L2 subdevice
2349  * @cfg: V4L2 subdev pad configuration
2350  * @fmt: Format
2351  *
2352  * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
2353  * to the format type.
2354  */
2355 static int ccdc_set_format(struct v4l2_subdev *sd,
2356 			   struct v4l2_subdev_state *sd_state,
2357 			   struct v4l2_subdev_format *fmt)
2358 {
2359 	struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2360 	struct v4l2_mbus_framefmt *format;
2361 	struct v4l2_rect *crop;
2362 
2363 	format = __ccdc_get_format(ccdc, sd_state, fmt->pad, fmt->which);
2364 	if (format == NULL)
2365 		return -EINVAL;
2366 
2367 	ccdc_try_format(ccdc, sd_state, fmt->pad, &fmt->format, fmt->which);
2368 	*format = fmt->format;
2369 
2370 	/* Propagate the format from sink to source */
2371 	if (fmt->pad == CCDC_PAD_SINK) {
2372 		/* Reset the crop rectangle. */
2373 		crop = __ccdc_get_crop(ccdc, sd_state, fmt->which);
2374 		crop->left = 0;
2375 		crop->top = 0;
2376 		crop->width = fmt->format.width;
2377 		crop->height = fmt->format.height;
2378 
2379 		ccdc_try_crop(ccdc, &fmt->format, crop);
2380 
2381 		/* Update the source formats. */
2382 		format = __ccdc_get_format(ccdc, sd_state, CCDC_PAD_SOURCE_OF,
2383 					   fmt->which);
2384 		*format = fmt->format;
2385 		ccdc_try_format(ccdc, sd_state, CCDC_PAD_SOURCE_OF, format,
2386 				fmt->which);
2387 
2388 		format = __ccdc_get_format(ccdc, sd_state, CCDC_PAD_SOURCE_VP,
2389 					   fmt->which);
2390 		*format = fmt->format;
2391 		ccdc_try_format(ccdc, sd_state, CCDC_PAD_SOURCE_VP, format,
2392 				fmt->which);
2393 	}
2394 
2395 	return 0;
2396 }
2397 
2398 /*
2399  * Decide whether desired output pixel code can be obtained with
2400  * the lane shifter by shifting the input pixel code.
2401  * @in: input pixelcode to shifter
2402  * @out: output pixelcode from shifter
2403  * @additional_shift: # of bits the sensor's LSB is offset from CAMEXT[0]
2404  *
2405  * return true if the combination is possible
2406  * return false otherwise
2407  */
2408 static bool ccdc_is_shiftable(u32 in, u32 out, unsigned int additional_shift)
2409 {
2410 	const struct isp_format_info *in_info, *out_info;
2411 
2412 	if (in == out)
2413 		return true;
2414 
2415 	in_info = omap3isp_video_format_info(in);
2416 	out_info = omap3isp_video_format_info(out);
2417 
2418 	if ((in_info->flavor == 0) || (out_info->flavor == 0))
2419 		return false;
2420 
2421 	if (in_info->flavor != out_info->flavor)
2422 		return false;
2423 
2424 	return in_info->width - out_info->width + additional_shift <= 6;
2425 }
2426 
2427 static int ccdc_link_validate(struct v4l2_subdev *sd,
2428 			      struct media_link *link,
2429 			      struct v4l2_subdev_format *source_fmt,
2430 			      struct v4l2_subdev_format *sink_fmt)
2431 {
2432 	struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2433 	unsigned long parallel_shift;
2434 
2435 	/* Check if the two ends match */
2436 	if (source_fmt->format.width != sink_fmt->format.width ||
2437 	    source_fmt->format.height != sink_fmt->format.height)
2438 		return -EPIPE;
2439 
2440 	/* We've got a parallel sensor here. */
2441 	if (ccdc->input == CCDC_INPUT_PARALLEL) {
2442 		struct v4l2_subdev *sd =
2443 			media_entity_to_v4l2_subdev(link->source->entity);
2444 		struct isp_bus_cfg *bus_cfg;
2445 
2446 		bus_cfg = v4l2_subdev_to_bus_cfg(sd);
2447 		if (WARN_ON(!bus_cfg))
2448 			return -EPIPE;
2449 
2450 		parallel_shift = bus_cfg->bus.parallel.data_lane_shift;
2451 	} else {
2452 		parallel_shift = 0;
2453 	}
2454 
2455 	/* Lane shifter may be used to drop bits on CCDC sink pad */
2456 	if (!ccdc_is_shiftable(source_fmt->format.code,
2457 			       sink_fmt->format.code, parallel_shift))
2458 		return -EPIPE;
2459 
2460 	return 0;
2461 }
2462 
2463 /*
2464  * ccdc_init_formats - Initialize formats on all pads
2465  * @sd: ISP CCDC V4L2 subdevice
2466  * @fh: V4L2 subdev file handle
2467  *
2468  * Initialize all pad formats with default values. If fh is not NULL, try
2469  * formats are initialized on the file handle. Otherwise active formats are
2470  * initialized on the device.
2471  */
2472 static int ccdc_init_formats(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
2473 {
2474 	struct v4l2_subdev_format format;
2475 
2476 	memset(&format, 0, sizeof(format));
2477 	format.pad = CCDC_PAD_SINK;
2478 	format.which = fh ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
2479 	format.format.code = MEDIA_BUS_FMT_SGRBG10_1X10;
2480 	format.format.width = 4096;
2481 	format.format.height = 4096;
2482 	ccdc_set_format(sd, fh ? fh->state : NULL, &format);
2483 
2484 	return 0;
2485 }
2486 
2487 /* V4L2 subdev core operations */
2488 static const struct v4l2_subdev_core_ops ccdc_v4l2_core_ops = {
2489 	.ioctl = ccdc_ioctl,
2490 	.subscribe_event = ccdc_subscribe_event,
2491 	.unsubscribe_event = ccdc_unsubscribe_event,
2492 };
2493 
2494 /* V4L2 subdev video operations */
2495 static const struct v4l2_subdev_video_ops ccdc_v4l2_video_ops = {
2496 	.s_stream = ccdc_set_stream,
2497 };
2498 
2499 /* V4L2 subdev pad operations */
2500 static const struct v4l2_subdev_pad_ops ccdc_v4l2_pad_ops = {
2501 	.enum_mbus_code = ccdc_enum_mbus_code,
2502 	.enum_frame_size = ccdc_enum_frame_size,
2503 	.get_fmt = ccdc_get_format,
2504 	.set_fmt = ccdc_set_format,
2505 	.get_selection = ccdc_get_selection,
2506 	.set_selection = ccdc_set_selection,
2507 	.link_validate = ccdc_link_validate,
2508 };
2509 
2510 /* V4L2 subdev operations */
2511 static const struct v4l2_subdev_ops ccdc_v4l2_ops = {
2512 	.core = &ccdc_v4l2_core_ops,
2513 	.video = &ccdc_v4l2_video_ops,
2514 	.pad = &ccdc_v4l2_pad_ops,
2515 };
2516 
2517 /* V4L2 subdev internal operations */
2518 static const struct v4l2_subdev_internal_ops ccdc_v4l2_internal_ops = {
2519 	.open = ccdc_init_formats,
2520 };
2521 
2522 /* -----------------------------------------------------------------------------
2523  * Media entity operations
2524  */
2525 
2526 /*
2527  * ccdc_link_setup - Setup CCDC connections
2528  * @entity: CCDC media entity
2529  * @local: Pad at the local end of the link
2530  * @remote: Pad at the remote end of the link
2531  * @flags: Link flags
2532  *
2533  * return -EINVAL or zero on success
2534  */
2535 static int ccdc_link_setup(struct media_entity *entity,
2536 			   const struct media_pad *local,
2537 			   const struct media_pad *remote, u32 flags)
2538 {
2539 	struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
2540 	struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2541 	struct isp_device *isp = to_isp_device(ccdc);
2542 	unsigned int index = local->index;
2543 
2544 	/* FIXME: this is actually a hack! */
2545 	if (is_media_entity_v4l2_subdev(remote->entity))
2546 		index |= 2 << 16;
2547 
2548 	switch (index) {
2549 	case CCDC_PAD_SINK | 2 << 16:
2550 		/* Read from the sensor (parallel interface), CCP2, CSI2a or
2551 		 * CSI2c.
2552 		 */
2553 		if (!(flags & MEDIA_LNK_FL_ENABLED)) {
2554 			ccdc->input = CCDC_INPUT_NONE;
2555 			break;
2556 		}
2557 
2558 		if (ccdc->input != CCDC_INPUT_NONE)
2559 			return -EBUSY;
2560 
2561 		if (remote->entity == &isp->isp_ccp2.subdev.entity)
2562 			ccdc->input = CCDC_INPUT_CCP2B;
2563 		else if (remote->entity == &isp->isp_csi2a.subdev.entity)
2564 			ccdc->input = CCDC_INPUT_CSI2A;
2565 		else if (remote->entity == &isp->isp_csi2c.subdev.entity)
2566 			ccdc->input = CCDC_INPUT_CSI2C;
2567 		else
2568 			ccdc->input = CCDC_INPUT_PARALLEL;
2569 
2570 		break;
2571 
2572 	/*
2573 	 * The ISP core doesn't support pipelines with multiple video outputs.
2574 	 * Revisit this when it will be implemented, and return -EBUSY for now.
2575 	 */
2576 
2577 	case CCDC_PAD_SOURCE_VP | 2 << 16:
2578 		/* Write to preview engine, histogram and H3A. When none of
2579 		 * those links are active, the video port can be disabled.
2580 		 */
2581 		if (flags & MEDIA_LNK_FL_ENABLED) {
2582 			if (ccdc->output & ~CCDC_OUTPUT_PREVIEW)
2583 				return -EBUSY;
2584 			ccdc->output |= CCDC_OUTPUT_PREVIEW;
2585 		} else {
2586 			ccdc->output &= ~CCDC_OUTPUT_PREVIEW;
2587 		}
2588 		break;
2589 
2590 	case CCDC_PAD_SOURCE_OF:
2591 		/* Write to memory */
2592 		if (flags & MEDIA_LNK_FL_ENABLED) {
2593 			if (ccdc->output & ~CCDC_OUTPUT_MEMORY)
2594 				return -EBUSY;
2595 			ccdc->output |= CCDC_OUTPUT_MEMORY;
2596 		} else {
2597 			ccdc->output &= ~CCDC_OUTPUT_MEMORY;
2598 		}
2599 		break;
2600 
2601 	case CCDC_PAD_SOURCE_OF | 2 << 16:
2602 		/* Write to resizer */
2603 		if (flags & MEDIA_LNK_FL_ENABLED) {
2604 			if (ccdc->output & ~CCDC_OUTPUT_RESIZER)
2605 				return -EBUSY;
2606 			ccdc->output |= CCDC_OUTPUT_RESIZER;
2607 		} else {
2608 			ccdc->output &= ~CCDC_OUTPUT_RESIZER;
2609 		}
2610 		break;
2611 
2612 	default:
2613 		return -EINVAL;
2614 	}
2615 
2616 	return 0;
2617 }
2618 
2619 /* media operations */
2620 static const struct media_entity_operations ccdc_media_ops = {
2621 	.link_setup = ccdc_link_setup,
2622 	.link_validate = v4l2_subdev_link_validate,
2623 };
2624 
2625 void omap3isp_ccdc_unregister_entities(struct isp_ccdc_device *ccdc)
2626 {
2627 	v4l2_device_unregister_subdev(&ccdc->subdev);
2628 	omap3isp_video_unregister(&ccdc->video_out);
2629 }
2630 
2631 int omap3isp_ccdc_register_entities(struct isp_ccdc_device *ccdc,
2632 	struct v4l2_device *vdev)
2633 {
2634 	int ret;
2635 
2636 	/* Register the subdev and video node. */
2637 	ccdc->subdev.dev = vdev->mdev->dev;
2638 	ret = v4l2_device_register_subdev(vdev, &ccdc->subdev);
2639 	if (ret < 0)
2640 		goto error;
2641 
2642 	ret = omap3isp_video_register(&ccdc->video_out, vdev);
2643 	if (ret < 0)
2644 		goto error;
2645 
2646 	return 0;
2647 
2648 error:
2649 	omap3isp_ccdc_unregister_entities(ccdc);
2650 	return ret;
2651 }
2652 
2653 /* -----------------------------------------------------------------------------
2654  * ISP CCDC initialisation and cleanup
2655  */
2656 
2657 /*
2658  * ccdc_init_entities - Initialize V4L2 subdev and media entity
2659  * @ccdc: ISP CCDC module
2660  *
2661  * Return 0 on success and a negative error code on failure.
2662  */
2663 static int ccdc_init_entities(struct isp_ccdc_device *ccdc)
2664 {
2665 	struct v4l2_subdev *sd = &ccdc->subdev;
2666 	struct media_pad *pads = ccdc->pads;
2667 	struct media_entity *me = &sd->entity;
2668 	int ret;
2669 
2670 	ccdc->input = CCDC_INPUT_NONE;
2671 
2672 	v4l2_subdev_init(sd, &ccdc_v4l2_ops);
2673 	sd->internal_ops = &ccdc_v4l2_internal_ops;
2674 	strscpy(sd->name, "OMAP3 ISP CCDC", sizeof(sd->name));
2675 	sd->grp_id = 1 << 16;	/* group ID for isp subdevs */
2676 	v4l2_set_subdevdata(sd, ccdc);
2677 	sd->flags |= V4L2_SUBDEV_FL_HAS_EVENTS | V4L2_SUBDEV_FL_HAS_DEVNODE;
2678 
2679 	pads[CCDC_PAD_SINK].flags = MEDIA_PAD_FL_SINK
2680 				    | MEDIA_PAD_FL_MUST_CONNECT;
2681 	pads[CCDC_PAD_SOURCE_VP].flags = MEDIA_PAD_FL_SOURCE;
2682 	pads[CCDC_PAD_SOURCE_OF].flags = MEDIA_PAD_FL_SOURCE;
2683 
2684 	me->ops = &ccdc_media_ops;
2685 	ret = media_entity_pads_init(me, CCDC_PADS_NUM, pads);
2686 	if (ret < 0)
2687 		return ret;
2688 
2689 	ccdc_init_formats(sd, NULL);
2690 
2691 	ccdc->video_out.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2692 	ccdc->video_out.ops = &ccdc_video_ops;
2693 	ccdc->video_out.isp = to_isp_device(ccdc);
2694 	ccdc->video_out.capture_mem = PAGE_ALIGN(4096 * 4096) * 3;
2695 	ccdc->video_out.bpl_alignment = 32;
2696 
2697 	ret = omap3isp_video_init(&ccdc->video_out, "CCDC");
2698 	if (ret < 0)
2699 		goto error;
2700 
2701 	return 0;
2702 
2703 error:
2704 	media_entity_cleanup(me);
2705 	return ret;
2706 }
2707 
2708 /*
2709  * omap3isp_ccdc_init - CCDC module initialization.
2710  * @isp: Device pointer specific to the OMAP3 ISP.
2711  *
2712  * TODO: Get the initialisation values from platform data.
2713  *
2714  * Return 0 on success or a negative error code otherwise.
2715  */
2716 int omap3isp_ccdc_init(struct isp_device *isp)
2717 {
2718 	struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
2719 	int ret;
2720 
2721 	spin_lock_init(&ccdc->lock);
2722 	init_waitqueue_head(&ccdc->wait);
2723 	mutex_init(&ccdc->ioctl_lock);
2724 
2725 	ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
2726 
2727 	INIT_WORK(&ccdc->lsc.table_work, ccdc_lsc_free_table_work);
2728 	ccdc->lsc.state = LSC_STATE_STOPPED;
2729 	INIT_LIST_HEAD(&ccdc->lsc.free_queue);
2730 	spin_lock_init(&ccdc->lsc.req_lock);
2731 
2732 	ccdc->clamp.oblen = 0;
2733 	ccdc->clamp.dcsubval = 0;
2734 
2735 	ccdc->update = OMAP3ISP_CCDC_BLCLAMP;
2736 	ccdc_apply_controls(ccdc);
2737 
2738 	ret = ccdc_init_entities(ccdc);
2739 	if (ret < 0) {
2740 		mutex_destroy(&ccdc->ioctl_lock);
2741 		return ret;
2742 	}
2743 
2744 	return 0;
2745 }
2746 
2747 /*
2748  * omap3isp_ccdc_cleanup - CCDC module cleanup.
2749  * @isp: Device pointer specific to the OMAP3 ISP.
2750  */
2751 void omap3isp_ccdc_cleanup(struct isp_device *isp)
2752 {
2753 	struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
2754 
2755 	omap3isp_video_cleanup(&ccdc->video_out);
2756 	media_entity_cleanup(&ccdc->subdev.entity);
2757 
2758 	/* Free LSC requests. As the CCDC is stopped there's no active request,
2759 	 * so only the pending request and the free queue need to be handled.
2760 	 */
2761 	ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
2762 	cancel_work_sync(&ccdc->lsc.table_work);
2763 	ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
2764 
2765 	if (ccdc->fpc.addr != NULL)
2766 		dma_free_coherent(isp->dev, ccdc->fpc.fpnum * 4, ccdc->fpc.addr,
2767 				  ccdc->fpc.dma);
2768 
2769 	mutex_destroy(&ccdc->ioctl_lock);
2770 }
2771