1*43ecec16SMauro Carvalho Chehab // SPDX-License-Identifier: GPL-2.0-or-later
2*43ecec16SMauro Carvalho Chehab /*
3*43ecec16SMauro Carvalho Chehab  * linux/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_cmd_v5.c
4*43ecec16SMauro Carvalho Chehab  *
5*43ecec16SMauro Carvalho Chehab  * Copyright (C) 2011 Samsung Electronics Co., Ltd.
6*43ecec16SMauro Carvalho Chehab  *		http://www.samsung.com/
7*43ecec16SMauro Carvalho Chehab  */
8*43ecec16SMauro Carvalho Chehab 
9*43ecec16SMauro Carvalho Chehab #include "regs-mfc.h"
10*43ecec16SMauro Carvalho Chehab #include "s5p_mfc_cmd.h"
11*43ecec16SMauro Carvalho Chehab #include "s5p_mfc_common.h"
12*43ecec16SMauro Carvalho Chehab #include "s5p_mfc_debug.h"
13*43ecec16SMauro Carvalho Chehab #include "s5p_mfc_cmd_v5.h"
14*43ecec16SMauro Carvalho Chehab 
15*43ecec16SMauro Carvalho Chehab /* This function is used to send a command to the MFC */
s5p_mfc_cmd_host2risc_v5(struct s5p_mfc_dev * dev,int cmd,struct s5p_mfc_cmd_args * args)16*43ecec16SMauro Carvalho Chehab static int s5p_mfc_cmd_host2risc_v5(struct s5p_mfc_dev *dev, int cmd,
17*43ecec16SMauro Carvalho Chehab 				struct s5p_mfc_cmd_args *args)
18*43ecec16SMauro Carvalho Chehab {
19*43ecec16SMauro Carvalho Chehab 	int cur_cmd;
20*43ecec16SMauro Carvalho Chehab 	unsigned long timeout;
21*43ecec16SMauro Carvalho Chehab 
22*43ecec16SMauro Carvalho Chehab 	timeout = jiffies + msecs_to_jiffies(MFC_BW_TIMEOUT);
23*43ecec16SMauro Carvalho Chehab 	/* wait until host to risc command register becomes 'H2R_CMD_EMPTY' */
24*43ecec16SMauro Carvalho Chehab 	do {
25*43ecec16SMauro Carvalho Chehab 		if (time_after(jiffies, timeout)) {
26*43ecec16SMauro Carvalho Chehab 			mfc_err("Timeout while waiting for hardware\n");
27*43ecec16SMauro Carvalho Chehab 			return -EIO;
28*43ecec16SMauro Carvalho Chehab 		}
29*43ecec16SMauro Carvalho Chehab 		cur_cmd = mfc_read(dev, S5P_FIMV_HOST2RISC_CMD);
30*43ecec16SMauro Carvalho Chehab 	} while (cur_cmd != S5P_FIMV_H2R_CMD_EMPTY);
31*43ecec16SMauro Carvalho Chehab 	mfc_write(dev, args->arg[0], S5P_FIMV_HOST2RISC_ARG1);
32*43ecec16SMauro Carvalho Chehab 	mfc_write(dev, args->arg[1], S5P_FIMV_HOST2RISC_ARG2);
33*43ecec16SMauro Carvalho Chehab 	mfc_write(dev, args->arg[2], S5P_FIMV_HOST2RISC_ARG3);
34*43ecec16SMauro Carvalho Chehab 	mfc_write(dev, args->arg[3], S5P_FIMV_HOST2RISC_ARG4);
35*43ecec16SMauro Carvalho Chehab 	/* Issue the command */
36*43ecec16SMauro Carvalho Chehab 	mfc_write(dev, cmd, S5P_FIMV_HOST2RISC_CMD);
37*43ecec16SMauro Carvalho Chehab 	return 0;
38*43ecec16SMauro Carvalho Chehab }
39*43ecec16SMauro Carvalho Chehab 
40*43ecec16SMauro Carvalho Chehab /* Initialize the MFC */
s5p_mfc_sys_init_cmd_v5(struct s5p_mfc_dev * dev)41*43ecec16SMauro Carvalho Chehab static int s5p_mfc_sys_init_cmd_v5(struct s5p_mfc_dev *dev)
42*43ecec16SMauro Carvalho Chehab {
43*43ecec16SMauro Carvalho Chehab 	struct s5p_mfc_cmd_args h2r_args;
44*43ecec16SMauro Carvalho Chehab 
45*43ecec16SMauro Carvalho Chehab 	memset(&h2r_args, 0, sizeof(struct s5p_mfc_cmd_args));
46*43ecec16SMauro Carvalho Chehab 	h2r_args.arg[0] = dev->fw_buf.size;
47*43ecec16SMauro Carvalho Chehab 	return s5p_mfc_cmd_host2risc_v5(dev, S5P_FIMV_H2R_CMD_SYS_INIT,
48*43ecec16SMauro Carvalho Chehab 			&h2r_args);
49*43ecec16SMauro Carvalho Chehab }
50*43ecec16SMauro Carvalho Chehab 
51*43ecec16SMauro Carvalho Chehab /* Suspend the MFC hardware */
s5p_mfc_sleep_cmd_v5(struct s5p_mfc_dev * dev)52*43ecec16SMauro Carvalho Chehab static int s5p_mfc_sleep_cmd_v5(struct s5p_mfc_dev *dev)
53*43ecec16SMauro Carvalho Chehab {
54*43ecec16SMauro Carvalho Chehab 	struct s5p_mfc_cmd_args h2r_args;
55*43ecec16SMauro Carvalho Chehab 
56*43ecec16SMauro Carvalho Chehab 	memset(&h2r_args, 0, sizeof(struct s5p_mfc_cmd_args));
57*43ecec16SMauro Carvalho Chehab 	return s5p_mfc_cmd_host2risc_v5(dev, S5P_FIMV_H2R_CMD_SLEEP, &h2r_args);
58*43ecec16SMauro Carvalho Chehab }
59*43ecec16SMauro Carvalho Chehab 
60*43ecec16SMauro Carvalho Chehab /* Wake up the MFC hardware */
s5p_mfc_wakeup_cmd_v5(struct s5p_mfc_dev * dev)61*43ecec16SMauro Carvalho Chehab static int s5p_mfc_wakeup_cmd_v5(struct s5p_mfc_dev *dev)
62*43ecec16SMauro Carvalho Chehab {
63*43ecec16SMauro Carvalho Chehab 	struct s5p_mfc_cmd_args h2r_args;
64*43ecec16SMauro Carvalho Chehab 
65*43ecec16SMauro Carvalho Chehab 	memset(&h2r_args, 0, sizeof(struct s5p_mfc_cmd_args));
66*43ecec16SMauro Carvalho Chehab 	return s5p_mfc_cmd_host2risc_v5(dev, S5P_FIMV_H2R_CMD_WAKEUP,
67*43ecec16SMauro Carvalho Chehab 			&h2r_args);
68*43ecec16SMauro Carvalho Chehab }
69*43ecec16SMauro Carvalho Chehab 
70*43ecec16SMauro Carvalho Chehab 
s5p_mfc_open_inst_cmd_v5(struct s5p_mfc_ctx * ctx)71*43ecec16SMauro Carvalho Chehab static int s5p_mfc_open_inst_cmd_v5(struct s5p_mfc_ctx *ctx)
72*43ecec16SMauro Carvalho Chehab {
73*43ecec16SMauro Carvalho Chehab 	struct s5p_mfc_dev *dev = ctx->dev;
74*43ecec16SMauro Carvalho Chehab 	struct s5p_mfc_cmd_args h2r_args;
75*43ecec16SMauro Carvalho Chehab 	int ret;
76*43ecec16SMauro Carvalho Chehab 
77*43ecec16SMauro Carvalho Chehab 	/* Preparing decoding - getting instance number */
78*43ecec16SMauro Carvalho Chehab 	mfc_debug(2, "Getting instance number (codec: %d)\n", ctx->codec_mode);
79*43ecec16SMauro Carvalho Chehab 	dev->curr_ctx = ctx->num;
80*43ecec16SMauro Carvalho Chehab 	memset(&h2r_args, 0, sizeof(struct s5p_mfc_cmd_args));
81*43ecec16SMauro Carvalho Chehab 	switch (ctx->codec_mode) {
82*43ecec16SMauro Carvalho Chehab 	case S5P_MFC_CODEC_H264_DEC:
83*43ecec16SMauro Carvalho Chehab 		h2r_args.arg[0] = S5P_FIMV_CODEC_H264_DEC;
84*43ecec16SMauro Carvalho Chehab 		break;
85*43ecec16SMauro Carvalho Chehab 	case S5P_MFC_CODEC_VC1_DEC:
86*43ecec16SMauro Carvalho Chehab 		h2r_args.arg[0] = S5P_FIMV_CODEC_VC1_DEC;
87*43ecec16SMauro Carvalho Chehab 		break;
88*43ecec16SMauro Carvalho Chehab 	case S5P_MFC_CODEC_MPEG4_DEC:
89*43ecec16SMauro Carvalho Chehab 		h2r_args.arg[0] = S5P_FIMV_CODEC_MPEG4_DEC;
90*43ecec16SMauro Carvalho Chehab 		break;
91*43ecec16SMauro Carvalho Chehab 	case S5P_MFC_CODEC_MPEG2_DEC:
92*43ecec16SMauro Carvalho Chehab 		h2r_args.arg[0] = S5P_FIMV_CODEC_MPEG2_DEC;
93*43ecec16SMauro Carvalho Chehab 		break;
94*43ecec16SMauro Carvalho Chehab 	case S5P_MFC_CODEC_H263_DEC:
95*43ecec16SMauro Carvalho Chehab 		h2r_args.arg[0] = S5P_FIMV_CODEC_H263_DEC;
96*43ecec16SMauro Carvalho Chehab 		break;
97*43ecec16SMauro Carvalho Chehab 	case S5P_MFC_CODEC_VC1RCV_DEC:
98*43ecec16SMauro Carvalho Chehab 		h2r_args.arg[0] = S5P_FIMV_CODEC_VC1RCV_DEC;
99*43ecec16SMauro Carvalho Chehab 		break;
100*43ecec16SMauro Carvalho Chehab 	case S5P_MFC_CODEC_H264_ENC:
101*43ecec16SMauro Carvalho Chehab 		h2r_args.arg[0] = S5P_FIMV_CODEC_H264_ENC;
102*43ecec16SMauro Carvalho Chehab 		break;
103*43ecec16SMauro Carvalho Chehab 	case S5P_MFC_CODEC_MPEG4_ENC:
104*43ecec16SMauro Carvalho Chehab 		h2r_args.arg[0] = S5P_FIMV_CODEC_MPEG4_ENC;
105*43ecec16SMauro Carvalho Chehab 		break;
106*43ecec16SMauro Carvalho Chehab 	case S5P_MFC_CODEC_H263_ENC:
107*43ecec16SMauro Carvalho Chehab 		h2r_args.arg[0] = S5P_FIMV_CODEC_H263_ENC;
108*43ecec16SMauro Carvalho Chehab 		break;
109*43ecec16SMauro Carvalho Chehab 	default:
110*43ecec16SMauro Carvalho Chehab 		h2r_args.arg[0] = S5P_FIMV_CODEC_NONE;
111*43ecec16SMauro Carvalho Chehab 	}
112*43ecec16SMauro Carvalho Chehab 	h2r_args.arg[1] = 0; /* no crc & no pixelcache */
113*43ecec16SMauro Carvalho Chehab 	h2r_args.arg[2] = ctx->ctx.ofs;
114*43ecec16SMauro Carvalho Chehab 	h2r_args.arg[3] = ctx->ctx.size;
115*43ecec16SMauro Carvalho Chehab 	ret = s5p_mfc_cmd_host2risc_v5(dev, S5P_FIMV_H2R_CMD_OPEN_INSTANCE,
116*43ecec16SMauro Carvalho Chehab 								&h2r_args);
117*43ecec16SMauro Carvalho Chehab 	if (ret) {
118*43ecec16SMauro Carvalho Chehab 		mfc_err("Failed to create a new instance\n");
119*43ecec16SMauro Carvalho Chehab 		ctx->state = MFCINST_ERROR;
120*43ecec16SMauro Carvalho Chehab 	}
121*43ecec16SMauro Carvalho Chehab 	return ret;
122*43ecec16SMauro Carvalho Chehab }
123*43ecec16SMauro Carvalho Chehab 
s5p_mfc_close_inst_cmd_v5(struct s5p_mfc_ctx * ctx)124*43ecec16SMauro Carvalho Chehab static int s5p_mfc_close_inst_cmd_v5(struct s5p_mfc_ctx *ctx)
125*43ecec16SMauro Carvalho Chehab {
126*43ecec16SMauro Carvalho Chehab 	struct s5p_mfc_dev *dev = ctx->dev;
127*43ecec16SMauro Carvalho Chehab 	struct s5p_mfc_cmd_args h2r_args;
128*43ecec16SMauro Carvalho Chehab 	int ret;
129*43ecec16SMauro Carvalho Chehab 
130*43ecec16SMauro Carvalho Chehab 	if (ctx->state == MFCINST_FREE) {
131*43ecec16SMauro Carvalho Chehab 		mfc_err("Instance already returned\n");
132*43ecec16SMauro Carvalho Chehab 		ctx->state = MFCINST_ERROR;
133*43ecec16SMauro Carvalho Chehab 		return -EINVAL;
134*43ecec16SMauro Carvalho Chehab 	}
135*43ecec16SMauro Carvalho Chehab 	/* Closing decoding instance  */
136*43ecec16SMauro Carvalho Chehab 	mfc_debug(2, "Returning instance number %d\n", ctx->inst_no);
137*43ecec16SMauro Carvalho Chehab 	dev->curr_ctx = ctx->num;
138*43ecec16SMauro Carvalho Chehab 	memset(&h2r_args, 0, sizeof(struct s5p_mfc_cmd_args));
139*43ecec16SMauro Carvalho Chehab 	h2r_args.arg[0] = ctx->inst_no;
140*43ecec16SMauro Carvalho Chehab 	ret = s5p_mfc_cmd_host2risc_v5(dev, S5P_FIMV_H2R_CMD_CLOSE_INSTANCE,
141*43ecec16SMauro Carvalho Chehab 								&h2r_args);
142*43ecec16SMauro Carvalho Chehab 	if (ret) {
143*43ecec16SMauro Carvalho Chehab 		mfc_err("Failed to return an instance\n");
144*43ecec16SMauro Carvalho Chehab 		ctx->state = MFCINST_ERROR;
145*43ecec16SMauro Carvalho Chehab 		return -EINVAL;
146*43ecec16SMauro Carvalho Chehab 	}
147*43ecec16SMauro Carvalho Chehab 	return 0;
148*43ecec16SMauro Carvalho Chehab }
149*43ecec16SMauro Carvalho Chehab 
150*43ecec16SMauro Carvalho Chehab /* Initialize cmd function pointers for MFC v5 */
151*43ecec16SMauro Carvalho Chehab static struct s5p_mfc_hw_cmds s5p_mfc_cmds_v5 = {
152*43ecec16SMauro Carvalho Chehab 	.cmd_host2risc = s5p_mfc_cmd_host2risc_v5,
153*43ecec16SMauro Carvalho Chehab 	.sys_init_cmd = s5p_mfc_sys_init_cmd_v5,
154*43ecec16SMauro Carvalho Chehab 	.sleep_cmd = s5p_mfc_sleep_cmd_v5,
155*43ecec16SMauro Carvalho Chehab 	.wakeup_cmd = s5p_mfc_wakeup_cmd_v5,
156*43ecec16SMauro Carvalho Chehab 	.open_inst_cmd = s5p_mfc_open_inst_cmd_v5,
157*43ecec16SMauro Carvalho Chehab 	.close_inst_cmd = s5p_mfc_close_inst_cmd_v5,
158*43ecec16SMauro Carvalho Chehab };
159*43ecec16SMauro Carvalho Chehab 
s5p_mfc_init_hw_cmds_v5(void)160*43ecec16SMauro Carvalho Chehab struct s5p_mfc_hw_cmds *s5p_mfc_init_hw_cmds_v5(void)
161*43ecec16SMauro Carvalho Chehab {
162*43ecec16SMauro Carvalho Chehab 	return &s5p_mfc_cmds_v5;
163*43ecec16SMauro Carvalho Chehab }
164