1*43ecec16SMauro Carvalho Chehab /* SPDX-License-Identifier: GPL-2.0-only */ 2*43ecec16SMauro Carvalho Chehab /* 3*43ecec16SMauro Carvalho Chehab * Register definition file for Samsung MFC V6.x Interface (FIMV) driver 4*43ecec16SMauro Carvalho Chehab * 5*43ecec16SMauro Carvalho Chehab * Copyright (c) 2012 Samsung Electronics Co., Ltd. 6*43ecec16SMauro Carvalho Chehab * http://www.samsung.com/ 7*43ecec16SMauro Carvalho Chehab */ 8*43ecec16SMauro Carvalho Chehab 9*43ecec16SMauro Carvalho Chehab #ifndef _REGS_FIMV_V6_H 10*43ecec16SMauro Carvalho Chehab #define _REGS_FIMV_V6_H 11*43ecec16SMauro Carvalho Chehab 12*43ecec16SMauro Carvalho Chehab #include <linux/kernel.h> 13*43ecec16SMauro Carvalho Chehab #include <linux/sizes.h> 14*43ecec16SMauro Carvalho Chehab 15*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_REG_SIZE_V6 (S5P_FIMV_END_ADDR - S5P_FIMV_START_ADDR) 16*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_REG_COUNT_V6 ((S5P_FIMV_END_ADDR - S5P_FIMV_START_ADDR) / 4) 17*43ecec16SMauro Carvalho Chehab 18*43ecec16SMauro Carvalho Chehab /* Number of bits that the buffer address should be shifted for particular 19*43ecec16SMauro Carvalho Chehab * MFC buffers. */ 20*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_MEM_OFFSET_V6 0 21*43ecec16SMauro Carvalho Chehab 22*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_START_ADDR_V6 0x0000 23*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_END_ADDR_V6 0xfd80 24*43ecec16SMauro Carvalho Chehab 25*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_REG_CLEAR_BEGIN_V6 0xf000 26*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_REG_CLEAR_COUNT_V6 1024 27*43ecec16SMauro Carvalho Chehab 28*43ecec16SMauro Carvalho Chehab /* Codec Common Registers */ 29*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_RISC_ON_V6 0x0000 30*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_RISC2HOST_INT_V6 0x003C 31*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_HOST2RISC_INT_V6 0x0044 32*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_RISC_BASE_ADDRESS_V6 0x0054 33*43ecec16SMauro Carvalho Chehab 34*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_MFC_RESET_V6 0x1070 35*43ecec16SMauro Carvalho Chehab 36*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_HOST2RISC_CMD_V6 0x1100 37*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_H2R_CMD_EMPTY_V6 0 38*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_H2R_CMD_SYS_INIT_V6 1 39*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_H2R_CMD_OPEN_INSTANCE_V6 2 40*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_CH_SEQ_HEADER_V6 3 41*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_CH_INIT_BUFS_V6 4 42*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_CH_FRAME_START_V6 5 43*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_H2R_CMD_CLOSE_INSTANCE_V6 6 44*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_H2R_CMD_SLEEP_V6 7 45*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_H2R_CMD_WAKEUP_V6 8 46*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_CH_LAST_FRAME_V6 9 47*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_H2R_CMD_FLUSH_V6 10 48*43ecec16SMauro Carvalho Chehab /* RMVME: REALLOC used? */ 49*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_CH_FRAME_START_REALLOC_V6 5 50*43ecec16SMauro Carvalho Chehab 51*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_RISC2HOST_CMD_V6 0x1104 52*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_R2H_CMD_EMPTY_V6 0 53*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_R2H_CMD_SYS_INIT_RET_V6 1 54*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_R2H_CMD_OPEN_INSTANCE_RET_V6 2 55*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_R2H_CMD_SEQ_DONE_RET_V6 3 56*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_R2H_CMD_INIT_BUFFERS_RET_V6 4 57*43ecec16SMauro Carvalho Chehab 58*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_R2H_CMD_CLOSE_INSTANCE_RET_V6 6 59*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_R2H_CMD_SLEEP_RET_V6 7 60*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_R2H_CMD_WAKEUP_RET_V6 8 61*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_R2H_CMD_COMPLETE_SEQ_RET_V6 9 62*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_R2H_CMD_DPB_FLUSH_RET_V6 10 63*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_R2H_CMD_NAL_ABORT_RET_V6 11 64*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_R2H_CMD_FW_STATUS_RET_V6 12 65*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_R2H_CMD_FRAME_DONE_RET_V6 13 66*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_R2H_CMD_FIELD_DONE_RET_V6 14 67*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_R2H_CMD_SLICE_DONE_RET_V6 15 68*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_R2H_CMD_ENC_BUFFER_FUL_RET_V6 16 69*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_R2H_CMD_ERR_RET_V6 32 70*43ecec16SMauro Carvalho Chehab 71*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_MFC_BUS_RESET_CTRL 0x7110 72*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_FW_VERSION_V6 0xf000 73*43ecec16SMauro Carvalho Chehab 74*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_INSTANCE_ID_V6 0xf008 75*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_CODEC_TYPE_V6 0xf00c 76*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_CONTEXT_MEM_ADDR_V6 0xf014 77*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_CONTEXT_MEM_SIZE_V6 0xf018 78*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_PIXEL_FORMAT_V6 0xf020 79*43ecec16SMauro Carvalho Chehab 80*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_METADATA_ENABLE_V6 0xf024 81*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_DBG_BUFFER_ADDR_V6 0xf030 82*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_DBG_BUFFER_SIZE_V6 0xf034 83*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_RET_INSTANCE_ID_V6 0xf070 84*43ecec16SMauro Carvalho Chehab 85*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_ERROR_CODE_V6 0xf074 86*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_ERR_WARNINGS_START_V6 160 87*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_ERR_DEC_MASK_V6 0xffff 88*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_ERR_DEC_SHIFT_V6 0 89*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_ERR_DSPL_MASK_V6 0xffff0000 90*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_ERR_DSPL_SHIFT_V6 16 91*43ecec16SMauro Carvalho Chehab 92*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_DBG_BUFFER_OUTPUT_SIZE_V6 0xf078 93*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_METADATA_STATUS_V6 0xf07C 94*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_METADATA_ADDR_MB_INFO_V6 0xf080 95*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_METADATA_SIZE_MB_INFO_V6 0xf084 96*43ecec16SMauro Carvalho Chehab 97*43ecec16SMauro Carvalho Chehab /* Decoder Registers */ 98*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_CRC_CTRL_V6 0xf0b0 99*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_DEC_OPTIONS_V6 0xf0b4 100*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_OPT_FMO_ASO_CTRL_MASK_V6 4 101*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_OPT_DDELAY_EN_SHIFT_V6 3 102*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_OPT_LF_CTRL_SHIFT_V6 1 103*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_OPT_LF_CTRL_MASK_V6 0x3 104*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_OPT_TILE_MODE_SHIFT_V6 0 105*43ecec16SMauro Carvalho Chehab 106*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_DISPLAY_DELAY_V6 0xf0b8 107*43ecec16SMauro Carvalho Chehab 108*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_SET_FRAME_WIDTH_V6 0xf0bc 109*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_SET_FRAME_HEIGHT_V6 0xf0c0 110*43ecec16SMauro Carvalho Chehab 111*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_SEI_ENABLE_V6 0xf0c4 112*43ecec16SMauro Carvalho Chehab 113*43ecec16SMauro Carvalho Chehab /* Buffer setting registers */ 114*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_MIN_NUM_DPB_V6 0xf0f0 115*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_MIN_LUMA_DPB_SIZE_V6 0xf0f4 116*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_MIN_CHROMA_DPB_SIZE_V6 0xf0f8 117*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_MVC_NUM_VIEWS_V6 0xf0fc 118*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_MIN_NUM_MV_V6 0xf100 119*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_NUM_DPB_V6 0xf130 120*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_LUMA_DPB_SIZE_V6 0xf134 121*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_CHROMA_DPB_SIZE_V6 0xf138 122*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_MV_BUFFER_SIZE_V6 0xf13c 123*43ecec16SMauro Carvalho Chehab 124*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_LUMA_DPB_V6 0xf140 125*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_CHROMA_DPB_V6 0xf240 126*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_MV_BUFFER_V6 0xf340 127*43ecec16SMauro Carvalho Chehab 128*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_SCRATCH_BUFFER_ADDR_V6 0xf440 129*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_SCRATCH_BUFFER_SIZE_V6 0xf444 130*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_METADATA_BUFFER_ADDR_V6 0xf448 131*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_METADATA_BUFFER_SIZE_V6 0xf44c 132*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_NUM_MV_V6 0xf478 133*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_CPB_BUFFER_ADDR_V6 0xf4b0 134*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_CPB_BUFFER_SIZE_V6 0xf4b4 135*43ecec16SMauro Carvalho Chehab 136*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_AVAILABLE_DPB_FLAG_UPPER_V6 0xf4b8 137*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_AVAILABLE_DPB_FLAG_LOWER_V6 0xf4bc 138*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_CPB_BUFFER_OFFSET_V6 0xf4c0 139*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_SLICE_IF_ENABLE_V6 0xf4c4 140*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_PICTURE_TAG_V6 0xf4c8 141*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_STREAM_DATA_SIZE_V6 0xf4d0 142*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_INIT_BUFFER_OPTIONS_V6 0xf47c 143*43ecec16SMauro Carvalho Chehab 144*43ecec16SMauro Carvalho Chehab /* Display information register */ 145*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_DISPLAY_FRAME_WIDTH_V6 0xf500 146*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_DISPLAY_FRAME_HEIGHT_V6 0xf504 147*43ecec16SMauro Carvalho Chehab 148*43ecec16SMauro Carvalho Chehab /* Display status */ 149*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_DISPLAY_STATUS_V6 0xf508 150*43ecec16SMauro Carvalho Chehab 151*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_DISPLAY_LUMA_ADDR_V6 0xf50c 152*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_DISPLAY_CHROMA_ADDR_V6 0xf510 153*43ecec16SMauro Carvalho Chehab 154*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_DISPLAY_FRAME_TYPE_V6 0xf514 155*43ecec16SMauro Carvalho Chehab 156*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_DISPLAY_CROP_INFO1_V6 0xf518 157*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_DISPLAY_CROP_INFO2_V6 0xf51c 158*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_DISPLAY_PICTURE_PROFILE_V6 0xf520 159*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_DISPLAY_LUMA_CRC_TOP_V6 0xf524 160*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_DISPLAY_CHROMA_CRC_TOP_V6 0xf528 161*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_DISPLAY_LUMA_CRC_BOT_V6 0xf52c 162*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_DISPLAY_CHROMA_CRC_BOT_V6 0xf530 163*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_DISPLAY_ASPECT_RATIO_V6 0xf534 164*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_DISPLAY_EXTENDED_AR_V6 0xf538 165*43ecec16SMauro Carvalho Chehab 166*43ecec16SMauro Carvalho Chehab /* Decoded picture information register */ 167*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_DECODED_FRAME_WIDTH_V6 0xf53c 168*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_DECODED_FRAME_HEIGHT_V6 0xf540 169*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_DECODED_STATUS_V6 0xf544 170*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_DEC_CRC_GEN_MASK_V6 0x1 171*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_DEC_CRC_GEN_SHIFT_V6 6 172*43ecec16SMauro Carvalho Chehab 173*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_DECODED_LUMA_ADDR_V6 0xf548 174*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_DECODED_CHROMA_ADDR_V6 0xf54c 175*43ecec16SMauro Carvalho Chehab 176*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_DECODED_FRAME_TYPE_V6 0xf550 177*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_DECODE_FRAME_MASK_V6 7 178*43ecec16SMauro Carvalho Chehab 179*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_DECODED_CROP_INFO1_V6 0xf554 180*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_DECODED_CROP_INFO2_V6 0xf558 181*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_DECODED_PICTURE_PROFILE_V6 0xf55c 182*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_DECODED_NAL_SIZE_V6 0xf560 183*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_DECODED_LUMA_CRC_TOP_V6 0xf564 184*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_DECODED_CHROMA_CRC_TOP_V6 0xf568 185*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_DECODED_LUMA_CRC_BOT_V6 0xf56c 186*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_DECODED_CHROMA_CRC_BOT_V6 0xf570 187*43ecec16SMauro Carvalho Chehab 188*43ecec16SMauro Carvalho Chehab /* Returned value register for specific setting */ 189*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_RET_PICTURE_TAG_TOP_V6 0xf574 190*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_RET_PICTURE_TAG_BOT_V6 0xf578 191*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_RET_PICTURE_TIME_TOP_V6 0xf57c 192*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_RET_PICTURE_TIME_BOT_V6 0xf580 193*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_CHROMA_FORMAT_V6 0xf588 194*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_MPEG4_INFO_V6 0xf58c 195*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_H264_INFO_V6 0xf590 196*43ecec16SMauro Carvalho Chehab 197*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_METADATA_ADDR_CONCEALED_MB_V6 0xf594 198*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_METADATA_SIZE_CONCEALED_MB_V6 0xf598 199*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_METADATA_ADDR_VC1_PARAM_V6 0xf59c 200*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_METADATA_SIZE_VC1_PARAM_V6 0xf5a0 201*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_METADATA_ADDR_SEI_NAL_V6 0xf5a4 202*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_METADATA_SIZE_SEI_NAL_V6 0xf5a8 203*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_METADATA_ADDR_VUI_V6 0xf5ac 204*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_METADATA_SIZE_VUI_V6 0xf5b0 205*43ecec16SMauro Carvalho Chehab 206*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_MVC_VIEW_ID_V6 0xf5b4 207*43ecec16SMauro Carvalho Chehab 208*43ecec16SMauro Carvalho Chehab /* SEI related information */ 209*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_FRAME_PACK_SEI_AVAIL_V6 0xf5f0 210*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_FRAME_PACK_ARRGMENT_ID_V6 0xf5f4 211*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_FRAME_PACK_SEI_INFO_V6 0xf5f8 212*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_D_FRAME_PACK_GRID_POS_V6 0xf5fc 213*43ecec16SMauro Carvalho Chehab 214*43ecec16SMauro Carvalho Chehab /* Encoder Registers */ 215*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_FRAME_WIDTH_V6 0xf770 216*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_FRAME_HEIGHT_V6 0xf774 217*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_CROPPED_FRAME_WIDTH_V6 0xf778 218*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_CROPPED_FRAME_HEIGHT_V6 0xf77c 219*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_FRAME_CROP_OFFSET_V6 0xf780 220*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_ENC_OPTIONS_V6 0xf784 221*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_PICTURE_PROFILE_V6 0xf788 222*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_FIXED_PICTURE_QP_V6 0xf790 223*43ecec16SMauro Carvalho Chehab 224*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_RC_CONFIG_V6 0xf794 225*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_RC_QP_BOUND_V6 0xf798 226*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_RC_RPARAM_V6 0xf79c 227*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_MB_RC_CONFIG_V6 0xf7a0 228*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_PADDING_CTRL_V6 0xf7a4 229*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_MV_HOR_RANGE_V6 0xf7ac 230*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_MV_VER_RANGE_V6 0xf7b0 231*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_MV_RANGE_V6_MASK 0x3fff 232*43ecec16SMauro Carvalho Chehab 233*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_VBV_BUFFER_SIZE_V6 0xf84c 234*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_VBV_INIT_DELAY_V6 0xf850 235*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_NUM_DPB_V6 0xf890 236*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_LUMA_DPB_V6 0xf8c0 237*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_CHROMA_DPB_V6 0xf904 238*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_ME_BUFFER_V6 0xf948 239*43ecec16SMauro Carvalho Chehab 240*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_SCRATCH_BUFFER_ADDR_V6 0xf98c 241*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_SCRATCH_BUFFER_SIZE_V6 0xf990 242*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_TMV_BUFFER0_V6 0xf994 243*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_TMV_BUFFER1_V6 0xf998 244*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_SOURCE_LUMA_ADDR_V6 0xf9f0 245*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_SOURCE_CHROMA_ADDR_V6 0xf9f4 246*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_STREAM_BUFFER_ADDR_V6 0xf9f8 247*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_STREAM_BUFFER_SIZE_V6 0xf9fc 248*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_ROI_BUFFER_ADDR_V6 0xfA00 249*43ecec16SMauro Carvalho Chehab 250*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_PARAM_CHANGE_V6 0xfa04 251*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_IR_SIZE_V6 0xfa08 252*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_GOP_CONFIG_V6 0xfa0c 253*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_MSLICE_MODE_V6 0xfa10 254*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_MSLICE_SIZE_MB_V6 0xfa14 255*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_MSLICE_SIZE_BITS_V6 0xfa18 256*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_FRAME_INSERTION_V6 0xfa1c 257*43ecec16SMauro Carvalho Chehab 258*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_RC_FRAME_RATE_V6 0xfa20 259*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_RC_BIT_RATE_V6 0xfa24 260*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_RC_QP_OFFSET_V6 0xfa28 261*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_RC_ROI_CTRL_V6 0xfa2c 262*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_PICTURE_TAG_V6 0xfa30 263*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_BIT_COUNT_ENABLE_V6 0xfa34 264*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_MAX_BIT_COUNT_V6 0xfa38 265*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_MIN_BIT_COUNT_V6 0xfa3c 266*43ecec16SMauro Carvalho Chehab 267*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_METADATA_BUFFER_ADDR_V6 0xfa40 268*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_METADATA_BUFFER_SIZE_V6 0xfa44 269*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_STREAM_SIZE_V6 0xfa80 270*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_SLICE_TYPE_V6 0xfa84 271*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_PICTURE_COUNT_V6 0xfa88 272*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_RET_PICTURE_TAG_V6 0xfa8c 273*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_STREAM_BUFFER_WRITE_POINTER_V6 0xfa90 274*43ecec16SMauro Carvalho Chehab 275*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_ENCODED_SOURCE_LUMA_ADDR_V6 0xfa94 276*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_ENCODED_SOURCE_CHROMA_ADDR_V6 0xfa98 277*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_RECON_LUMA_DPB_ADDR_V6 0xfa9c 278*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_RECON_CHROMA_DPB_ADDR_V6 0xfaa0 279*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_METADATA_ADDR_ENC_SLICE_V6 0xfaa4 280*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_METADATA_SIZE_ENC_SLICE_V6 0xfaa8 281*43ecec16SMauro Carvalho Chehab 282*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_MPEG4_OPTIONS_V6 0xfb10 283*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_MPEG4_HEC_PERIOD_V6 0xfb14 284*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_ASPECT_RATIO_V6 0xfb50 285*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_EXTENDED_SAR_V6 0xfb54 286*43ecec16SMauro Carvalho Chehab 287*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_H264_OPTIONS_V6 0xfb58 288*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_H264_LF_ALPHA_OFFSET_V6 0xfb5c 289*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_H264_LF_BETA_OFFSET_V6 0xfb60 290*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_H264_I_PERIOD_V6 0xfb64 291*43ecec16SMauro Carvalho Chehab 292*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_H264_FMO_SLICE_GRP_MAP_TYPE_V6 0xfb68 293*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_H264_FMO_NUM_SLICE_GRP_MINUS1_V6 0xfb6c 294*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_H264_FMO_SLICE_GRP_CHANGE_DIR_V6 0xfb70 295*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_H264_FMO_SLICE_GRP_CHANGE_RATE_MINUS1_V6 0xfb74 296*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_H264_FMO_RUN_LENGTH_MINUS1_0_V6 0xfb78 297*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_H264_FMO_RUN_LENGTH_MINUS1_1_V6 0xfb7c 298*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_H264_FMO_RUN_LENGTH_MINUS1_2_V6 0xfb80 299*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_H264_FMO_RUN_LENGTH_MINUS1_3_V6 0xfb84 300*43ecec16SMauro Carvalho Chehab 301*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_H264_ASO_SLICE_ORDER_0_V6 0xfb88 302*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_H264_ASO_SLICE_ORDER_1_V6 0xfb8c 303*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_H264_ASO_SLICE_ORDER_2_V6 0xfb90 304*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_H264_ASO_SLICE_ORDER_3_V6 0xfb94 305*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_H264_ASO_SLICE_ORDER_4_V6 0xfb98 306*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_H264_ASO_SLICE_ORDER_5_V6 0xfb9c 307*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_H264_ASO_SLICE_ORDER_6_V6 0xfba0 308*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_H264_ASO_SLICE_ORDER_7_V6 0xfba4 309*43ecec16SMauro Carvalho Chehab 310*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_H264_CHROMA_QP_OFFSET_V6 0xfba8 311*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_H264_NUM_T_LAYER_V6 0xfbac 312*43ecec16SMauro Carvalho Chehab 313*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_H264_HIERARCHICAL_QP_LAYER0_V6 0xfbb0 314*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_H264_HIERARCHICAL_QP_LAYER1_V6 0xfbb4 315*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_H264_HIERARCHICAL_QP_LAYER2_V6 0xfbb8 316*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_H264_HIERARCHICAL_QP_LAYER3_V6 0xfbbc 317*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_H264_HIERARCHICAL_QP_LAYER4_V6 0xfbc0 318*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_H264_HIERARCHICAL_QP_LAYER5_V6 0xfbc4 319*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_H264_HIERARCHICAL_QP_LAYER6_V6 0xfbc8 320*43ecec16SMauro Carvalho Chehab 321*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_H264_FRAME_PACKING_SEI_INFO_V6 0xfc4c 322*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_ENC_FP_ARRANGEMENT_TYPE_SIDE_BY_SIDE_V6 0 323*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_ENC_FP_ARRANGEMENT_TYPE_TOP_BOTTOM_V6 1 324*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_ENC_FP_ARRANGEMENT_TYPE_TEMPORAL_V6 2 325*43ecec16SMauro Carvalho Chehab 326*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_MVC_FRAME_QP_VIEW1_V6 0xfd40 327*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_MVC_RC_FRAME_RATE_VIEW1_V6 0xfd44 328*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_MVC_RC_BIT_RATE_VIEW1_V6 0xfd48 329*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_MVC_RC_QBOUND_VIEW1_V6 0xfd4c 330*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_MVC_RC_RPARA_VIEW1_V6 0xfd50 331*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_E_MVC_INTER_VIEW_PREDICTION_ON_V6 0xfd80 332*43ecec16SMauro Carvalho Chehab 333*43ecec16SMauro Carvalho Chehab /* Codec numbers */ 334*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_CODEC_NONE_V6 -1 335*43ecec16SMauro Carvalho Chehab 336*43ecec16SMauro Carvalho Chehab 337*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_CODEC_H264_DEC_V6 0 338*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_CODEC_H264_MVC_DEC_V6 1 339*43ecec16SMauro Carvalho Chehab 340*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_CODEC_MPEG4_DEC_V6 3 341*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_CODEC_FIMV1_DEC_V6 4 342*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_CODEC_FIMV2_DEC_V6 5 343*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_CODEC_FIMV3_DEC_V6 6 344*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_CODEC_FIMV4_DEC_V6 7 345*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_CODEC_H263_DEC_V6 8 346*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_CODEC_VC1RCV_DEC_V6 9 347*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_CODEC_VC1_DEC_V6 10 348*43ecec16SMauro Carvalho Chehab /* FIXME: Add 11~12 */ 349*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_CODEC_MPEG2_DEC_V6 13 350*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_CODEC_VP8_DEC_V6 14 351*43ecec16SMauro Carvalho Chehab /* FIXME: Add 15~16 */ 352*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_CODEC_H264_ENC_V6 20 353*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_CODEC_H264_MVC_ENC_V6 21 354*43ecec16SMauro Carvalho Chehab 355*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_CODEC_MPEG4_ENC_V6 23 356*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_CODEC_H263_ENC_V6 24 357*43ecec16SMauro Carvalho Chehab 358*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_NV12M_HALIGN_V6 16 359*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_NV12MT_HALIGN_V6 16 360*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_NV12MT_VALIGN_V6 16 361*43ecec16SMauro Carvalho Chehab 362*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_TMV_BUFFER_ALIGN_V6 16 363*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_LUMA_DPB_BUFFER_ALIGN_V6 256 364*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_CHROMA_DPB_BUFFER_ALIGN_V6 256 365*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_ME_BUFFER_ALIGN_V6 256 366*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6 256 367*43ecec16SMauro Carvalho Chehab 368*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_LUMA_MB_TO_PIXEL_V6 256 369*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_CHROMA_MB_TO_PIXEL_V6 128 370*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_NUM_TMV_BUFFERS_V6 2 371*43ecec16SMauro Carvalho Chehab 372*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_MAX_FRAME_SIZE_V6 (2 * SZ_1M) 373*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_NUM_PIXELS_IN_MB_ROW_V6 16 374*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_NUM_PIXELS_IN_MB_COL_V6 16 375*43ecec16SMauro Carvalho Chehab 376*43ecec16SMauro Carvalho Chehab /* Buffer size requirements defined by hardware */ 377*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_TMV_BUFFER_SIZE_V6(w, h) (((w) + 1) * ((h) + 3) * 8) 378*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_ME_BUFFER_SIZE_V6(imw, imh, mbw, mbh) \ 379*43ecec16SMauro Carvalho Chehab (((((imw + 127) / 64) * 16) * DIV_ROUND_UP(imh, 64) * 256) + \ 380*43ecec16SMauro Carvalho Chehab (DIV_ROUND_UP((mbw) * (mbh), 32) * 16)) 381*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_SCRATCH_BUF_SIZE_H264_DEC_V6(w, h) (((w) * 192) + 64) 382*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_SCRATCH_BUF_SIZE_MPEG4_DEC_V6(w, h) \ 383*43ecec16SMauro Carvalho Chehab ((w) * 144 + 8192 * (h) + 49216 + 1048576) 384*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_SCRATCH_BUF_SIZE_VC1_DEC_V6(w, h) \ 385*43ecec16SMauro Carvalho Chehab (2096 * ((w) + (h) + 1)) 386*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_SCRATCH_BUF_SIZE_H263_DEC_V6(w, h) \ 387*43ecec16SMauro Carvalho Chehab S5P_FIMV_SCRATCH_BUF_SIZE_MPEG4_DEC_V6(w, h) 388*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_SCRATCH_BUF_SIZE_VP8_DEC_V6(w, h) \ 389*43ecec16SMauro Carvalho Chehab ((w) * 32 + (h) * 128 + (((w) + 1) / 2) * 64 + 2112) 390*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_SCRATCH_BUF_SIZE_H264_ENC_V6(w, h) \ 391*43ecec16SMauro Carvalho Chehab (((w) * 64) + (((w) + 1) * 16) + (4096 * 16)) 392*43ecec16SMauro Carvalho Chehab #define S5P_FIMV_SCRATCH_BUF_SIZE_MPEG4_ENC_V6(w, h) \ 393*43ecec16SMauro Carvalho Chehab (((w) * 16) + (((w) + 1) * 16)) 394*43ecec16SMauro Carvalho Chehab 395*43ecec16SMauro Carvalho Chehab /* MFC Context buffer sizes */ 396*43ecec16SMauro Carvalho Chehab #define MFC_CTX_BUF_SIZE_V6 (28 * SZ_1K) /* 28KB */ 397*43ecec16SMauro Carvalho Chehab #define MFC_H264_DEC_CTX_BUF_SIZE_V6 (2 * SZ_1M) /* 2MB */ 398*43ecec16SMauro Carvalho Chehab #define MFC_OTHER_DEC_CTX_BUF_SIZE_V6 (20 * SZ_1K) /* 20KB */ 399*43ecec16SMauro Carvalho Chehab #define MFC_H264_ENC_CTX_BUF_SIZE_V6 (100 * SZ_1K) /* 100KB */ 400*43ecec16SMauro Carvalho Chehab #define MFC_OTHER_ENC_CTX_BUF_SIZE_V6 (12 * SZ_1K) /* 12KB */ 401*43ecec16SMauro Carvalho Chehab 402*43ecec16SMauro Carvalho Chehab /* MFCv6 variant defines */ 403*43ecec16SMauro Carvalho Chehab #define MAX_FW_SIZE_V6 (SZ_512K) /* 512KB */ 404*43ecec16SMauro Carvalho Chehab #define MAX_CPB_SIZE_V6 (3 * SZ_1M) /* 3MB */ 405*43ecec16SMauro Carvalho Chehab #define MFC_VERSION_V6 0x61 406*43ecec16SMauro Carvalho Chehab #define MFC_NUM_PORTS_V6 1 407*43ecec16SMauro Carvalho Chehab 408*43ecec16SMauro Carvalho Chehab #endif /* _REGS_FIMV_V6_H */ 409