1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 /* 3 * Rockchip ISP1 Driver - V4l resizer device 4 * 5 * Copyright (C) 2019 Collabora, Ltd. 6 * 7 * Based on Rockchip ISP1 driver by Rockchip Electronics Co., Ltd. 8 * Copyright (C) 2017 Rockchip Electronics Co., Ltd. 9 */ 10 11 #include "rkisp1-common.h" 12 13 #define RKISP1_RSZ_SP_DEV_NAME RKISP1_DRIVER_NAME "_resizer_selfpath" 14 #define RKISP1_RSZ_MP_DEV_NAME RKISP1_DRIVER_NAME "_resizer_mainpath" 15 16 #define RKISP1_DEF_FMT MEDIA_BUS_FMT_YUYV8_2X8 17 #define RKISP1_DEF_PIXEL_ENC V4L2_PIXEL_ENC_YUV 18 19 struct rkisp1_rsz_yuv_mbus_info { 20 u32 mbus_code; 21 u32 hdiv; 22 u32 vdiv; 23 }; 24 25 static const struct rkisp1_rsz_yuv_mbus_info rkisp1_rsz_yuv_src_formats[] = { 26 { 27 .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8, /* YUV422 */ 28 .hdiv = 2, 29 .vdiv = 1, 30 }, 31 { 32 .mbus_code = MEDIA_BUS_FMT_YUYV8_1_5X8, /* YUV420 */ 33 .hdiv = 2, 34 .vdiv = 2, 35 }, 36 }; 37 38 static const struct rkisp1_rsz_yuv_mbus_info *rkisp1_rsz_get_yuv_mbus_info(u32 mbus_code) 39 { 40 unsigned int i; 41 42 for (i = 0; i < ARRAY_SIZE(rkisp1_rsz_yuv_src_formats); i++) { 43 if (rkisp1_rsz_yuv_src_formats[i].mbus_code == mbus_code) 44 return &rkisp1_rsz_yuv_src_formats[i]; 45 } 46 47 return NULL; 48 } 49 50 enum rkisp1_shadow_regs_when { 51 RKISP1_SHADOW_REGS_SYNC, 52 RKISP1_SHADOW_REGS_ASYNC, 53 }; 54 55 struct rkisp1_rsz_config { 56 /* constrains */ 57 const int max_rsz_width; 58 const int max_rsz_height; 59 const int min_rsz_width; 60 const int min_rsz_height; 61 /* registers */ 62 struct { 63 u32 ctrl; 64 u32 yuvmode_mask; 65 u32 rawmode_mask; 66 u32 h_offset; 67 u32 v_offset; 68 u32 h_size; 69 u32 v_size; 70 } dual_crop; 71 }; 72 73 static const struct rkisp1_rsz_config rkisp1_rsz_config_mp = { 74 /* constraints */ 75 .max_rsz_width = RKISP1_RSZ_MP_SRC_MAX_WIDTH, 76 .max_rsz_height = RKISP1_RSZ_MP_SRC_MAX_HEIGHT, 77 .min_rsz_width = RKISP1_RSZ_SRC_MIN_WIDTH, 78 .min_rsz_height = RKISP1_RSZ_SRC_MIN_HEIGHT, 79 /* registers */ 80 .dual_crop = { 81 .ctrl = RKISP1_CIF_DUAL_CROP_CTRL, 82 .yuvmode_mask = RKISP1_CIF_DUAL_CROP_MP_MODE_YUV, 83 .rawmode_mask = RKISP1_CIF_DUAL_CROP_MP_MODE_RAW, 84 .h_offset = RKISP1_CIF_DUAL_CROP_M_H_OFFS, 85 .v_offset = RKISP1_CIF_DUAL_CROP_M_V_OFFS, 86 .h_size = RKISP1_CIF_DUAL_CROP_M_H_SIZE, 87 .v_size = RKISP1_CIF_DUAL_CROP_M_V_SIZE, 88 }, 89 }; 90 91 static const struct rkisp1_rsz_config rkisp1_rsz_config_sp = { 92 /* constraints */ 93 .max_rsz_width = RKISP1_RSZ_SP_SRC_MAX_WIDTH, 94 .max_rsz_height = RKISP1_RSZ_SP_SRC_MAX_HEIGHT, 95 .min_rsz_width = RKISP1_RSZ_SRC_MIN_WIDTH, 96 .min_rsz_height = RKISP1_RSZ_SRC_MIN_HEIGHT, 97 /* registers */ 98 .dual_crop = { 99 .ctrl = RKISP1_CIF_DUAL_CROP_CTRL, 100 .yuvmode_mask = RKISP1_CIF_DUAL_CROP_SP_MODE_YUV, 101 .rawmode_mask = RKISP1_CIF_DUAL_CROP_SP_MODE_RAW, 102 .h_offset = RKISP1_CIF_DUAL_CROP_S_H_OFFS, 103 .v_offset = RKISP1_CIF_DUAL_CROP_S_V_OFFS, 104 .h_size = RKISP1_CIF_DUAL_CROP_S_H_SIZE, 105 .v_size = RKISP1_CIF_DUAL_CROP_S_V_SIZE, 106 }, 107 }; 108 109 static inline u32 rkisp1_rsz_read(struct rkisp1_resizer *rsz, u32 offset) 110 { 111 return rkisp1_read(rsz->rkisp1, rsz->regs_base + offset); 112 } 113 114 static inline void rkisp1_rsz_write(struct rkisp1_resizer *rsz, u32 offset, 115 u32 value) 116 { 117 rkisp1_write(rsz->rkisp1, rsz->regs_base + offset, value); 118 } 119 120 static struct v4l2_mbus_framefmt * 121 rkisp1_rsz_get_pad_fmt(struct rkisp1_resizer *rsz, 122 struct v4l2_subdev_state *sd_state, 123 unsigned int pad, u32 which) 124 { 125 struct v4l2_subdev_state state = { 126 .pads = rsz->pad_cfg 127 }; 128 if (which == V4L2_SUBDEV_FORMAT_TRY) 129 return v4l2_subdev_get_try_format(&rsz->sd, sd_state, pad); 130 else 131 return v4l2_subdev_get_try_format(&rsz->sd, &state, pad); 132 } 133 134 static struct v4l2_rect * 135 rkisp1_rsz_get_pad_crop(struct rkisp1_resizer *rsz, 136 struct v4l2_subdev_state *sd_state, 137 unsigned int pad, u32 which) 138 { 139 struct v4l2_subdev_state state = { 140 .pads = rsz->pad_cfg 141 }; 142 if (which == V4L2_SUBDEV_FORMAT_TRY) 143 return v4l2_subdev_get_try_crop(&rsz->sd, sd_state, pad); 144 else 145 return v4l2_subdev_get_try_crop(&rsz->sd, &state, pad); 146 } 147 148 /* ---------------------------------------------------------------------------- 149 * Dual crop hw configs 150 */ 151 152 static void rkisp1_dcrop_disable(struct rkisp1_resizer *rsz, 153 enum rkisp1_shadow_regs_when when) 154 { 155 u32 dc_ctrl = rkisp1_read(rsz->rkisp1, rsz->config->dual_crop.ctrl); 156 u32 mask = ~(rsz->config->dual_crop.yuvmode_mask | 157 rsz->config->dual_crop.rawmode_mask); 158 159 dc_ctrl &= mask; 160 if (when == RKISP1_SHADOW_REGS_ASYNC) 161 dc_ctrl |= RKISP1_CIF_DUAL_CROP_GEN_CFG_UPD; 162 else 163 dc_ctrl |= RKISP1_CIF_DUAL_CROP_CFG_UPD; 164 rkisp1_write(rsz->rkisp1, rsz->config->dual_crop.ctrl, dc_ctrl); 165 } 166 167 /* configure dual-crop unit */ 168 static void rkisp1_dcrop_config(struct rkisp1_resizer *rsz) 169 { 170 struct rkisp1_device *rkisp1 = rsz->rkisp1; 171 struct v4l2_mbus_framefmt *sink_fmt; 172 struct v4l2_rect *sink_crop; 173 u32 dc_ctrl; 174 175 sink_crop = rkisp1_rsz_get_pad_crop(rsz, NULL, RKISP1_RSZ_PAD_SINK, 176 V4L2_SUBDEV_FORMAT_ACTIVE); 177 sink_fmt = rkisp1_rsz_get_pad_fmt(rsz, NULL, RKISP1_RSZ_PAD_SINK, 178 V4L2_SUBDEV_FORMAT_ACTIVE); 179 180 if (sink_crop->width == sink_fmt->width && 181 sink_crop->height == sink_fmt->height && 182 sink_crop->left == 0 && sink_crop->top == 0) { 183 rkisp1_dcrop_disable(rsz, RKISP1_SHADOW_REGS_SYNC); 184 dev_dbg(rkisp1->dev, "capture %d crop disabled\n", rsz->id); 185 return; 186 } 187 188 dc_ctrl = rkisp1_read(rkisp1, rsz->config->dual_crop.ctrl); 189 rkisp1_write(rkisp1, rsz->config->dual_crop.h_offset, sink_crop->left); 190 rkisp1_write(rkisp1, rsz->config->dual_crop.v_offset, sink_crop->top); 191 rkisp1_write(rkisp1, rsz->config->dual_crop.h_size, sink_crop->width); 192 rkisp1_write(rkisp1, rsz->config->dual_crop.v_size, sink_crop->height); 193 dc_ctrl |= rsz->config->dual_crop.yuvmode_mask; 194 dc_ctrl |= RKISP1_CIF_DUAL_CROP_CFG_UPD; 195 rkisp1_write(rkisp1, rsz->config->dual_crop.ctrl, dc_ctrl); 196 197 dev_dbg(rkisp1->dev, "stream %d crop: %dx%d -> %dx%d\n", rsz->id, 198 sink_fmt->width, sink_fmt->height, 199 sink_crop->width, sink_crop->height); 200 } 201 202 /* ---------------------------------------------------------------------------- 203 * Resizer hw configs 204 */ 205 206 static void rkisp1_rsz_update_shadow(struct rkisp1_resizer *rsz, 207 enum rkisp1_shadow_regs_when when) 208 { 209 u32 ctrl_cfg = rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_CTRL); 210 211 if (when == RKISP1_SHADOW_REGS_ASYNC) 212 ctrl_cfg |= RKISP1_CIF_RSZ_CTRL_CFG_UPD_AUTO; 213 else 214 ctrl_cfg |= RKISP1_CIF_RSZ_CTRL_CFG_UPD; 215 216 rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CTRL, ctrl_cfg); 217 } 218 219 static u32 rkisp1_rsz_calc_ratio(u32 len_sink, u32 len_src) 220 { 221 if (len_sink < len_src) 222 return ((len_sink - 1) * RKISP1_CIF_RSZ_SCALER_FACTOR) / 223 (len_src - 1); 224 225 return ((len_src - 1) * RKISP1_CIF_RSZ_SCALER_FACTOR) / 226 (len_sink - 1) + 1; 227 } 228 229 static void rkisp1_rsz_disable(struct rkisp1_resizer *rsz, 230 enum rkisp1_shadow_regs_when when) 231 { 232 rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CTRL, 0); 233 234 if (when == RKISP1_SHADOW_REGS_SYNC) 235 rkisp1_rsz_update_shadow(rsz, when); 236 } 237 238 static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz, 239 struct v4l2_rect *sink_y, 240 struct v4l2_rect *sink_c, 241 struct v4l2_rect *src_y, 242 struct v4l2_rect *src_c, 243 enum rkisp1_shadow_regs_when when) 244 { 245 u32 ratio, rsz_ctrl = 0; 246 unsigned int i; 247 248 /* No phase offset */ 249 rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_HY, 0); 250 rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_HC, 0); 251 rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_VY, 0); 252 rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_VC, 0); 253 254 /* Linear interpolation */ 255 for (i = 0; i < 64; i++) { 256 rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_LUT_ADDR, i); 257 rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_LUT, i); 258 } 259 260 if (sink_y->width != src_y->width) { 261 rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_HY_ENABLE; 262 if (sink_y->width < src_y->width) 263 rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_HY_UP; 264 ratio = rkisp1_rsz_calc_ratio(sink_y->width, src_y->width); 265 rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_HY, ratio); 266 } 267 268 if (sink_c->width != src_c->width) { 269 rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_HC_ENABLE; 270 if (sink_c->width < src_c->width) 271 rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_HC_UP; 272 ratio = rkisp1_rsz_calc_ratio(sink_c->width, src_c->width); 273 rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_HCB, ratio); 274 rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_HCR, ratio); 275 } 276 277 if (sink_y->height != src_y->height) { 278 rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_VY_ENABLE; 279 if (sink_y->height < src_y->height) 280 rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_VY_UP; 281 ratio = rkisp1_rsz_calc_ratio(sink_y->height, src_y->height); 282 rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_VY, ratio); 283 } 284 285 if (sink_c->height != src_c->height) { 286 rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_VC_ENABLE; 287 if (sink_c->height < src_c->height) 288 rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_VC_UP; 289 ratio = rkisp1_rsz_calc_ratio(sink_c->height, src_c->height); 290 rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_VC, ratio); 291 } 292 293 rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CTRL, rsz_ctrl); 294 295 rkisp1_rsz_update_shadow(rsz, when); 296 } 297 298 static void rkisp1_rsz_config(struct rkisp1_resizer *rsz, 299 enum rkisp1_shadow_regs_when when) 300 { 301 const struct rkisp1_rsz_yuv_mbus_info *sink_yuv_info, *src_yuv_info; 302 struct v4l2_rect sink_y, sink_c, src_y, src_c; 303 struct v4l2_mbus_framefmt *src_fmt, *sink_fmt; 304 struct v4l2_rect *sink_crop; 305 306 sink_crop = rkisp1_rsz_get_pad_crop(rsz, NULL, RKISP1_RSZ_PAD_SINK, 307 V4L2_SUBDEV_FORMAT_ACTIVE); 308 src_fmt = rkisp1_rsz_get_pad_fmt(rsz, NULL, RKISP1_RSZ_PAD_SRC, 309 V4L2_SUBDEV_FORMAT_ACTIVE); 310 src_yuv_info = rkisp1_rsz_get_yuv_mbus_info(src_fmt->code); 311 sink_fmt = rkisp1_rsz_get_pad_fmt(rsz, NULL, RKISP1_RSZ_PAD_SINK, 312 V4L2_SUBDEV_FORMAT_ACTIVE); 313 sink_yuv_info = rkisp1_rsz_get_yuv_mbus_info(sink_fmt->code); 314 315 /* 316 * The resizer only works on yuv formats, 317 * so return if it is bayer format. 318 */ 319 if (rsz->pixel_enc == V4L2_PIXEL_ENC_BAYER) { 320 rkisp1_rsz_disable(rsz, when); 321 return; 322 } 323 324 sink_y.width = sink_crop->width; 325 sink_y.height = sink_crop->height; 326 src_y.width = src_fmt->width; 327 src_y.height = src_fmt->height; 328 329 sink_c.width = sink_y.width / sink_yuv_info->hdiv; 330 sink_c.height = sink_y.height / sink_yuv_info->vdiv; 331 332 /* 333 * The resizer is used not only to change the dimensions of the frame 334 * but also to change the scale for YUV formats, 335 * (4:2:2 -> 4:2:0 for example). So the width/height of the CbCr 336 * streams should be set according to the media bus format in the src pad. 337 */ 338 src_c.width = src_y.width / src_yuv_info->hdiv; 339 src_c.height = src_y.height / src_yuv_info->vdiv; 340 341 if (sink_c.width == src_c.width && sink_c.height == src_c.height) { 342 rkisp1_rsz_disable(rsz, when); 343 return; 344 } 345 346 dev_dbg(rsz->rkisp1->dev, "stream %d rsz/scale: %dx%d -> %dx%d\n", 347 rsz->id, sink_crop->width, sink_crop->height, 348 src_fmt->width, src_fmt->height); 349 dev_dbg(rsz->rkisp1->dev, "chroma scaling %dx%d -> %dx%d\n", 350 sink_c.width, sink_c.height, src_c.width, src_c.height); 351 352 /* set values in the hw */ 353 rkisp1_rsz_config_regs(rsz, &sink_y, &sink_c, &src_y, &src_c, when); 354 } 355 356 /* ---------------------------------------------------------------------------- 357 * Subdev pad operations 358 */ 359 360 static int rkisp1_rsz_enum_mbus_code(struct v4l2_subdev *sd, 361 struct v4l2_subdev_state *sd_state, 362 struct v4l2_subdev_mbus_code_enum *code) 363 { 364 struct rkisp1_resizer *rsz = 365 container_of(sd, struct rkisp1_resizer, sd); 366 struct v4l2_subdev_pad_config dummy_cfg; 367 struct v4l2_subdev_state pad_state = { 368 .pads = &dummy_cfg 369 }; 370 u32 pad = code->pad; 371 int ret; 372 373 if (code->pad == RKISP1_RSZ_PAD_SRC) { 374 /* supported mbus codes on the src are the same as in the capture */ 375 struct rkisp1_capture *cap = &rsz->rkisp1->capture_devs[rsz->id]; 376 377 return rkisp1_cap_enum_mbus_codes(cap, code); 378 } 379 380 /* 381 * The selfpath capture doesn't support bayer formats. Therefore the selfpath resizer 382 * should support only YUV422 on the sink pad 383 */ 384 if (rsz->id == RKISP1_SELFPATH) { 385 if (code->index > 0) 386 return -EINVAL; 387 code->code = MEDIA_BUS_FMT_YUYV8_2X8; 388 return 0; 389 } 390 391 /* supported mbus codes on the sink pad are the same as isp src pad */ 392 code->pad = RKISP1_ISP_PAD_SOURCE_VIDEO; 393 ret = v4l2_subdev_call(&rsz->rkisp1->isp.sd, pad, enum_mbus_code, 394 &pad_state, code); 395 396 /* restore pad */ 397 code->pad = pad; 398 code->flags = 0; 399 return ret; 400 } 401 402 static int rkisp1_rsz_init_config(struct v4l2_subdev *sd, 403 struct v4l2_subdev_state *sd_state) 404 { 405 struct v4l2_mbus_framefmt *sink_fmt, *src_fmt; 406 struct v4l2_rect *sink_crop; 407 408 sink_fmt = v4l2_subdev_get_try_format(sd, sd_state, 409 RKISP1_RSZ_PAD_SRC); 410 sink_fmt->width = RKISP1_DEFAULT_WIDTH; 411 sink_fmt->height = RKISP1_DEFAULT_HEIGHT; 412 sink_fmt->field = V4L2_FIELD_NONE; 413 sink_fmt->code = RKISP1_DEF_FMT; 414 415 sink_crop = v4l2_subdev_get_try_crop(sd, sd_state, 416 RKISP1_RSZ_PAD_SINK); 417 sink_crop->width = RKISP1_DEFAULT_WIDTH; 418 sink_crop->height = RKISP1_DEFAULT_HEIGHT; 419 sink_crop->left = 0; 420 sink_crop->top = 0; 421 422 src_fmt = v4l2_subdev_get_try_format(sd, sd_state, 423 RKISP1_RSZ_PAD_SINK); 424 *src_fmt = *sink_fmt; 425 426 /* NOTE: there is no crop in the source pad, only in the sink */ 427 428 return 0; 429 } 430 431 static void rkisp1_rsz_set_src_fmt(struct rkisp1_resizer *rsz, 432 struct v4l2_subdev_state *sd_state, 433 struct v4l2_mbus_framefmt *format, 434 unsigned int which) 435 { 436 const struct rkisp1_mbus_info *sink_mbus_info; 437 struct v4l2_mbus_framefmt *src_fmt, *sink_fmt; 438 439 sink_fmt = rkisp1_rsz_get_pad_fmt(rsz, sd_state, RKISP1_RSZ_PAD_SINK, 440 which); 441 src_fmt = rkisp1_rsz_get_pad_fmt(rsz, sd_state, RKISP1_RSZ_PAD_SRC, 442 which); 443 sink_mbus_info = rkisp1_mbus_info_get_by_code(sink_fmt->code); 444 445 /* for YUV formats, userspace can change the mbus code on the src pad if it is supported */ 446 if (sink_mbus_info->pixel_enc == V4L2_PIXEL_ENC_YUV && 447 rkisp1_rsz_get_yuv_mbus_info(format->code)) 448 src_fmt->code = format->code; 449 450 src_fmt->width = clamp_t(u32, format->width, 451 rsz->config->min_rsz_width, 452 rsz->config->max_rsz_width); 453 src_fmt->height = clamp_t(u32, format->height, 454 rsz->config->min_rsz_height, 455 rsz->config->max_rsz_height); 456 457 *format = *src_fmt; 458 } 459 460 static void rkisp1_rsz_set_sink_crop(struct rkisp1_resizer *rsz, 461 struct v4l2_subdev_state *sd_state, 462 struct v4l2_rect *r, 463 unsigned int which) 464 { 465 const struct rkisp1_mbus_info *mbus_info; 466 struct v4l2_mbus_framefmt *sink_fmt; 467 struct v4l2_rect *sink_crop; 468 469 sink_fmt = rkisp1_rsz_get_pad_fmt(rsz, sd_state, RKISP1_RSZ_PAD_SINK, 470 which); 471 sink_crop = rkisp1_rsz_get_pad_crop(rsz, sd_state, 472 RKISP1_RSZ_PAD_SINK, 473 which); 474 475 /* Not crop for MP bayer raw data */ 476 mbus_info = rkisp1_mbus_info_get_by_code(sink_fmt->code); 477 478 if (rsz->id == RKISP1_MAINPATH && 479 mbus_info->pixel_enc == V4L2_PIXEL_ENC_BAYER) { 480 sink_crop->left = 0; 481 sink_crop->top = 0; 482 sink_crop->width = sink_fmt->width; 483 sink_crop->height = sink_fmt->height; 484 485 *r = *sink_crop; 486 return; 487 } 488 489 sink_crop->left = ALIGN(r->left, 2); 490 sink_crop->width = ALIGN(r->width, 2); 491 sink_crop->top = r->top; 492 sink_crop->height = r->height; 493 rkisp1_sd_adjust_crop(sink_crop, sink_fmt); 494 495 *r = *sink_crop; 496 } 497 498 static void rkisp1_rsz_set_sink_fmt(struct rkisp1_resizer *rsz, 499 struct v4l2_subdev_state *sd_state, 500 struct v4l2_mbus_framefmt *format, 501 unsigned int which) 502 { 503 const struct rkisp1_mbus_info *mbus_info; 504 struct v4l2_mbus_framefmt *sink_fmt, *src_fmt; 505 struct v4l2_rect *sink_crop; 506 507 sink_fmt = rkisp1_rsz_get_pad_fmt(rsz, sd_state, RKISP1_RSZ_PAD_SINK, 508 which); 509 src_fmt = rkisp1_rsz_get_pad_fmt(rsz, sd_state, RKISP1_RSZ_PAD_SRC, 510 which); 511 sink_crop = rkisp1_rsz_get_pad_crop(rsz, sd_state, 512 RKISP1_RSZ_PAD_SINK, 513 which); 514 if (rsz->id == RKISP1_SELFPATH) 515 sink_fmt->code = MEDIA_BUS_FMT_YUYV8_2X8; 516 else 517 sink_fmt->code = format->code; 518 519 mbus_info = rkisp1_mbus_info_get_by_code(sink_fmt->code); 520 if (!mbus_info || !(mbus_info->direction & RKISP1_ISP_SD_SRC)) { 521 sink_fmt->code = RKISP1_DEF_FMT; 522 mbus_info = rkisp1_mbus_info_get_by_code(sink_fmt->code); 523 } 524 if (which == V4L2_SUBDEV_FORMAT_ACTIVE) 525 rsz->pixel_enc = mbus_info->pixel_enc; 526 527 /* Propagete to source pad */ 528 src_fmt->code = sink_fmt->code; 529 530 sink_fmt->width = clamp_t(u32, format->width, 531 RKISP1_ISP_MIN_WIDTH, 532 RKISP1_ISP_MAX_WIDTH); 533 sink_fmt->height = clamp_t(u32, format->height, 534 RKISP1_ISP_MIN_HEIGHT, 535 RKISP1_ISP_MAX_HEIGHT); 536 537 *format = *sink_fmt; 538 539 /* Update sink crop */ 540 rkisp1_rsz_set_sink_crop(rsz, sd_state, sink_crop, which); 541 } 542 543 static int rkisp1_rsz_get_fmt(struct v4l2_subdev *sd, 544 struct v4l2_subdev_state *sd_state, 545 struct v4l2_subdev_format *fmt) 546 { 547 struct rkisp1_resizer *rsz = 548 container_of(sd, struct rkisp1_resizer, sd); 549 550 mutex_lock(&rsz->ops_lock); 551 fmt->format = *rkisp1_rsz_get_pad_fmt(rsz, sd_state, fmt->pad, 552 fmt->which); 553 mutex_unlock(&rsz->ops_lock); 554 return 0; 555 } 556 557 static int rkisp1_rsz_set_fmt(struct v4l2_subdev *sd, 558 struct v4l2_subdev_state *sd_state, 559 struct v4l2_subdev_format *fmt) 560 { 561 struct rkisp1_resizer *rsz = 562 container_of(sd, struct rkisp1_resizer, sd); 563 564 mutex_lock(&rsz->ops_lock); 565 if (fmt->pad == RKISP1_RSZ_PAD_SINK) 566 rkisp1_rsz_set_sink_fmt(rsz, sd_state, &fmt->format, 567 fmt->which); 568 else 569 rkisp1_rsz_set_src_fmt(rsz, sd_state, &fmt->format, 570 fmt->which); 571 572 mutex_unlock(&rsz->ops_lock); 573 return 0; 574 } 575 576 static int rkisp1_rsz_get_selection(struct v4l2_subdev *sd, 577 struct v4l2_subdev_state *sd_state, 578 struct v4l2_subdev_selection *sel) 579 { 580 struct rkisp1_resizer *rsz = 581 container_of(sd, struct rkisp1_resizer, sd); 582 struct v4l2_mbus_framefmt *mf_sink; 583 int ret = 0; 584 585 if (sel->pad == RKISP1_RSZ_PAD_SRC) 586 return -EINVAL; 587 588 mutex_lock(&rsz->ops_lock); 589 switch (sel->target) { 590 case V4L2_SEL_TGT_CROP_BOUNDS: 591 mf_sink = rkisp1_rsz_get_pad_fmt(rsz, sd_state, 592 RKISP1_RSZ_PAD_SINK, 593 sel->which); 594 sel->r.height = mf_sink->height; 595 sel->r.width = mf_sink->width; 596 sel->r.left = 0; 597 sel->r.top = 0; 598 break; 599 case V4L2_SEL_TGT_CROP: 600 sel->r = *rkisp1_rsz_get_pad_crop(rsz, sd_state, 601 RKISP1_RSZ_PAD_SINK, 602 sel->which); 603 break; 604 default: 605 ret = -EINVAL; 606 } 607 608 mutex_unlock(&rsz->ops_lock); 609 return ret; 610 } 611 612 static int rkisp1_rsz_set_selection(struct v4l2_subdev *sd, 613 struct v4l2_subdev_state *sd_state, 614 struct v4l2_subdev_selection *sel) 615 { 616 struct rkisp1_resizer *rsz = 617 container_of(sd, struct rkisp1_resizer, sd); 618 619 if (sel->target != V4L2_SEL_TGT_CROP || sel->pad == RKISP1_RSZ_PAD_SRC) 620 return -EINVAL; 621 622 dev_dbg(rsz->rkisp1->dev, "%s: pad: %d sel(%d,%d)/%dx%d\n", __func__, 623 sel->pad, sel->r.left, sel->r.top, sel->r.width, sel->r.height); 624 625 mutex_lock(&rsz->ops_lock); 626 rkisp1_rsz_set_sink_crop(rsz, sd_state, &sel->r, sel->which); 627 mutex_unlock(&rsz->ops_lock); 628 629 return 0; 630 } 631 632 static const struct media_entity_operations rkisp1_rsz_media_ops = { 633 .link_validate = v4l2_subdev_link_validate, 634 }; 635 636 static const struct v4l2_subdev_pad_ops rkisp1_rsz_pad_ops = { 637 .enum_mbus_code = rkisp1_rsz_enum_mbus_code, 638 .get_selection = rkisp1_rsz_get_selection, 639 .set_selection = rkisp1_rsz_set_selection, 640 .init_cfg = rkisp1_rsz_init_config, 641 .get_fmt = rkisp1_rsz_get_fmt, 642 .set_fmt = rkisp1_rsz_set_fmt, 643 .link_validate = v4l2_subdev_link_validate_default, 644 }; 645 646 /* ---------------------------------------------------------------------------- 647 * Stream operations 648 */ 649 650 static int rkisp1_rsz_s_stream(struct v4l2_subdev *sd, int enable) 651 { 652 struct rkisp1_resizer *rsz = 653 container_of(sd, struct rkisp1_resizer, sd); 654 struct rkisp1_device *rkisp1 = rsz->rkisp1; 655 struct rkisp1_capture *other = &rkisp1->capture_devs[rsz->id ^ 1]; 656 enum rkisp1_shadow_regs_when when = RKISP1_SHADOW_REGS_SYNC; 657 658 if (!enable) { 659 rkisp1_dcrop_disable(rsz, RKISP1_SHADOW_REGS_ASYNC); 660 rkisp1_rsz_disable(rsz, RKISP1_SHADOW_REGS_ASYNC); 661 return 0; 662 } 663 664 if (other->is_streaming) 665 when = RKISP1_SHADOW_REGS_ASYNC; 666 667 mutex_lock(&rsz->ops_lock); 668 rkisp1_rsz_config(rsz, when); 669 rkisp1_dcrop_config(rsz); 670 671 mutex_unlock(&rsz->ops_lock); 672 return 0; 673 } 674 675 static const struct v4l2_subdev_video_ops rkisp1_rsz_video_ops = { 676 .s_stream = rkisp1_rsz_s_stream, 677 }; 678 679 static const struct v4l2_subdev_ops rkisp1_rsz_ops = { 680 .video = &rkisp1_rsz_video_ops, 681 .pad = &rkisp1_rsz_pad_ops, 682 }; 683 684 static void rkisp1_rsz_unregister(struct rkisp1_resizer *rsz) 685 { 686 if (!rsz->rkisp1) 687 return; 688 689 v4l2_device_unregister_subdev(&rsz->sd); 690 media_entity_cleanup(&rsz->sd.entity); 691 mutex_destroy(&rsz->ops_lock); 692 } 693 694 static int rkisp1_rsz_register(struct rkisp1_resizer *rsz) 695 { 696 struct v4l2_subdev_state state = { 697 .pads = rsz->pad_cfg 698 }; 699 static const char * const dev_names[] = { 700 RKISP1_RSZ_MP_DEV_NAME, 701 RKISP1_RSZ_SP_DEV_NAME 702 }; 703 struct media_pad *pads = rsz->pads; 704 struct v4l2_subdev *sd = &rsz->sd; 705 int ret; 706 707 if (rsz->id == RKISP1_SELFPATH) { 708 rsz->regs_base = RKISP1_CIF_SRSZ_BASE; 709 rsz->config = &rkisp1_rsz_config_sp; 710 } else { 711 rsz->regs_base = RKISP1_CIF_MRSZ_BASE; 712 rsz->config = &rkisp1_rsz_config_mp; 713 } 714 715 v4l2_subdev_init(sd, &rkisp1_rsz_ops); 716 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; 717 sd->entity.ops = &rkisp1_rsz_media_ops; 718 sd->entity.function = MEDIA_ENT_F_PROC_VIDEO_SCALER; 719 sd->owner = THIS_MODULE; 720 strscpy(sd->name, dev_names[rsz->id], sizeof(sd->name)); 721 722 pads[RKISP1_RSZ_PAD_SINK].flags = MEDIA_PAD_FL_SINK | 723 MEDIA_PAD_FL_MUST_CONNECT; 724 pads[RKISP1_RSZ_PAD_SRC].flags = MEDIA_PAD_FL_SOURCE | 725 MEDIA_PAD_FL_MUST_CONNECT; 726 727 rsz->pixel_enc = RKISP1_DEF_PIXEL_ENC; 728 729 mutex_init(&rsz->ops_lock); 730 ret = media_entity_pads_init(&sd->entity, RKISP1_RSZ_PAD_MAX, pads); 731 if (ret) 732 goto error; 733 734 ret = v4l2_device_register_subdev(&rsz->rkisp1->v4l2_dev, sd); 735 if (ret) { 736 dev_err(sd->dev, "Failed to register resizer subdev\n"); 737 goto error; 738 } 739 740 rkisp1_rsz_init_config(sd, &state); 741 return 0; 742 743 error: 744 media_entity_cleanup(&sd->entity); 745 mutex_destroy(&rsz->ops_lock); 746 return ret; 747 } 748 749 int rkisp1_resizer_devs_register(struct rkisp1_device *rkisp1) 750 { 751 unsigned int i; 752 int ret; 753 754 for (i = 0; i < ARRAY_SIZE(rkisp1->resizer_devs); i++) { 755 struct rkisp1_resizer *rsz = &rkisp1->resizer_devs[i]; 756 757 rsz->rkisp1 = rkisp1; 758 rsz->id = i; 759 760 ret = rkisp1_rsz_register(rsz); 761 if (ret) { 762 rsz->rkisp1 = NULL; 763 rkisp1_resizer_devs_unregister(rkisp1); 764 return ret; 765 } 766 } 767 768 return 0; 769 } 770 771 void rkisp1_resizer_devs_unregister(struct rkisp1_device *rkisp1) 772 { 773 struct rkisp1_resizer *mp = &rkisp1->resizer_devs[RKISP1_MAINPATH]; 774 struct rkisp1_resizer *sp = &rkisp1->resizer_devs[RKISP1_SELFPATH]; 775 776 rkisp1_rsz_unregister(mp); 777 rkisp1_rsz_unregister(sp); 778 } 779