1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2012-2016, The Linux Foundation. All rights reserved. 4 * Copyright (C) 2017 Linaro Ltd. 5 */ 6 7 #include <linux/delay.h> 8 #include <linux/device.h> 9 #include <linux/dma-mapping.h> 10 #include <linux/interrupt.h> 11 #include <linux/iopoll.h> 12 #include <linux/kernel.h> 13 #include <linux/slab.h> 14 15 #include "core.h" 16 #include "hfi_cmds.h" 17 #include "hfi_msgs.h" 18 #include "hfi_venus.h" 19 #include "hfi_venus_io.h" 20 #include "firmware.h" 21 22 #define HFI_MASK_QHDR_TX_TYPE 0xff000000 23 #define HFI_MASK_QHDR_RX_TYPE 0x00ff0000 24 #define HFI_MASK_QHDR_PRI_TYPE 0x0000ff00 25 #define HFI_MASK_QHDR_ID_TYPE 0x000000ff 26 27 #define HFI_HOST_TO_CTRL_CMD_Q 0 28 #define HFI_CTRL_TO_HOST_MSG_Q 1 29 #define HFI_CTRL_TO_HOST_DBG_Q 2 30 #define HFI_MASK_QHDR_STATUS 0x000000ff 31 32 #define IFACEQ_NUM 3 33 #define IFACEQ_CMD_IDX 0 34 #define IFACEQ_MSG_IDX 1 35 #define IFACEQ_DBG_IDX 2 36 #define IFACEQ_MAX_BUF_COUNT 50 37 #define IFACEQ_MAX_PARALLEL_CLNTS 16 38 #define IFACEQ_DFLT_QHDR 0x01010000 39 40 #define POLL_INTERVAL_US 50 41 42 #define IFACEQ_MAX_PKT_SIZE 1024 43 #define IFACEQ_MED_PKT_SIZE 768 44 #define IFACEQ_MIN_PKT_SIZE 8 45 #define IFACEQ_VAR_SMALL_PKT_SIZE 100 46 #define IFACEQ_VAR_LARGE_PKT_SIZE 512 47 #define IFACEQ_VAR_HUGE_PKT_SIZE (1024 * 12) 48 49 struct hfi_queue_table_header { 50 u32 version; 51 u32 size; 52 u32 qhdr0_offset; 53 u32 qhdr_size; 54 u32 num_q; 55 u32 num_active_q; 56 }; 57 58 struct hfi_queue_header { 59 u32 status; 60 u32 start_addr; 61 u32 type; 62 u32 q_size; 63 u32 pkt_size; 64 u32 pkt_drop_cnt; 65 u32 rx_wm; 66 u32 tx_wm; 67 u32 rx_req; 68 u32 tx_req; 69 u32 rx_irq_status; 70 u32 tx_irq_status; 71 u32 read_idx; 72 u32 write_idx; 73 }; 74 75 #define IFACEQ_TABLE_SIZE \ 76 (sizeof(struct hfi_queue_table_header) + \ 77 sizeof(struct hfi_queue_header) * IFACEQ_NUM) 78 79 #define IFACEQ_QUEUE_SIZE (IFACEQ_MAX_PKT_SIZE * \ 80 IFACEQ_MAX_BUF_COUNT * IFACEQ_MAX_PARALLEL_CLNTS) 81 82 #define IFACEQ_GET_QHDR_START_ADDR(ptr, i) \ 83 (void *)(((ptr) + sizeof(struct hfi_queue_table_header)) + \ 84 ((i) * sizeof(struct hfi_queue_header))) 85 86 #define QDSS_SIZE SZ_4K 87 #define SFR_SIZE SZ_4K 88 #define QUEUE_SIZE \ 89 (IFACEQ_TABLE_SIZE + (IFACEQ_QUEUE_SIZE * IFACEQ_NUM)) 90 91 #define ALIGNED_QDSS_SIZE ALIGN(QDSS_SIZE, SZ_4K) 92 #define ALIGNED_SFR_SIZE ALIGN(SFR_SIZE, SZ_4K) 93 #define ALIGNED_QUEUE_SIZE ALIGN(QUEUE_SIZE, SZ_4K) 94 #define SHARED_QSIZE ALIGN(ALIGNED_SFR_SIZE + ALIGNED_QUEUE_SIZE + \ 95 ALIGNED_QDSS_SIZE, SZ_1M) 96 97 struct mem_desc { 98 dma_addr_t da; /* device address */ 99 void *kva; /* kernel virtual address */ 100 u32 size; 101 unsigned long attrs; 102 }; 103 104 struct iface_queue { 105 struct hfi_queue_header *qhdr; 106 struct mem_desc qmem; 107 }; 108 109 enum venus_state { 110 VENUS_STATE_DEINIT = 1, 111 VENUS_STATE_INIT, 112 }; 113 114 struct venus_hfi_device { 115 struct venus_core *core; 116 u32 irq_status; 117 u32 last_packet_type; 118 bool power_enabled; 119 bool suspended; 120 enum venus_state state; 121 /* serialize read / write to the shared memory */ 122 struct mutex lock; 123 struct completion pwr_collapse_prep; 124 struct completion release_resource; 125 struct mem_desc ifaceq_table; 126 struct mem_desc sfr; 127 struct iface_queue queues[IFACEQ_NUM]; 128 u8 pkt_buf[IFACEQ_VAR_HUGE_PKT_SIZE]; 129 u8 dbg_buf[IFACEQ_VAR_HUGE_PKT_SIZE]; 130 }; 131 132 static bool venus_pkt_debug; 133 int venus_fw_debug = HFI_DEBUG_MSG_ERROR | HFI_DEBUG_MSG_FATAL; 134 static bool venus_fw_low_power_mode = true; 135 static int venus_hw_rsp_timeout = 1000; 136 static bool venus_fw_coverage; 137 138 static void venus_set_state(struct venus_hfi_device *hdev, 139 enum venus_state state) 140 { 141 mutex_lock(&hdev->lock); 142 hdev->state = state; 143 mutex_unlock(&hdev->lock); 144 } 145 146 static bool venus_is_valid_state(struct venus_hfi_device *hdev) 147 { 148 return hdev->state != VENUS_STATE_DEINIT; 149 } 150 151 static void venus_dump_packet(struct venus_hfi_device *hdev, const void *packet) 152 { 153 size_t pkt_size = *(u32 *)packet; 154 155 if (!venus_pkt_debug) 156 return; 157 158 print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET, 16, 1, packet, 159 pkt_size, true); 160 } 161 162 static int venus_write_queue(struct venus_hfi_device *hdev, 163 struct iface_queue *queue, 164 void *packet, u32 *rx_req) 165 { 166 struct hfi_queue_header *qhdr; 167 u32 dwords, new_wr_idx; 168 u32 empty_space, rd_idx, wr_idx, qsize; 169 u32 *wr_ptr; 170 171 if (!queue->qmem.kva) 172 return -EINVAL; 173 174 qhdr = queue->qhdr; 175 if (!qhdr) 176 return -EINVAL; 177 178 venus_dump_packet(hdev, packet); 179 180 dwords = (*(u32 *)packet) >> 2; 181 if (!dwords) 182 return -EINVAL; 183 184 rd_idx = qhdr->read_idx; 185 wr_idx = qhdr->write_idx; 186 qsize = qhdr->q_size; 187 /* ensure rd/wr indices's are read from memory */ 188 rmb(); 189 190 if (wr_idx >= rd_idx) 191 empty_space = qsize - (wr_idx - rd_idx); 192 else 193 empty_space = rd_idx - wr_idx; 194 195 if (empty_space <= dwords) { 196 qhdr->tx_req = 1; 197 /* ensure tx_req is updated in memory */ 198 wmb(); 199 return -ENOSPC; 200 } 201 202 qhdr->tx_req = 0; 203 /* ensure tx_req is updated in memory */ 204 wmb(); 205 206 new_wr_idx = wr_idx + dwords; 207 wr_ptr = (u32 *)(queue->qmem.kva + (wr_idx << 2)); 208 if (new_wr_idx < qsize) { 209 memcpy(wr_ptr, packet, dwords << 2); 210 } else { 211 size_t len; 212 213 new_wr_idx -= qsize; 214 len = (dwords - new_wr_idx) << 2; 215 memcpy(wr_ptr, packet, len); 216 memcpy(queue->qmem.kva, packet + len, new_wr_idx << 2); 217 } 218 219 /* make sure packet is written before updating the write index */ 220 wmb(); 221 222 qhdr->write_idx = new_wr_idx; 223 *rx_req = qhdr->rx_req ? 1 : 0; 224 225 /* make sure write index is updated before an interrupt is raised */ 226 mb(); 227 228 return 0; 229 } 230 231 static int venus_read_queue(struct venus_hfi_device *hdev, 232 struct iface_queue *queue, void *pkt, u32 *tx_req) 233 { 234 struct hfi_queue_header *qhdr; 235 u32 dwords, new_rd_idx; 236 u32 rd_idx, wr_idx, type, qsize; 237 u32 *rd_ptr; 238 u32 recv_request = 0; 239 int ret = 0; 240 241 if (!queue->qmem.kva) 242 return -EINVAL; 243 244 qhdr = queue->qhdr; 245 if (!qhdr) 246 return -EINVAL; 247 248 type = qhdr->type; 249 rd_idx = qhdr->read_idx; 250 wr_idx = qhdr->write_idx; 251 qsize = qhdr->q_size; 252 253 /* make sure data is valid before using it */ 254 rmb(); 255 256 /* 257 * Do not set receive request for debug queue, if set, Venus generates 258 * interrupt for debug messages even when there is no response message 259 * available. In general debug queue will not become full as it is being 260 * emptied out for every interrupt from Venus. Venus will anyway 261 * generates interrupt if it is full. 262 */ 263 if (type & HFI_CTRL_TO_HOST_MSG_Q) 264 recv_request = 1; 265 266 if (rd_idx == wr_idx) { 267 qhdr->rx_req = recv_request; 268 *tx_req = 0; 269 /* update rx_req field in memory */ 270 wmb(); 271 return -ENODATA; 272 } 273 274 rd_ptr = (u32 *)(queue->qmem.kva + (rd_idx << 2)); 275 dwords = *rd_ptr >> 2; 276 if (!dwords) 277 return -EINVAL; 278 279 new_rd_idx = rd_idx + dwords; 280 if (((dwords << 2) <= IFACEQ_VAR_HUGE_PKT_SIZE) && rd_idx <= qsize) { 281 if (new_rd_idx < qsize) { 282 memcpy(pkt, rd_ptr, dwords << 2); 283 } else { 284 size_t len; 285 286 new_rd_idx -= qsize; 287 len = (dwords - new_rd_idx) << 2; 288 memcpy(pkt, rd_ptr, len); 289 memcpy(pkt + len, queue->qmem.kva, new_rd_idx << 2); 290 } 291 } else { 292 /* bad packet received, dropping */ 293 new_rd_idx = qhdr->write_idx; 294 ret = -EBADMSG; 295 } 296 297 /* ensure the packet is read before updating read index */ 298 rmb(); 299 300 qhdr->read_idx = new_rd_idx; 301 /* ensure updating read index */ 302 wmb(); 303 304 rd_idx = qhdr->read_idx; 305 wr_idx = qhdr->write_idx; 306 /* ensure rd/wr indices are read from memory */ 307 rmb(); 308 309 if (rd_idx != wr_idx) 310 qhdr->rx_req = 0; 311 else 312 qhdr->rx_req = recv_request; 313 314 *tx_req = qhdr->tx_req ? 1 : 0; 315 316 /* ensure rx_req is stored to memory and tx_req is loaded from memory */ 317 mb(); 318 319 venus_dump_packet(hdev, pkt); 320 321 return ret; 322 } 323 324 static int venus_alloc(struct venus_hfi_device *hdev, struct mem_desc *desc, 325 u32 size) 326 { 327 struct device *dev = hdev->core->dev; 328 329 desc->attrs = DMA_ATTR_WRITE_COMBINE; 330 desc->size = ALIGN(size, SZ_4K); 331 332 desc->kva = dma_alloc_attrs(dev, desc->size, &desc->da, GFP_KERNEL, 333 desc->attrs); 334 if (!desc->kva) 335 return -ENOMEM; 336 337 return 0; 338 } 339 340 static void venus_free(struct venus_hfi_device *hdev, struct mem_desc *mem) 341 { 342 struct device *dev = hdev->core->dev; 343 344 dma_free_attrs(dev, mem->size, mem->kva, mem->da, mem->attrs); 345 } 346 347 static void venus_set_registers(struct venus_hfi_device *hdev) 348 { 349 const struct venus_resources *res = hdev->core->res; 350 const struct reg_val *tbl = res->reg_tbl; 351 unsigned int count = res->reg_tbl_size; 352 unsigned int i; 353 354 for (i = 0; i < count; i++) 355 writel(tbl[i].value, hdev->core->base + tbl[i].reg); 356 } 357 358 static void venus_soft_int(struct venus_hfi_device *hdev) 359 { 360 void __iomem *cpu_ic_base = hdev->core->cpu_ic_base; 361 u32 clear_bit; 362 363 if (IS_V6(hdev->core)) 364 clear_bit = BIT(CPU_IC_SOFTINT_H2A_SHIFT_V6); 365 else 366 clear_bit = BIT(CPU_IC_SOFTINT_H2A_SHIFT); 367 368 writel(clear_bit, cpu_ic_base + CPU_IC_SOFTINT); 369 } 370 371 static int venus_iface_cmdq_write_nolock(struct venus_hfi_device *hdev, 372 void *pkt, bool sync) 373 { 374 struct device *dev = hdev->core->dev; 375 struct hfi_pkt_hdr *cmd_packet; 376 struct iface_queue *queue; 377 u32 rx_req; 378 int ret; 379 380 if (!venus_is_valid_state(hdev)) 381 return -EINVAL; 382 383 cmd_packet = (struct hfi_pkt_hdr *)pkt; 384 hdev->last_packet_type = cmd_packet->pkt_type; 385 386 queue = &hdev->queues[IFACEQ_CMD_IDX]; 387 388 ret = venus_write_queue(hdev, queue, pkt, &rx_req); 389 if (ret) { 390 dev_err(dev, "write to iface cmd queue failed (%d)\n", ret); 391 return ret; 392 } 393 394 if (sync) { 395 /* 396 * Inform video hardware to raise interrupt for synchronous 397 * commands 398 */ 399 queue = &hdev->queues[IFACEQ_MSG_IDX]; 400 queue->qhdr->rx_req = 1; 401 /* ensure rx_req is updated in memory */ 402 wmb(); 403 } 404 405 if (rx_req) 406 venus_soft_int(hdev); 407 408 return 0; 409 } 410 411 static int venus_iface_cmdq_write(struct venus_hfi_device *hdev, void *pkt, bool sync) 412 { 413 int ret; 414 415 mutex_lock(&hdev->lock); 416 ret = venus_iface_cmdq_write_nolock(hdev, pkt, sync); 417 mutex_unlock(&hdev->lock); 418 419 return ret; 420 } 421 422 static int venus_hfi_core_set_resource(struct venus_core *core, u32 id, 423 u32 size, u32 addr, void *cookie) 424 { 425 struct venus_hfi_device *hdev = to_hfi_priv(core); 426 struct hfi_sys_set_resource_pkt *pkt; 427 u8 packet[IFACEQ_VAR_SMALL_PKT_SIZE]; 428 int ret; 429 430 if (id == VIDC_RESOURCE_NONE) 431 return 0; 432 433 pkt = (struct hfi_sys_set_resource_pkt *)packet; 434 435 ret = pkt_sys_set_resource(pkt, id, size, addr, cookie); 436 if (ret) 437 return ret; 438 439 ret = venus_iface_cmdq_write(hdev, pkt, false); 440 if (ret) 441 return ret; 442 443 return 0; 444 } 445 446 static int venus_boot_core(struct venus_hfi_device *hdev) 447 { 448 struct device *dev = hdev->core->dev; 449 static const unsigned int max_tries = 100; 450 u32 ctrl_status = 0, mask_val = 0; 451 unsigned int count = 0; 452 void __iomem *cpu_cs_base = hdev->core->cpu_cs_base; 453 void __iomem *wrapper_base = hdev->core->wrapper_base; 454 int ret = 0; 455 456 if (IS_IRIS2(hdev->core) || IS_IRIS2_1(hdev->core)) { 457 mask_val = readl(wrapper_base + WRAPPER_INTR_MASK); 458 mask_val &= ~(WRAPPER_INTR_MASK_A2HWD_BASK_V6 | 459 WRAPPER_INTR_MASK_A2HCPU_MASK); 460 } else { 461 mask_val = WRAPPER_INTR_MASK_A2HVCODEC_MASK; 462 } 463 464 writel(mask_val, wrapper_base + WRAPPER_INTR_MASK); 465 if (IS_V1(hdev->core)) 466 writel(1, cpu_cs_base + CPU_CS_SCIACMDARG3); 467 468 writel(BIT(VIDC_CTRL_INIT_CTRL_SHIFT), cpu_cs_base + VIDC_CTRL_INIT); 469 while (!ctrl_status && count < max_tries) { 470 ctrl_status = readl(cpu_cs_base + CPU_CS_SCIACMDARG0); 471 if ((ctrl_status & CPU_CS_SCIACMDARG0_ERROR_STATUS_MASK) == 4) { 472 dev_err(dev, "invalid setting for UC_REGION\n"); 473 ret = -EINVAL; 474 break; 475 } 476 477 usleep_range(500, 1000); 478 count++; 479 } 480 481 if (count >= max_tries) 482 ret = -ETIMEDOUT; 483 484 if (IS_IRIS2(hdev->core) || IS_IRIS2_1(hdev->core)) { 485 writel(0x1, cpu_cs_base + CPU_CS_H2XSOFTINTEN_V6); 486 writel(0x0, cpu_cs_base + CPU_CS_X2RPMH_V6); 487 } 488 489 return ret; 490 } 491 492 static u32 venus_hwversion(struct venus_hfi_device *hdev) 493 { 494 struct device *dev = hdev->core->dev; 495 void __iomem *wrapper_base = hdev->core->wrapper_base; 496 u32 ver; 497 u32 major, minor, step; 498 499 ver = readl(wrapper_base + WRAPPER_HW_VERSION); 500 major = ver & WRAPPER_HW_VERSION_MAJOR_VERSION_MASK; 501 major = major >> WRAPPER_HW_VERSION_MAJOR_VERSION_SHIFT; 502 minor = ver & WRAPPER_HW_VERSION_MINOR_VERSION_MASK; 503 minor = minor >> WRAPPER_HW_VERSION_MINOR_VERSION_SHIFT; 504 step = ver & WRAPPER_HW_VERSION_STEP_VERSION_MASK; 505 506 dev_dbg(dev, VDBGL "venus hw version %x.%x.%x\n", major, minor, step); 507 508 return major; 509 } 510 511 static int venus_run(struct venus_hfi_device *hdev) 512 { 513 struct device *dev = hdev->core->dev; 514 void __iomem *cpu_cs_base = hdev->core->cpu_cs_base; 515 int ret; 516 517 /* 518 * Re-program all of the registers that get reset as a result of 519 * regulator_disable() and _enable() 520 */ 521 venus_set_registers(hdev); 522 523 writel(hdev->ifaceq_table.da, cpu_cs_base + UC_REGION_ADDR); 524 writel(SHARED_QSIZE, cpu_cs_base + UC_REGION_SIZE); 525 writel(hdev->ifaceq_table.da, cpu_cs_base + CPU_CS_SCIACMDARG2); 526 writel(0x01, cpu_cs_base + CPU_CS_SCIACMDARG1); 527 if (hdev->sfr.da) 528 writel(hdev->sfr.da, cpu_cs_base + SFR_ADDR); 529 530 ret = venus_boot_core(hdev); 531 if (ret) { 532 dev_err(dev, "failed to reset venus core\n"); 533 return ret; 534 } 535 536 venus_hwversion(hdev); 537 538 return 0; 539 } 540 541 static int venus_halt_axi(struct venus_hfi_device *hdev) 542 { 543 void __iomem *wrapper_base = hdev->core->wrapper_base; 544 void __iomem *vbif_base = hdev->core->vbif_base; 545 void __iomem *cpu_cs_base = hdev->core->cpu_cs_base; 546 void __iomem *aon_base = hdev->core->aon_base; 547 struct device *dev = hdev->core->dev; 548 u32 val; 549 u32 mask_val; 550 int ret; 551 552 if (IS_IRIS2(hdev->core) || IS_IRIS2_1(hdev->core)) { 553 writel(0x3, cpu_cs_base + CPU_CS_X2RPMH_V6); 554 555 if (IS_IRIS2_1(hdev->core)) 556 goto skip_aon_mvp_noc; 557 558 writel(0x1, aon_base + AON_WRAPPER_MVP_NOC_LPI_CONTROL); 559 ret = readl_poll_timeout(aon_base + AON_WRAPPER_MVP_NOC_LPI_STATUS, 560 val, 561 val & BIT(0), 562 POLL_INTERVAL_US, 563 VBIF_AXI_HALT_ACK_TIMEOUT_US); 564 if (ret) 565 return -ETIMEDOUT; 566 567 skip_aon_mvp_noc: 568 mask_val = (BIT(2) | BIT(1) | BIT(0)); 569 writel(mask_val, wrapper_base + WRAPPER_DEBUG_BRIDGE_LPI_CONTROL_V6); 570 571 writel(0x00, wrapper_base + WRAPPER_DEBUG_BRIDGE_LPI_CONTROL_V6); 572 ret = readl_poll_timeout(wrapper_base + WRAPPER_DEBUG_BRIDGE_LPI_STATUS_V6, 573 val, 574 val == 0, 575 POLL_INTERVAL_US, 576 VBIF_AXI_HALT_ACK_TIMEOUT_US); 577 578 if (ret) { 579 dev_err(dev, "DBLP Release: lpi_status %x\n", val); 580 return -ETIMEDOUT; 581 } 582 return 0; 583 } 584 585 if (IS_V4(hdev->core)) { 586 val = readl(wrapper_base + WRAPPER_CPU_AXI_HALT); 587 val |= WRAPPER_CPU_AXI_HALT_HALT; 588 writel(val, wrapper_base + WRAPPER_CPU_AXI_HALT); 589 590 ret = readl_poll_timeout(wrapper_base + WRAPPER_CPU_AXI_HALT_STATUS, 591 val, 592 val & WRAPPER_CPU_AXI_HALT_STATUS_IDLE, 593 POLL_INTERVAL_US, 594 VBIF_AXI_HALT_ACK_TIMEOUT_US); 595 if (ret) { 596 dev_err(dev, "AXI bus port halt timeout\n"); 597 return ret; 598 } 599 600 return 0; 601 } 602 603 /* Halt AXI and AXI IMEM VBIF Access */ 604 val = readl(vbif_base + VBIF_AXI_HALT_CTRL0); 605 val |= VBIF_AXI_HALT_CTRL0_HALT_REQ; 606 writel(val, vbif_base + VBIF_AXI_HALT_CTRL0); 607 608 /* Request for AXI bus port halt */ 609 ret = readl_poll_timeout(vbif_base + VBIF_AXI_HALT_CTRL1, val, 610 val & VBIF_AXI_HALT_CTRL1_HALT_ACK, 611 POLL_INTERVAL_US, 612 VBIF_AXI_HALT_ACK_TIMEOUT_US); 613 if (ret) { 614 dev_err(dev, "AXI bus port halt timeout\n"); 615 return ret; 616 } 617 618 return 0; 619 } 620 621 static int venus_power_off(struct venus_hfi_device *hdev) 622 { 623 int ret; 624 625 if (!hdev->power_enabled) 626 return 0; 627 628 ret = venus_set_hw_state_suspend(hdev->core); 629 if (ret) 630 return ret; 631 632 ret = venus_halt_axi(hdev); 633 if (ret) 634 return ret; 635 636 hdev->power_enabled = false; 637 638 return 0; 639 } 640 641 static int venus_power_on(struct venus_hfi_device *hdev) 642 { 643 int ret; 644 645 if (hdev->power_enabled) 646 return 0; 647 648 ret = venus_set_hw_state_resume(hdev->core); 649 if (ret) 650 goto err; 651 652 ret = venus_run(hdev); 653 if (ret) 654 goto err_suspend; 655 656 hdev->power_enabled = true; 657 658 return 0; 659 660 err_suspend: 661 venus_set_hw_state_suspend(hdev->core); 662 err: 663 hdev->power_enabled = false; 664 return ret; 665 } 666 667 static int venus_iface_msgq_read_nolock(struct venus_hfi_device *hdev, 668 void *pkt) 669 { 670 struct iface_queue *queue; 671 u32 tx_req; 672 int ret; 673 674 if (!venus_is_valid_state(hdev)) 675 return -EINVAL; 676 677 queue = &hdev->queues[IFACEQ_MSG_IDX]; 678 679 ret = venus_read_queue(hdev, queue, pkt, &tx_req); 680 if (ret) 681 return ret; 682 683 if (tx_req) 684 venus_soft_int(hdev); 685 686 return 0; 687 } 688 689 static int venus_iface_msgq_read(struct venus_hfi_device *hdev, void *pkt) 690 { 691 int ret; 692 693 mutex_lock(&hdev->lock); 694 ret = venus_iface_msgq_read_nolock(hdev, pkt); 695 mutex_unlock(&hdev->lock); 696 697 return ret; 698 } 699 700 static int venus_iface_dbgq_read_nolock(struct venus_hfi_device *hdev, 701 void *pkt) 702 { 703 struct iface_queue *queue; 704 u32 tx_req; 705 int ret; 706 707 ret = venus_is_valid_state(hdev); 708 if (!ret) 709 return -EINVAL; 710 711 queue = &hdev->queues[IFACEQ_DBG_IDX]; 712 713 ret = venus_read_queue(hdev, queue, pkt, &tx_req); 714 if (ret) 715 return ret; 716 717 if (tx_req) 718 venus_soft_int(hdev); 719 720 return 0; 721 } 722 723 static int venus_iface_dbgq_read(struct venus_hfi_device *hdev, void *pkt) 724 { 725 int ret; 726 727 if (!pkt) 728 return -EINVAL; 729 730 mutex_lock(&hdev->lock); 731 ret = venus_iface_dbgq_read_nolock(hdev, pkt); 732 mutex_unlock(&hdev->lock); 733 734 return ret; 735 } 736 737 static void venus_set_qhdr_defaults(struct hfi_queue_header *qhdr) 738 { 739 qhdr->status = 1; 740 qhdr->type = IFACEQ_DFLT_QHDR; 741 qhdr->q_size = IFACEQ_QUEUE_SIZE / 4; 742 qhdr->pkt_size = 0; 743 qhdr->rx_wm = 1; 744 qhdr->tx_wm = 1; 745 qhdr->rx_req = 1; 746 qhdr->tx_req = 0; 747 qhdr->rx_irq_status = 0; 748 qhdr->tx_irq_status = 0; 749 qhdr->read_idx = 0; 750 qhdr->write_idx = 0; 751 } 752 753 static void venus_interface_queues_release(struct venus_hfi_device *hdev) 754 { 755 mutex_lock(&hdev->lock); 756 757 venus_free(hdev, &hdev->ifaceq_table); 758 venus_free(hdev, &hdev->sfr); 759 760 memset(hdev->queues, 0, sizeof(hdev->queues)); 761 memset(&hdev->ifaceq_table, 0, sizeof(hdev->ifaceq_table)); 762 memset(&hdev->sfr, 0, sizeof(hdev->sfr)); 763 764 mutex_unlock(&hdev->lock); 765 } 766 767 static int venus_interface_queues_init(struct venus_hfi_device *hdev) 768 { 769 struct hfi_queue_table_header *tbl_hdr; 770 struct iface_queue *queue; 771 struct hfi_sfr *sfr; 772 struct mem_desc desc = {0}; 773 unsigned int offset; 774 unsigned int i; 775 int ret; 776 777 ret = venus_alloc(hdev, &desc, ALIGNED_QUEUE_SIZE); 778 if (ret) 779 return ret; 780 781 hdev->ifaceq_table = desc; 782 offset = IFACEQ_TABLE_SIZE; 783 784 for (i = 0; i < IFACEQ_NUM; i++) { 785 queue = &hdev->queues[i]; 786 queue->qmem.da = desc.da + offset; 787 queue->qmem.kva = desc.kva + offset; 788 queue->qmem.size = IFACEQ_QUEUE_SIZE; 789 offset += queue->qmem.size; 790 queue->qhdr = 791 IFACEQ_GET_QHDR_START_ADDR(hdev->ifaceq_table.kva, i); 792 793 venus_set_qhdr_defaults(queue->qhdr); 794 795 queue->qhdr->start_addr = queue->qmem.da; 796 797 if (i == IFACEQ_CMD_IDX) 798 queue->qhdr->type |= HFI_HOST_TO_CTRL_CMD_Q; 799 else if (i == IFACEQ_MSG_IDX) 800 queue->qhdr->type |= HFI_CTRL_TO_HOST_MSG_Q; 801 else if (i == IFACEQ_DBG_IDX) 802 queue->qhdr->type |= HFI_CTRL_TO_HOST_DBG_Q; 803 } 804 805 tbl_hdr = hdev->ifaceq_table.kva; 806 tbl_hdr->version = 0; 807 tbl_hdr->size = IFACEQ_TABLE_SIZE; 808 tbl_hdr->qhdr0_offset = sizeof(struct hfi_queue_table_header); 809 tbl_hdr->qhdr_size = sizeof(struct hfi_queue_header); 810 tbl_hdr->num_q = IFACEQ_NUM; 811 tbl_hdr->num_active_q = IFACEQ_NUM; 812 813 /* 814 * Set receive request to zero on debug queue as there is no 815 * need of interrupt from video hardware for debug messages 816 */ 817 queue = &hdev->queues[IFACEQ_DBG_IDX]; 818 queue->qhdr->rx_req = 0; 819 820 ret = venus_alloc(hdev, &desc, ALIGNED_SFR_SIZE); 821 if (ret) { 822 hdev->sfr.da = 0; 823 } else { 824 hdev->sfr = desc; 825 sfr = hdev->sfr.kva; 826 sfr->buf_size = ALIGNED_SFR_SIZE; 827 } 828 829 /* ensure table and queue header structs are settled in memory */ 830 wmb(); 831 832 return 0; 833 } 834 835 static int venus_sys_set_debug(struct venus_hfi_device *hdev, u32 debug) 836 { 837 struct hfi_sys_set_property_pkt *pkt; 838 u8 packet[IFACEQ_VAR_SMALL_PKT_SIZE]; 839 840 pkt = (struct hfi_sys_set_property_pkt *)packet; 841 842 pkt_sys_debug_config(pkt, HFI_DEBUG_MODE_QUEUE, debug); 843 844 return venus_iface_cmdq_write(hdev, pkt, false); 845 } 846 847 static int venus_sys_set_coverage(struct venus_hfi_device *hdev, u32 mode) 848 { 849 struct hfi_sys_set_property_pkt *pkt; 850 u8 packet[IFACEQ_VAR_SMALL_PKT_SIZE]; 851 852 pkt = (struct hfi_sys_set_property_pkt *)packet; 853 854 pkt_sys_coverage_config(pkt, mode); 855 856 return venus_iface_cmdq_write(hdev, pkt, false); 857 } 858 859 static int venus_sys_set_idle_message(struct venus_hfi_device *hdev, 860 bool enable) 861 { 862 struct hfi_sys_set_property_pkt *pkt; 863 u8 packet[IFACEQ_VAR_SMALL_PKT_SIZE]; 864 865 if (!enable) 866 return 0; 867 868 pkt = (struct hfi_sys_set_property_pkt *)packet; 869 870 pkt_sys_idle_indicator(pkt, enable); 871 872 return venus_iface_cmdq_write(hdev, pkt, false); 873 } 874 875 static int venus_sys_set_power_control(struct venus_hfi_device *hdev, 876 bool enable) 877 { 878 struct hfi_sys_set_property_pkt *pkt; 879 u8 packet[IFACEQ_VAR_SMALL_PKT_SIZE]; 880 881 pkt = (struct hfi_sys_set_property_pkt *)packet; 882 883 pkt_sys_power_control(pkt, enable); 884 885 return venus_iface_cmdq_write(hdev, pkt, false); 886 } 887 888 static int venus_sys_set_ubwc_config(struct venus_hfi_device *hdev) 889 { 890 struct hfi_sys_set_property_pkt *pkt; 891 u8 packet[IFACEQ_VAR_SMALL_PKT_SIZE]; 892 const struct venus_resources *res = hdev->core->res; 893 int ret; 894 895 pkt = (struct hfi_sys_set_property_pkt *)packet; 896 897 pkt_sys_ubwc_config(pkt, res->ubwc_conf); 898 899 ret = venus_iface_cmdq_write(hdev, pkt, false); 900 if (ret) 901 return ret; 902 903 return 0; 904 } 905 906 static int venus_get_queue_size(struct venus_hfi_device *hdev, 907 unsigned int index) 908 { 909 struct hfi_queue_header *qhdr; 910 911 if (index >= IFACEQ_NUM) 912 return -EINVAL; 913 914 qhdr = hdev->queues[index].qhdr; 915 if (!qhdr) 916 return -EINVAL; 917 918 return abs(qhdr->read_idx - qhdr->write_idx); 919 } 920 921 static int venus_sys_set_default_properties(struct venus_hfi_device *hdev) 922 { 923 struct device *dev = hdev->core->dev; 924 const struct venus_resources *res = hdev->core->res; 925 int ret; 926 927 ret = venus_sys_set_debug(hdev, venus_fw_debug); 928 if (ret) 929 dev_warn(dev, "setting fw debug msg ON failed (%d)\n", ret); 930 931 /* HFI_PROPERTY_SYS_IDLE_INDICATOR is not supported beyond 8916 (HFI V1) */ 932 if (IS_V1(hdev->core)) { 933 ret = venus_sys_set_idle_message(hdev, false); 934 if (ret) 935 dev_warn(dev, "setting idle response ON failed (%d)\n", ret); 936 } 937 938 ret = venus_sys_set_power_control(hdev, venus_fw_low_power_mode); 939 if (ret) 940 dev_warn(dev, "setting hw power collapse ON failed (%d)\n", 941 ret); 942 943 /* For specific venus core, it is mandatory to set the UBWC configuration */ 944 if (res->ubwc_conf) { 945 ret = venus_sys_set_ubwc_config(hdev); 946 if (ret) 947 dev_warn(dev, "setting ubwc config failed (%d)\n", ret); 948 } 949 950 return ret; 951 } 952 953 static int venus_session_cmd(struct venus_inst *inst, u32 pkt_type, bool sync) 954 { 955 struct venus_hfi_device *hdev = to_hfi_priv(inst->core); 956 struct hfi_session_pkt pkt; 957 958 pkt_session_cmd(&pkt, pkt_type, inst); 959 960 return venus_iface_cmdq_write(hdev, &pkt, sync); 961 } 962 963 static void venus_flush_debug_queue(struct venus_hfi_device *hdev) 964 { 965 struct device *dev = hdev->core->dev; 966 void *packet = hdev->dbg_buf; 967 968 while (!venus_iface_dbgq_read(hdev, packet)) { 969 struct hfi_msg_sys_coverage_pkt *pkt = packet; 970 971 if (pkt->hdr.pkt_type != HFI_MSG_SYS_COV) { 972 struct hfi_msg_sys_debug_pkt *pkt = packet; 973 974 dev_dbg(dev, VDBGFW "%s", pkt->msg_data); 975 } 976 } 977 } 978 979 static int venus_prepare_power_collapse(struct venus_hfi_device *hdev, 980 bool wait) 981 { 982 unsigned long timeout = msecs_to_jiffies(venus_hw_rsp_timeout); 983 struct hfi_sys_pc_prep_pkt pkt; 984 int ret; 985 986 init_completion(&hdev->pwr_collapse_prep); 987 988 pkt_sys_pc_prep(&pkt); 989 990 ret = venus_iface_cmdq_write(hdev, &pkt, false); 991 if (ret) 992 return ret; 993 994 if (!wait) 995 return 0; 996 997 ret = wait_for_completion_timeout(&hdev->pwr_collapse_prep, timeout); 998 if (!ret) { 999 venus_flush_debug_queue(hdev); 1000 return -ETIMEDOUT; 1001 } 1002 1003 return 0; 1004 } 1005 1006 static int venus_are_queues_empty(struct venus_hfi_device *hdev) 1007 { 1008 int ret1, ret2; 1009 1010 ret1 = venus_get_queue_size(hdev, IFACEQ_MSG_IDX); 1011 if (ret1 < 0) 1012 return ret1; 1013 1014 ret2 = venus_get_queue_size(hdev, IFACEQ_CMD_IDX); 1015 if (ret2 < 0) 1016 return ret2; 1017 1018 if (!ret1 && !ret2) 1019 return 1; 1020 1021 return 0; 1022 } 1023 1024 static void venus_sfr_print(struct venus_hfi_device *hdev) 1025 { 1026 struct device *dev = hdev->core->dev; 1027 struct hfi_sfr *sfr = hdev->sfr.kva; 1028 void *p; 1029 1030 if (!sfr) 1031 return; 1032 1033 p = memchr(sfr->data, '\0', sfr->buf_size); 1034 /* 1035 * SFR isn't guaranteed to be NULL terminated since SYS_ERROR indicates 1036 * that Venus is in the process of crashing. 1037 */ 1038 if (!p) 1039 sfr->data[sfr->buf_size - 1] = '\0'; 1040 1041 dev_err_ratelimited(dev, "SFR message from FW: %s\n", sfr->data); 1042 } 1043 1044 static void venus_process_msg_sys_error(struct venus_hfi_device *hdev, 1045 void *packet) 1046 { 1047 struct hfi_msg_event_notify_pkt *event_pkt = packet; 1048 1049 if (event_pkt->event_id != HFI_EVENT_SYS_ERROR) 1050 return; 1051 1052 venus_set_state(hdev, VENUS_STATE_DEINIT); 1053 1054 venus_sfr_print(hdev); 1055 } 1056 1057 static irqreturn_t venus_isr_thread(struct venus_core *core) 1058 { 1059 struct venus_hfi_device *hdev = to_hfi_priv(core); 1060 const struct venus_resources *res; 1061 void *pkt; 1062 u32 msg_ret; 1063 1064 if (!hdev) 1065 return IRQ_NONE; 1066 1067 res = hdev->core->res; 1068 pkt = hdev->pkt_buf; 1069 1070 1071 while (!venus_iface_msgq_read(hdev, pkt)) { 1072 msg_ret = hfi_process_msg_packet(core, pkt); 1073 switch (msg_ret) { 1074 case HFI_MSG_EVENT_NOTIFY: 1075 venus_process_msg_sys_error(hdev, pkt); 1076 break; 1077 case HFI_MSG_SYS_INIT: 1078 venus_hfi_core_set_resource(core, res->vmem_id, 1079 res->vmem_size, 1080 res->vmem_addr, 1081 hdev); 1082 break; 1083 case HFI_MSG_SYS_RELEASE_RESOURCE: 1084 complete(&hdev->release_resource); 1085 break; 1086 case HFI_MSG_SYS_PC_PREP: 1087 complete(&hdev->pwr_collapse_prep); 1088 break; 1089 default: 1090 break; 1091 } 1092 } 1093 1094 venus_flush_debug_queue(hdev); 1095 1096 return IRQ_HANDLED; 1097 } 1098 1099 static irqreturn_t venus_isr(struct venus_core *core) 1100 { 1101 struct venus_hfi_device *hdev = to_hfi_priv(core); 1102 u32 status; 1103 void __iomem *cpu_cs_base; 1104 void __iomem *wrapper_base; 1105 1106 if (!hdev) 1107 return IRQ_NONE; 1108 1109 cpu_cs_base = hdev->core->cpu_cs_base; 1110 wrapper_base = hdev->core->wrapper_base; 1111 1112 status = readl(wrapper_base + WRAPPER_INTR_STATUS); 1113 if (IS_IRIS2(core) || IS_IRIS2_1(core)) { 1114 if (status & WRAPPER_INTR_STATUS_A2H_MASK || 1115 status & WRAPPER_INTR_STATUS_A2HWD_MASK_V6 || 1116 status & CPU_CS_SCIACMDARG0_INIT_IDLE_MSG_MASK) 1117 hdev->irq_status = status; 1118 } else { 1119 if (status & WRAPPER_INTR_STATUS_A2H_MASK || 1120 status & WRAPPER_INTR_STATUS_A2HWD_MASK || 1121 status & CPU_CS_SCIACMDARG0_INIT_IDLE_MSG_MASK) 1122 hdev->irq_status = status; 1123 } 1124 writel(1, cpu_cs_base + CPU_CS_A2HSOFTINTCLR); 1125 if (!(IS_IRIS2(core) || IS_IRIS2_1(core))) 1126 writel(status, wrapper_base + WRAPPER_INTR_CLEAR); 1127 1128 return IRQ_WAKE_THREAD; 1129 } 1130 1131 static int venus_core_init(struct venus_core *core) 1132 { 1133 struct venus_hfi_device *hdev = to_hfi_priv(core); 1134 struct device *dev = core->dev; 1135 struct hfi_sys_get_property_pkt version_pkt; 1136 struct hfi_sys_init_pkt pkt; 1137 int ret; 1138 1139 pkt_sys_init(&pkt, HFI_VIDEO_ARCH_OX); 1140 1141 venus_set_state(hdev, VENUS_STATE_INIT); 1142 1143 ret = venus_iface_cmdq_write(hdev, &pkt, false); 1144 if (ret) 1145 return ret; 1146 1147 pkt_sys_image_version(&version_pkt); 1148 1149 ret = venus_iface_cmdq_write(hdev, &version_pkt, false); 1150 if (ret) 1151 dev_warn(dev, "failed to send image version pkt to fw\n"); 1152 1153 ret = venus_sys_set_default_properties(hdev); 1154 if (ret) 1155 return ret; 1156 1157 return 0; 1158 } 1159 1160 static int venus_core_deinit(struct venus_core *core) 1161 { 1162 struct venus_hfi_device *hdev = to_hfi_priv(core); 1163 1164 venus_set_state(hdev, VENUS_STATE_DEINIT); 1165 hdev->suspended = true; 1166 hdev->power_enabled = false; 1167 1168 return 0; 1169 } 1170 1171 static int venus_core_ping(struct venus_core *core, u32 cookie) 1172 { 1173 struct venus_hfi_device *hdev = to_hfi_priv(core); 1174 struct hfi_sys_ping_pkt pkt; 1175 1176 pkt_sys_ping(&pkt, cookie); 1177 1178 return venus_iface_cmdq_write(hdev, &pkt, false); 1179 } 1180 1181 static int venus_core_trigger_ssr(struct venus_core *core, u32 trigger_type) 1182 { 1183 struct venus_hfi_device *hdev = to_hfi_priv(core); 1184 struct hfi_sys_test_ssr_pkt pkt; 1185 int ret; 1186 1187 ret = pkt_sys_ssr_cmd(&pkt, trigger_type); 1188 if (ret) 1189 return ret; 1190 1191 return venus_iface_cmdq_write(hdev, &pkt, false); 1192 } 1193 1194 static int venus_session_init(struct venus_inst *inst, u32 session_type, 1195 u32 codec) 1196 { 1197 struct venus_hfi_device *hdev = to_hfi_priv(inst->core); 1198 struct hfi_session_init_pkt pkt; 1199 int ret; 1200 1201 ret = venus_sys_set_debug(hdev, venus_fw_debug); 1202 if (ret) 1203 goto err; 1204 1205 ret = pkt_session_init(&pkt, inst, session_type, codec); 1206 if (ret) 1207 goto err; 1208 1209 ret = venus_iface_cmdq_write(hdev, &pkt, true); 1210 if (ret) 1211 goto err; 1212 1213 return 0; 1214 1215 err: 1216 venus_flush_debug_queue(hdev); 1217 return ret; 1218 } 1219 1220 static int venus_session_end(struct venus_inst *inst) 1221 { 1222 struct venus_hfi_device *hdev = to_hfi_priv(inst->core); 1223 struct device *dev = hdev->core->dev; 1224 1225 if (venus_fw_coverage) { 1226 if (venus_sys_set_coverage(hdev, venus_fw_coverage)) 1227 dev_warn(dev, "fw coverage msg ON failed\n"); 1228 } 1229 1230 return venus_session_cmd(inst, HFI_CMD_SYS_SESSION_END, true); 1231 } 1232 1233 static int venus_session_abort(struct venus_inst *inst) 1234 { 1235 struct venus_hfi_device *hdev = to_hfi_priv(inst->core); 1236 1237 venus_flush_debug_queue(hdev); 1238 1239 return venus_session_cmd(inst, HFI_CMD_SYS_SESSION_ABORT, true); 1240 } 1241 1242 static int venus_session_flush(struct venus_inst *inst, u32 flush_mode) 1243 { 1244 struct venus_hfi_device *hdev = to_hfi_priv(inst->core); 1245 struct hfi_session_flush_pkt pkt; 1246 int ret; 1247 1248 ret = pkt_session_flush(&pkt, inst, flush_mode); 1249 if (ret) 1250 return ret; 1251 1252 return venus_iface_cmdq_write(hdev, &pkt, true); 1253 } 1254 1255 static int venus_session_start(struct venus_inst *inst) 1256 { 1257 return venus_session_cmd(inst, HFI_CMD_SESSION_START, true); 1258 } 1259 1260 static int venus_session_stop(struct venus_inst *inst) 1261 { 1262 return venus_session_cmd(inst, HFI_CMD_SESSION_STOP, true); 1263 } 1264 1265 static int venus_session_continue(struct venus_inst *inst) 1266 { 1267 return venus_session_cmd(inst, HFI_CMD_SESSION_CONTINUE, false); 1268 } 1269 1270 static int venus_session_etb(struct venus_inst *inst, 1271 struct hfi_frame_data *in_frame) 1272 { 1273 struct venus_hfi_device *hdev = to_hfi_priv(inst->core); 1274 u32 session_type = inst->session_type; 1275 int ret; 1276 1277 if (session_type == VIDC_SESSION_TYPE_DEC) { 1278 struct hfi_session_empty_buffer_compressed_pkt pkt; 1279 1280 ret = pkt_session_etb_decoder(&pkt, inst, in_frame); 1281 if (ret) 1282 return ret; 1283 1284 ret = venus_iface_cmdq_write(hdev, &pkt, false); 1285 } else if (session_type == VIDC_SESSION_TYPE_ENC) { 1286 struct hfi_session_empty_buffer_uncompressed_plane0_pkt pkt; 1287 1288 ret = pkt_session_etb_encoder(&pkt, inst, in_frame); 1289 if (ret) 1290 return ret; 1291 1292 ret = venus_iface_cmdq_write(hdev, &pkt, false); 1293 } else { 1294 ret = -EINVAL; 1295 } 1296 1297 return ret; 1298 } 1299 1300 static int venus_session_ftb(struct venus_inst *inst, 1301 struct hfi_frame_data *out_frame) 1302 { 1303 struct venus_hfi_device *hdev = to_hfi_priv(inst->core); 1304 struct hfi_session_fill_buffer_pkt pkt; 1305 int ret; 1306 1307 ret = pkt_session_ftb(&pkt, inst, out_frame); 1308 if (ret) 1309 return ret; 1310 1311 return venus_iface_cmdq_write(hdev, &pkt, false); 1312 } 1313 1314 static int venus_session_set_buffers(struct venus_inst *inst, 1315 struct hfi_buffer_desc *bd) 1316 { 1317 struct venus_hfi_device *hdev = to_hfi_priv(inst->core); 1318 struct hfi_session_set_buffers_pkt *pkt; 1319 u8 packet[IFACEQ_VAR_LARGE_PKT_SIZE]; 1320 int ret; 1321 1322 if (bd->buffer_type == HFI_BUFFER_INPUT) 1323 return 0; 1324 1325 pkt = (struct hfi_session_set_buffers_pkt *)packet; 1326 1327 ret = pkt_session_set_buffers(pkt, inst, bd); 1328 if (ret) 1329 return ret; 1330 1331 return venus_iface_cmdq_write(hdev, pkt, false); 1332 } 1333 1334 static int venus_session_unset_buffers(struct venus_inst *inst, 1335 struct hfi_buffer_desc *bd) 1336 { 1337 struct venus_hfi_device *hdev = to_hfi_priv(inst->core); 1338 struct hfi_session_release_buffer_pkt *pkt; 1339 u8 packet[IFACEQ_VAR_LARGE_PKT_SIZE]; 1340 int ret; 1341 1342 if (bd->buffer_type == HFI_BUFFER_INPUT) 1343 return 0; 1344 1345 pkt = (struct hfi_session_release_buffer_pkt *)packet; 1346 1347 ret = pkt_session_unset_buffers(pkt, inst, bd); 1348 if (ret) 1349 return ret; 1350 1351 return venus_iface_cmdq_write(hdev, pkt, true); 1352 } 1353 1354 static int venus_session_load_res(struct venus_inst *inst) 1355 { 1356 return venus_session_cmd(inst, HFI_CMD_SESSION_LOAD_RESOURCES, true); 1357 } 1358 1359 static int venus_session_release_res(struct venus_inst *inst) 1360 { 1361 return venus_session_cmd(inst, HFI_CMD_SESSION_RELEASE_RESOURCES, true); 1362 } 1363 1364 static int venus_session_parse_seq_hdr(struct venus_inst *inst, u32 seq_hdr, 1365 u32 seq_hdr_len) 1366 { 1367 struct venus_hfi_device *hdev = to_hfi_priv(inst->core); 1368 struct hfi_session_parse_sequence_header_pkt *pkt; 1369 u8 packet[IFACEQ_VAR_SMALL_PKT_SIZE]; 1370 int ret; 1371 1372 pkt = (struct hfi_session_parse_sequence_header_pkt *)packet; 1373 1374 ret = pkt_session_parse_seq_header(pkt, inst, seq_hdr, seq_hdr_len); 1375 if (ret) 1376 return ret; 1377 1378 ret = venus_iface_cmdq_write(hdev, pkt, false); 1379 if (ret) 1380 return ret; 1381 1382 return 0; 1383 } 1384 1385 static int venus_session_get_seq_hdr(struct venus_inst *inst, u32 seq_hdr, 1386 u32 seq_hdr_len) 1387 { 1388 struct venus_hfi_device *hdev = to_hfi_priv(inst->core); 1389 struct hfi_session_get_sequence_header_pkt *pkt; 1390 u8 packet[IFACEQ_VAR_SMALL_PKT_SIZE]; 1391 int ret; 1392 1393 pkt = (struct hfi_session_get_sequence_header_pkt *)packet; 1394 1395 ret = pkt_session_get_seq_hdr(pkt, inst, seq_hdr, seq_hdr_len); 1396 if (ret) 1397 return ret; 1398 1399 return venus_iface_cmdq_write(hdev, pkt, false); 1400 } 1401 1402 static int venus_session_set_property(struct venus_inst *inst, u32 ptype, 1403 void *pdata) 1404 { 1405 struct venus_hfi_device *hdev = to_hfi_priv(inst->core); 1406 struct hfi_session_set_property_pkt *pkt; 1407 u8 packet[IFACEQ_VAR_LARGE_PKT_SIZE]; 1408 int ret; 1409 1410 pkt = (struct hfi_session_set_property_pkt *)packet; 1411 1412 ret = pkt_session_set_property(pkt, inst, ptype, pdata); 1413 if (ret == -ENOTSUPP) 1414 return 0; 1415 if (ret) 1416 return ret; 1417 1418 return venus_iface_cmdq_write(hdev, pkt, false); 1419 } 1420 1421 static int venus_session_get_property(struct venus_inst *inst, u32 ptype) 1422 { 1423 struct venus_hfi_device *hdev = to_hfi_priv(inst->core); 1424 struct hfi_session_get_property_pkt pkt; 1425 int ret; 1426 1427 ret = pkt_session_get_property(&pkt, inst, ptype); 1428 if (ret) 1429 return ret; 1430 1431 return venus_iface_cmdq_write(hdev, &pkt, true); 1432 } 1433 1434 static int venus_resume(struct venus_core *core) 1435 { 1436 struct venus_hfi_device *hdev = to_hfi_priv(core); 1437 int ret = 0; 1438 1439 mutex_lock(&hdev->lock); 1440 1441 if (!hdev->suspended) 1442 goto unlock; 1443 1444 ret = venus_power_on(hdev); 1445 1446 unlock: 1447 if (!ret) 1448 hdev->suspended = false; 1449 1450 mutex_unlock(&hdev->lock); 1451 1452 return ret; 1453 } 1454 1455 static int venus_suspend_1xx(struct venus_core *core) 1456 { 1457 struct venus_hfi_device *hdev = to_hfi_priv(core); 1458 struct device *dev = core->dev; 1459 void __iomem *cpu_cs_base = hdev->core->cpu_cs_base; 1460 u32 ctrl_status; 1461 int ret; 1462 1463 if (!hdev->power_enabled || hdev->suspended) 1464 return 0; 1465 1466 mutex_lock(&hdev->lock); 1467 ret = venus_is_valid_state(hdev); 1468 mutex_unlock(&hdev->lock); 1469 1470 if (!ret) { 1471 dev_err(dev, "bad state, cannot suspend\n"); 1472 return -EINVAL; 1473 } 1474 1475 ret = venus_prepare_power_collapse(hdev, true); 1476 if (ret) { 1477 dev_err(dev, "prepare for power collapse fail (%d)\n", ret); 1478 return ret; 1479 } 1480 1481 mutex_lock(&hdev->lock); 1482 1483 if (hdev->last_packet_type != HFI_CMD_SYS_PC_PREP) { 1484 mutex_unlock(&hdev->lock); 1485 return -EINVAL; 1486 } 1487 1488 ret = venus_are_queues_empty(hdev); 1489 if (ret < 0 || !ret) { 1490 mutex_unlock(&hdev->lock); 1491 return -EINVAL; 1492 } 1493 1494 ctrl_status = readl(cpu_cs_base + CPU_CS_SCIACMDARG0); 1495 if (!(ctrl_status & CPU_CS_SCIACMDARG0_PC_READY)) { 1496 mutex_unlock(&hdev->lock); 1497 return -EINVAL; 1498 } 1499 1500 ret = venus_power_off(hdev); 1501 if (ret) { 1502 mutex_unlock(&hdev->lock); 1503 return ret; 1504 } 1505 1506 hdev->suspended = true; 1507 1508 mutex_unlock(&hdev->lock); 1509 1510 return 0; 1511 } 1512 1513 static bool venus_cpu_and_video_core_idle(struct venus_hfi_device *hdev) 1514 { 1515 void __iomem *wrapper_base = hdev->core->wrapper_base; 1516 void __iomem *wrapper_tz_base = hdev->core->wrapper_tz_base; 1517 void __iomem *cpu_cs_base = hdev->core->cpu_cs_base; 1518 u32 ctrl_status, cpu_status; 1519 1520 if (IS_IRIS2(hdev->core) || IS_IRIS2_1(hdev->core)) 1521 cpu_status = readl(wrapper_tz_base + WRAPPER_TZ_CPU_STATUS_V6); 1522 else 1523 cpu_status = readl(wrapper_base + WRAPPER_CPU_STATUS); 1524 ctrl_status = readl(cpu_cs_base + CPU_CS_SCIACMDARG0); 1525 1526 if (cpu_status & WRAPPER_CPU_STATUS_WFI && 1527 ctrl_status & CPU_CS_SCIACMDARG0_INIT_IDLE_MSG_MASK) 1528 return true; 1529 1530 return false; 1531 } 1532 1533 static bool venus_cpu_idle_and_pc_ready(struct venus_hfi_device *hdev) 1534 { 1535 void __iomem *wrapper_base = hdev->core->wrapper_base; 1536 void __iomem *wrapper_tz_base = hdev->core->wrapper_tz_base; 1537 void __iomem *cpu_cs_base = hdev->core->cpu_cs_base; 1538 u32 ctrl_status, cpu_status; 1539 1540 if (IS_IRIS2(hdev->core) || IS_IRIS2_1(hdev->core)) 1541 cpu_status = readl(wrapper_tz_base + WRAPPER_TZ_CPU_STATUS_V6); 1542 else 1543 cpu_status = readl(wrapper_base + WRAPPER_CPU_STATUS); 1544 ctrl_status = readl(cpu_cs_base + CPU_CS_SCIACMDARG0); 1545 1546 if (cpu_status & WRAPPER_CPU_STATUS_WFI && 1547 ctrl_status & CPU_CS_SCIACMDARG0_PC_READY) 1548 return true; 1549 1550 return false; 1551 } 1552 1553 static int venus_suspend_3xx(struct venus_core *core) 1554 { 1555 struct venus_hfi_device *hdev = to_hfi_priv(core); 1556 struct device *dev = core->dev; 1557 void __iomem *cpu_cs_base = hdev->core->cpu_cs_base; 1558 u32 ctrl_status; 1559 bool val; 1560 int ret; 1561 1562 if (!hdev->power_enabled || hdev->suspended) 1563 return 0; 1564 1565 mutex_lock(&hdev->lock); 1566 ret = venus_is_valid_state(hdev); 1567 mutex_unlock(&hdev->lock); 1568 1569 if (!ret) { 1570 dev_err(dev, "bad state, cannot suspend\n"); 1571 return -EINVAL; 1572 } 1573 1574 ctrl_status = readl(cpu_cs_base + CPU_CS_SCIACMDARG0); 1575 if (ctrl_status & CPU_CS_SCIACMDARG0_PC_READY) 1576 goto power_off; 1577 1578 /* 1579 * Power collapse sequence for Venus 3xx and 4xx versions: 1580 * 1. Check for ARM9 and video core to be idle by checking WFI bit 1581 * (bit 0) in CPU status register and by checking Idle (bit 30) in 1582 * Control status register for video core. 1583 * 2. Send a command to prepare for power collapse. 1584 * 3. Check for WFI and PC_READY bits. 1585 */ 1586 ret = readx_poll_timeout(venus_cpu_and_video_core_idle, hdev, val, val, 1587 1500, 100 * 1500); 1588 if (ret) { 1589 dev_err(dev, "wait for cpu and video core idle fail (%d)\n", ret); 1590 return ret; 1591 } 1592 1593 ret = venus_prepare_power_collapse(hdev, false); 1594 if (ret) { 1595 dev_err(dev, "prepare for power collapse fail (%d)\n", ret); 1596 return ret; 1597 } 1598 1599 ret = readx_poll_timeout(venus_cpu_idle_and_pc_ready, hdev, val, val, 1600 1500, 100 * 1500); 1601 if (ret) 1602 return ret; 1603 1604 power_off: 1605 mutex_lock(&hdev->lock); 1606 1607 ret = venus_power_off(hdev); 1608 if (ret) { 1609 dev_err(dev, "venus_power_off (%d)\n", ret); 1610 mutex_unlock(&hdev->lock); 1611 return ret; 1612 } 1613 1614 hdev->suspended = true; 1615 1616 mutex_unlock(&hdev->lock); 1617 1618 return 0; 1619 } 1620 1621 static int venus_suspend(struct venus_core *core) 1622 { 1623 if (IS_V3(core) || IS_V4(core) || IS_V6(core)) 1624 return venus_suspend_3xx(core); 1625 1626 return venus_suspend_1xx(core); 1627 } 1628 1629 static const struct hfi_ops venus_hfi_ops = { 1630 .core_init = venus_core_init, 1631 .core_deinit = venus_core_deinit, 1632 .core_ping = venus_core_ping, 1633 .core_trigger_ssr = venus_core_trigger_ssr, 1634 1635 .session_init = venus_session_init, 1636 .session_end = venus_session_end, 1637 .session_abort = venus_session_abort, 1638 .session_flush = venus_session_flush, 1639 .session_start = venus_session_start, 1640 .session_stop = venus_session_stop, 1641 .session_continue = venus_session_continue, 1642 .session_etb = venus_session_etb, 1643 .session_ftb = venus_session_ftb, 1644 .session_set_buffers = venus_session_set_buffers, 1645 .session_unset_buffers = venus_session_unset_buffers, 1646 .session_load_res = venus_session_load_res, 1647 .session_release_res = venus_session_release_res, 1648 .session_parse_seq_hdr = venus_session_parse_seq_hdr, 1649 .session_get_seq_hdr = venus_session_get_seq_hdr, 1650 .session_set_property = venus_session_set_property, 1651 .session_get_property = venus_session_get_property, 1652 1653 .resume = venus_resume, 1654 .suspend = venus_suspend, 1655 1656 .isr = venus_isr, 1657 .isr_thread = venus_isr_thread, 1658 }; 1659 1660 void venus_hfi_destroy(struct venus_core *core) 1661 { 1662 struct venus_hfi_device *hdev = to_hfi_priv(core); 1663 1664 core->priv = NULL; 1665 venus_interface_queues_release(hdev); 1666 mutex_destroy(&hdev->lock); 1667 kfree(hdev); 1668 core->ops = NULL; 1669 } 1670 1671 int venus_hfi_create(struct venus_core *core) 1672 { 1673 struct venus_hfi_device *hdev; 1674 int ret; 1675 1676 hdev = kzalloc(sizeof(*hdev), GFP_KERNEL); 1677 if (!hdev) 1678 return -ENOMEM; 1679 1680 mutex_init(&hdev->lock); 1681 1682 hdev->core = core; 1683 hdev->suspended = true; 1684 core->priv = hdev; 1685 core->ops = &venus_hfi_ops; 1686 1687 ret = venus_interface_queues_init(hdev); 1688 if (ret) 1689 goto err_kfree; 1690 1691 return 0; 1692 1693 err_kfree: 1694 kfree(hdev); 1695 core->priv = NULL; 1696 core->ops = NULL; 1697 return ret; 1698 } 1699 1700 void venus_hfi_queues_reinit(struct venus_core *core) 1701 { 1702 struct venus_hfi_device *hdev = to_hfi_priv(core); 1703 struct hfi_queue_table_header *tbl_hdr; 1704 struct iface_queue *queue; 1705 struct hfi_sfr *sfr; 1706 unsigned int i; 1707 1708 mutex_lock(&hdev->lock); 1709 1710 for (i = 0; i < IFACEQ_NUM; i++) { 1711 queue = &hdev->queues[i]; 1712 queue->qhdr = 1713 IFACEQ_GET_QHDR_START_ADDR(hdev->ifaceq_table.kva, i); 1714 1715 venus_set_qhdr_defaults(queue->qhdr); 1716 1717 queue->qhdr->start_addr = queue->qmem.da; 1718 1719 if (i == IFACEQ_CMD_IDX) 1720 queue->qhdr->type |= HFI_HOST_TO_CTRL_CMD_Q; 1721 else if (i == IFACEQ_MSG_IDX) 1722 queue->qhdr->type |= HFI_CTRL_TO_HOST_MSG_Q; 1723 else if (i == IFACEQ_DBG_IDX) 1724 queue->qhdr->type |= HFI_CTRL_TO_HOST_DBG_Q; 1725 } 1726 1727 tbl_hdr = hdev->ifaceq_table.kva; 1728 tbl_hdr->version = 0; 1729 tbl_hdr->size = IFACEQ_TABLE_SIZE; 1730 tbl_hdr->qhdr0_offset = sizeof(struct hfi_queue_table_header); 1731 tbl_hdr->qhdr_size = sizeof(struct hfi_queue_header); 1732 tbl_hdr->num_q = IFACEQ_NUM; 1733 tbl_hdr->num_active_q = IFACEQ_NUM; 1734 1735 /* 1736 * Set receive request to zero on debug queue as there is no 1737 * need of interrupt from video hardware for debug messages 1738 */ 1739 queue = &hdev->queues[IFACEQ_DBG_IDX]; 1740 queue->qhdr->rx_req = 0; 1741 1742 sfr = hdev->sfr.kva; 1743 sfr->buf_size = ALIGNED_SFR_SIZE; 1744 1745 /* ensure table and queue header structs are settled in memory */ 1746 wmb(); 1747 1748 mutex_unlock(&hdev->lock); 1749 } 1750