1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (c) 2012-2016, The Linux Foundation. All rights reserved.
4  * Copyright (C) 2017 Linaro Ltd.
5  */
6 #ifndef __VENUS_HFI_HELPER_H__
7 #define __VENUS_HFI_HELPER_H__
8 
9 #define HFI_DOMAIN_BASE_COMMON				0
10 
11 #define HFI_DOMAIN_BASE_VDEC				0x1000000
12 #define HFI_DOMAIN_BASE_VENC				0x2000000
13 #define HFI_DOMAIN_BASE_VPE				0x3000000
14 
15 #define HFI_VIDEO_ARCH_OX				0x1
16 
17 #define HFI_ARCH_COMMON_OFFSET				0
18 #define HFI_ARCH_OX_OFFSET				0x200000
19 
20 #define HFI_OX_BASE					0x1000000
21 
22 #define HFI_CMD_START_OFFSET				0x10000
23 #define HFI_MSG_START_OFFSET				0x20000
24 
25 #define HFI_ERR_NONE					0x0
26 #define HFI_ERR_SYS_FATAL				0x1
27 #define HFI_ERR_SYS_INVALID_PARAMETER			0x2
28 #define HFI_ERR_SYS_VERSION_MISMATCH			0x3
29 #define HFI_ERR_SYS_INSUFFICIENT_RESOURCES		0x4
30 #define HFI_ERR_SYS_MAX_SESSIONS_REACHED		0x5
31 #define HFI_ERR_SYS_UNSUPPORTED_CODEC			0x6
32 #define HFI_ERR_SYS_SESSION_IN_USE			0x7
33 #define HFI_ERR_SYS_SESSION_ID_OUT_OF_RANGE		0x8
34 #define HFI_ERR_SYS_UNSUPPORTED_DOMAIN			0x9
35 
36 #define HFI_ERR_SESSION_FATAL				0x1001
37 #define HFI_ERR_SESSION_INVALID_PARAMETER		0x1002
38 #define HFI_ERR_SESSION_BAD_POINTER			0x1003
39 #define HFI_ERR_SESSION_INVALID_SESSION_ID		0x1004
40 #define HFI_ERR_SESSION_INVALID_STREAM_ID		0x1005
41 #define HFI_ERR_SESSION_INCORRECT_STATE_OPERATION	0x1006
42 #define HFI_ERR_SESSION_UNSUPPORTED_PROPERTY		0x1007
43 #define HFI_ERR_SESSION_UNSUPPORTED_SETTING		0x1008
44 #define HFI_ERR_SESSION_INSUFFICIENT_RESOURCES		0x1009
45 #define HFI_ERR_SESSION_STREAM_CORRUPT_OUTPUT_STALLED	0x100a
46 #define HFI_ERR_SESSION_STREAM_CORRUPT			0x100b
47 #define HFI_ERR_SESSION_ENC_OVERFLOW			0x100c
48 #define HFI_ERR_SESSION_UNSUPPORTED_STREAM		0x100d
49 #define HFI_ERR_SESSION_CMDSIZE				0x100e
50 #define HFI_ERR_SESSION_UNSUPPORT_CMD			0x100f
51 #define HFI_ERR_SESSION_UNSUPPORT_BUFFERTYPE		0x1010
52 #define HFI_ERR_SESSION_BUFFERCOUNT_TOOSMALL		0x1011
53 #define HFI_ERR_SESSION_INVALID_SCALE_FACTOR		0x1012
54 #define HFI_ERR_SESSION_UPSCALE_NOT_SUPPORTED		0x1013
55 
56 #define HFI_EVENT_SYS_ERROR				0x1
57 #define HFI_EVENT_SESSION_ERROR				0x2
58 
59 #define HFI_EVENT_DATA_SEQUENCE_CHANGED_SUFFICIENT_BUF_RESOURCES   0x1000001
60 #define HFI_EVENT_DATA_SEQUENCE_CHANGED_INSUFFICIENT_BUF_RESOURCES 0x1000002
61 #define HFI_EVENT_SESSION_SEQUENCE_CHANGED			   0x1000003
62 #define HFI_EVENT_SESSION_PROPERTY_CHANGED			   0x1000004
63 #define HFI_EVENT_SESSION_LTRUSE_FAILED				   0x1000005
64 #define HFI_EVENT_RELEASE_BUFFER_REFERENCE			   0x1000006
65 
66 #define HFI_BUFFERFLAG_EOS				0x00000001
67 #define HFI_BUFFERFLAG_STARTTIME			0x00000002
68 #define HFI_BUFFERFLAG_DECODEONLY			0x00000004
69 #define HFI_BUFFERFLAG_DATACORRUPT			0x00000008
70 #define HFI_BUFFERFLAG_ENDOFFRAME			0x00000010
71 #define HFI_BUFFERFLAG_SYNCFRAME			0x00000020
72 #define HFI_BUFFERFLAG_EXTRADATA			0x00000040
73 #define HFI_BUFFERFLAG_CODECCONFIG			0x00000080
74 #define HFI_BUFFERFLAG_TIMESTAMPINVALID			0x00000100
75 #define HFI_BUFFERFLAG_READONLY				0x00000200
76 #define HFI_BUFFERFLAG_ENDOFSUBFRAME			0x00000400
77 #define HFI_BUFFERFLAG_EOSEQ				0x00200000
78 #define HFI_BUFFERFLAG_MBAFF				0x08000000
79 #define HFI_BUFFERFLAG_VPE_YUV_601_709_CSC_CLAMP	0x10000000
80 #define HFI_BUFFERFLAG_DROP_FRAME			0x20000000
81 #define HFI_BUFFERFLAG_TEI				0x40000000
82 #define HFI_BUFFERFLAG_DISCONTINUITY			0x80000000
83 
84 #define HFI_ERR_SESSION_EMPTY_BUFFER_DONE_OUTPUT_PENDING	0x1001001
85 #define HFI_ERR_SESSION_SAME_STATE_OPERATION			0x1001002
86 #define HFI_ERR_SESSION_SYNC_FRAME_NOT_DETECTED			0x1001003
87 #define HFI_ERR_SESSION_START_CODE_NOT_FOUND			0x1001004
88 
89 #define HFI_FLUSH_INPUT					0x1000001
90 #define HFI_FLUSH_OUTPUT				0x1000002
91 #define HFI_FLUSH_OUTPUT2				0x1000003
92 #define HFI_FLUSH_ALL					0x1000004
93 
94 #define HFI_EXTRADATA_NONE				0x00000000
95 #define HFI_EXTRADATA_MB_QUANTIZATION			0x00000001
96 #define HFI_EXTRADATA_INTERLACE_VIDEO			0x00000002
97 #define HFI_EXTRADATA_VC1_FRAMEDISP			0x00000003
98 #define HFI_EXTRADATA_VC1_SEQDISP			0x00000004
99 #define HFI_EXTRADATA_TIMESTAMP				0x00000005
100 #define HFI_EXTRADATA_S3D_FRAME_PACKING			0x00000006
101 #define HFI_EXTRADATA_FRAME_RATE			0x00000007
102 #define HFI_EXTRADATA_PANSCAN_WINDOW			0x00000008
103 #define HFI_EXTRADATA_RECOVERY_POINT_SEI		0x00000009
104 #define HFI_EXTRADATA_MPEG2_SEQDISP			0x0000000d
105 #define HFI_EXTRADATA_STREAM_USERDATA			0x0000000e
106 #define HFI_EXTRADATA_FRAME_QP				0x0000000f
107 #define HFI_EXTRADATA_FRAME_BITS_INFO			0x00000010
108 #define HFI_EXTRADATA_MULTISLICE_INFO			0x7f100000
109 #define HFI_EXTRADATA_NUM_CONCEALED_MB			0x7f100001
110 #define HFI_EXTRADATA_INDEX				0x7f100002
111 #define HFI_EXTRADATA_METADATA_LTR			0x7f100004
112 #define HFI_EXTRADATA_METADATA_FILLER			0x7fe00002
113 
114 #define HFI_INDEX_EXTRADATA_INPUT_CROP			0x0700000e
115 #define HFI_INDEX_EXTRADATA_OUTPUT_CROP			0x0700000f
116 #define HFI_INDEX_EXTRADATA_DIGITAL_ZOOM		0x07000010
117 #define HFI_INDEX_EXTRADATA_ASPECT_RATIO		0x7f100003
118 
119 #define HFI_INTERLACE_FRAME_PROGRESSIVE			0x01
120 #define HFI_INTERLACE_INTERLEAVE_FRAME_TOPFIELDFIRST	0x02
121 #define HFI_INTERLACE_INTERLEAVE_FRAME_BOTTOMFIELDFIRST	0x04
122 #define HFI_INTERLACE_FRAME_TOPFIELDFIRST		0x08
123 #define HFI_INTERLACE_FRAME_BOTTOMFIELDFIRST		0x10
124 
125 /*
126  * HFI_PROPERTY_PARAM_OX_START
127  * HFI_DOMAIN_BASE_COMMON + HFI_ARCH_OX_OFFSET + 0x1000
128  */
129 #define HFI_PROPERTY_PARAM_BUFFER_COUNT_ACTUAL				0x201001
130 #define HFI_PROPERTY_PARAM_UNCOMPRESSED_PLANE_ACTUAL_CONSTRAINTS_INFO	0x201002
131 #define HFI_PROPERTY_PARAM_INTERLACE_FORMAT_SUPPORTED			0x201003
132 #define HFI_PROPERTY_PARAM_CHROMA_SITE					0x201004
133 #define HFI_PROPERTY_PARAM_EXTRA_DATA_HEADER_CONFIG			0x201005
134 #define HFI_PROPERTY_PARAM_INDEX_EXTRADATA				0x201006
135 #define HFI_PROPERTY_PARAM_DIVX_FORMAT					0x201007
136 #define HFI_PROPERTY_PARAM_BUFFER_ALLOC_MODE				0x201008
137 #define HFI_PROPERTY_PARAM_S3D_FRAME_PACKING_EXTRADATA			0x201009
138 #define HFI_PROPERTY_PARAM_ERR_DETECTION_CODE_EXTRADATA			0x20100a
139 #define HFI_PROPERTY_PARAM_BUFFER_ALLOC_MODE_SUPPORTED			0x20100b
140 #define HFI_PROPERTY_PARAM_BUFFER_SIZE_ACTUAL				0x20100c
141 #define HFI_PROPERTY_PARAM_BUFFER_DISPLAY_HOLD_COUNT_ACTUAL		0x20100d
142 
143 /*
144  * HFI_PROPERTY_CONFIG_OX_START
145  * HFI_DOMAIN_BASE_COMMON + HFI_ARCH_OX_OFFSET + 0x2000
146  */
147 #define HFI_PROPERTY_CONFIG_BUFFER_REQUIREMENTS		0x202001
148 #define HFI_PROPERTY_CONFIG_REALTIME			0x202002
149 #define HFI_PROPERTY_CONFIG_PRIORITY			0x202003
150 #define HFI_PROPERTY_CONFIG_BATCH_INFO			0x202004
151 
152 /*
153  * HFI_PROPERTY_PARAM_VDEC_OX_START	\
154  * HFI_DOMAIN_BASE_VDEC + HFI_ARCH_OX_OFFSET + 0x3000
155  */
156 #define HFI_PROPERTY_PARAM_VDEC_CONTINUE_DATA_TRANSFER		0x1203001
157 #define HFI_PROPERTY_PARAM_VDEC_DISPLAY_PICTURE_BUFFER_COUNT	0x1203002
158 #define HFI_PROPERTY_PARAM_VDEC_MULTI_VIEW_SELECT		0x1203003
159 #define HFI_PROPERTY_PARAM_VDEC_PICTURE_TYPE_DECODE		0x1203004
160 #define HFI_PROPERTY_PARAM_VDEC_OUTPUT_ORDER			0x1203005
161 #define HFI_PROPERTY_PARAM_VDEC_MB_QUANTIZATION			0x1203006
162 #define HFI_PROPERTY_PARAM_VDEC_NUM_CONCEALED_MB		0x1203007
163 #define HFI_PROPERTY_PARAM_VDEC_H264_ENTROPY_SWITCHING		0x1203008
164 #define HFI_PROPERTY_PARAM_VDEC_OUTPUT2_KEEP_ASPECT_RATIO	0x1203009
165 #define HFI_PROPERTY_PARAM_VDEC_FRAME_RATE_EXTRADATA		0x120300a
166 #define HFI_PROPERTY_PARAM_VDEC_PANSCAN_WNDW_EXTRADATA		0x120300b
167 #define HFI_PROPERTY_PARAM_VDEC_RECOVERY_POINT_SEI_EXTRADATA	0x120300c
168 #define HFI_PROPERTY_PARAM_VDEC_THUMBNAIL_MODE			0x120300d
169 #define HFI_PROPERTY_PARAM_VDEC_FRAME_ASSEMBLY			0x120300e
170 #define HFI_PROPERTY_PARAM_VDEC_DPB_COUNTS				0x120300e
171 #define HFI_PROPERTY_PARAM_VDEC_VC1_FRAMEDISP_EXTRADATA		0x1203011
172 #define HFI_PROPERTY_PARAM_VDEC_VC1_SEQDISP_EXTRADATA		0x1203012
173 #define HFI_PROPERTY_PARAM_VDEC_TIMESTAMP_EXTRADATA		0x1203013
174 #define HFI_PROPERTY_PARAM_VDEC_INTERLACE_VIDEO_EXTRADATA	0x1203014
175 #define HFI_PROPERTY_PARAM_VDEC_AVC_SESSION_SELECT		0x1203015
176 #define HFI_PROPERTY_PARAM_VDEC_MPEG2_SEQDISP_EXTRADATA		0x1203016
177 #define HFI_PROPERTY_PARAM_VDEC_STREAM_USERDATA_EXTRADATA	0x1203017
178 #define HFI_PROPERTY_PARAM_VDEC_FRAME_QP_EXTRADATA		0x1203018
179 #define HFI_PROPERTY_PARAM_VDEC_FRAME_BITS_INFO_EXTRADATA	0x1203019
180 #define HFI_PROPERTY_PARAM_VDEC_SCS_THRESHOLD			0x120301a
181 
182 /*
183  * HFI_PROPERTY_CONFIG_VDEC_OX_START
184  * HFI_DOMAIN_BASE_VDEC + HFI_ARCH_OX_OFFSET + 0x0000
185  */
186 #define HFI_PROPERTY_CONFIG_VDEC_POST_LOOP_DEBLOCKER		0x1200001
187 #define HFI_PROPERTY_CONFIG_VDEC_MB_ERROR_MAP_REPORTING		0x1200002
188 #define HFI_PROPERTY_CONFIG_VDEC_MB_ERROR_MAP			0x1200003
189 
190 #define HFI_PROPERTY_CONFIG_VDEC_ENTROPY			0x1204004
191 
192 /*
193  * HFI_PROPERTY_PARAM_VENC_OX_START
194  * HFI_DOMAIN_BASE_VENC + HFI_ARCH_OX_OFFSET + 0x5000
195  */
196 #define  HFI_PROPERTY_PARAM_VENC_MULTI_SLICE_INFO		0x2205001
197 #define  HFI_PROPERTY_PARAM_VENC_H264_IDR_S3D_FRAME_PACKING_NAL	0x2205002
198 #define  HFI_PROPERTY_PARAM_VENC_LTR_INFO			0x2205003
199 #define  HFI_PROPERTY_PARAM_VENC_MBI_DUMPING			0x2205005
200 
201 /*
202  * HFI_PROPERTY_CONFIG_VENC_OX_START
203  * HFI_DOMAIN_BASE_VENC + HFI_ARCH_OX_OFFSET + 0x6000
204  */
205 #define HFI_PROPERTY_CONFIG_VENC_FRAME_QP			0x2206001
206 
207 /*
208  * HFI_PROPERTY_PARAM_VPE_OX_START
209  * HFI_DOMAIN_BASE_VPE + HFI_ARCH_OX_OFFSET + 0x7000
210  */
211 #define HFI_PROPERTY_PARAM_VPE_COLOR_SPACE_CONVERSION		0x3207001
212 
213 #define HFI_PROPERTY_CONFIG_VPE_OX_START	\
214 	(HFI_DOMAIN_BASE_VPE + HFI_ARCH_OX_OFFSET + 0x8000)
215 
216 #define HFI_CHROMA_SITE_0			0x1000001
217 #define HFI_CHROMA_SITE_1			0x1000002
218 #define HFI_CHROMA_SITE_2			0x1000003
219 #define HFI_CHROMA_SITE_3			0x1000004
220 #define HFI_CHROMA_SITE_4			0x1000005
221 #define HFI_CHROMA_SITE_5			0x1000006
222 
223 #define HFI_PRIORITY_LOW			10
224 #define HFI_PRIOIRTY_MEDIUM			20
225 #define HFI_PRIORITY_HIGH			30
226 
227 #define HFI_OUTPUT_ORDER_DISPLAY		0x1000001
228 #define HFI_OUTPUT_ORDER_DECODE			0x1000002
229 
230 #define HFI_RATE_CONTROL_OFF			0x1000001
231 #define HFI_RATE_CONTROL_VBR_VFR		0x1000002
232 #define HFI_RATE_CONTROL_VBR_CFR		0x1000003
233 #define HFI_RATE_CONTROL_CBR_VFR		0x1000004
234 #define HFI_RATE_CONTROL_CBR_CFR		0x1000005
235 #define HFI_RATE_CONTROL_CQ			0x1000008
236 
237 #define HFI_VIDEO_CODEC_H264			0x00000002
238 #define HFI_VIDEO_CODEC_H263			0x00000004
239 #define HFI_VIDEO_CODEC_MPEG1			0x00000008
240 #define HFI_VIDEO_CODEC_MPEG2			0x00000010
241 #define HFI_VIDEO_CODEC_MPEG4			0x00000020
242 #define HFI_VIDEO_CODEC_DIVX_311		0x00000040
243 #define HFI_VIDEO_CODEC_DIVX			0x00000080
244 #define HFI_VIDEO_CODEC_VC1			0x00000100
245 #define HFI_VIDEO_CODEC_SPARK			0x00000200
246 #define HFI_VIDEO_CODEC_VP8			0x00001000
247 #define HFI_VIDEO_CODEC_HEVC			0x00002000
248 #define HFI_VIDEO_CODEC_VP9			0x00004000
249 #define HFI_VIDEO_CODEC_HEVC_HYBRID		0x80000000
250 
251 #define HFI_H264_PROFILE_BASELINE		0x00000001
252 #define HFI_H264_PROFILE_MAIN			0x00000002
253 #define HFI_H264_PROFILE_HIGH			0x00000004
254 #define HFI_H264_PROFILE_STEREO_HIGH		0x00000008
255 #define HFI_H264_PROFILE_MULTIVIEW_HIGH		0x00000010
256 #define HFI_H264_PROFILE_CONSTRAINED_BASE	0x00000020
257 #define HFI_H264_PROFILE_CONSTRAINED_HIGH	0x00000040
258 
259 #define HFI_H264_LEVEL_1			0x00000001
260 #define HFI_H264_LEVEL_1b			0x00000002
261 #define HFI_H264_LEVEL_11			0x00000004
262 #define HFI_H264_LEVEL_12			0x00000008
263 #define HFI_H264_LEVEL_13			0x00000010
264 #define HFI_H264_LEVEL_2			0x00000020
265 #define HFI_H264_LEVEL_21			0x00000040
266 #define HFI_H264_LEVEL_22			0x00000080
267 #define HFI_H264_LEVEL_3			0x00000100
268 #define HFI_H264_LEVEL_31			0x00000200
269 #define HFI_H264_LEVEL_32			0x00000400
270 #define HFI_H264_LEVEL_4			0x00000800
271 #define HFI_H264_LEVEL_41			0x00001000
272 #define HFI_H264_LEVEL_42			0x00002000
273 #define HFI_H264_LEVEL_5			0x00004000
274 #define HFI_H264_LEVEL_51			0x00008000
275 #define HFI_H264_LEVEL_52			0x00010000
276 
277 #define HFI_H263_PROFILE_BASELINE		0x00000001
278 
279 #define HFI_H263_LEVEL_10			0x00000001
280 #define HFI_H263_LEVEL_20			0x00000002
281 #define HFI_H263_LEVEL_30			0x00000004
282 #define HFI_H263_LEVEL_40			0x00000008
283 #define HFI_H263_LEVEL_45			0x00000010
284 #define HFI_H263_LEVEL_50			0x00000020
285 #define HFI_H263_LEVEL_60			0x00000040
286 #define HFI_H263_LEVEL_70			0x00000080
287 
288 #define HFI_MPEG2_PROFILE_SIMPLE		0x00000001
289 #define HFI_MPEG2_PROFILE_MAIN			0x00000002
290 #define HFI_MPEG2_PROFILE_422			0x00000004
291 #define HFI_MPEG2_PROFILE_SNR			0x00000008
292 #define HFI_MPEG2_PROFILE_SPATIAL		0x00000010
293 #define HFI_MPEG2_PROFILE_HIGH			0x00000020
294 
295 #define HFI_MPEG2_LEVEL_LL			0x00000001
296 #define HFI_MPEG2_LEVEL_ML			0x00000002
297 #define HFI_MPEG2_LEVEL_H14			0x00000004
298 #define HFI_MPEG2_LEVEL_HL			0x00000008
299 
300 #define HFI_MPEG4_PROFILE_SIMPLE		0x00000001
301 #define HFI_MPEG4_PROFILE_ADVANCEDSIMPLE	0x00000002
302 
303 #define HFI_MPEG4_LEVEL_0			0x00000001
304 #define HFI_MPEG4_LEVEL_0b			0x00000002
305 #define HFI_MPEG4_LEVEL_1			0x00000004
306 #define HFI_MPEG4_LEVEL_2			0x00000008
307 #define HFI_MPEG4_LEVEL_3			0x00000010
308 #define HFI_MPEG4_LEVEL_4			0x00000020
309 #define HFI_MPEG4_LEVEL_4a			0x00000040
310 #define HFI_MPEG4_LEVEL_5			0x00000080
311 #define HFI_MPEG4_LEVEL_6			0x00000100
312 #define HFI_MPEG4_LEVEL_7			0x00000200
313 #define HFI_MPEG4_LEVEL_8			0x00000400
314 #define HFI_MPEG4_LEVEL_9			0x00000800
315 #define HFI_MPEG4_LEVEL_3b			0x00001000
316 
317 #define HFI_VC1_PROFILE_SIMPLE			0x00000001
318 #define HFI_VC1_PROFILE_MAIN			0x00000002
319 #define HFI_VC1_PROFILE_ADVANCED		0x00000004
320 
321 #define HFI_VC1_LEVEL_LOW			0x00000001
322 #define HFI_VC1_LEVEL_MEDIUM			0x00000002
323 #define HFI_VC1_LEVEL_HIGH			0x00000004
324 #define HFI_VC1_LEVEL_0				0x00000008
325 #define HFI_VC1_LEVEL_1				0x00000010
326 #define HFI_VC1_LEVEL_2				0x00000020
327 #define HFI_VC1_LEVEL_3				0x00000040
328 #define HFI_VC1_LEVEL_4				0x00000080
329 
330 #define HFI_VPX_PROFILE_SIMPLE			0x00000001
331 #define HFI_VPX_PROFILE_ADVANCED		0x00000002
332 #define HFI_VPX_PROFILE_VERSION_0		0x00000004
333 #define HFI_VPX_PROFILE_VERSION_1		0x00000008
334 #define HFI_VPX_PROFILE_VERSION_2		0x00000010
335 #define HFI_VPX_PROFILE_VERSION_3		0x00000020
336 
337 #define HFI_DIVX_FORMAT_4			0x1
338 #define HFI_DIVX_FORMAT_5			0x2
339 #define HFI_DIVX_FORMAT_6			0x3
340 
341 #define HFI_DIVX_PROFILE_QMOBILE		0x00000001
342 #define HFI_DIVX_PROFILE_MOBILE			0x00000002
343 #define HFI_DIVX_PROFILE_MT			0x00000004
344 #define HFI_DIVX_PROFILE_HT			0x00000008
345 #define HFI_DIVX_PROFILE_HD			0x00000010
346 
347 #define HFI_HEVC_PROFILE_MAIN			0x00000001
348 #define HFI_HEVC_PROFILE_MAIN10			0x00000002
349 #define HFI_HEVC_PROFILE_MAIN_STILL_PIC		0x00000004
350 
351 #define HFI_HEVC_LEVEL_1			0x00000001
352 #define HFI_HEVC_LEVEL_2			0x00000002
353 #define HFI_HEVC_LEVEL_21			0x00000004
354 #define HFI_HEVC_LEVEL_3			0x00000008
355 #define HFI_HEVC_LEVEL_31			0x00000010
356 #define HFI_HEVC_LEVEL_4			0x00000020
357 #define HFI_HEVC_LEVEL_41			0x00000040
358 #define HFI_HEVC_LEVEL_5			0x00000080
359 #define HFI_HEVC_LEVEL_51			0x00000100
360 #define HFI_HEVC_LEVEL_52			0x00000200
361 #define HFI_HEVC_LEVEL_6			0x00000400
362 #define HFI_HEVC_LEVEL_61			0x00000800
363 #define HFI_HEVC_LEVEL_62			0x00001000
364 
365 #define HFI_HEVC_TIER_MAIN			0x1
366 #define HFI_HEVC_TIER_HIGH0			0x2
367 
368 #define HFI_VPX_PROFILE_MAIN			0x00000001
369 
370 #define HFI_VPX_LEVEL_VERSION_0			0x00000001
371 #define HFI_VPX_LEVEL_VERSION_1			0x00000002
372 #define HFI_VPX_LEVEL_VERSION_2			0x00000004
373 #define HFI_VPX_LEVEL_VERSION_3			0x00000008
374 
375 /* VP9 Profile 0, 8-bit */
376 #define HFI_VP9_PROFILE_P0			0x00000001
377 /* VP9 Profile 2, 10-bit */
378 #define HFI_VP9_PROFILE_P2_10B			0x00000004
379 
380 #define HFI_VP9_LEVEL_1				0x00000001
381 #define HFI_VP9_LEVEL_11			0x00000002
382 #define HFI_VP9_LEVEL_2				0x00000004
383 #define HFI_VP9_LEVEL_21			0x00000008
384 #define HFI_VP9_LEVEL_3				0x00000010
385 #define HFI_VP9_LEVEL_31			0x00000020
386 #define HFI_VP9_LEVEL_4				0x00000040
387 #define HFI_VP9_LEVEL_41			0x00000080
388 #define HFI_VP9_LEVEL_5				0x00000100
389 #define HFI_VP9_LEVEL_51			0x00000200
390 #define HFI_VP9_LEVEL_6				0x00000400
391 #define HFI_VP9_LEVEL_61			0x00000800
392 
393 #define HFI_BUFFER_INPUT			0x1
394 #define HFI_BUFFER_OUTPUT			0x2
395 #define HFI_BUFFER_OUTPUT2			0x3
396 #define HFI_BUFFER_INTERNAL_PERSIST		0x4
397 #define HFI_BUFFER_INTERNAL_PERSIST_1		0x5
398 #define HFI_BUFFER_INTERNAL_SCRATCH(ver)	\
399 	(((ver) == HFI_VERSION_4XX ||		\
400 	(ver) == HFI_VERSION_6XX) ? 0x6 : 0x1000001)
401 #define HFI_BUFFER_INTERNAL_SCRATCH_1(ver)	\
402 	(((ver) == HFI_VERSION_4XX ||		\
403 	(ver) == HFI_VERSION_6XX) ? 0x7 : 0x1000005)
404 #define HFI_BUFFER_INTERNAL_SCRATCH_2(ver)	\
405 	(((ver) == HFI_VERSION_4XX ||		\
406 	(ver) == HFI_VERSION_6XX) ? 0x8 : 0x1000006)
407 #define HFI_BUFFER_EXTRADATA_INPUT(ver)		\
408 	(((ver) == HFI_VERSION_4XX) ? 0xc : 0x1000002)
409 #define HFI_BUFFER_EXTRADATA_OUTPUT(ver)	\
410 	(((ver) == HFI_VERSION_4XX) ? 0xa : 0x1000003)
411 #define HFI_BUFFER_EXTRADATA_OUTPUT2(ver)	\
412 	(((ver) == HFI_VERSION_4XX) ? 0xb : 0x1000004)
413 #define HFI_BUFFER_TYPE_MAX			11
414 
415 #define HFI_BUFFER_MODE_STATIC			0x1000001
416 #define HFI_BUFFER_MODE_RING			0x1000002
417 #define HFI_BUFFER_MODE_DYNAMIC			0x1000003
418 
419 /*
420  * HFI_PROPERTY_SYS_COMMON_START
421  * HFI_DOMAIN_BASE_COMMON + HFI_ARCH_COMMON_OFFSET + 0x0000
422  */
423 #define HFI_PROPERTY_SYS_DEBUG_CONFIG				0x1
424 #define HFI_PROPERTY_SYS_RESOURCE_OCMEM_REQUIREMENT_INFO	0x2
425 #define HFI_PROPERTY_SYS_CONFIG_VCODEC_CLKFREQ			0x3
426 #define HFI_PROPERTY_SYS_IDLE_INDICATOR				0x4
427 #define HFI_PROPERTY_SYS_CODEC_POWER_PLANE_CTRL			0x5
428 #define HFI_PROPERTY_SYS_IMAGE_VERSION				0x6
429 #define HFI_PROPERTY_SYS_CONFIG_COVERAGE			0x7
430 #define HFI_PROPERTY_SYS_UBWC_CONFIG				0x8
431 
432 /*
433  * HFI_PROPERTY_PARAM_COMMON_START
434  * HFI_DOMAIN_BASE_COMMON + HFI_ARCH_COMMON_OFFSET + 0x1000
435  */
436 #define HFI_PROPERTY_PARAM_FRAME_SIZE				0x1001
437 #define HFI_PROPERTY_PARAM_UNCOMPRESSED_PLANE_ACTUAL_INFO	0x1002
438 #define HFI_PROPERTY_PARAM_UNCOMPRESSED_FORMAT_SELECT		0x1003
439 #define HFI_PROPERTY_PARAM_UNCOMPRESSED_FORMAT_SUPPORTED	0x1004
440 #define HFI_PROPERTY_PARAM_PROFILE_LEVEL_CURRENT		0x1005
441 #define HFI_PROPERTY_PARAM_PROFILE_LEVEL_SUPPORTED		0x1006
442 #define HFI_PROPERTY_PARAM_CAPABILITY_SUPPORTED			0x1007
443 #define HFI_PROPERTY_PARAM_PROPERTIES_SUPPORTED			0x1008
444 #define HFI_PROPERTY_PARAM_CODEC_SUPPORTED			0x1009
445 #define HFI_PROPERTY_PARAM_NAL_STREAM_FORMAT_SUPPORTED		0x100a
446 #define HFI_PROPERTY_PARAM_NAL_STREAM_FORMAT_SELECT		0x100b
447 #define HFI_PROPERTY_PARAM_MULTI_VIEW_FORMAT			0x100c
448 #define HFI_PROPERTY_PARAM_MAX_SEQUENCE_HEADER_SIZE		0x100d
449 #define HFI_PROPERTY_PARAM_CODEC_MASK_SUPPORTED			0x100e
450 #define HFI_PROPERTY_PARAM_MVC_BUFFER_LAYOUT			0x100f
451 #define HFI_PROPERTY_PARAM_MAX_SESSIONS_SUPPORTED		0x1010
452 #define HFI_PROPERTY_PARAM_WORK_MODE				0x1015
453 #define HFI_PROPERTY_PARAM_WORK_ROUTE				0x1017
454 
455 /*
456  * HFI_PROPERTY_CONFIG_COMMON_START
457  * HFI_DOMAIN_BASE_COMMON + HFI_ARCH_COMMON_OFFSET + 0x2000
458  */
459 #define HFI_PROPERTY_CONFIG_FRAME_RATE				0x2001
460 #define HFI_PROPERTY_CONFIG_VIDEOCORES_USAGE			0x2002
461 
462 /*
463  * HFI_PROPERTY_PARAM_VDEC_COMMON_START
464  * HFI_DOMAIN_BASE_VDEC + HFI_ARCH_COMMON_OFFSET + 0x3000
465  */
466 #define HFI_PROPERTY_PARAM_VDEC_MULTI_STREAM			0x1003001
467 #define HFI_PROPERTY_PARAM_VDEC_CONCEAL_COLOR			0x1003002
468 #define HFI_PROPERTY_PARAM_VDEC_NONCP_OUTPUT2			0x1003003
469 #define HFI_PROPERTY_PARAM_VDEC_PIXEL_BITDEPTH			0x1003007
470 #define HFI_PROPERTY_PARAM_VDEC_PIC_STRUCT			0x1003009
471 #define HFI_PROPERTY_PARAM_VDEC_COLOUR_SPACE			0x100300a
472 
473 /*
474  * HFI_PROPERTY_CONFIG_VDEC_COMMON_START
475  * HFI_DOMAIN_BASE_VDEC + HFI_ARCH_COMMON_OFFSET + 0x4000
476  */
477 
478 /*
479  * HFI_PROPERTY_PARAM_VENC_COMMON_START
480  * HFI_DOMAIN_BASE_VENC + HFI_ARCH_COMMON_OFFSET + 0x5000
481  */
482 #define HFI_PROPERTY_PARAM_VENC_SLICE_DELIVERY_MODE		0x2005001
483 #define HFI_PROPERTY_PARAM_VENC_H264_ENTROPY_CONTROL		0x2005002
484 #define HFI_PROPERTY_PARAM_VENC_H264_DEBLOCK_CONTROL		0x2005003
485 #define HFI_PROPERTY_PARAM_VENC_RATE_CONTROL			0x2005004
486 #define HFI_PROPERTY_PARAM_VENC_H264_PICORDER_CNT_TYPE		0x2005005
487 #define HFI_PROPERTY_PARAM_VENC_SESSION_QP			0x2005006
488 #define HFI_PROPERTY_PARAM_VENC_MPEG4_AC_PREDICTION		0x2005007
489 #define HFI_PROPERTY_PARAM_VENC_SESSION_QP_RANGE		0x2005008
490 #define HFI_PROPERTY_PARAM_VENC_MPEG4_TIME_RESOLUTION		0x2005009
491 #define HFI_PROPERTY_PARAM_VENC_MPEG4_SHORT_HEADER		0x200500a
492 #define HFI_PROPERTY_PARAM_VENC_MPEG4_HEADER_EXTENSION		0x200500b
493 #define HFI_PROPERTY_PARAM_VENC_OPEN_GOP			0x200500c
494 #define HFI_PROPERTY_PARAM_VENC_INTRA_REFRESH			0x200500d
495 #define HFI_PROPERTY_PARAM_VENC_MULTI_SLICE_CONTROL		0x200500e
496 #define HFI_PROPERTY_PARAM_VENC_VBV_HRD_BUF_SIZE		0x200500f
497 #define HFI_PROPERTY_PARAM_VENC_QUALITY_VS_SPEED		0x2005010
498 #define HFI_PROPERTY_PARAM_VENC_ADVANCED			0x2005012
499 #define HFI_PROPERTY_PARAM_VENC_H264_SPS_ID			0x2005014
500 #define HFI_PROPERTY_PARAM_VENC_H264_PPS_ID			0x2005015
501 #define HFI_PROPERTY_PARAM_VENC_H264_GENERATE_AUDNAL		0x2005016
502 #define HFI_PROPERTY_PARAM_VENC_ASPECT_RATIO			0x2005017
503 #define HFI_PROPERTY_PARAM_VENC_NUMREF				0x2005018
504 #define HFI_PROPERTY_PARAM_VENC_MULTIREF_P			0x2005019
505 #define HFI_PROPERTY_PARAM_VENC_H264_NAL_SVC_EXT		0x200501b
506 #define HFI_PROPERTY_PARAM_VENC_LTRMODE				0x200501c
507 #define HFI_PROPERTY_PARAM_VENC_VIDEO_FULL_RANGE		0x200501d
508 #define HFI_PROPERTY_PARAM_VENC_H264_VUI_TIMING_INFO		0x200501e
509 #define HFI_PROPERTY_PARAM_VENC_VC1_PERF_CFG			0x200501f
510 #define HFI_PROPERTY_PARAM_VENC_MAX_NUM_B_FRAMES		0x2005020
511 #define HFI_PROPERTY_PARAM_VENC_H264_VUI_BITSTREAM_RESTRC	0x2005021
512 #define HFI_PROPERTY_PARAM_VENC_PRESERVE_TEXT_QUALITY		0x2005023
513 #define HFI_PROPERTY_PARAM_VENC_H264_TRANSFORM_8X8			0x2005025
514 #define HFI_PROPERTY_PARAM_VENC_HIER_P_MAX_NUM_ENH_LAYER	0x2005026
515 #define HFI_PROPERTY_PARAM_VENC_DISABLE_RC_TIMESTAMP		0x2005027
516 #define HFI_PROPERTY_PARAM_VENC_INITIAL_QP			0x2005028
517 #define HFI_PROPERTY_PARAM_VENC_VPX_ERROR_RESILIENCE_MODE	0x2005029
518 #define HFI_PROPERTY_PARAM_VENC_HIER_B_MAX_NUM_ENH_LAYER	0x200502c
519 #define HFI_PROPERTY_PARAM_VENC_HIER_P_HYBRID_MODE		0x200502f
520 #define HFI_PROPERTY_PARAM_VENC_HDR10_PQ_SEI			0x2005036
521 
522 /*
523  * HFI_PROPERTY_CONFIG_VENC_COMMON_START
524  * HFI_DOMAIN_BASE_VENC + HFI_ARCH_COMMON_OFFSET + 0x6000
525  */
526 #define HFI_PROPERTY_CONFIG_VENC_TARGET_BITRATE			0x2006001
527 #define HFI_PROPERTY_CONFIG_VENC_IDR_PERIOD			0x2006002
528 #define HFI_PROPERTY_CONFIG_VENC_INTRA_PERIOD			0x2006003
529 #define HFI_PROPERTY_CONFIG_VENC_REQUEST_SYNC_FRAME		0x2006004
530 #define HFI_PROPERTY_CONFIG_VENC_SLICE_SIZE			0x2006005
531 #define HFI_PROPERTY_CONFIG_VENC_MAX_BITRATE			0x2006007
532 #define HFI_PROPERTY_CONFIG_VENC_SYNC_FRAME_SEQUENCE_HEADER	0x2006008
533 #define HFI_PROPERTY_CONFIG_VENC_MARKLTRFRAME			0x2006009
534 #define HFI_PROPERTY_CONFIG_VENC_USELTRFRAME			0x200600a
535 #define HFI_PROPERTY_CONFIG_VENC_HIER_P_ENH_LAYER		0x200600b
536 #define HFI_PROPERTY_CONFIG_VENC_LTRPERIOD			0x200600c
537 #define HFI_PROPERTY_CONFIG_VENC_PERF_MODE			0x200600e
538 #define HFI_PROPERTY_CONFIG_HEIC_FRAME_QUALITY			0x2006014
539 
540 /*
541  * HFI_PROPERTY_PARAM_VPE_COMMON_START
542  * HFI_DOMAIN_BASE_VPE + HFI_ARCH_COMMON_OFFSET + 0x7000
543  */
544 
545 /*
546  * HFI_PROPERTY_CONFIG_VPE_COMMON_START
547  * HFI_DOMAIN_BASE_VPE + HFI_ARCH_COMMON_OFFSET + 0x8000
548  */
549 #define HFI_PROPERTY_CONFIG_VPE_DEINTERLACE			0x3008001
550 #define HFI_PROPERTY_CONFIG_VPE_OPERATIONS			0x3008002
551 
552 enum hfi_version {
553 	HFI_VERSION_1XX,
554 	HFI_VERSION_3XX,
555 	HFI_VERSION_4XX,
556 	HFI_VERSION_6XX,
557 };
558 
559 struct hfi_buffer_info {
560 	u32 buffer_addr;
561 	u32 extradata_addr;
562 };
563 
564 struct hfi_bitrate {
565 	u32 bitrate;
566 	u32 layer_id;
567 };
568 
569 struct hfi_h264_8x8_transform {
570 	u32 enable_type;
571 };
572 
573 #define HFI_CAPABILITY_FRAME_WIDTH			0x01
574 #define HFI_CAPABILITY_FRAME_HEIGHT			0x02
575 #define HFI_CAPABILITY_MBS_PER_FRAME			0x03
576 #define HFI_CAPABILITY_MBS_PER_SECOND			0x04
577 #define HFI_CAPABILITY_FRAMERATE			0x05
578 #define HFI_CAPABILITY_SCALE_X				0x06
579 #define HFI_CAPABILITY_SCALE_Y				0x07
580 #define HFI_CAPABILITY_BITRATE				0x08
581 #define HFI_CAPABILITY_BFRAME				0x09
582 #define HFI_CAPABILITY_PEAKBITRATE			0x0a
583 #define HFI_CAPABILITY_HIER_P_NUM_ENH_LAYERS		0x10
584 #define HFI_CAPABILITY_ENC_LTR_COUNT			0x11
585 #define HFI_CAPABILITY_CP_OUTPUT2_THRESH		0x12
586 #define HFI_CAPABILITY_HIER_B_NUM_ENH_LAYERS		0x13
587 #define HFI_CAPABILITY_LCU_SIZE				0x14
588 #define HFI_CAPABILITY_HIER_P_HYBRID_NUM_ENH_LAYERS	0x15
589 #define HFI_CAPABILITY_MBS_PER_SECOND_POWERSAVE		0x16
590 #define HFI_CAPABILITY_I_FRAME_QP			0x20
591 #define HFI_CAPABILITY_P_FRAME_QP			0x21
592 #define HFI_CAPABILITY_B_FRAME_QP			0x22
593 #define HFI_CAPABILITY_RATE_CONTROL_MODES		0x23
594 #define HFI_CAPABILITY_BLUR_WIDTH			0x24
595 #define HFI_CAPABILITY_BLUR_HEIGHT			0x25
596 #define HFI_CAPABILITY_SLICE_BYTE			0x27
597 #define HFI_CAPABILITY_SLICE_MB				0x28
598 #define HFI_CAPABILITY_MAX_VIDEOCORES			0x2b
599 #define HFI_CAPABILITY_MAX_WORKMODES			0x2c
600 #define HFI_CAPABILITY_ROTATION				0x2f
601 #define HFI_CAPABILITY_COLOR_SPACE_CONVERSION		0x30
602 
603 struct hfi_capability {
604 	u32 capability_type;
605 	u32 min;
606 	u32 max;
607 	u32 step_size;
608 };
609 
610 struct hfi_capabilities {
611 	u32 num_capabilities;
612 	struct hfi_capability data[];
613 };
614 
615 #define HFI_DEBUG_MSG_LOW	0x01
616 #define HFI_DEBUG_MSG_MEDIUM	0x02
617 #define HFI_DEBUG_MSG_HIGH	0x04
618 #define HFI_DEBUG_MSG_ERROR	0x08
619 #define HFI_DEBUG_MSG_FATAL	0x10
620 #define HFI_DEBUG_MSG_PERF	0x20
621 
622 #define HFI_DEBUG_MODE_QUEUE	0x01
623 #define HFI_DEBUG_MODE_QDSS	0x02
624 
625 struct hfi_debug_config {
626 	u32 config;
627 	u32 mode;
628 };
629 
630 struct hfi_ubwc_config {
631 	u32 size;
632 	u32 packet_type;
633 	struct {
634 		u32 max_channel_override : 1;
635 		u32 mal_length_override : 1;
636 		u32 hb_override : 1;
637 		u32 bank_swzl_level_override : 1;
638 		u32 bank_spreading_override : 1;
639 		u32 reserved : 27;
640 		} override_bit_info;
641 	u32 max_channels;
642 	u32 mal_length;
643 	u32 highest_bank_bit;
644 	u32 bank_swzl_level;
645 	u32 bank_spreading;
646 	u32 reserved[2];
647 };
648 
649 struct hfi_enable {
650 	u32 enable;
651 };
652 
653 #define HFI_H264_DB_MODE_DISABLE		0x1
654 #define HFI_H264_DB_MODE_SKIP_SLICE_BOUNDARY	0x2
655 #define HFI_H264_DB_MODE_ALL_BOUNDARY		0x3
656 
657 struct hfi_h264_db_control {
658 	u32 mode;
659 	s32 slice_alpha_offset;
660 	s32 slice_beta_offset;
661 };
662 
663 #define HFI_H264_ENTROPY_CAVLC			0x1
664 #define HFI_H264_ENTROPY_CABAC			0x2
665 
666 #define HFI_H264_CABAC_MODEL_0			0x1
667 #define HFI_H264_CABAC_MODEL_1			0x2
668 #define HFI_H264_CABAC_MODEL_2			0x3
669 
670 struct hfi_h264_entropy_control {
671 	u32 entropy_mode;
672 	u32 cabac_model;
673 };
674 
675 struct hfi_framerate {
676 	u32 buffer_type;
677 	u32 framerate;
678 };
679 
680 #define HFI_INTRA_REFRESH_NONE			0x1
681 #define HFI_INTRA_REFRESH_CYCLIC		0x2
682 #define HFI_INTRA_REFRESH_ADAPTIVE		0x3
683 #define HFI_INTRA_REFRESH_CYCLIC_ADAPTIVE	0x4
684 #define HFI_INTRA_REFRESH_RANDOM		0x5
685 
686 struct hfi_intra_refresh {
687 	u32 mode;
688 	u32 air_mbs;
689 	u32 air_ref;
690 	u32 cir_mbs;
691 };
692 
693 struct hfi_intra_refresh_3x {
694 	u32 mode;
695 	u32 mbs;
696 };
697 
698 struct hfi_idr_period {
699 	u32 idr_period;
700 };
701 
702 struct hfi_operations_type {
703 	u32 rotation;
704 	u32 flip;
705 };
706 
707 struct hfi_max_num_b_frames {
708 	u32 max_num_b_frames;
709 };
710 
711 struct hfi_vc1e_perf_cfg_type {
712 	u32 search_range_x_subsampled[3];
713 	u32 search_range_y_subsampled[3];
714 };
715 
716 /*
717  * 0 - 7bit -> Luma (def: 16)
718  * 8 - 15bit -> Chroma (def: 128)
719  * format is valid up to v4
720  */
721 struct hfi_conceal_color {
722 	u32 conceal_color;
723 };
724 
725 struct hfi_conceal_color_v4 {
726 	u32 conceal_color_8bit;
727 	u32 conceal_color_10bit;
728 };
729 
730 struct hfi_intra_period {
731 	u32 pframes;
732 	u32 bframes;
733 };
734 
735 struct hfi_mpeg4_header_extension {
736 	u32 header_extension;
737 };
738 
739 struct hfi_mpeg4_time_resolution {
740 	u32 time_increment_resolution;
741 };
742 
743 struct hfi_multi_stream {
744 	u32 buffer_type;
745 	u32 enable;
746 	u32 width;
747 	u32 height;
748 };
749 
750 struct hfi_multi_stream_3x {
751 	u32 buffer_type;
752 	u32 enable;
753 };
754 
755 struct hfi_multi_view_format {
756 	u32 views;
757 	u32 view_order[1];
758 };
759 
760 #define HFI_MULTI_SLICE_OFF			0x1
761 #define HFI_MULTI_SLICE_BY_MB_COUNT		0x2
762 #define HFI_MULTI_SLICE_BY_BYTE_COUNT		0x3
763 #define HFI_MULTI_SLICE_GOB			0x4
764 
765 struct hfi_multi_slice_control {
766 	u32 multi_slice;
767 	u32 slice_size;
768 };
769 
770 #define HFI_NAL_FORMAT_STARTCODES		0x01
771 #define HFI_NAL_FORMAT_ONE_NAL_PER_BUFFER	0x02
772 #define HFI_NAL_FORMAT_ONE_BYTE_LENGTH		0x04
773 #define HFI_NAL_FORMAT_TWO_BYTE_LENGTH		0x08
774 #define HFI_NAL_FORMAT_FOUR_BYTE_LENGTH		0x10
775 
776 struct hfi_nal_stream_format {
777 	u32 format;
778 };
779 
780 struct hfi_nal_stream_format_select {
781 	u32 format;
782 };
783 
784 #define HFI_PICTURE_TYPE_I			0x01
785 #define HFI_PICTURE_TYPE_P			0x02
786 #define HFI_PICTURE_TYPE_B			0x04
787 #define HFI_PICTURE_TYPE_IDR			0x08
788 
789 struct hfi_profile_level {
790 	u32 profile;
791 	u32 level;
792 };
793 
794 #define HFI_MAX_PROFILE_COUNT			16
795 
796 struct hfi_profile_level_supported {
797 	u32 profile_count;
798 	struct hfi_profile_level profile_level[];
799 };
800 
801 struct hfi_quality_vs_speed {
802 	u32 quality_vs_speed;
803 };
804 
805 struct hfi_heic_frame_quality {
806 	u32 frame_quality;
807 	u32 reserved[3];
808 };
809 
810 struct hfi_quantization {
811 	u32 qp_i;
812 	u32 qp_p;
813 	u32 qp_b;
814 	u32 layer_id;
815 };
816 
817 struct hfi_initial_quantization {
818 	u32 qp_i;
819 	u32 qp_p;
820 	u32 qp_b;
821 	u32 init_qp_enable;
822 };
823 
824 struct hfi_quantization_range {
825 	u32 min_qp;
826 	u32 max_qp;
827 	u32 layer_id;
828 };
829 
830 #define HFI_LTR_MODE_DISABLE	0x0
831 #define HFI_LTR_MODE_MANUAL	0x1
832 #define HFI_LTR_MODE_PERIODIC	0x2
833 
834 struct hfi_ltr_mode {
835 	u32 ltr_mode;
836 	u32 ltr_count;
837 	u32 trust_mode;
838 };
839 
840 struct hfi_ltr_use {
841 	u32 ref_ltr;
842 	u32 use_constrnt;
843 	u32 frames;
844 };
845 
846 struct hfi_ltr_mark {
847 	u32 mark_frame;
848 };
849 
850 struct hfi_mastering_display_colour_sei_payload {
851 	u32 display_primaries_x[3];
852 	u32 display_primaries_y[3];
853 	u32 white_point_x;
854 	u32 white_point_y;
855 	u32 max_display_mastering_luminance;
856 	u32 min_display_mastering_luminance;
857 };
858 
859 struct hfi_content_light_level_sei_payload {
860 	u32 max_content_light;
861 	u32 max_pic_average_light;
862 };
863 
864 struct hfi_hdr10_pq_sei {
865 	struct hfi_mastering_display_colour_sei_payload mastering;
866 	struct hfi_content_light_level_sei_payload cll;
867 };
868 
869 struct hfi_framesize {
870 	u32 buffer_type;
871 	u32 width;
872 	u32 height;
873 };
874 
875 #define HFI_VENC_PERFMODE_MAX_QUALITY		0x1
876 #define HFI_VENC_PERFMODE_POWER_SAVE		0x2
877 
878 struct hfi_perf_mode {
879 	u32 video_perf_mode;
880 };
881 
882 #define VIDC_CORE_ID_DEFAULT	0
883 #define VIDC_CORE_ID_1		1
884 #define VIDC_CORE_ID_2		2
885 #define VIDC_CORE_ID_3		3
886 
887 struct hfi_videocores_usage_type {
888 	u32 video_core_enable_mask;
889 };
890 
891 #define VIDC_WORK_MODE_1	1
892 #define VIDC_WORK_MODE_2	2
893 
894 struct hfi_video_work_mode {
895 	u32 video_work_mode;
896 };
897 
898 struct hfi_video_work_route {
899 	u32 video_work_route;
900 };
901 
902 struct hfi_h264_vui_timing_info {
903 	u32 enable;
904 	u32 fixed_framerate;
905 	u32 time_scale;
906 };
907 
908 #define VIDC_BITDEPTH_8		0x00000
909 #define VIDC_BITDEPTH_10	0x20002
910 
911 struct hfi_bit_depth {
912 	u32 buffer_type;
913 	u32 bit_depth;
914 };
915 
916 struct hfi_picture_type {
917 	u32 is_sync_frame;
918 	u32 picture_type;
919 };
920 
921 struct hfi_pic_struct {
922 	u32 progressive_only;
923 };
924 
925 struct hfi_colour_space {
926 	u32 colour_space;
927 };
928 
929 struct hfi_extradata_input_crop {
930 	u32 size;
931 	u32 version;
932 	u32 port_index;
933 	u32 left;
934 	u32 top;
935 	u32 width;
936 	u32 height;
937 };
938 
939 struct hfi_dpb_counts {
940 	u32 max_dpb_count;
941 	u32 max_ref_frames;
942 	u32 max_dec_buffering;
943 	u32 max_reorder_frames;
944 	u32 fw_min_cnt;
945 };
946 
947 #define HFI_COLOR_FORMAT_MONOCHROME		0x01
948 #define HFI_COLOR_FORMAT_NV12			0x02
949 #define HFI_COLOR_FORMAT_NV21			0x03
950 #define HFI_COLOR_FORMAT_NV12_4x4TILE		0x04
951 #define HFI_COLOR_FORMAT_NV21_4x4TILE		0x05
952 #define HFI_COLOR_FORMAT_YUYV			0x06
953 #define HFI_COLOR_FORMAT_YVYU			0x07
954 #define HFI_COLOR_FORMAT_UYVY			0x08
955 #define HFI_COLOR_FORMAT_VYUY			0x09
956 #define HFI_COLOR_FORMAT_RGB565			0x0a
957 #define HFI_COLOR_FORMAT_BGR565			0x0b
958 #define HFI_COLOR_FORMAT_RGB888			0x0c
959 #define HFI_COLOR_FORMAT_BGR888			0x0d
960 #define HFI_COLOR_FORMAT_YUV444			0x0e
961 #define HFI_COLOR_FORMAT_RGBA8888		0x10
962 
963 #define HFI_COLOR_FORMAT_UBWC_BASE		0x8000
964 #define HFI_COLOR_FORMAT_10_BIT_BASE		0x4000
965 
966 #define HFI_COLOR_FORMAT_YUV420_TP10		0x4002
967 #define HFI_COLOR_FORMAT_P010			0x4003
968 #define HFI_COLOR_FORMAT_NV12_UBWC		0x8002
969 #define HFI_COLOR_FORMAT_YUV420_TP10_UBWC	0xc002
970 #define HFI_COLOR_FORMAT_P010_UBWC		0xc003
971 #define HFI_COLOR_FORMAT_RGBA8888_UBWC		0x8010
972 
973 struct hfi_uncompressed_format_select {
974 	u32 buffer_type;
975 	u32 format;
976 };
977 
978 struct hfi_uncompressed_plane_constraints {
979 	u32 stride_multiples;
980 	u32 max_stride;
981 	u32 min_plane_buffer_height_multiple;
982 	u32 buffer_alignment;
983 };
984 
985 struct hfi_uncompressed_plane_info {
986 	u32 format;
987 	u32 num_planes;
988 	struct hfi_uncompressed_plane_constraints plane_constraints[1];
989 };
990 
991 struct hfi_uncompressed_format_supported {
992 	u32 buffer_type;
993 	u32 format_entries;
994 	struct hfi_uncompressed_plane_info plane_info[1];
995 };
996 
997 struct hfi_uncompressed_plane_actual {
998 	int actual_stride;
999 	u32 actual_plane_buffer_height;
1000 };
1001 
1002 struct hfi_uncompressed_plane_actual_info {
1003 	u32 buffer_type;
1004 	u32 num_planes;
1005 	struct hfi_uncompressed_plane_actual plane_format[2];
1006 };
1007 
1008 struct hfi_uncompressed_plane_actual_constraints_info {
1009 	u32 buffer_type;
1010 	u32 num_planes;
1011 	struct hfi_uncompressed_plane_constraints plane_format[2];
1012 };
1013 
1014 struct hfi_codec_supported {
1015 	u32 dec_codecs;
1016 	u32 enc_codecs;
1017 };
1018 
1019 struct hfi_properties_supported {
1020 	u32 num_properties;
1021 	u32 properties[1];
1022 };
1023 
1024 struct hfi_max_sessions_supported {
1025 	u32 max_sessions;
1026 };
1027 
1028 #define HFI_MAX_MATRIX_COEFFS	9
1029 #define HFI_MAX_BIAS_COEFFS	3
1030 #define HFI_MAX_LIMIT_COEFFS	6
1031 
1032 struct hfi_vpe_color_space_conversion {
1033 	u32 csc_matrix[HFI_MAX_MATRIX_COEFFS];
1034 	u32 csc_bias[HFI_MAX_BIAS_COEFFS];
1035 	u32 csc_limit[HFI_MAX_LIMIT_COEFFS];
1036 };
1037 
1038 #define HFI_ROTATE_NONE		0x1
1039 #define HFI_ROTATE_90		0x2
1040 #define HFI_ROTATE_180		0x3
1041 #define HFI_ROTATE_270		0x4
1042 
1043 #define HFI_FLIP_NONE		0x1
1044 #define HFI_FLIP_HORIZONTAL	0x2
1045 #define HFI_FLIP_VERTICAL	0x3
1046 
1047 struct hfi_operations {
1048 	u32 rotate;
1049 	u32 flip;
1050 };
1051 
1052 #define HFI_RESOURCE_OCMEM	0x1
1053 
1054 struct hfi_resource_ocmem {
1055 	u32 size;
1056 	u32 mem;
1057 };
1058 
1059 struct hfi_resource_ocmem_requirement {
1060 	u32 session_domain;
1061 	u32 width;
1062 	u32 height;
1063 	u32 size;
1064 };
1065 
1066 struct hfi_resource_ocmem_requirement_info {
1067 	u32 num_entries;
1068 	struct hfi_resource_ocmem_requirement requirements[1];
1069 };
1070 
1071 struct hfi_property_sys_image_version_info_type {
1072 	u32 string_size;
1073 	u8  str_image_version[1];
1074 };
1075 
1076 struct hfi_codec_mask_supported {
1077 	u32 codecs;
1078 	u32 video_domains;
1079 };
1080 
1081 struct hfi_seq_header_info {
1082 	u32 max_hader_len;
1083 };
1084 
1085 struct hfi_aspect_ratio {
1086 	u32 aspect_width;
1087 	u32 aspect_height;
1088 };
1089 
1090 #define HFI_MVC_BUFFER_LAYOUT_TOP_BOTTOM	0
1091 #define HFI_MVC_BUFFER_LAYOUT_SIDEBYSIDE	1
1092 #define HFI_MVC_BUFFER_LAYOUT_SEQ		2
1093 
1094 struct hfi_mvc_buffer_layout_descp_type {
1095 	u32 layout_type;
1096 	u32 bright_view_first;
1097 	u32 ngap;
1098 };
1099 
1100 struct hfi_scs_threshold {
1101 	u32 threshold_value;
1102 };
1103 
1104 #define HFI_TEST_SSR_SW_ERR_FATAL	0x1
1105 #define HFI_TEST_SSR_SW_DIV_BY_ZERO	0x2
1106 #define HFI_TEST_SSR_HW_WDOG_IRQ	0x3
1107 
1108 struct hfi_buffer_alloc_mode {
1109 	u32 type;
1110 	u32 mode;
1111 };
1112 
1113 struct hfi_index_extradata_config {
1114 	u32 enable;
1115 	u32 index_extra_data_id;
1116 };
1117 
1118 struct hfi_extradata_header {
1119 	u32 size;
1120 	u32 version;
1121 	u32 port_index;
1122 	u32 type;
1123 	u32 data_size;
1124 	u8 data[1];
1125 };
1126 
1127 struct hfi_batch_info {
1128 	u32 input_batch_count;
1129 	u32 output_batch_count;
1130 };
1131 
1132 struct hfi_buffer_count_actual {
1133 	u32 type;
1134 	u32 count_actual;
1135 };
1136 
1137 struct hfi_buffer_count_actual_4xx {
1138 	u32 type;
1139 	u32 count_actual;
1140 	u32 count_min_host;
1141 };
1142 
1143 struct hfi_buffer_size_actual {
1144 	u32 type;
1145 	u32 size;
1146 };
1147 
1148 struct hfi_buffer_display_hold_count_actual {
1149 	u32 type;
1150 	u32 hold_count;
1151 };
1152 
1153 /* HFI 4XX reorder the fields, use these macros */
1154 #define HFI_BUFREQ_HOLD_COUNT(bufreq, ver)	\
1155 	((ver) == HFI_VERSION_4XX ? 0 : (bufreq)->hold_count)
1156 #define HFI_BUFREQ_COUNT_MIN(bufreq, ver)	\
1157 	((ver) == HFI_VERSION_4XX ? (bufreq)->hold_count : (bufreq)->count_min)
1158 #define HFI_BUFREQ_COUNT_MIN_HOST(bufreq, ver)	\
1159 	((ver) == HFI_VERSION_4XX ? (bufreq)->count_min : 0)
1160 
1161 struct hfi_buffer_requirements {
1162 	u32 type;
1163 	u32 size;
1164 	u32 region_size;
1165 	u32 hold_count;
1166 	u32 count_min;
1167 	u32 count_actual;
1168 	u32 contiguous;
1169 	u32 alignment;
1170 };
1171 
1172 struct hfi_data_payload {
1173 	u32 size;
1174 	u8 data[1];
1175 };
1176 
1177 struct hfi_enable_picture {
1178 	u32 picture_type;
1179 };
1180 
1181 struct hfi_display_picture_buffer_count {
1182 	int enable;
1183 	u32 count;
1184 };
1185 
1186 struct hfi_extra_data_header_config {
1187 	u32 type;
1188 	u32 buffer_type;
1189 	u32 version;
1190 	u32 port_index;
1191 	u32 client_extra_data_id;
1192 };
1193 
1194 struct hfi_interlace_format_supported {
1195 	u32 buffer_type;
1196 	u32 format;
1197 };
1198 
1199 struct hfi_buffer_alloc_mode_supported {
1200 	u32 buffer_type;
1201 	u32 num_entries;
1202 	u32 data[1];
1203 };
1204 
1205 struct hfi_mb_error_map {
1206 	u32 error_map_size;
1207 	u8 error_map[1];
1208 };
1209 
1210 struct hfi_metadata_pass_through {
1211 	int enable;
1212 	u32 size;
1213 };
1214 
1215 struct hfi_multi_view_select {
1216 	u32 view_index;
1217 };
1218 
1219 struct hfi_hybrid_hierp {
1220 	u32 layers;
1221 };
1222 
1223 struct hfi_pkt_hdr {
1224 	u32 size;
1225 	u32 pkt_type;
1226 };
1227 
1228 struct hfi_session_hdr_pkt {
1229 	struct hfi_pkt_hdr hdr;
1230 	u32 session_id;
1231 };
1232 
1233 struct hfi_session_pkt {
1234 	struct hfi_session_hdr_pkt shdr;
1235 };
1236 
1237 #endif
1238