1 /* 2 * Copyright (C) 2017 Linaro Ltd. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 and 6 * only version 2 as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope that it will be useful, 9 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * GNU General Public License for more details. 12 * 13 */ 14 15 #include <linux/device.h> 16 #include <linux/firmware.h> 17 #include <linux/kernel.h> 18 #include <linux/iommu.h> 19 #include <linux/io.h> 20 #include <linux/of.h> 21 #include <linux/of_address.h> 22 #include <linux/platform_device.h> 23 #include <linux/of_device.h> 24 #include <linux/qcom_scm.h> 25 #include <linux/sizes.h> 26 #include <linux/soc/qcom/mdt_loader.h> 27 28 #include "core.h" 29 #include "firmware.h" 30 #include "hfi_venus_io.h" 31 32 #define VENUS_PAS_ID 9 33 #define VENUS_FW_MEM_SIZE (6 * SZ_1M) 34 #define VENUS_FW_START_ADDR 0x0 35 36 static void venus_reset_cpu(struct venus_core *core) 37 { 38 u32 fw_size = core->fw.mapped_mem_size; 39 void __iomem *base = core->base; 40 41 writel(0, base + WRAPPER_FW_START_ADDR); 42 writel(fw_size, base + WRAPPER_FW_END_ADDR); 43 writel(0, base + WRAPPER_CPA_START_ADDR); 44 writel(fw_size, base + WRAPPER_CPA_END_ADDR); 45 writel(fw_size, base + WRAPPER_NONPIX_START_ADDR); 46 writel(fw_size, base + WRAPPER_NONPIX_END_ADDR); 47 writel(0x0, base + WRAPPER_CPU_CGC_DIS); 48 writel(0x0, base + WRAPPER_CPU_CLOCK_CONFIG); 49 50 /* Bring ARM9 out of reset */ 51 writel(0, base + WRAPPER_A9SS_SW_RESET); 52 } 53 54 int venus_set_hw_state(struct venus_core *core, bool resume) 55 { 56 if (core->use_tz) 57 return qcom_scm_set_remote_state(resume, 0); 58 59 if (resume) 60 venus_reset_cpu(core); 61 else 62 writel(1, core->base + WRAPPER_A9SS_SW_RESET); 63 64 return 0; 65 } 66 67 static int venus_load_fw(struct venus_core *core, const char *fwname, 68 phys_addr_t *mem_phys, size_t *mem_size) 69 { 70 const struct firmware *mdt; 71 struct device_node *node; 72 struct device *dev; 73 struct resource r; 74 ssize_t fw_size; 75 void *mem_va; 76 int ret; 77 78 *mem_phys = 0; 79 *mem_size = 0; 80 81 dev = core->dev; 82 node = of_parse_phandle(dev->of_node, "memory-region", 0); 83 if (!node) { 84 dev_err(dev, "no memory-region specified\n"); 85 return -EINVAL; 86 } 87 88 ret = of_address_to_resource(node, 0, &r); 89 if (ret) 90 return ret; 91 92 ret = request_firmware(&mdt, fwname, dev); 93 if (ret < 0) 94 return ret; 95 96 fw_size = qcom_mdt_get_size(mdt); 97 if (fw_size < 0) { 98 ret = fw_size; 99 goto err_release_fw; 100 } 101 102 *mem_phys = r.start; 103 *mem_size = resource_size(&r); 104 105 if (*mem_size < fw_size || fw_size > VENUS_FW_MEM_SIZE) { 106 ret = -EINVAL; 107 goto err_release_fw; 108 } 109 110 mem_va = memremap(r.start, *mem_size, MEMREMAP_WC); 111 if (!mem_va) { 112 dev_err(dev, "unable to map memory region: %pa+%zx\n", 113 &r.start, *mem_size); 114 ret = -ENOMEM; 115 goto err_release_fw; 116 } 117 118 if (core->use_tz) 119 ret = qcom_mdt_load(dev, mdt, fwname, VENUS_PAS_ID, 120 mem_va, *mem_phys, *mem_size, NULL); 121 else 122 ret = qcom_mdt_load_no_init(dev, mdt, fwname, VENUS_PAS_ID, 123 mem_va, *mem_phys, *mem_size, NULL); 124 125 memunmap(mem_va); 126 err_release_fw: 127 release_firmware(mdt); 128 return ret; 129 } 130 131 static int venus_boot_no_tz(struct venus_core *core, phys_addr_t mem_phys, 132 size_t mem_size) 133 { 134 struct iommu_domain *iommu; 135 struct device *dev; 136 int ret; 137 138 dev = core->fw.dev; 139 if (!dev) 140 return -EPROBE_DEFER; 141 142 iommu = core->fw.iommu_domain; 143 core->fw.mapped_mem_size = mem_size; 144 145 ret = iommu_map(iommu, VENUS_FW_START_ADDR, mem_phys, mem_size, 146 IOMMU_READ | IOMMU_WRITE | IOMMU_PRIV); 147 if (ret) { 148 dev_err(dev, "could not map video firmware region\n"); 149 return ret; 150 } 151 152 venus_reset_cpu(core); 153 154 return 0; 155 } 156 157 static int venus_shutdown_no_tz(struct venus_core *core) 158 { 159 const size_t mapped = core->fw.mapped_mem_size; 160 struct iommu_domain *iommu; 161 size_t unmapped; 162 u32 reg; 163 struct device *dev = core->fw.dev; 164 void __iomem *base = core->base; 165 166 /* Assert the reset to ARM9 */ 167 reg = readl_relaxed(base + WRAPPER_A9SS_SW_RESET); 168 reg |= WRAPPER_A9SS_SW_RESET_BIT; 169 writel_relaxed(reg, base + WRAPPER_A9SS_SW_RESET); 170 171 /* Make sure reset is asserted before the mapping is removed */ 172 mb(); 173 174 iommu = core->fw.iommu_domain; 175 176 unmapped = iommu_unmap(iommu, VENUS_FW_START_ADDR, mapped); 177 if (unmapped != mapped) 178 dev_err(dev, "failed to unmap firmware\n"); 179 180 return 0; 181 } 182 183 int venus_boot(struct venus_core *core) 184 { 185 struct device *dev = core->dev; 186 phys_addr_t mem_phys; 187 size_t mem_size; 188 int ret; 189 190 if (!IS_ENABLED(CONFIG_QCOM_MDT_LOADER) || 191 (core->use_tz && !qcom_scm_is_available())) 192 return -EPROBE_DEFER; 193 194 ret = venus_load_fw(core, core->res->fwname, &mem_phys, &mem_size); 195 if (ret) { 196 dev_err(dev, "fail to load video firmware\n"); 197 return -EINVAL; 198 } 199 200 if (core->use_tz) 201 ret = qcom_scm_pas_auth_and_reset(VENUS_PAS_ID); 202 else 203 ret = venus_boot_no_tz(core, mem_phys, mem_size); 204 205 return ret; 206 } 207 208 int venus_shutdown(struct venus_core *core) 209 { 210 int ret; 211 212 if (core->use_tz) 213 ret = qcom_scm_pas_shutdown(VENUS_PAS_ID); 214 else 215 ret = venus_shutdown_no_tz(core); 216 217 return ret; 218 } 219 220 int venus_firmware_init(struct venus_core *core) 221 { 222 struct platform_device_info info; 223 struct iommu_domain *iommu_dom; 224 struct platform_device *pdev; 225 struct device_node *np; 226 int ret; 227 228 np = of_get_child_by_name(core->dev->of_node, "video-firmware"); 229 if (!np) { 230 core->use_tz = true; 231 return 0; 232 } 233 234 memset(&info, 0, sizeof(info)); 235 info.fwnode = &np->fwnode; 236 info.parent = core->dev; 237 info.name = np->name; 238 info.dma_mask = DMA_BIT_MASK(32); 239 240 pdev = platform_device_register_full(&info); 241 if (IS_ERR(pdev)) { 242 of_node_put(np); 243 return PTR_ERR(pdev); 244 } 245 246 pdev->dev.of_node = np; 247 248 ret = of_dma_configure(&pdev->dev, np, true); 249 if (ret) { 250 dev_err(core->dev, "dma configure fail\n"); 251 goto err_unregister; 252 } 253 254 core->fw.dev = &pdev->dev; 255 256 iommu_dom = iommu_domain_alloc(&platform_bus_type); 257 if (!iommu_dom) { 258 dev_err(core->fw.dev, "Failed to allocate iommu domain\n"); 259 ret = -ENOMEM; 260 goto err_unregister; 261 } 262 263 ret = iommu_attach_device(iommu_dom, core->fw.dev); 264 if (ret) { 265 dev_err(core->fw.dev, "could not attach device\n"); 266 goto err_iommu_free; 267 } 268 269 core->fw.iommu_domain = iommu_dom; 270 271 of_node_put(np); 272 273 return 0; 274 275 err_iommu_free: 276 iommu_domain_free(iommu_dom); 277 err_unregister: 278 platform_device_unregister(pdev); 279 of_node_put(np); 280 return ret; 281 } 282 283 void venus_firmware_deinit(struct venus_core *core) 284 { 285 struct iommu_domain *iommu; 286 287 if (!core->fw.dev) 288 return; 289 290 iommu = core->fw.iommu_domain; 291 292 iommu_detach_device(iommu, core->fw.dev); 293 iommu_domain_free(iommu); 294 295 platform_device_unregister(to_platform_device(core->fw.dev)); 296 } 297