1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2012-2016, The Linux Foundation. All rights reserved. 4 * Copyright (C) 2017 Linaro Ltd. 5 */ 6 #include <linux/init.h> 7 #include <linux/interconnect.h> 8 #include <linux/ioctl.h> 9 #include <linux/list.h> 10 #include <linux/module.h> 11 #include <linux/of_device.h> 12 #include <linux/platform_device.h> 13 #include <linux/slab.h> 14 #include <linux/types.h> 15 #include <linux/pm_runtime.h> 16 #include <media/videobuf2-v4l2.h> 17 #include <media/v4l2-mem2mem.h> 18 #include <media/v4l2-ioctl.h> 19 20 #include "core.h" 21 #include "firmware.h" 22 #include "pm_helpers.h" 23 24 static void venus_event_notify(struct venus_core *core, u32 event) 25 { 26 struct venus_inst *inst; 27 28 switch (event) { 29 case EVT_SYS_WATCHDOG_TIMEOUT: 30 case EVT_SYS_ERROR: 31 break; 32 default: 33 return; 34 } 35 36 mutex_lock(&core->lock); 37 core->sys_error = true; 38 list_for_each_entry(inst, &core->instances, list) 39 inst->ops->event_notify(inst, EVT_SESSION_ERROR, NULL); 40 mutex_unlock(&core->lock); 41 42 disable_irq_nosync(core->irq); 43 44 /* 45 * Delay recovery to ensure venus has completed any pending cache 46 * operations. Without this sleep, we see device reset when firmware is 47 * unloaded after a system error. 48 */ 49 schedule_delayed_work(&core->work, msecs_to_jiffies(100)); 50 } 51 52 static const struct hfi_core_ops venus_core_ops = { 53 .event_notify = venus_event_notify, 54 }; 55 56 static void venus_sys_error_handler(struct work_struct *work) 57 { 58 struct venus_core *core = 59 container_of(work, struct venus_core, work.work); 60 int ret = 0; 61 62 dev_warn(core->dev, "system error has occurred, starting recovery!\n"); 63 64 pm_runtime_get_sync(core->dev); 65 66 hfi_core_deinit(core, true); 67 hfi_destroy(core); 68 mutex_lock(&core->lock); 69 venus_shutdown(core); 70 71 pm_runtime_put_sync(core->dev); 72 73 ret |= hfi_create(core, &venus_core_ops); 74 75 pm_runtime_get_sync(core->dev); 76 77 ret |= venus_boot(core); 78 79 ret |= hfi_core_resume(core, true); 80 81 enable_irq(core->irq); 82 83 mutex_unlock(&core->lock); 84 85 ret |= hfi_core_init(core); 86 87 pm_runtime_put_sync(core->dev); 88 89 if (ret) { 90 disable_irq_nosync(core->irq); 91 dev_warn(core->dev, "recovery failed (%d)\n", ret); 92 schedule_delayed_work(&core->work, msecs_to_jiffies(10)); 93 return; 94 } 95 96 mutex_lock(&core->lock); 97 core->sys_error = false; 98 mutex_unlock(&core->lock); 99 } 100 101 static u32 to_v4l2_codec_type(u32 codec) 102 { 103 switch (codec) { 104 case HFI_VIDEO_CODEC_H264: 105 return V4L2_PIX_FMT_H264; 106 case HFI_VIDEO_CODEC_H263: 107 return V4L2_PIX_FMT_H263; 108 case HFI_VIDEO_CODEC_MPEG1: 109 return V4L2_PIX_FMT_MPEG1; 110 case HFI_VIDEO_CODEC_MPEG2: 111 return V4L2_PIX_FMT_MPEG2; 112 case HFI_VIDEO_CODEC_MPEG4: 113 return V4L2_PIX_FMT_MPEG4; 114 case HFI_VIDEO_CODEC_VC1: 115 return V4L2_PIX_FMT_VC1_ANNEX_G; 116 case HFI_VIDEO_CODEC_VP8: 117 return V4L2_PIX_FMT_VP8; 118 case HFI_VIDEO_CODEC_VP9: 119 return V4L2_PIX_FMT_VP9; 120 case HFI_VIDEO_CODEC_DIVX: 121 case HFI_VIDEO_CODEC_DIVX_311: 122 return V4L2_PIX_FMT_XVID; 123 default: 124 return 0; 125 } 126 } 127 128 static int venus_enumerate_codecs(struct venus_core *core, u32 type) 129 { 130 const struct hfi_inst_ops dummy_ops = {}; 131 struct venus_inst *inst; 132 u32 codec, codecs; 133 unsigned int i; 134 int ret; 135 136 if (core->res->hfi_version != HFI_VERSION_1XX) 137 return 0; 138 139 inst = kzalloc(sizeof(*inst), GFP_KERNEL); 140 if (!inst) 141 return -ENOMEM; 142 143 mutex_init(&inst->lock); 144 inst->core = core; 145 inst->session_type = type; 146 if (type == VIDC_SESSION_TYPE_DEC) 147 codecs = core->dec_codecs; 148 else 149 codecs = core->enc_codecs; 150 151 ret = hfi_session_create(inst, &dummy_ops); 152 if (ret) 153 goto err; 154 155 for (i = 0; i < MAX_CODEC_NUM; i++) { 156 codec = (1UL << i) & codecs; 157 if (!codec) 158 continue; 159 160 ret = hfi_session_init(inst, to_v4l2_codec_type(codec)); 161 if (ret) 162 goto done; 163 164 ret = hfi_session_deinit(inst); 165 if (ret) 166 goto done; 167 } 168 169 done: 170 hfi_session_destroy(inst); 171 err: 172 mutex_destroy(&inst->lock); 173 kfree(inst); 174 175 return ret; 176 } 177 178 static int venus_probe(struct platform_device *pdev) 179 { 180 struct device *dev = &pdev->dev; 181 struct venus_core *core; 182 struct resource *r; 183 int ret; 184 185 core = devm_kzalloc(dev, sizeof(*core), GFP_KERNEL); 186 if (!core) 187 return -ENOMEM; 188 189 core->dev = dev; 190 platform_set_drvdata(pdev, core); 191 192 r = platform_get_resource(pdev, IORESOURCE_MEM, 0); 193 core->base = devm_ioremap_resource(dev, r); 194 if (IS_ERR(core->base)) 195 return PTR_ERR(core->base); 196 197 core->video_path = of_icc_get(dev, "video-mem"); 198 if (IS_ERR(core->video_path)) 199 return PTR_ERR(core->video_path); 200 201 core->cpucfg_path = of_icc_get(dev, "cpu-cfg"); 202 if (IS_ERR(core->cpucfg_path)) 203 return PTR_ERR(core->cpucfg_path); 204 205 core->irq = platform_get_irq(pdev, 0); 206 if (core->irq < 0) 207 return core->irq; 208 209 core->res = of_device_get_match_data(dev); 210 if (!core->res) 211 return -ENODEV; 212 213 mutex_init(&core->pm_lock); 214 215 core->pm_ops = venus_pm_get(core->res->hfi_version); 216 if (!core->pm_ops) 217 return -ENODEV; 218 219 if (core->pm_ops->core_get) { 220 ret = core->pm_ops->core_get(dev); 221 if (ret) 222 return ret; 223 } 224 225 ret = dma_set_mask_and_coherent(dev, core->res->dma_mask); 226 if (ret) 227 return ret; 228 229 if (!dev->dma_parms) { 230 dev->dma_parms = devm_kzalloc(dev, sizeof(*dev->dma_parms), 231 GFP_KERNEL); 232 if (!dev->dma_parms) 233 return -ENOMEM; 234 } 235 dma_set_max_seg_size(dev, DMA_BIT_MASK(32)); 236 237 INIT_LIST_HEAD(&core->instances); 238 mutex_init(&core->lock); 239 INIT_DELAYED_WORK(&core->work, venus_sys_error_handler); 240 241 ret = devm_request_threaded_irq(dev, core->irq, hfi_isr, hfi_isr_thread, 242 IRQF_TRIGGER_HIGH | IRQF_ONESHOT, 243 "venus", core); 244 if (ret) 245 return ret; 246 247 ret = hfi_create(core, &venus_core_ops); 248 if (ret) 249 return ret; 250 251 pm_runtime_enable(dev); 252 253 ret = pm_runtime_get_sync(dev); 254 if (ret < 0) 255 goto err_runtime_disable; 256 257 ret = of_platform_populate(dev->of_node, NULL, NULL, dev); 258 if (ret) 259 goto err_runtime_disable; 260 261 ret = venus_firmware_init(core); 262 if (ret) 263 goto err_runtime_disable; 264 265 ret = venus_boot(core); 266 if (ret) 267 goto err_runtime_disable; 268 269 ret = hfi_core_resume(core, true); 270 if (ret) 271 goto err_venus_shutdown; 272 273 ret = hfi_core_init(core); 274 if (ret) 275 goto err_venus_shutdown; 276 277 ret = venus_enumerate_codecs(core, VIDC_SESSION_TYPE_DEC); 278 if (ret) 279 goto err_venus_shutdown; 280 281 ret = venus_enumerate_codecs(core, VIDC_SESSION_TYPE_ENC); 282 if (ret) 283 goto err_venus_shutdown; 284 285 ret = v4l2_device_register(dev, &core->v4l2_dev); 286 if (ret) 287 goto err_core_deinit; 288 289 ret = pm_runtime_put_sync(dev); 290 if (ret) 291 goto err_dev_unregister; 292 293 return 0; 294 295 err_dev_unregister: 296 v4l2_device_unregister(&core->v4l2_dev); 297 err_core_deinit: 298 hfi_core_deinit(core, false); 299 err_venus_shutdown: 300 venus_shutdown(core); 301 err_runtime_disable: 302 pm_runtime_set_suspended(dev); 303 pm_runtime_disable(dev); 304 hfi_destroy(core); 305 return ret; 306 } 307 308 static int venus_remove(struct platform_device *pdev) 309 { 310 struct venus_core *core = platform_get_drvdata(pdev); 311 const struct venus_pm_ops *pm_ops = core->pm_ops; 312 struct device *dev = core->dev; 313 int ret; 314 315 ret = pm_runtime_get_sync(dev); 316 WARN_ON(ret < 0); 317 318 ret = hfi_core_deinit(core, true); 319 WARN_ON(ret); 320 321 venus_shutdown(core); 322 of_platform_depopulate(dev); 323 324 venus_firmware_deinit(core); 325 326 pm_runtime_put_sync(dev); 327 pm_runtime_disable(dev); 328 329 if (pm_ops->core_put) 330 pm_ops->core_put(dev); 331 332 hfi_destroy(core); 333 334 icc_put(core->video_path); 335 icc_put(core->cpucfg_path); 336 337 v4l2_device_unregister(&core->v4l2_dev); 338 mutex_destroy(&core->pm_lock); 339 mutex_destroy(&core->lock); 340 341 return ret; 342 } 343 344 static __maybe_unused int venus_runtime_suspend(struct device *dev) 345 { 346 struct venus_core *core = dev_get_drvdata(dev); 347 const struct venus_pm_ops *pm_ops = core->pm_ops; 348 int ret; 349 350 ret = hfi_core_suspend(core); 351 if (ret) 352 return ret; 353 354 ret = icc_set_bw(core->cpucfg_path, 0, 0); 355 if (ret) 356 return ret; 357 358 if (pm_ops->core_power) 359 ret = pm_ops->core_power(dev, POWER_OFF); 360 361 return ret; 362 } 363 364 static __maybe_unused int venus_runtime_resume(struct device *dev) 365 { 366 struct venus_core *core = dev_get_drvdata(dev); 367 const struct venus_pm_ops *pm_ops = core->pm_ops; 368 int ret; 369 370 if (pm_ops->core_power) { 371 ret = pm_ops->core_power(dev, POWER_ON); 372 if (ret) 373 return ret; 374 } 375 376 ret = icc_set_bw(core->cpucfg_path, 0, kbps_to_icc(1000)); 377 if (ret) 378 return ret; 379 380 return hfi_core_resume(core, false); 381 } 382 383 static const struct dev_pm_ops venus_pm_ops = { 384 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, 385 pm_runtime_force_resume) 386 SET_RUNTIME_PM_OPS(venus_runtime_suspend, venus_runtime_resume, NULL) 387 }; 388 389 static const struct freq_tbl msm8916_freq_table[] = { 390 { 352800, 228570000 }, /* 1920x1088 @ 30 + 1280x720 @ 30 */ 391 { 244800, 160000000 }, /* 1920x1088 @ 30 */ 392 { 108000, 100000000 }, /* 1280x720 @ 30 */ 393 }; 394 395 static const struct reg_val msm8916_reg_preset[] = { 396 { 0xe0020, 0x05555556 }, 397 { 0xe0024, 0x05555556 }, 398 { 0x80124, 0x00000003 }, 399 }; 400 401 static const struct venus_resources msm8916_res = { 402 .freq_tbl = msm8916_freq_table, 403 .freq_tbl_size = ARRAY_SIZE(msm8916_freq_table), 404 .reg_tbl = msm8916_reg_preset, 405 .reg_tbl_size = ARRAY_SIZE(msm8916_reg_preset), 406 .clks = { "core", "iface", "bus", }, 407 .clks_num = 3, 408 .max_load = 352800, /* 720p@30 + 1080p@30 */ 409 .hfi_version = HFI_VERSION_1XX, 410 .vmem_id = VIDC_RESOURCE_NONE, 411 .vmem_size = 0, 412 .vmem_addr = 0, 413 .dma_mask = 0xddc00000 - 1, 414 .fwname = "qcom/venus-1.8/venus.mdt", 415 }; 416 417 static const struct freq_tbl msm8996_freq_table[] = { 418 { 1944000, 520000000 }, /* 4k UHD @ 60 (decode only) */ 419 { 972000, 520000000 }, /* 4k UHD @ 30 */ 420 { 489600, 346666667 }, /* 1080p @ 60 */ 421 { 244800, 150000000 }, /* 1080p @ 30 */ 422 { 108000, 75000000 }, /* 720p @ 30 */ 423 }; 424 425 static const struct reg_val msm8996_reg_preset[] = { 426 { 0x80010, 0xffffffff }, 427 { 0x80018, 0x00001556 }, 428 { 0x8001C, 0x00001556 }, 429 }; 430 431 static const struct venus_resources msm8996_res = { 432 .freq_tbl = msm8996_freq_table, 433 .freq_tbl_size = ARRAY_SIZE(msm8996_freq_table), 434 .reg_tbl = msm8996_reg_preset, 435 .reg_tbl_size = ARRAY_SIZE(msm8996_reg_preset), 436 .clks = {"core", "iface", "bus", "mbus" }, 437 .clks_num = 4, 438 .vcodec0_clks = { "core" }, 439 .vcodec1_clks = { "core" }, 440 .vcodec_clks_num = 1, 441 .max_load = 2563200, 442 .hfi_version = HFI_VERSION_3XX, 443 .vmem_id = VIDC_RESOURCE_NONE, 444 .vmem_size = 0, 445 .vmem_addr = 0, 446 .dma_mask = 0xddc00000 - 1, 447 .fwname = "qcom/venus-4.2/venus.mdt", 448 }; 449 450 static const struct freq_tbl sdm845_freq_table[] = { 451 { 3110400, 533000000 }, /* 4096x2160@90 */ 452 { 2073600, 444000000 }, /* 4096x2160@60 */ 453 { 1944000, 404000000 }, /* 3840x2160@60 */ 454 { 972000, 330000000 }, /* 3840x2160@30 */ 455 { 489600, 200000000 }, /* 1920x1080@60 */ 456 { 244800, 100000000 }, /* 1920x1080@30 */ 457 }; 458 459 static const struct codec_freq_data sdm845_codec_freq_data[] = { 460 { V4L2_PIX_FMT_H264, VIDC_SESSION_TYPE_ENC, 675, 10 }, 461 { V4L2_PIX_FMT_HEVC, VIDC_SESSION_TYPE_ENC, 675, 10 }, 462 { V4L2_PIX_FMT_VP8, VIDC_SESSION_TYPE_ENC, 675, 10 }, 463 { V4L2_PIX_FMT_MPEG2, VIDC_SESSION_TYPE_DEC, 200, 10 }, 464 { V4L2_PIX_FMT_H264, VIDC_SESSION_TYPE_DEC, 200, 10 }, 465 { V4L2_PIX_FMT_HEVC, VIDC_SESSION_TYPE_DEC, 200, 10 }, 466 { V4L2_PIX_FMT_VP8, VIDC_SESSION_TYPE_DEC, 200, 10 }, 467 { V4L2_PIX_FMT_VP9, VIDC_SESSION_TYPE_DEC, 200, 10 }, 468 }; 469 470 static const struct bw_tbl sdm845_bw_table_enc[] = { 471 { 1944000, 1612000, 0, 2416000, 0 }, /* 3840x2160@60 */ 472 { 972000, 951000, 0, 1434000, 0 }, /* 3840x2160@30 */ 473 { 489600, 723000, 0, 973000, 0 }, /* 1920x1080@60 */ 474 { 244800, 370000, 0, 495000, 0 }, /* 1920x1080@30 */ 475 }; 476 477 static const struct bw_tbl sdm845_bw_table_dec[] = { 478 { 2073600, 3929000, 0, 5551000, 0 }, /* 4096x2160@60 */ 479 { 1036800, 1987000, 0, 2797000, 0 }, /* 4096x2160@30 */ 480 { 489600, 1040000, 0, 1298000, 0 }, /* 1920x1080@60 */ 481 { 244800, 530000, 0, 659000, 0 }, /* 1920x1080@30 */ 482 }; 483 484 static const struct venus_resources sdm845_res = { 485 .freq_tbl = sdm845_freq_table, 486 .freq_tbl_size = ARRAY_SIZE(sdm845_freq_table), 487 .bw_tbl_enc = sdm845_bw_table_enc, 488 .bw_tbl_enc_size = ARRAY_SIZE(sdm845_bw_table_enc), 489 .bw_tbl_dec = sdm845_bw_table_dec, 490 .bw_tbl_dec_size = ARRAY_SIZE(sdm845_bw_table_dec), 491 .codec_freq_data = sdm845_codec_freq_data, 492 .codec_freq_data_size = ARRAY_SIZE(sdm845_codec_freq_data), 493 .clks = {"core", "iface", "bus" }, 494 .clks_num = 3, 495 .vcodec0_clks = { "core", "bus" }, 496 .vcodec1_clks = { "core", "bus" }, 497 .vcodec_clks_num = 2, 498 .max_load = 3110400, /* 4096x2160@90 */ 499 .hfi_version = HFI_VERSION_4XX, 500 .vmem_id = VIDC_RESOURCE_NONE, 501 .vmem_size = 0, 502 .vmem_addr = 0, 503 .dma_mask = 0xe0000000 - 1, 504 .fwname = "qcom/venus-5.2/venus.mdt", 505 }; 506 507 static const struct venus_resources sdm845_res_v2 = { 508 .freq_tbl = sdm845_freq_table, 509 .freq_tbl_size = ARRAY_SIZE(sdm845_freq_table), 510 .bw_tbl_enc = sdm845_bw_table_enc, 511 .bw_tbl_enc_size = ARRAY_SIZE(sdm845_bw_table_enc), 512 .bw_tbl_dec = sdm845_bw_table_dec, 513 .bw_tbl_dec_size = ARRAY_SIZE(sdm845_bw_table_dec), 514 .codec_freq_data = sdm845_codec_freq_data, 515 .codec_freq_data_size = ARRAY_SIZE(sdm845_codec_freq_data), 516 .clks = {"core", "iface", "bus" }, 517 .clks_num = 3, 518 .vcodec0_clks = { "vcodec0_core", "vcodec0_bus" }, 519 .vcodec1_clks = { "vcodec1_core", "vcodec1_bus" }, 520 .vcodec_clks_num = 2, 521 .vcodec_pmdomains = { "venus", "vcodec0", "vcodec1" }, 522 .vcodec_pmdomains_num = 3, 523 .vcodec_num = 2, 524 .max_load = 3110400, /* 4096x2160@90 */ 525 .hfi_version = HFI_VERSION_4XX, 526 .vmem_id = VIDC_RESOURCE_NONE, 527 .vmem_size = 0, 528 .vmem_addr = 0, 529 .dma_mask = 0xe0000000 - 1, 530 .fwname = "qcom/venus-5.2/venus.mdt", 531 }; 532 533 static const struct freq_tbl sc7180_freq_table[] = { 534 { 0, 500000000 }, 535 { 0, 434000000 }, 536 { 0, 340000000 }, 537 { 0, 270000000 }, 538 { 0, 150000000 }, 539 }; 540 541 static const struct bw_tbl sc7180_bw_table_enc[] = { 542 { 972000, 750000, 0, 0, 0 }, /* 3840x2160@30 */ 543 { 489600, 451000, 0, 0, 0 }, /* 1920x1080@60 */ 544 { 244800, 234000, 0, 0, 0 }, /* 1920x1080@30 */ 545 }; 546 547 static const struct bw_tbl sc7180_bw_table_dec[] = { 548 { 1036800, 1386000, 0, 1875000, 0 }, /* 4096x2160@30 */ 549 { 489600, 865000, 0, 1146000, 0 }, /* 1920x1080@60 */ 550 { 244800, 530000, 0, 583000, 0 }, /* 1920x1080@30 */ 551 }; 552 553 static const struct venus_resources sc7180_res = { 554 .freq_tbl = sc7180_freq_table, 555 .freq_tbl_size = ARRAY_SIZE(sc7180_freq_table), 556 .bw_tbl_enc = sc7180_bw_table_enc, 557 .bw_tbl_enc_size = ARRAY_SIZE(sc7180_bw_table_enc), 558 .bw_tbl_dec = sc7180_bw_table_dec, 559 .bw_tbl_dec_size = ARRAY_SIZE(sc7180_bw_table_dec), 560 .codec_freq_data = sdm845_codec_freq_data, 561 .codec_freq_data_size = ARRAY_SIZE(sdm845_codec_freq_data), 562 .clks = {"core", "iface", "bus" }, 563 .clks_num = 3, 564 .vcodec0_clks = { "vcodec0_core", "vcodec0_bus" }, 565 .vcodec_clks_num = 2, 566 .vcodec_pmdomains = { "venus", "vcodec0" }, 567 .vcodec_pmdomains_num = 2, 568 .vcodec_num = 1, 569 .hfi_version = HFI_VERSION_4XX, 570 .vmem_id = VIDC_RESOURCE_NONE, 571 .vmem_size = 0, 572 .vmem_addr = 0, 573 .dma_mask = 0xe0000000 - 1, 574 .fwname = "qcom/venus-5.4/venus.mdt", 575 }; 576 577 static const struct of_device_id venus_dt_match[] = { 578 { .compatible = "qcom,msm8916-venus", .data = &msm8916_res, }, 579 { .compatible = "qcom,msm8996-venus", .data = &msm8996_res, }, 580 { .compatible = "qcom,sdm845-venus", .data = &sdm845_res, }, 581 { .compatible = "qcom,sdm845-venus-v2", .data = &sdm845_res_v2, }, 582 { .compatible = "qcom,sc7180-venus", .data = &sc7180_res, }, 583 { } 584 }; 585 MODULE_DEVICE_TABLE(of, venus_dt_match); 586 587 static struct platform_driver qcom_venus_driver = { 588 .probe = venus_probe, 589 .remove = venus_remove, 590 .driver = { 591 .name = "qcom-venus", 592 .of_match_table = venus_dt_match, 593 .pm = &venus_pm_ops, 594 }, 595 }; 596 module_platform_driver(qcom_venus_driver); 597 598 MODULE_ALIAS("platform:qcom-venus"); 599 MODULE_DESCRIPTION("Qualcomm Venus video encoder and decoder driver"); 600 MODULE_LICENSE("GPL v2"); 601