1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * camss.h 4 * 5 * Qualcomm MSM Camera Subsystem - Core 6 * 7 * Copyright (c) 2015, The Linux Foundation. All rights reserved. 8 * Copyright (C) 2015-2018 Linaro Ltd. 9 */ 10 #ifndef QC_MSM_CAMSS_H 11 #define QC_MSM_CAMSS_H 12 13 #include <linux/device.h> 14 #include <linux/types.h> 15 #include <media/v4l2-async.h> 16 #include <media/v4l2-device.h> 17 #include <media/v4l2-subdev.h> 18 #include <media/media-device.h> 19 #include <media/media-entity.h> 20 #include <linux/device.h> 21 22 #include "camss-csid.h" 23 #include "camss-csiphy.h" 24 #include "camss-ispif.h" 25 #include "camss-vfe.h" 26 27 #define to_camss(ptr_module) \ 28 container_of(ptr_module, struct camss, ptr_module) 29 30 #define to_device(ptr_module) \ 31 (to_camss(ptr_module)->dev) 32 33 #define module_pointer(ptr_module, index) \ 34 ((const struct ptr_module##_device (*)[]) &(ptr_module[-(index)])) 35 36 #define to_camss_index(ptr_module, index) \ 37 container_of(module_pointer(ptr_module, index), \ 38 struct camss, ptr_module) 39 40 #define to_device_index(ptr_module, index) \ 41 (to_camss_index(ptr_module, index)->dev) 42 43 #define CAMSS_RES_MAX 17 44 45 struct resources { 46 char *regulator[CAMSS_RES_MAX]; 47 char *clock[CAMSS_RES_MAX]; 48 u32 clock_rate[CAMSS_RES_MAX][CAMSS_RES_MAX]; 49 char *reg[CAMSS_RES_MAX]; 50 char *interrupt[CAMSS_RES_MAX]; 51 }; 52 53 struct resources_ispif { 54 char *clock[CAMSS_RES_MAX]; 55 char *clock_for_reset[CAMSS_RES_MAX]; 56 char *reg[CAMSS_RES_MAX]; 57 char *interrupt; 58 }; 59 60 enum pm_domain { 61 PM_DOMAIN_VFE0, 62 PM_DOMAIN_VFE1, 63 PM_DOMAIN_COUNT 64 }; 65 66 enum camss_version { 67 CAMSS_8x16, 68 CAMSS_8x96, 69 }; 70 71 struct camss { 72 enum camss_version version; 73 struct v4l2_device v4l2_dev; 74 struct v4l2_async_notifier notifier; 75 struct media_device media_dev; 76 struct device *dev; 77 int csiphy_num; 78 struct csiphy_device *csiphy; 79 int csid_num; 80 struct csid_device *csid; 81 struct ispif_device ispif; 82 int vfe_num; 83 struct vfe_device *vfe; 84 atomic_t ref_count; 85 struct device *genpd[PM_DOMAIN_COUNT]; 86 struct device_link *genpd_link[PM_DOMAIN_COUNT]; 87 }; 88 89 struct camss_camera_interface { 90 u8 csiphy_id; 91 struct csiphy_csi2_cfg csi2; 92 }; 93 94 struct camss_async_subdev { 95 struct camss_camera_interface interface; 96 struct v4l2_async_subdev asd; 97 }; 98 99 struct camss_clock { 100 struct clk *clk; 101 const char *name; 102 u32 *freq; 103 u32 nfreqs; 104 }; 105 106 void camss_add_clock_margin(u64 *rate); 107 int camss_enable_clocks(int nclocks, struct camss_clock *clock, 108 struct device *dev); 109 void camss_disable_clocks(int nclocks, struct camss_clock *clock); 110 int camss_get_pixel_clock(struct media_entity *entity, u32 *pixel_clock); 111 int camss_pm_domain_on(struct camss *camss, int id); 112 void camss_pm_domain_off(struct camss *camss, int id); 113 void camss_delete(struct camss *camss); 114 115 #endif /* QC_MSM_CAMSS_H */ 116