1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * camss.h
4  *
5  * Qualcomm MSM Camera Subsystem - Core
6  *
7  * Copyright (c) 2015, The Linux Foundation. All rights reserved.
8  * Copyright (C) 2015-2018 Linaro Ltd.
9  */
10 #ifndef QC_MSM_CAMSS_H
11 #define QC_MSM_CAMSS_H
12 
13 #include <linux/device.h>
14 #include <linux/types.h>
15 #include <media/v4l2-async.h>
16 #include <media/v4l2-device.h>
17 #include <media/v4l2-subdev.h>
18 #include <media/media-device.h>
19 #include <media/media-entity.h>
20 
21 #include "camss-csid.h"
22 #include "camss-csiphy.h"
23 #include "camss-ispif.h"
24 #include "camss-vfe.h"
25 
26 #define to_camss(ptr_module)	\
27 	container_of(ptr_module, struct camss, ptr_module)
28 
29 #define to_device(ptr_module)	\
30 	(to_camss(ptr_module)->dev)
31 
32 #define module_pointer(ptr_module, index)	\
33 	((const struct ptr_module##_device (*)[]) &(ptr_module[-(index)]))
34 
35 #define to_camss_index(ptr_module, index)	\
36 	container_of(module_pointer(ptr_module, index),	\
37 		     struct camss, ptr_module)
38 
39 #define to_device_index(ptr_module, index)	\
40 	(to_camss_index(ptr_module, index)->dev)
41 
42 #define CAMSS_RES_MAX 17
43 
44 struct resources {
45 	char *regulator[CAMSS_RES_MAX];
46 	char *clock[CAMSS_RES_MAX];
47 	u32 clock_rate[CAMSS_RES_MAX][CAMSS_RES_MAX];
48 	char *reg[CAMSS_RES_MAX];
49 	char *interrupt[CAMSS_RES_MAX];
50 };
51 
52 struct resources_ispif {
53 	char *clock[CAMSS_RES_MAX];
54 	char *clock_for_reset[CAMSS_RES_MAX];
55 	char *reg[CAMSS_RES_MAX];
56 	char *interrupt;
57 };
58 
59 enum pm_domain {
60 	PM_DOMAIN_VFE0,
61 	PM_DOMAIN_VFE1,
62 	PM_DOMAIN_COUNT
63 };
64 
65 enum camss_version {
66 	CAMSS_8x16,
67 	CAMSS_8x96,
68 };
69 
70 struct camss {
71 	enum camss_version version;
72 	struct v4l2_device v4l2_dev;
73 	struct v4l2_async_notifier notifier;
74 	struct media_device media_dev;
75 	struct device *dev;
76 	int csiphy_num;
77 	struct csiphy_device *csiphy;
78 	int csid_num;
79 	struct csid_device *csid;
80 	struct ispif_device ispif;
81 	int vfe_num;
82 	struct vfe_device *vfe;
83 	atomic_t ref_count;
84 	struct device *genpd[PM_DOMAIN_COUNT];
85 	struct device_link *genpd_link[PM_DOMAIN_COUNT];
86 };
87 
88 struct camss_camera_interface {
89 	u8 csiphy_id;
90 	struct csiphy_csi2_cfg csi2;
91 };
92 
93 struct camss_async_subdev {
94 	struct v4l2_async_subdev asd; /* must be first */
95 	struct camss_camera_interface interface;
96 };
97 
98 struct camss_clock {
99 	struct clk *clk;
100 	const char *name;
101 	u32 *freq;
102 	u32 nfreqs;
103 };
104 
105 void camss_add_clock_margin(u64 *rate);
106 int camss_enable_clocks(int nclocks, struct camss_clock *clock,
107 			struct device *dev);
108 void camss_disable_clocks(int nclocks, struct camss_clock *clock);
109 struct media_entity *camss_find_sensor(struct media_entity *entity);
110 int camss_get_pixel_clock(struct media_entity *entity, u32 *pixel_clock);
111 int camss_pm_domain_on(struct camss *camss, int id);
112 void camss_pm_domain_off(struct camss *camss, int id);
113 void camss_delete(struct camss *camss);
114 
115 #endif /* QC_MSM_CAMSS_H */
116