1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * camss-csiphy.c 4 * 5 * Qualcomm MSM Camera Subsystem - CSIPHY Module 6 * 7 * Copyright (c) 2011-2015, The Linux Foundation. All rights reserved. 8 * Copyright (C) 2016-2018 Linaro Ltd. 9 */ 10 #include <linux/clk.h> 11 #include <linux/delay.h> 12 #include <linux/interrupt.h> 13 #include <linux/io.h> 14 #include <linux/kernel.h> 15 #include <linux/of.h> 16 #include <linux/platform_device.h> 17 #include <linux/pm_runtime.h> 18 #include <media/media-entity.h> 19 #include <media/v4l2-device.h> 20 #include <media/v4l2-subdev.h> 21 22 #include "camss-csiphy.h" 23 #include "camss.h" 24 25 #define MSM_CSIPHY_NAME "msm_csiphy" 26 27 struct csiphy_format { 28 u32 code; 29 u8 bpp; 30 }; 31 32 static const struct csiphy_format csiphy_formats_8x16[] = { 33 { MEDIA_BUS_FMT_UYVY8_2X8, 8 }, 34 { MEDIA_BUS_FMT_VYUY8_2X8, 8 }, 35 { MEDIA_BUS_FMT_YUYV8_2X8, 8 }, 36 { MEDIA_BUS_FMT_YVYU8_2X8, 8 }, 37 { MEDIA_BUS_FMT_SBGGR8_1X8, 8 }, 38 { MEDIA_BUS_FMT_SGBRG8_1X8, 8 }, 39 { MEDIA_BUS_FMT_SGRBG8_1X8, 8 }, 40 { MEDIA_BUS_FMT_SRGGB8_1X8, 8 }, 41 { MEDIA_BUS_FMT_SBGGR10_1X10, 10 }, 42 { MEDIA_BUS_FMT_SGBRG10_1X10, 10 }, 43 { MEDIA_BUS_FMT_SGRBG10_1X10, 10 }, 44 { MEDIA_BUS_FMT_SRGGB10_1X10, 10 }, 45 { MEDIA_BUS_FMT_SBGGR12_1X12, 12 }, 46 { MEDIA_BUS_FMT_SGBRG12_1X12, 12 }, 47 { MEDIA_BUS_FMT_SGRBG12_1X12, 12 }, 48 { MEDIA_BUS_FMT_SRGGB12_1X12, 12 }, 49 { MEDIA_BUS_FMT_Y10_1X10, 10 }, 50 }; 51 52 static const struct csiphy_format csiphy_formats_8x96[] = { 53 { MEDIA_BUS_FMT_UYVY8_2X8, 8 }, 54 { MEDIA_BUS_FMT_VYUY8_2X8, 8 }, 55 { MEDIA_BUS_FMT_YUYV8_2X8, 8 }, 56 { MEDIA_BUS_FMT_YVYU8_2X8, 8 }, 57 { MEDIA_BUS_FMT_SBGGR8_1X8, 8 }, 58 { MEDIA_BUS_FMT_SGBRG8_1X8, 8 }, 59 { MEDIA_BUS_FMT_SGRBG8_1X8, 8 }, 60 { MEDIA_BUS_FMT_SRGGB8_1X8, 8 }, 61 { MEDIA_BUS_FMT_SBGGR10_1X10, 10 }, 62 { MEDIA_BUS_FMT_SGBRG10_1X10, 10 }, 63 { MEDIA_BUS_FMT_SGRBG10_1X10, 10 }, 64 { MEDIA_BUS_FMT_SRGGB10_1X10, 10 }, 65 { MEDIA_BUS_FMT_SBGGR12_1X12, 12 }, 66 { MEDIA_BUS_FMT_SGBRG12_1X12, 12 }, 67 { MEDIA_BUS_FMT_SGRBG12_1X12, 12 }, 68 { MEDIA_BUS_FMT_SRGGB12_1X12, 12 }, 69 { MEDIA_BUS_FMT_SBGGR14_1X14, 14 }, 70 { MEDIA_BUS_FMT_SGBRG14_1X14, 14 }, 71 { MEDIA_BUS_FMT_SGRBG14_1X14, 14 }, 72 { MEDIA_BUS_FMT_SRGGB14_1X14, 14 }, 73 { MEDIA_BUS_FMT_Y10_1X10, 10 }, 74 }; 75 76 static const struct csiphy_format csiphy_formats_sdm845[] = { 77 { MEDIA_BUS_FMT_UYVY8_2X8, 8 }, 78 { MEDIA_BUS_FMT_VYUY8_2X8, 8 }, 79 { MEDIA_BUS_FMT_YUYV8_2X8, 8 }, 80 { MEDIA_BUS_FMT_YVYU8_2X8, 8 }, 81 { MEDIA_BUS_FMT_SBGGR8_1X8, 8 }, 82 { MEDIA_BUS_FMT_SGBRG8_1X8, 8 }, 83 { MEDIA_BUS_FMT_SGRBG8_1X8, 8 }, 84 { MEDIA_BUS_FMT_SRGGB8_1X8, 8 }, 85 { MEDIA_BUS_FMT_SBGGR10_1X10, 10 }, 86 { MEDIA_BUS_FMT_SGBRG10_1X10, 10 }, 87 { MEDIA_BUS_FMT_SGRBG10_1X10, 10 }, 88 { MEDIA_BUS_FMT_SRGGB10_1X10, 10 }, 89 { MEDIA_BUS_FMT_SBGGR12_1X12, 12 }, 90 { MEDIA_BUS_FMT_SGBRG12_1X12, 12 }, 91 { MEDIA_BUS_FMT_SGRBG12_1X12, 12 }, 92 { MEDIA_BUS_FMT_SRGGB12_1X12, 12 }, 93 { MEDIA_BUS_FMT_SBGGR14_1X14, 14 }, 94 { MEDIA_BUS_FMT_SGBRG14_1X14, 14 }, 95 { MEDIA_BUS_FMT_SGRBG14_1X14, 14 }, 96 { MEDIA_BUS_FMT_SRGGB14_1X14, 14 }, 97 { MEDIA_BUS_FMT_Y8_1X8, 8 }, 98 { MEDIA_BUS_FMT_Y10_1X10, 10 }, 99 }; 100 101 /* 102 * csiphy_get_bpp - map media bus format to bits per pixel 103 * @formats: supported media bus formats array 104 * @nformats: size of @formats array 105 * @code: media bus format code 106 * 107 * Return number of bits per pixel 108 */ 109 static u8 csiphy_get_bpp(const struct csiphy_format *formats, 110 unsigned int nformats, u32 code) 111 { 112 unsigned int i; 113 114 for (i = 0; i < nformats; i++) 115 if (code == formats[i].code) 116 return formats[i].bpp; 117 118 WARN(1, "Unknown format\n"); 119 120 return formats[0].bpp; 121 } 122 123 /* 124 * csiphy_set_clock_rates - Calculate and set clock rates on CSIPHY module 125 * @csiphy: CSIPHY device 126 */ 127 static int csiphy_set_clock_rates(struct csiphy_device *csiphy) 128 { 129 struct device *dev = csiphy->camss->dev; 130 s64 link_freq; 131 int i, j; 132 int ret; 133 134 u8 bpp = csiphy_get_bpp(csiphy->formats, csiphy->nformats, 135 csiphy->fmt[MSM_CSIPHY_PAD_SINK].code); 136 u8 num_lanes = csiphy->cfg.csi2->lane_cfg.num_data; 137 138 link_freq = camss_get_link_freq(&csiphy->subdev.entity, bpp, num_lanes); 139 if (link_freq < 0) 140 link_freq = 0; 141 142 for (i = 0; i < csiphy->nclocks; i++) { 143 struct camss_clock *clock = &csiphy->clock[i]; 144 145 if (csiphy->rate_set[i]) { 146 u64 min_rate = link_freq / 4; 147 long round_rate; 148 149 camss_add_clock_margin(&min_rate); 150 151 for (j = 0; j < clock->nfreqs; j++) 152 if (min_rate < clock->freq[j]) 153 break; 154 155 if (j == clock->nfreqs) { 156 dev_err(dev, 157 "Pixel clock is too high for CSIPHY\n"); 158 return -EINVAL; 159 } 160 161 /* if sensor pixel clock is not available */ 162 /* set highest possible CSIPHY clock rate */ 163 if (min_rate == 0) 164 j = clock->nfreqs - 1; 165 166 round_rate = clk_round_rate(clock->clk, clock->freq[j]); 167 if (round_rate < 0) { 168 dev_err(dev, "clk round rate failed: %ld\n", 169 round_rate); 170 return -EINVAL; 171 } 172 173 csiphy->timer_clk_rate = round_rate; 174 175 ret = clk_set_rate(clock->clk, csiphy->timer_clk_rate); 176 if (ret < 0) { 177 dev_err(dev, "clk set rate failed: %d\n", ret); 178 return ret; 179 } 180 } 181 } 182 183 return 0; 184 } 185 186 /* 187 * csiphy_set_power - Power on/off CSIPHY module 188 * @sd: CSIPHY V4L2 subdevice 189 * @on: Requested power state 190 * 191 * Return 0 on success or a negative error code otherwise 192 */ 193 static int csiphy_set_power(struct v4l2_subdev *sd, int on) 194 { 195 struct csiphy_device *csiphy = v4l2_get_subdevdata(sd); 196 struct device *dev = csiphy->camss->dev; 197 198 if (on) { 199 int ret; 200 201 ret = pm_runtime_resume_and_get(dev); 202 if (ret < 0) 203 return ret; 204 205 ret = csiphy_set_clock_rates(csiphy); 206 if (ret < 0) { 207 pm_runtime_put_sync(dev); 208 return ret; 209 } 210 211 ret = camss_enable_clocks(csiphy->nclocks, csiphy->clock, dev); 212 if (ret < 0) { 213 pm_runtime_put_sync(dev); 214 return ret; 215 } 216 217 enable_irq(csiphy->irq); 218 219 csiphy->ops->reset(csiphy); 220 221 csiphy->ops->hw_version_read(csiphy, dev); 222 } else { 223 disable_irq(csiphy->irq); 224 225 camss_disable_clocks(csiphy->nclocks, csiphy->clock); 226 227 pm_runtime_put_sync(dev); 228 } 229 230 return 0; 231 } 232 233 /* 234 * csiphy_get_lane_mask - Calculate CSI2 lane mask configuration parameter 235 * @lane_cfg - CSI2 lane configuration 236 * 237 * Return lane mask 238 */ 239 static u8 csiphy_get_lane_mask(struct csiphy_lanes_cfg *lane_cfg) 240 { 241 u8 lane_mask; 242 int i; 243 244 lane_mask = 1 << lane_cfg->clk.pos; 245 246 for (i = 0; i < lane_cfg->num_data; i++) 247 lane_mask |= 1 << lane_cfg->data[i].pos; 248 249 return lane_mask; 250 } 251 252 /* 253 * csiphy_stream_on - Enable streaming on CSIPHY module 254 * @csiphy: CSIPHY device 255 * 256 * Helper function to enable streaming on CSIPHY module. 257 * Main configuration of CSIPHY module is also done here. 258 * 259 * Return 0 on success or a negative error code otherwise 260 */ 261 static int csiphy_stream_on(struct csiphy_device *csiphy) 262 { 263 struct csiphy_config *cfg = &csiphy->cfg; 264 s64 link_freq; 265 u8 lane_mask = csiphy_get_lane_mask(&cfg->csi2->lane_cfg); 266 u8 bpp = csiphy_get_bpp(csiphy->formats, csiphy->nformats, 267 csiphy->fmt[MSM_CSIPHY_PAD_SINK].code); 268 u8 num_lanes = csiphy->cfg.csi2->lane_cfg.num_data; 269 u8 val; 270 271 link_freq = camss_get_link_freq(&csiphy->subdev.entity, bpp, num_lanes); 272 273 if (link_freq < 0) { 274 dev_err(csiphy->camss->dev, 275 "Cannot get CSI2 transmitter's link frequency\n"); 276 return -EINVAL; 277 } 278 279 if (csiphy->base_clk_mux) { 280 val = readl_relaxed(csiphy->base_clk_mux); 281 if (cfg->combo_mode && (lane_mask & 0x18) == 0x18) { 282 val &= ~0xf0; 283 val |= cfg->csid_id << 4; 284 } else { 285 val &= ~0xf; 286 val |= cfg->csid_id; 287 } 288 writel_relaxed(val, csiphy->base_clk_mux); 289 290 /* Enforce reg write ordering between clk mux & lane enabling */ 291 wmb(); 292 } 293 294 csiphy->ops->lanes_enable(csiphy, cfg, link_freq, lane_mask); 295 296 return 0; 297 } 298 299 /* 300 * csiphy_stream_off - Disable streaming on CSIPHY module 301 * @csiphy: CSIPHY device 302 * 303 * Helper function to disable streaming on CSIPHY module 304 */ 305 static void csiphy_stream_off(struct csiphy_device *csiphy) 306 { 307 csiphy->ops->lanes_disable(csiphy, &csiphy->cfg); 308 } 309 310 311 /* 312 * csiphy_set_stream - Enable/disable streaming on CSIPHY module 313 * @sd: CSIPHY V4L2 subdevice 314 * @enable: Requested streaming state 315 * 316 * Return 0 on success or a negative error code otherwise 317 */ 318 static int csiphy_set_stream(struct v4l2_subdev *sd, int enable) 319 { 320 struct csiphy_device *csiphy = v4l2_get_subdevdata(sd); 321 int ret = 0; 322 323 if (enable) 324 ret = csiphy_stream_on(csiphy); 325 else 326 csiphy_stream_off(csiphy); 327 328 return ret; 329 } 330 331 /* 332 * __csiphy_get_format - Get pointer to format structure 333 * @csiphy: CSIPHY device 334 * @cfg: V4L2 subdev pad configuration 335 * @pad: pad from which format is requested 336 * @which: TRY or ACTIVE format 337 * 338 * Return pointer to TRY or ACTIVE format structure 339 */ 340 static struct v4l2_mbus_framefmt * 341 __csiphy_get_format(struct csiphy_device *csiphy, 342 struct v4l2_subdev_state *sd_state, 343 unsigned int pad, 344 enum v4l2_subdev_format_whence which) 345 { 346 if (which == V4L2_SUBDEV_FORMAT_TRY) 347 return v4l2_subdev_get_try_format(&csiphy->subdev, sd_state, 348 pad); 349 350 return &csiphy->fmt[pad]; 351 } 352 353 /* 354 * csiphy_try_format - Handle try format by pad subdev method 355 * @csiphy: CSIPHY device 356 * @cfg: V4L2 subdev pad configuration 357 * @pad: pad on which format is requested 358 * @fmt: pointer to v4l2 format structure 359 * @which: wanted subdev format 360 */ 361 static void csiphy_try_format(struct csiphy_device *csiphy, 362 struct v4l2_subdev_state *sd_state, 363 unsigned int pad, 364 struct v4l2_mbus_framefmt *fmt, 365 enum v4l2_subdev_format_whence which) 366 { 367 unsigned int i; 368 369 switch (pad) { 370 case MSM_CSIPHY_PAD_SINK: 371 /* Set format on sink pad */ 372 373 for (i = 0; i < csiphy->nformats; i++) 374 if (fmt->code == csiphy->formats[i].code) 375 break; 376 377 /* If not found, use UYVY as default */ 378 if (i >= csiphy->nformats) 379 fmt->code = MEDIA_BUS_FMT_UYVY8_2X8; 380 381 fmt->width = clamp_t(u32, fmt->width, 1, 8191); 382 fmt->height = clamp_t(u32, fmt->height, 1, 8191); 383 384 fmt->field = V4L2_FIELD_NONE; 385 fmt->colorspace = V4L2_COLORSPACE_SRGB; 386 387 break; 388 389 case MSM_CSIPHY_PAD_SRC: 390 /* Set and return a format same as sink pad */ 391 392 *fmt = *__csiphy_get_format(csiphy, sd_state, 393 MSM_CSID_PAD_SINK, 394 which); 395 396 break; 397 } 398 } 399 400 /* 401 * csiphy_enum_mbus_code - Handle pixel format enumeration 402 * @sd: CSIPHY V4L2 subdevice 403 * @cfg: V4L2 subdev pad configuration 404 * @code: pointer to v4l2_subdev_mbus_code_enum structure 405 * return -EINVAL or zero on success 406 */ 407 static int csiphy_enum_mbus_code(struct v4l2_subdev *sd, 408 struct v4l2_subdev_state *sd_state, 409 struct v4l2_subdev_mbus_code_enum *code) 410 { 411 struct csiphy_device *csiphy = v4l2_get_subdevdata(sd); 412 struct v4l2_mbus_framefmt *format; 413 414 if (code->pad == MSM_CSIPHY_PAD_SINK) { 415 if (code->index >= csiphy->nformats) 416 return -EINVAL; 417 418 code->code = csiphy->formats[code->index].code; 419 } else { 420 if (code->index > 0) 421 return -EINVAL; 422 423 format = __csiphy_get_format(csiphy, sd_state, 424 MSM_CSIPHY_PAD_SINK, 425 code->which); 426 427 code->code = format->code; 428 } 429 430 return 0; 431 } 432 433 /* 434 * csiphy_enum_frame_size - Handle frame size enumeration 435 * @sd: CSIPHY V4L2 subdevice 436 * @cfg: V4L2 subdev pad configuration 437 * @fse: pointer to v4l2_subdev_frame_size_enum structure 438 * return -EINVAL or zero on success 439 */ 440 static int csiphy_enum_frame_size(struct v4l2_subdev *sd, 441 struct v4l2_subdev_state *sd_state, 442 struct v4l2_subdev_frame_size_enum *fse) 443 { 444 struct csiphy_device *csiphy = v4l2_get_subdevdata(sd); 445 struct v4l2_mbus_framefmt format; 446 447 if (fse->index != 0) 448 return -EINVAL; 449 450 format.code = fse->code; 451 format.width = 1; 452 format.height = 1; 453 csiphy_try_format(csiphy, sd_state, fse->pad, &format, fse->which); 454 fse->min_width = format.width; 455 fse->min_height = format.height; 456 457 if (format.code != fse->code) 458 return -EINVAL; 459 460 format.code = fse->code; 461 format.width = -1; 462 format.height = -1; 463 csiphy_try_format(csiphy, sd_state, fse->pad, &format, fse->which); 464 fse->max_width = format.width; 465 fse->max_height = format.height; 466 467 return 0; 468 } 469 470 /* 471 * csiphy_get_format - Handle get format by pads subdev method 472 * @sd: CSIPHY V4L2 subdevice 473 * @cfg: V4L2 subdev pad configuration 474 * @fmt: pointer to v4l2 subdev format structure 475 * 476 * Return -EINVAL or zero on success 477 */ 478 static int csiphy_get_format(struct v4l2_subdev *sd, 479 struct v4l2_subdev_state *sd_state, 480 struct v4l2_subdev_format *fmt) 481 { 482 struct csiphy_device *csiphy = v4l2_get_subdevdata(sd); 483 struct v4l2_mbus_framefmt *format; 484 485 format = __csiphy_get_format(csiphy, sd_state, fmt->pad, fmt->which); 486 if (format == NULL) 487 return -EINVAL; 488 489 fmt->format = *format; 490 491 return 0; 492 } 493 494 /* 495 * csiphy_set_format - Handle set format by pads subdev method 496 * @sd: CSIPHY V4L2 subdevice 497 * @cfg: V4L2 subdev pad configuration 498 * @fmt: pointer to v4l2 subdev format structure 499 * 500 * Return -EINVAL or zero on success 501 */ 502 static int csiphy_set_format(struct v4l2_subdev *sd, 503 struct v4l2_subdev_state *sd_state, 504 struct v4l2_subdev_format *fmt) 505 { 506 struct csiphy_device *csiphy = v4l2_get_subdevdata(sd); 507 struct v4l2_mbus_framefmt *format; 508 509 format = __csiphy_get_format(csiphy, sd_state, fmt->pad, fmt->which); 510 if (format == NULL) 511 return -EINVAL; 512 513 csiphy_try_format(csiphy, sd_state, fmt->pad, &fmt->format, 514 fmt->which); 515 *format = fmt->format; 516 517 /* Propagate the format from sink to source */ 518 if (fmt->pad == MSM_CSIPHY_PAD_SINK) { 519 format = __csiphy_get_format(csiphy, sd_state, 520 MSM_CSIPHY_PAD_SRC, 521 fmt->which); 522 523 *format = fmt->format; 524 csiphy_try_format(csiphy, sd_state, MSM_CSIPHY_PAD_SRC, 525 format, 526 fmt->which); 527 } 528 529 return 0; 530 } 531 532 /* 533 * csiphy_init_formats - Initialize formats on all pads 534 * @sd: CSIPHY V4L2 subdevice 535 * @fh: V4L2 subdev file handle 536 * 537 * Initialize all pad formats with default values. 538 * 539 * Return 0 on success or a negative error code otherwise 540 */ 541 static int csiphy_init_formats(struct v4l2_subdev *sd, 542 struct v4l2_subdev_fh *fh) 543 { 544 struct v4l2_subdev_format format = { 545 .pad = MSM_CSIPHY_PAD_SINK, 546 .which = fh ? V4L2_SUBDEV_FORMAT_TRY : 547 V4L2_SUBDEV_FORMAT_ACTIVE, 548 .format = { 549 .code = MEDIA_BUS_FMT_UYVY8_2X8, 550 .width = 1920, 551 .height = 1080 552 } 553 }; 554 555 return csiphy_set_format(sd, fh ? fh->state : NULL, &format); 556 } 557 558 /* 559 * msm_csiphy_subdev_init - Initialize CSIPHY device structure and resources 560 * @csiphy: CSIPHY device 561 * @res: CSIPHY module resources table 562 * @id: CSIPHY module id 563 * 564 * Return 0 on success or a negative error code otherwise 565 */ 566 int msm_csiphy_subdev_init(struct camss *camss, 567 struct csiphy_device *csiphy, 568 const struct resources *res, u8 id) 569 { 570 struct device *dev = camss->dev; 571 struct platform_device *pdev = to_platform_device(dev); 572 int i, j; 573 int ret; 574 575 csiphy->camss = camss; 576 csiphy->id = id; 577 csiphy->cfg.combo_mode = 0; 578 579 if (camss->version == CAMSS_8x16) { 580 csiphy->ops = &csiphy_ops_2ph_1_0; 581 csiphy->formats = csiphy_formats_8x16; 582 csiphy->nformats = ARRAY_SIZE(csiphy_formats_8x16); 583 } else if (camss->version == CAMSS_8x96 || 584 camss->version == CAMSS_660) { 585 csiphy->ops = &csiphy_ops_3ph_1_0; 586 csiphy->formats = csiphy_formats_8x96; 587 csiphy->nformats = ARRAY_SIZE(csiphy_formats_8x96); 588 } else if (camss->version == CAMSS_845 || 589 camss->version == CAMSS_8250) { 590 csiphy->ops = &csiphy_ops_3ph_1_0; 591 csiphy->formats = csiphy_formats_sdm845; 592 csiphy->nformats = ARRAY_SIZE(csiphy_formats_sdm845); 593 } else { 594 return -EINVAL; 595 } 596 597 /* Memory */ 598 599 csiphy->base = devm_platform_ioremap_resource_byname(pdev, res->reg[0]); 600 if (IS_ERR(csiphy->base)) 601 return PTR_ERR(csiphy->base); 602 603 if (camss->version == CAMSS_8x16 || 604 camss->version == CAMSS_8x96) { 605 csiphy->base_clk_mux = 606 devm_platform_ioremap_resource_byname(pdev, res->reg[1]); 607 if (IS_ERR(csiphy->base_clk_mux)) 608 return PTR_ERR(csiphy->base_clk_mux); 609 } else { 610 csiphy->base_clk_mux = NULL; 611 } 612 613 /* Interrupt */ 614 615 ret = platform_get_irq_byname(pdev, res->interrupt[0]); 616 if (ret < 0) 617 return ret; 618 619 csiphy->irq = ret; 620 snprintf(csiphy->irq_name, sizeof(csiphy->irq_name), "%s_%s%d", 621 dev_name(dev), MSM_CSIPHY_NAME, csiphy->id); 622 623 ret = devm_request_irq(dev, csiphy->irq, csiphy->ops->isr, 624 IRQF_TRIGGER_RISING | IRQF_NO_AUTOEN, 625 csiphy->irq_name, csiphy); 626 if (ret < 0) { 627 dev_err(dev, "request_irq failed: %d\n", ret); 628 return ret; 629 } 630 631 /* Clocks */ 632 633 csiphy->nclocks = 0; 634 while (res->clock[csiphy->nclocks]) 635 csiphy->nclocks++; 636 637 csiphy->clock = devm_kcalloc(dev, 638 csiphy->nclocks, sizeof(*csiphy->clock), 639 GFP_KERNEL); 640 if (!csiphy->clock) 641 return -ENOMEM; 642 643 csiphy->rate_set = devm_kcalloc(dev, 644 csiphy->nclocks, 645 sizeof(*csiphy->rate_set), 646 GFP_KERNEL); 647 if (!csiphy->rate_set) 648 return -ENOMEM; 649 650 for (i = 0; i < csiphy->nclocks; i++) { 651 struct camss_clock *clock = &csiphy->clock[i]; 652 653 clock->clk = devm_clk_get(dev, res->clock[i]); 654 if (IS_ERR(clock->clk)) 655 return PTR_ERR(clock->clk); 656 657 clock->name = res->clock[i]; 658 659 clock->nfreqs = 0; 660 while (res->clock_rate[i][clock->nfreqs]) 661 clock->nfreqs++; 662 663 if (!clock->nfreqs) { 664 clock->freq = NULL; 665 continue; 666 } 667 668 clock->freq = devm_kcalloc(dev, 669 clock->nfreqs, 670 sizeof(*clock->freq), 671 GFP_KERNEL); 672 if (!clock->freq) 673 return -ENOMEM; 674 675 for (j = 0; j < clock->nfreqs; j++) 676 clock->freq[j] = res->clock_rate[i][j]; 677 678 if (!strcmp(clock->name, "csiphy0_timer") || 679 !strcmp(clock->name, "csiphy1_timer") || 680 !strcmp(clock->name, "csiphy2_timer") || 681 !strcmp(clock->name, "csiphy3_timer") || 682 !strcmp(clock->name, "csiphy4_timer") || 683 !strcmp(clock->name, "csiphy5_timer")) 684 csiphy->rate_set[i] = true; 685 686 if (camss->version == CAMSS_660 && 687 (!strcmp(clock->name, "csi0_phy") || 688 !strcmp(clock->name, "csi1_phy") || 689 !strcmp(clock->name, "csi2_phy"))) 690 csiphy->rate_set[i] = true; 691 } 692 693 return 0; 694 } 695 696 /* 697 * csiphy_link_setup - Setup CSIPHY connections 698 * @entity: Pointer to media entity structure 699 * @local: Pointer to local pad 700 * @remote: Pointer to remote pad 701 * @flags: Link flags 702 * 703 * Rreturn 0 on success 704 */ 705 static int csiphy_link_setup(struct media_entity *entity, 706 const struct media_pad *local, 707 const struct media_pad *remote, u32 flags) 708 { 709 if ((local->flags & MEDIA_PAD_FL_SOURCE) && 710 (flags & MEDIA_LNK_FL_ENABLED)) { 711 struct v4l2_subdev *sd; 712 struct csiphy_device *csiphy; 713 struct csid_device *csid; 714 715 if (media_entity_remote_pad(local)) 716 return -EBUSY; 717 718 sd = media_entity_to_v4l2_subdev(entity); 719 csiphy = v4l2_get_subdevdata(sd); 720 721 sd = media_entity_to_v4l2_subdev(remote->entity); 722 csid = v4l2_get_subdevdata(sd); 723 724 csiphy->cfg.csid_id = csid->id; 725 } 726 727 return 0; 728 } 729 730 static const struct v4l2_subdev_core_ops csiphy_core_ops = { 731 .s_power = csiphy_set_power, 732 }; 733 734 static const struct v4l2_subdev_video_ops csiphy_video_ops = { 735 .s_stream = csiphy_set_stream, 736 }; 737 738 static const struct v4l2_subdev_pad_ops csiphy_pad_ops = { 739 .enum_mbus_code = csiphy_enum_mbus_code, 740 .enum_frame_size = csiphy_enum_frame_size, 741 .get_fmt = csiphy_get_format, 742 .set_fmt = csiphy_set_format, 743 }; 744 745 static const struct v4l2_subdev_ops csiphy_v4l2_ops = { 746 .core = &csiphy_core_ops, 747 .video = &csiphy_video_ops, 748 .pad = &csiphy_pad_ops, 749 }; 750 751 static const struct v4l2_subdev_internal_ops csiphy_v4l2_internal_ops = { 752 .open = csiphy_init_formats, 753 }; 754 755 static const struct media_entity_operations csiphy_media_ops = { 756 .link_setup = csiphy_link_setup, 757 .link_validate = v4l2_subdev_link_validate, 758 }; 759 760 /* 761 * msm_csiphy_register_entity - Register subdev node for CSIPHY module 762 * @csiphy: CSIPHY device 763 * @v4l2_dev: V4L2 device 764 * 765 * Return 0 on success or a negative error code otherwise 766 */ 767 int msm_csiphy_register_entity(struct csiphy_device *csiphy, 768 struct v4l2_device *v4l2_dev) 769 { 770 struct v4l2_subdev *sd = &csiphy->subdev; 771 struct media_pad *pads = csiphy->pads; 772 struct device *dev = csiphy->camss->dev; 773 int ret; 774 775 v4l2_subdev_init(sd, &csiphy_v4l2_ops); 776 sd->internal_ops = &csiphy_v4l2_internal_ops; 777 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; 778 snprintf(sd->name, ARRAY_SIZE(sd->name), "%s%d", 779 MSM_CSIPHY_NAME, csiphy->id); 780 v4l2_set_subdevdata(sd, csiphy); 781 782 ret = csiphy_init_formats(sd, NULL); 783 if (ret < 0) { 784 dev_err(dev, "Failed to init format: %d\n", ret); 785 return ret; 786 } 787 788 pads[MSM_CSIPHY_PAD_SINK].flags = MEDIA_PAD_FL_SINK; 789 pads[MSM_CSIPHY_PAD_SRC].flags = MEDIA_PAD_FL_SOURCE; 790 791 sd->entity.function = MEDIA_ENT_F_PROC_VIDEO_PIXEL_FORMATTER; 792 sd->entity.ops = &csiphy_media_ops; 793 ret = media_entity_pads_init(&sd->entity, MSM_CSIPHY_PADS_NUM, pads); 794 if (ret < 0) { 795 dev_err(dev, "Failed to init media entity: %d\n", ret); 796 return ret; 797 } 798 799 ret = v4l2_device_register_subdev(v4l2_dev, sd); 800 if (ret < 0) { 801 dev_err(dev, "Failed to register subdev: %d\n", ret); 802 media_entity_cleanup(&sd->entity); 803 } 804 805 return ret; 806 } 807 808 /* 809 * msm_csiphy_unregister_entity - Unregister CSIPHY module subdev node 810 * @csiphy: CSIPHY device 811 */ 812 void msm_csiphy_unregister_entity(struct csiphy_device *csiphy) 813 { 814 v4l2_device_unregister_subdev(&csiphy->subdev); 815 media_entity_cleanup(&csiphy->subdev.entity); 816 } 817