1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * camss-csiphy.c
4  *
5  * Qualcomm MSM Camera Subsystem - CSIPHY Module
6  *
7  * Copyright (c) 2011-2015, The Linux Foundation. All rights reserved.
8  * Copyright (C) 2016-2018 Linaro Ltd.
9  */
10 #include <linux/clk.h>
11 #include <linux/delay.h>
12 #include <linux/interrupt.h>
13 #include <linux/io.h>
14 #include <linux/kernel.h>
15 #include <linux/of.h>
16 #include <linux/platform_device.h>
17 #include <linux/pm_runtime.h>
18 #include <media/media-entity.h>
19 #include <media/v4l2-device.h>
20 #include <media/v4l2-subdev.h>
21 
22 #include "camss-csiphy.h"
23 #include "camss.h"
24 
25 #define MSM_CSIPHY_NAME "msm_csiphy"
26 
27 struct csiphy_format {
28 	u32 code;
29 	u8 bpp;
30 };
31 
32 static const struct csiphy_format csiphy_formats_8x16[] = {
33 	{ MEDIA_BUS_FMT_UYVY8_2X8, 8 },
34 	{ MEDIA_BUS_FMT_VYUY8_2X8, 8 },
35 	{ MEDIA_BUS_FMT_YUYV8_2X8, 8 },
36 	{ MEDIA_BUS_FMT_YVYU8_2X8, 8 },
37 	{ MEDIA_BUS_FMT_SBGGR8_1X8, 8 },
38 	{ MEDIA_BUS_FMT_SGBRG8_1X8, 8 },
39 	{ MEDIA_BUS_FMT_SGRBG8_1X8, 8 },
40 	{ MEDIA_BUS_FMT_SRGGB8_1X8, 8 },
41 	{ MEDIA_BUS_FMT_SBGGR10_1X10, 10 },
42 	{ MEDIA_BUS_FMT_SGBRG10_1X10, 10 },
43 	{ MEDIA_BUS_FMT_SGRBG10_1X10, 10 },
44 	{ MEDIA_BUS_FMT_SRGGB10_1X10, 10 },
45 	{ MEDIA_BUS_FMT_SBGGR12_1X12, 12 },
46 	{ MEDIA_BUS_FMT_SGBRG12_1X12, 12 },
47 	{ MEDIA_BUS_FMT_SGRBG12_1X12, 12 },
48 	{ MEDIA_BUS_FMT_SRGGB12_1X12, 12 },
49 	{ MEDIA_BUS_FMT_Y10_1X10, 10 },
50 };
51 
52 static const struct csiphy_format csiphy_formats_8x96[] = {
53 	{ MEDIA_BUS_FMT_UYVY8_2X8, 8 },
54 	{ MEDIA_BUS_FMT_VYUY8_2X8, 8 },
55 	{ MEDIA_BUS_FMT_YUYV8_2X8, 8 },
56 	{ MEDIA_BUS_FMT_YVYU8_2X8, 8 },
57 	{ MEDIA_BUS_FMT_SBGGR8_1X8, 8 },
58 	{ MEDIA_BUS_FMT_SGBRG8_1X8, 8 },
59 	{ MEDIA_BUS_FMT_SGRBG8_1X8, 8 },
60 	{ MEDIA_BUS_FMT_SRGGB8_1X8, 8 },
61 	{ MEDIA_BUS_FMT_SBGGR10_1X10, 10 },
62 	{ MEDIA_BUS_FMT_SGBRG10_1X10, 10 },
63 	{ MEDIA_BUS_FMT_SGRBG10_1X10, 10 },
64 	{ MEDIA_BUS_FMT_SRGGB10_1X10, 10 },
65 	{ MEDIA_BUS_FMT_SBGGR12_1X12, 12 },
66 	{ MEDIA_BUS_FMT_SGBRG12_1X12, 12 },
67 	{ MEDIA_BUS_FMT_SGRBG12_1X12, 12 },
68 	{ MEDIA_BUS_FMT_SRGGB12_1X12, 12 },
69 	{ MEDIA_BUS_FMT_SBGGR14_1X14, 14 },
70 	{ MEDIA_BUS_FMT_SGBRG14_1X14, 14 },
71 	{ MEDIA_BUS_FMT_SGRBG14_1X14, 14 },
72 	{ MEDIA_BUS_FMT_SRGGB14_1X14, 14 },
73 	{ MEDIA_BUS_FMT_Y10_1X10, 10 },
74 };
75 
76 /*
77  * csiphy_get_bpp - map media bus format to bits per pixel
78  * @formats: supported media bus formats array
79  * @nformats: size of @formats array
80  * @code: media bus format code
81  *
82  * Return number of bits per pixel
83  */
84 static u8 csiphy_get_bpp(const struct csiphy_format *formats,
85 			 unsigned int nformats, u32 code)
86 {
87 	unsigned int i;
88 
89 	for (i = 0; i < nformats; i++)
90 		if (code == formats[i].code)
91 			return formats[i].bpp;
92 
93 	WARN(1, "Unknown format\n");
94 
95 	return formats[0].bpp;
96 }
97 
98 /*
99  * csiphy_set_clock_rates - Calculate and set clock rates on CSIPHY module
100  * @csiphy: CSIPHY device
101  */
102 static int csiphy_set_clock_rates(struct csiphy_device *csiphy)
103 {
104 	struct device *dev = csiphy->camss->dev;
105 	s64 link_freq;
106 	int i, j;
107 	int ret;
108 
109 	u8 bpp = csiphy_get_bpp(csiphy->formats, csiphy->nformats,
110 				csiphy->fmt[MSM_CSIPHY_PAD_SINK].code);
111 	u8 num_lanes = csiphy->cfg.csi2->lane_cfg.num_data;
112 
113 	link_freq = camss_get_link_freq(&csiphy->subdev.entity, bpp, num_lanes);
114 	if (link_freq < 0)
115 		link_freq  = 0;
116 
117 	for (i = 0; i < csiphy->nclocks; i++) {
118 		struct camss_clock *clock = &csiphy->clock[i];
119 
120 		if (csiphy->rate_set[i]) {
121 			u64 min_rate = link_freq / 4;
122 			long round_rate;
123 
124 			camss_add_clock_margin(&min_rate);
125 
126 			for (j = 0; j < clock->nfreqs; j++)
127 				if (min_rate < clock->freq[j])
128 					break;
129 
130 			if (j == clock->nfreqs) {
131 				dev_err(dev,
132 					"Pixel clock is too high for CSIPHY\n");
133 				return -EINVAL;
134 			}
135 
136 			/* if sensor pixel clock is not available */
137 			/* set highest possible CSIPHY clock rate */
138 			if (min_rate == 0)
139 				j = clock->nfreqs - 1;
140 
141 			round_rate = clk_round_rate(clock->clk, clock->freq[j]);
142 			if (round_rate < 0) {
143 				dev_err(dev, "clk round rate failed: %ld\n",
144 					round_rate);
145 				return -EINVAL;
146 			}
147 
148 			csiphy->timer_clk_rate = round_rate;
149 
150 			ret = clk_set_rate(clock->clk, csiphy->timer_clk_rate);
151 			if (ret < 0) {
152 				dev_err(dev, "clk set rate failed: %d\n", ret);
153 				return ret;
154 			}
155 		}
156 	}
157 
158 	return 0;
159 }
160 
161 /*
162  * csiphy_set_power - Power on/off CSIPHY module
163  * @sd: CSIPHY V4L2 subdevice
164  * @on: Requested power state
165  *
166  * Return 0 on success or a negative error code otherwise
167  */
168 static int csiphy_set_power(struct v4l2_subdev *sd, int on)
169 {
170 	struct csiphy_device *csiphy = v4l2_get_subdevdata(sd);
171 	struct device *dev = csiphy->camss->dev;
172 
173 	if (on) {
174 		int ret;
175 
176 		ret = pm_runtime_get_sync(dev);
177 		if (ret < 0) {
178 			pm_runtime_put_sync(dev);
179 			return ret;
180 		}
181 
182 		ret = csiphy_set_clock_rates(csiphy);
183 		if (ret < 0) {
184 			pm_runtime_put_sync(dev);
185 			return ret;
186 		}
187 
188 		ret = camss_enable_clocks(csiphy->nclocks, csiphy->clock, dev);
189 		if (ret < 0) {
190 			pm_runtime_put_sync(dev);
191 			return ret;
192 		}
193 
194 		enable_irq(csiphy->irq);
195 
196 		csiphy->ops->reset(csiphy);
197 
198 		csiphy->ops->hw_version_read(csiphy, dev);
199 	} else {
200 		disable_irq(csiphy->irq);
201 
202 		camss_disable_clocks(csiphy->nclocks, csiphy->clock);
203 
204 		pm_runtime_put_sync(dev);
205 	}
206 
207 	return 0;
208 }
209 
210 /*
211  * csiphy_get_lane_mask - Calculate CSI2 lane mask configuration parameter
212  * @lane_cfg - CSI2 lane configuration
213  *
214  * Return lane mask
215  */
216 static u8 csiphy_get_lane_mask(struct csiphy_lanes_cfg *lane_cfg)
217 {
218 	u8 lane_mask;
219 	int i;
220 
221 	lane_mask = 1 << lane_cfg->clk.pos;
222 
223 	for (i = 0; i < lane_cfg->num_data; i++)
224 		lane_mask |= 1 << lane_cfg->data[i].pos;
225 
226 	return lane_mask;
227 }
228 
229 /*
230  * csiphy_stream_on - Enable streaming on CSIPHY module
231  * @csiphy: CSIPHY device
232  *
233  * Helper function to enable streaming on CSIPHY module.
234  * Main configuration of CSIPHY module is also done here.
235  *
236  * Return 0 on success or a negative error code otherwise
237  */
238 static int csiphy_stream_on(struct csiphy_device *csiphy)
239 {
240 	struct csiphy_config *cfg = &csiphy->cfg;
241 	s64 link_freq;
242 	u8 lane_mask = csiphy_get_lane_mask(&cfg->csi2->lane_cfg);
243 	u8 bpp = csiphy_get_bpp(csiphy->formats, csiphy->nformats,
244 				csiphy->fmt[MSM_CSIPHY_PAD_SINK].code);
245 	u8 num_lanes = csiphy->cfg.csi2->lane_cfg.num_data;
246 	u8 val;
247 
248 	link_freq = camss_get_link_freq(&csiphy->subdev.entity, bpp, num_lanes);
249 
250 	if (link_freq < 0) {
251 		dev_err(csiphy->camss->dev,
252 			"Cannot get CSI2 transmitter's link frequency\n");
253 		return -EINVAL;
254 	}
255 
256 	val = readl_relaxed(csiphy->base_clk_mux);
257 	if (cfg->combo_mode && (lane_mask & 0x18) == 0x18) {
258 		val &= ~0xf0;
259 		val |= cfg->csid_id << 4;
260 	} else {
261 		val &= ~0xf;
262 		val |= cfg->csid_id;
263 	}
264 	writel_relaxed(val, csiphy->base_clk_mux);
265 	wmb();
266 
267 	csiphy->ops->lanes_enable(csiphy, cfg, link_freq, lane_mask);
268 
269 	return 0;
270 }
271 
272 /*
273  * csiphy_stream_off - Disable streaming on CSIPHY module
274  * @csiphy: CSIPHY device
275  *
276  * Helper function to disable streaming on CSIPHY module
277  */
278 static void csiphy_stream_off(struct csiphy_device *csiphy)
279 {
280 	csiphy->ops->lanes_disable(csiphy, &csiphy->cfg);
281 }
282 
283 
284 /*
285  * csiphy_set_stream - Enable/disable streaming on CSIPHY module
286  * @sd: CSIPHY V4L2 subdevice
287  * @enable: Requested streaming state
288  *
289  * Return 0 on success or a negative error code otherwise
290  */
291 static int csiphy_set_stream(struct v4l2_subdev *sd, int enable)
292 {
293 	struct csiphy_device *csiphy = v4l2_get_subdevdata(sd);
294 	int ret = 0;
295 
296 	if (enable)
297 		ret = csiphy_stream_on(csiphy);
298 	else
299 		csiphy_stream_off(csiphy);
300 
301 	return ret;
302 }
303 
304 /*
305  * __csiphy_get_format - Get pointer to format structure
306  * @csiphy: CSIPHY device
307  * @cfg: V4L2 subdev pad configuration
308  * @pad: pad from which format is requested
309  * @which: TRY or ACTIVE format
310  *
311  * Return pointer to TRY or ACTIVE format structure
312  */
313 static struct v4l2_mbus_framefmt *
314 __csiphy_get_format(struct csiphy_device *csiphy,
315 		    struct v4l2_subdev_pad_config *cfg,
316 		    unsigned int pad,
317 		    enum v4l2_subdev_format_whence which)
318 {
319 	if (which == V4L2_SUBDEV_FORMAT_TRY)
320 		return v4l2_subdev_get_try_format(&csiphy->subdev, cfg, pad);
321 
322 	return &csiphy->fmt[pad];
323 }
324 
325 /*
326  * csiphy_try_format - Handle try format by pad subdev method
327  * @csiphy: CSIPHY device
328  * @cfg: V4L2 subdev pad configuration
329  * @pad: pad on which format is requested
330  * @fmt: pointer to v4l2 format structure
331  * @which: wanted subdev format
332  */
333 static void csiphy_try_format(struct csiphy_device *csiphy,
334 			      struct v4l2_subdev_pad_config *cfg,
335 			      unsigned int pad,
336 			      struct v4l2_mbus_framefmt *fmt,
337 			      enum v4l2_subdev_format_whence which)
338 {
339 	unsigned int i;
340 
341 	switch (pad) {
342 	case MSM_CSIPHY_PAD_SINK:
343 		/* Set format on sink pad */
344 
345 		for (i = 0; i < csiphy->nformats; i++)
346 			if (fmt->code == csiphy->formats[i].code)
347 				break;
348 
349 		/* If not found, use UYVY as default */
350 		if (i >= csiphy->nformats)
351 			fmt->code = MEDIA_BUS_FMT_UYVY8_2X8;
352 
353 		fmt->width = clamp_t(u32, fmt->width, 1, 8191);
354 		fmt->height = clamp_t(u32, fmt->height, 1, 8191);
355 
356 		fmt->field = V4L2_FIELD_NONE;
357 		fmt->colorspace = V4L2_COLORSPACE_SRGB;
358 
359 		break;
360 
361 	case MSM_CSIPHY_PAD_SRC:
362 		/* Set and return a format same as sink pad */
363 
364 		*fmt = *__csiphy_get_format(csiphy, cfg, MSM_CSID_PAD_SINK,
365 					    which);
366 
367 		break;
368 	}
369 }
370 
371 /*
372  * csiphy_enum_mbus_code - Handle pixel format enumeration
373  * @sd: CSIPHY V4L2 subdevice
374  * @cfg: V4L2 subdev pad configuration
375  * @code: pointer to v4l2_subdev_mbus_code_enum structure
376  * return -EINVAL or zero on success
377  */
378 static int csiphy_enum_mbus_code(struct v4l2_subdev *sd,
379 				 struct v4l2_subdev_pad_config *cfg,
380 				 struct v4l2_subdev_mbus_code_enum *code)
381 {
382 	struct csiphy_device *csiphy = v4l2_get_subdevdata(sd);
383 	struct v4l2_mbus_framefmt *format;
384 
385 	if (code->pad == MSM_CSIPHY_PAD_SINK) {
386 		if (code->index >= csiphy->nformats)
387 			return -EINVAL;
388 
389 		code->code = csiphy->formats[code->index].code;
390 	} else {
391 		if (code->index > 0)
392 			return -EINVAL;
393 
394 		format = __csiphy_get_format(csiphy, cfg, MSM_CSIPHY_PAD_SINK,
395 					     code->which);
396 
397 		code->code = format->code;
398 	}
399 
400 	return 0;
401 }
402 
403 /*
404  * csiphy_enum_frame_size - Handle frame size enumeration
405  * @sd: CSIPHY V4L2 subdevice
406  * @cfg: V4L2 subdev pad configuration
407  * @fse: pointer to v4l2_subdev_frame_size_enum structure
408  * return -EINVAL or zero on success
409  */
410 static int csiphy_enum_frame_size(struct v4l2_subdev *sd,
411 				  struct v4l2_subdev_pad_config *cfg,
412 				  struct v4l2_subdev_frame_size_enum *fse)
413 {
414 	struct csiphy_device *csiphy = v4l2_get_subdevdata(sd);
415 	struct v4l2_mbus_framefmt format;
416 
417 	if (fse->index != 0)
418 		return -EINVAL;
419 
420 	format.code = fse->code;
421 	format.width = 1;
422 	format.height = 1;
423 	csiphy_try_format(csiphy, cfg, fse->pad, &format, fse->which);
424 	fse->min_width = format.width;
425 	fse->min_height = format.height;
426 
427 	if (format.code != fse->code)
428 		return -EINVAL;
429 
430 	format.code = fse->code;
431 	format.width = -1;
432 	format.height = -1;
433 	csiphy_try_format(csiphy, cfg, fse->pad, &format, fse->which);
434 	fse->max_width = format.width;
435 	fse->max_height = format.height;
436 
437 	return 0;
438 }
439 
440 /*
441  * csiphy_get_format - Handle get format by pads subdev method
442  * @sd: CSIPHY V4L2 subdevice
443  * @cfg: V4L2 subdev pad configuration
444  * @fmt: pointer to v4l2 subdev format structure
445  *
446  * Return -EINVAL or zero on success
447  */
448 static int csiphy_get_format(struct v4l2_subdev *sd,
449 			     struct v4l2_subdev_pad_config *cfg,
450 			     struct v4l2_subdev_format *fmt)
451 {
452 	struct csiphy_device *csiphy = v4l2_get_subdevdata(sd);
453 	struct v4l2_mbus_framefmt *format;
454 
455 	format = __csiphy_get_format(csiphy, cfg, fmt->pad, fmt->which);
456 	if (format == NULL)
457 		return -EINVAL;
458 
459 	fmt->format = *format;
460 
461 	return 0;
462 }
463 
464 /*
465  * csiphy_set_format - Handle set format by pads subdev method
466  * @sd: CSIPHY V4L2 subdevice
467  * @cfg: V4L2 subdev pad configuration
468  * @fmt: pointer to v4l2 subdev format structure
469  *
470  * Return -EINVAL or zero on success
471  */
472 static int csiphy_set_format(struct v4l2_subdev *sd,
473 			     struct v4l2_subdev_pad_config *cfg,
474 			     struct v4l2_subdev_format *fmt)
475 {
476 	struct csiphy_device *csiphy = v4l2_get_subdevdata(sd);
477 	struct v4l2_mbus_framefmt *format;
478 
479 	format = __csiphy_get_format(csiphy, cfg, fmt->pad, fmt->which);
480 	if (format == NULL)
481 		return -EINVAL;
482 
483 	csiphy_try_format(csiphy, cfg, fmt->pad, &fmt->format, fmt->which);
484 	*format = fmt->format;
485 
486 	/* Propagate the format from sink to source */
487 	if (fmt->pad == MSM_CSIPHY_PAD_SINK) {
488 		format = __csiphy_get_format(csiphy, cfg, MSM_CSIPHY_PAD_SRC,
489 					     fmt->which);
490 
491 		*format = fmt->format;
492 		csiphy_try_format(csiphy, cfg, MSM_CSIPHY_PAD_SRC, format,
493 				  fmt->which);
494 	}
495 
496 	return 0;
497 }
498 
499 /*
500  * csiphy_init_formats - Initialize formats on all pads
501  * @sd: CSIPHY V4L2 subdevice
502  * @fh: V4L2 subdev file handle
503  *
504  * Initialize all pad formats with default values.
505  *
506  * Return 0 on success or a negative error code otherwise
507  */
508 static int csiphy_init_formats(struct v4l2_subdev *sd,
509 			       struct v4l2_subdev_fh *fh)
510 {
511 	struct v4l2_subdev_format format = {
512 		.pad = MSM_CSIPHY_PAD_SINK,
513 		.which = fh ? V4L2_SUBDEV_FORMAT_TRY :
514 			      V4L2_SUBDEV_FORMAT_ACTIVE,
515 		.format = {
516 			.code = MEDIA_BUS_FMT_UYVY8_2X8,
517 			.width = 1920,
518 			.height = 1080
519 		}
520 	};
521 
522 	return csiphy_set_format(sd, fh ? fh->pad : NULL, &format);
523 }
524 
525 /*
526  * msm_csiphy_subdev_init - Initialize CSIPHY device structure and resources
527  * @csiphy: CSIPHY device
528  * @res: CSIPHY module resources table
529  * @id: CSIPHY module id
530  *
531  * Return 0 on success or a negative error code otherwise
532  */
533 int msm_csiphy_subdev_init(struct camss *camss,
534 			   struct csiphy_device *csiphy,
535 			   const struct resources *res, u8 id)
536 {
537 	struct device *dev = camss->dev;
538 	struct platform_device *pdev = to_platform_device(dev);
539 	struct resource *r;
540 	int i, j;
541 	int ret;
542 
543 	csiphy->camss = camss;
544 	csiphy->id = id;
545 	csiphy->cfg.combo_mode = 0;
546 
547 	if (camss->version == CAMSS_8x16) {
548 		csiphy->ops = &csiphy_ops_2ph_1_0;
549 		csiphy->formats = csiphy_formats_8x16;
550 		csiphy->nformats = ARRAY_SIZE(csiphy_formats_8x16);
551 	} else if (camss->version == CAMSS_8x96 ||
552 		   camss->version == CAMSS_660) {
553 		csiphy->ops = &csiphy_ops_3ph_1_0;
554 		csiphy->formats = csiphy_formats_8x96;
555 		csiphy->nformats = ARRAY_SIZE(csiphy_formats_8x96);
556 	} else {
557 		return -EINVAL;
558 	}
559 
560 	/* Memory */
561 
562 	r = platform_get_resource_byname(pdev, IORESOURCE_MEM, res->reg[0]);
563 	csiphy->base = devm_ioremap_resource(dev, r);
564 	if (IS_ERR(csiphy->base)) {
565 		dev_err(dev, "could not map memory\n");
566 		return PTR_ERR(csiphy->base);
567 	}
568 
569 	r = platform_get_resource_byname(pdev, IORESOURCE_MEM, res->reg[1]);
570 	csiphy->base_clk_mux = devm_ioremap_resource(dev, r);
571 	if (IS_ERR(csiphy->base_clk_mux)) {
572 		dev_err(dev, "could not map memory\n");
573 		return PTR_ERR(csiphy->base_clk_mux);
574 	}
575 
576 	/* Interrupt */
577 
578 	r = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
579 					 res->interrupt[0]);
580 	if (!r) {
581 		dev_err(dev, "missing IRQ\n");
582 		return -EINVAL;
583 	}
584 
585 	csiphy->irq = r->start;
586 	snprintf(csiphy->irq_name, sizeof(csiphy->irq_name), "%s_%s%d",
587 		 dev_name(dev), MSM_CSIPHY_NAME, csiphy->id);
588 
589 	ret = devm_request_irq(dev, csiphy->irq, csiphy->ops->isr,
590 			       IRQF_TRIGGER_RISING, csiphy->irq_name, csiphy);
591 	if (ret < 0) {
592 		dev_err(dev, "request_irq failed: %d\n", ret);
593 		return ret;
594 	}
595 
596 	disable_irq(csiphy->irq);
597 
598 	/* Clocks */
599 
600 	csiphy->nclocks = 0;
601 	while (res->clock[csiphy->nclocks])
602 		csiphy->nclocks++;
603 
604 	csiphy->clock = devm_kcalloc(dev,
605 				     csiphy->nclocks, sizeof(*csiphy->clock),
606 				     GFP_KERNEL);
607 	if (!csiphy->clock)
608 		return -ENOMEM;
609 
610 	csiphy->rate_set = devm_kcalloc(dev,
611 					csiphy->nclocks,
612 					sizeof(*csiphy->rate_set),
613 					GFP_KERNEL);
614 	if (!csiphy->rate_set)
615 		return -ENOMEM;
616 
617 	for (i = 0; i < csiphy->nclocks; i++) {
618 		struct camss_clock *clock = &csiphy->clock[i];
619 
620 		clock->clk = devm_clk_get(dev, res->clock[i]);
621 		if (IS_ERR(clock->clk))
622 			return PTR_ERR(clock->clk);
623 
624 		clock->name = res->clock[i];
625 
626 		clock->nfreqs = 0;
627 		while (res->clock_rate[i][clock->nfreqs])
628 			clock->nfreqs++;
629 
630 		if (!clock->nfreqs) {
631 			clock->freq = NULL;
632 			continue;
633 		}
634 
635 		clock->freq = devm_kcalloc(dev,
636 					   clock->nfreqs,
637 					   sizeof(*clock->freq),
638 					   GFP_KERNEL);
639 		if (!clock->freq)
640 			return -ENOMEM;
641 
642 		for (j = 0; j < clock->nfreqs; j++)
643 			clock->freq[j] = res->clock_rate[i][j];
644 
645 		if (!strcmp(clock->name, "csiphy0_timer") ||
646 		    !strcmp(clock->name, "csiphy1_timer") ||
647 		    !strcmp(clock->name, "csiphy2_timer"))
648 			csiphy->rate_set[i] = true;
649 
650 		if (camss->version == CAMSS_660 &&
651 		    (!strcmp(clock->name, "csi0_phy") ||
652 		     !strcmp(clock->name, "csi1_phy") ||
653 		     !strcmp(clock->name, "csi2_phy")))
654 			csiphy->rate_set[i] = true;
655 	}
656 
657 	return 0;
658 }
659 
660 /*
661  * csiphy_link_setup - Setup CSIPHY connections
662  * @entity: Pointer to media entity structure
663  * @local: Pointer to local pad
664  * @remote: Pointer to remote pad
665  * @flags: Link flags
666  *
667  * Rreturn 0 on success
668  */
669 static int csiphy_link_setup(struct media_entity *entity,
670 			     const struct media_pad *local,
671 			     const struct media_pad *remote, u32 flags)
672 {
673 	if ((local->flags & MEDIA_PAD_FL_SOURCE) &&
674 	    (flags & MEDIA_LNK_FL_ENABLED)) {
675 		struct v4l2_subdev *sd;
676 		struct csiphy_device *csiphy;
677 		struct csid_device *csid;
678 
679 		if (media_entity_remote_pad(local))
680 			return -EBUSY;
681 
682 		sd = media_entity_to_v4l2_subdev(entity);
683 		csiphy = v4l2_get_subdevdata(sd);
684 
685 		sd = media_entity_to_v4l2_subdev(remote->entity);
686 		csid = v4l2_get_subdevdata(sd);
687 
688 		csiphy->cfg.csid_id = csid->id;
689 	}
690 
691 	return 0;
692 }
693 
694 static const struct v4l2_subdev_core_ops csiphy_core_ops = {
695 	.s_power = csiphy_set_power,
696 };
697 
698 static const struct v4l2_subdev_video_ops csiphy_video_ops = {
699 	.s_stream = csiphy_set_stream,
700 };
701 
702 static const struct v4l2_subdev_pad_ops csiphy_pad_ops = {
703 	.enum_mbus_code = csiphy_enum_mbus_code,
704 	.enum_frame_size = csiphy_enum_frame_size,
705 	.get_fmt = csiphy_get_format,
706 	.set_fmt = csiphy_set_format,
707 };
708 
709 static const struct v4l2_subdev_ops csiphy_v4l2_ops = {
710 	.core = &csiphy_core_ops,
711 	.video = &csiphy_video_ops,
712 	.pad = &csiphy_pad_ops,
713 };
714 
715 static const struct v4l2_subdev_internal_ops csiphy_v4l2_internal_ops = {
716 	.open = csiphy_init_formats,
717 };
718 
719 static const struct media_entity_operations csiphy_media_ops = {
720 	.link_setup = csiphy_link_setup,
721 	.link_validate = v4l2_subdev_link_validate,
722 };
723 
724 /*
725  * msm_csiphy_register_entity - Register subdev node for CSIPHY module
726  * @csiphy: CSIPHY device
727  * @v4l2_dev: V4L2 device
728  *
729  * Return 0 on success or a negative error code otherwise
730  */
731 int msm_csiphy_register_entity(struct csiphy_device *csiphy,
732 			       struct v4l2_device *v4l2_dev)
733 {
734 	struct v4l2_subdev *sd = &csiphy->subdev;
735 	struct media_pad *pads = csiphy->pads;
736 	struct device *dev = csiphy->camss->dev;
737 	int ret;
738 
739 	v4l2_subdev_init(sd, &csiphy_v4l2_ops);
740 	sd->internal_ops = &csiphy_v4l2_internal_ops;
741 	sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
742 	snprintf(sd->name, ARRAY_SIZE(sd->name), "%s%d",
743 		 MSM_CSIPHY_NAME, csiphy->id);
744 	v4l2_set_subdevdata(sd, csiphy);
745 
746 	ret = csiphy_init_formats(sd, NULL);
747 	if (ret < 0) {
748 		dev_err(dev, "Failed to init format: %d\n", ret);
749 		return ret;
750 	}
751 
752 	pads[MSM_CSIPHY_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
753 	pads[MSM_CSIPHY_PAD_SRC].flags = MEDIA_PAD_FL_SOURCE;
754 
755 	sd->entity.function = MEDIA_ENT_F_PROC_VIDEO_PIXEL_FORMATTER;
756 	sd->entity.ops = &csiphy_media_ops;
757 	ret = media_entity_pads_init(&sd->entity, MSM_CSIPHY_PADS_NUM, pads);
758 	if (ret < 0) {
759 		dev_err(dev, "Failed to init media entity: %d\n", ret);
760 		return ret;
761 	}
762 
763 	ret = v4l2_device_register_subdev(v4l2_dev, sd);
764 	if (ret < 0) {
765 		dev_err(dev, "Failed to register subdev: %d\n", ret);
766 		media_entity_cleanup(&sd->entity);
767 	}
768 
769 	return ret;
770 }
771 
772 /*
773  * msm_csiphy_unregister_entity - Unregister CSIPHY module subdev node
774  * @csiphy: CSIPHY device
775  */
776 void msm_csiphy_unregister_entity(struct csiphy_device *csiphy)
777 {
778 	v4l2_device_unregister_subdev(&csiphy->subdev);
779 	media_entity_cleanup(&csiphy->subdev.entity);
780 }
781