1516e8f0fSTodor Tomov // SPDX-License-Identifier: GPL-2.0
2516e8f0fSTodor Tomov /*
3516e8f0fSTodor Tomov * camss-csiphy-2ph-1-0.c
4516e8f0fSTodor Tomov *
5516e8f0fSTodor Tomov * Qualcomm MSM Camera Subsystem - CSIPHY Module 2phase v1.0
6516e8f0fSTodor Tomov *
7516e8f0fSTodor Tomov * Copyright (c) 2011-2015, The Linux Foundation. All rights reserved.
8516e8f0fSTodor Tomov * Copyright (C) 2016-2018 Linaro Ltd.
9516e8f0fSTodor Tomov */
10516e8f0fSTodor Tomov
11516e8f0fSTodor Tomov #include "camss-csiphy.h"
12516e8f0fSTodor Tomov
13516e8f0fSTodor Tomov #include <linux/delay.h>
14516e8f0fSTodor Tomov #include <linux/interrupt.h>
153799eca5SArnd Bergmann #include <linux/io.h>
16516e8f0fSTodor Tomov
17516e8f0fSTodor Tomov #define CAMSS_CSI_PHY_LNn_CFG2(n) (0x004 + 0x40 * (n))
18516e8f0fSTodor Tomov #define CAMSS_CSI_PHY_LNn_CFG3(n) (0x008 + 0x40 * (n))
19*4abb2130SRobert Foss #define CAMSS_CSI_PHY_LN_CLK 1
20516e8f0fSTodor Tomov #define CAMSS_CSI_PHY_GLBL_RESET 0x140
21516e8f0fSTodor Tomov #define CAMSS_CSI_PHY_GLBL_PWR_CFG 0x144
22516e8f0fSTodor Tomov #define CAMSS_CSI_PHY_GLBL_IRQ_CMD 0x164
23516e8f0fSTodor Tomov #define CAMSS_CSI_PHY_HW_VERSION 0x188
24516e8f0fSTodor Tomov #define CAMSS_CSI_PHY_INTERRUPT_STATUSn(n) (0x18c + 0x4 * (n))
25516e8f0fSTodor Tomov #define CAMSS_CSI_PHY_INTERRUPT_MASKn(n) (0x1ac + 0x4 * (n))
26516e8f0fSTodor Tomov #define CAMSS_CSI_PHY_INTERRUPT_CLEARn(n) (0x1cc + 0x4 * (n))
27516e8f0fSTodor Tomov #define CAMSS_CSI_PHY_GLBL_T_INIT_CFG0 0x1ec
28516e8f0fSTodor Tomov #define CAMSS_CSI_PHY_T_WAKEUP_CFG0 0x1f4
29516e8f0fSTodor Tomov
csiphy_get_lane_mask(struct csiphy_lanes_cfg * lane_cfg)30*4abb2130SRobert Foss static u8 csiphy_get_lane_mask(struct csiphy_lanes_cfg *lane_cfg)
31*4abb2130SRobert Foss {
32*4abb2130SRobert Foss u8 lane_mask;
33*4abb2130SRobert Foss int i;
34*4abb2130SRobert Foss
35*4abb2130SRobert Foss lane_mask = 1 << CAMSS_CSI_PHY_LN_CLK;
36*4abb2130SRobert Foss
37*4abb2130SRobert Foss for (i = 0; i < lane_cfg->num_data; i++)
38*4abb2130SRobert Foss lane_mask |= 1 << lane_cfg->data[i].pos;
39*4abb2130SRobert Foss
40*4abb2130SRobert Foss return lane_mask;
41*4abb2130SRobert Foss }
42*4abb2130SRobert Foss
csiphy_hw_version_read(struct csiphy_device * csiphy,struct device * dev)43516e8f0fSTodor Tomov static void csiphy_hw_version_read(struct csiphy_device *csiphy,
44516e8f0fSTodor Tomov struct device *dev)
45516e8f0fSTodor Tomov {
46516e8f0fSTodor Tomov u8 hw_version = readl_relaxed(csiphy->base +
47516e8f0fSTodor Tomov CAMSS_CSI_PHY_HW_VERSION);
48516e8f0fSTodor Tomov
49516e8f0fSTodor Tomov dev_dbg(dev, "CSIPHY HW Version = 0x%02x\n", hw_version);
50516e8f0fSTodor Tomov }
51516e8f0fSTodor Tomov
52516e8f0fSTodor Tomov /*
53516e8f0fSTodor Tomov * csiphy_reset - Perform software reset on CSIPHY module
54516e8f0fSTodor Tomov * @csiphy: CSIPHY device
55516e8f0fSTodor Tomov */
csiphy_reset(struct csiphy_device * csiphy)56516e8f0fSTodor Tomov static void csiphy_reset(struct csiphy_device *csiphy)
57516e8f0fSTodor Tomov {
58516e8f0fSTodor Tomov writel_relaxed(0x1, csiphy->base + CAMSS_CSI_PHY_GLBL_RESET);
59516e8f0fSTodor Tomov usleep_range(5000, 8000);
60516e8f0fSTodor Tomov writel_relaxed(0x0, csiphy->base + CAMSS_CSI_PHY_GLBL_RESET);
61516e8f0fSTodor Tomov }
62516e8f0fSTodor Tomov
63516e8f0fSTodor Tomov /*
64516e8f0fSTodor Tomov * csiphy_settle_cnt_calc - Calculate settle count value
65516e8f0fSTodor Tomov *
66516e8f0fSTodor Tomov * Helper function to calculate settle count value. This is
67516e8f0fSTodor Tomov * based on the CSI2 T_hs_settle parameter which in turn
6878c2cc28SAndrey Konovalov * is calculated based on the CSI2 transmitter link frequency.
69516e8f0fSTodor Tomov *
7078c2cc28SAndrey Konovalov * Return settle count value or 0 if the CSI2 link frequency
7178c2cc28SAndrey Konovalov * is not available
72516e8f0fSTodor Tomov */
csiphy_settle_cnt_calc(s64 link_freq,u32 timer_clk_rate)7378c2cc28SAndrey Konovalov static u8 csiphy_settle_cnt_calc(s64 link_freq, u32 timer_clk_rate)
74516e8f0fSTodor Tomov {
75516e8f0fSTodor Tomov u32 ui; /* ps */
76516e8f0fSTodor Tomov u32 timer_period; /* ps */
77516e8f0fSTodor Tomov u32 t_hs_prepare_max; /* ps */
78516e8f0fSTodor Tomov u32 t_hs_prepare_zero_min; /* ps */
79516e8f0fSTodor Tomov u32 t_hs_settle; /* ps */
80516e8f0fSTodor Tomov u8 settle_cnt;
81516e8f0fSTodor Tomov
8278c2cc28SAndrey Konovalov if (link_freq <= 0)
8378c2cc28SAndrey Konovalov return 0;
8478c2cc28SAndrey Konovalov
8578c2cc28SAndrey Konovalov ui = div_u64(1000000000000LL, link_freq);
86516e8f0fSTodor Tomov ui /= 2;
87516e8f0fSTodor Tomov t_hs_prepare_max = 85000 + 6 * ui;
88516e8f0fSTodor Tomov t_hs_prepare_zero_min = 145000 + 10 * ui;
89516e8f0fSTodor Tomov t_hs_settle = (t_hs_prepare_max + t_hs_prepare_zero_min) / 2;
90516e8f0fSTodor Tomov
91516e8f0fSTodor Tomov timer_period = div_u64(1000000000000LL, timer_clk_rate);
92516e8f0fSTodor Tomov settle_cnt = t_hs_settle / timer_period - 1;
93516e8f0fSTodor Tomov
94516e8f0fSTodor Tomov return settle_cnt;
95516e8f0fSTodor Tomov }
96516e8f0fSTodor Tomov
csiphy_lanes_enable(struct csiphy_device * csiphy,struct csiphy_config * cfg,s64 link_freq,u8 lane_mask)97516e8f0fSTodor Tomov static void csiphy_lanes_enable(struct csiphy_device *csiphy,
98516e8f0fSTodor Tomov struct csiphy_config *cfg,
9978c2cc28SAndrey Konovalov s64 link_freq, u8 lane_mask)
100516e8f0fSTodor Tomov {
101516e8f0fSTodor Tomov struct csiphy_lanes_cfg *c = &cfg->csi2->lane_cfg;
102516e8f0fSTodor Tomov u8 settle_cnt;
103369f81f3STodor Tomov u8 val, l = 0;
104516e8f0fSTodor Tomov int i = 0;
105516e8f0fSTodor Tomov
10678c2cc28SAndrey Konovalov settle_cnt = csiphy_settle_cnt_calc(link_freq, csiphy->timer_clk_rate);
107516e8f0fSTodor Tomov
108516e8f0fSTodor Tomov writel_relaxed(0x1, csiphy->base +
109516e8f0fSTodor Tomov CAMSS_CSI_PHY_GLBL_T_INIT_CFG0);
110516e8f0fSTodor Tomov writel_relaxed(0x1, csiphy->base +
111516e8f0fSTodor Tomov CAMSS_CSI_PHY_T_WAKEUP_CFG0);
112516e8f0fSTodor Tomov
113516e8f0fSTodor Tomov val = 0x1;
114516e8f0fSTodor Tomov val |= lane_mask << 1;
115516e8f0fSTodor Tomov writel_relaxed(val, csiphy->base + CAMSS_CSI_PHY_GLBL_PWR_CFG);
116516e8f0fSTodor Tomov
117516e8f0fSTodor Tomov val = cfg->combo_mode << 4;
118516e8f0fSTodor Tomov writel_relaxed(val, csiphy->base + CAMSS_CSI_PHY_GLBL_RESET);
119516e8f0fSTodor Tomov
120369f81f3STodor Tomov for (i = 0; i <= c->num_data; i++) {
121369f81f3STodor Tomov if (i == c->num_data)
122*4abb2130SRobert Foss l = CAMSS_CSI_PHY_LN_CLK;
123369f81f3STodor Tomov else
124369f81f3STodor Tomov l = c->data[i].pos;
125369f81f3STodor Tomov
126516e8f0fSTodor Tomov writel_relaxed(0x10, csiphy->base +
127369f81f3STodor Tomov CAMSS_CSI_PHY_LNn_CFG2(l));
128516e8f0fSTodor Tomov writel_relaxed(settle_cnt, csiphy->base +
129369f81f3STodor Tomov CAMSS_CSI_PHY_LNn_CFG3(l));
130516e8f0fSTodor Tomov writel_relaxed(0x3f, csiphy->base +
131369f81f3STodor Tomov CAMSS_CSI_PHY_INTERRUPT_MASKn(l));
132516e8f0fSTodor Tomov writel_relaxed(0x3f, csiphy->base +
133369f81f3STodor Tomov CAMSS_CSI_PHY_INTERRUPT_CLEARn(l));
134516e8f0fSTodor Tomov }
135516e8f0fSTodor Tomov }
136516e8f0fSTodor Tomov
csiphy_lanes_disable(struct csiphy_device * csiphy,struct csiphy_config * cfg)137369f81f3STodor Tomov static void csiphy_lanes_disable(struct csiphy_device *csiphy,
138369f81f3STodor Tomov struct csiphy_config *cfg)
139516e8f0fSTodor Tomov {
140369f81f3STodor Tomov struct csiphy_lanes_cfg *c = &cfg->csi2->lane_cfg;
141369f81f3STodor Tomov u8 l = 0;
142516e8f0fSTodor Tomov int i = 0;
143516e8f0fSTodor Tomov
144369f81f3STodor Tomov for (i = 0; i <= c->num_data; i++) {
145369f81f3STodor Tomov if (i == c->num_data)
146*4abb2130SRobert Foss l = CAMSS_CSI_PHY_LN_CLK;
147369f81f3STodor Tomov else
148369f81f3STodor Tomov l = c->data[i].pos;
149516e8f0fSTodor Tomov
150369f81f3STodor Tomov writel_relaxed(0x0, csiphy->base +
151369f81f3STodor Tomov CAMSS_CSI_PHY_LNn_CFG2(l));
152516e8f0fSTodor Tomov }
153516e8f0fSTodor Tomov
154516e8f0fSTodor Tomov writel_relaxed(0x0, csiphy->base + CAMSS_CSI_PHY_GLBL_PWR_CFG);
155516e8f0fSTodor Tomov }
156516e8f0fSTodor Tomov
157516e8f0fSTodor Tomov /*
158516e8f0fSTodor Tomov * csiphy_isr - CSIPHY module interrupt handler
159516e8f0fSTodor Tomov * @irq: Interrupt line
160516e8f0fSTodor Tomov * @dev: CSIPHY device
161516e8f0fSTodor Tomov *
162516e8f0fSTodor Tomov * Return IRQ_HANDLED on success
163516e8f0fSTodor Tomov */
csiphy_isr(int irq,void * dev)164516e8f0fSTodor Tomov static irqreturn_t csiphy_isr(int irq, void *dev)
165516e8f0fSTodor Tomov {
166516e8f0fSTodor Tomov struct csiphy_device *csiphy = dev;
167516e8f0fSTodor Tomov u8 i;
168516e8f0fSTodor Tomov
169516e8f0fSTodor Tomov for (i = 0; i < 8; i++) {
170516e8f0fSTodor Tomov u8 val = readl_relaxed(csiphy->base +
171516e8f0fSTodor Tomov CAMSS_CSI_PHY_INTERRUPT_STATUSn(i));
172516e8f0fSTodor Tomov writel_relaxed(val, csiphy->base +
173516e8f0fSTodor Tomov CAMSS_CSI_PHY_INTERRUPT_CLEARn(i));
174516e8f0fSTodor Tomov writel_relaxed(0x1, csiphy->base + CAMSS_CSI_PHY_GLBL_IRQ_CMD);
175516e8f0fSTodor Tomov writel_relaxed(0x0, csiphy->base + CAMSS_CSI_PHY_GLBL_IRQ_CMD);
176516e8f0fSTodor Tomov writel_relaxed(0x0, csiphy->base +
177516e8f0fSTodor Tomov CAMSS_CSI_PHY_INTERRUPT_CLEARn(i));
178516e8f0fSTodor Tomov }
179516e8f0fSTodor Tomov
180516e8f0fSTodor Tomov return IRQ_HANDLED;
181516e8f0fSTodor Tomov }
182516e8f0fSTodor Tomov
183516e8f0fSTodor Tomov const struct csiphy_hw_ops csiphy_ops_2ph_1_0 = {
184*4abb2130SRobert Foss .get_lane_mask = csiphy_get_lane_mask,
185516e8f0fSTodor Tomov .hw_version_read = csiphy_hw_version_read,
186516e8f0fSTodor Tomov .reset = csiphy_reset,
187516e8f0fSTodor Tomov .lanes_enable = csiphy_lanes_enable,
188516e8f0fSTodor Tomov .lanes_disable = csiphy_lanes_disable,
189516e8f0fSTodor Tomov .isr = csiphy_isr,
190516e8f0fSTodor Tomov };
191