1# SPDX-License-Identifier: GPL-2.0-only 2 3# V4L drivers 4 5comment "NXP media platform drivers" 6 7config VIDEO_IMX_MIPI_CSIS 8 tristate "NXP MIPI CSI-2 CSIS receiver found on i.MX7 and i.MX8 models" 9 depends on ARCH_MXC || COMPILE_TEST 10 depends on VIDEO_DEV 11 select MEDIA_CONTROLLER 12 select V4L2_FWNODE 13 select VIDEO_V4L2_SUBDEV_API 14 help 15 Video4Linux2 sub-device driver for the MIPI CSI-2 CSIS receiver 16 v3.3/v3.6.3 found on some i.MX7 and i.MX8 SoCs. 17 18config VIDEO_VIU 19 tristate "NXP VIU Video Driver" 20 depends on V4L_PLATFORM_DRIVERS 21 depends on VIDEO_DEV && (PPC_MPC512x || COMPILE_TEST) && I2C 22 select VIDEOBUF_DMA_CONTIG 23 default y 24 help 25 Support for Freescale VIU video driver. This device captures 26 video data, or overlays video on DIU frame buffer. 27 28 Say Y here if you want to enable VIU device on MPC5121e Rev2+. 29 In doubt, say N. 30 31# mem2mem drivers 32 33config VIDEO_IMX_PXP 34 tristate "NXP i.MX Pixel Pipeline (PXP)" 35 depends on V4L_MEM2MEM_DRIVERS 36 depends on VIDEO_DEV && (ARCH_MXC || COMPILE_TEST) 37 select VIDEOBUF2_DMA_CONTIG 38 select V4L2_MEM2MEM_DEV 39 help 40 The i.MX Pixel Pipeline is a memory-to-memory engine for scaling, 41 color space conversion, and rotation. 42 43config VIDEO_MX2_EMMAPRP 44 tristate "NXP MX2 eMMa-PrP support" 45 depends on V4L_MEM2MEM_DRIVERS 46 depends on VIDEO_DEV 47 depends on SOC_IMX27 || COMPILE_TEST 48 select VIDEOBUF2_DMA_CONTIG 49 select V4L2_MEM2MEM_DEV 50 help 51 MX2X chips have a PrP that can be used to process buffers from 52 memory to memory. Operations include resizing and format 53 conversion. 54 55source "drivers/media/platform/nxp/imx-jpeg/Kconfig" 56