1# SPDX-License-Identifier: GPL-2.0-only 2 3# V4L drivers 4 5comment "NXP media platform drivers" 6 7config VIDEO_IMX_MIPI_CSIS 8 tristate "NXP MIPI CSI-2 CSIS receiver found on i.MX7 and i.MX8 models" 9 depends on ARCH_MXC || COMPILE_TEST 10 depends on VIDEO_DEV 11 select MEDIA_CONTROLLER 12 select V4L2_FWNODE 13 select VIDEO_V4L2_SUBDEV_API 14 default n 15 help 16 Video4Linux2 sub-device driver for the MIPI CSI-2 CSIS receiver 17 v3.3/v3.6.3 found on some i.MX7 and i.MX8 SoCs. 18 19config VIDEO_VIU 20 tristate "NXP VIU Video Driver" 21 depends on V4L_PLATFORM_DRIVERS 22 depends on VIDEO_DEV && (PPC_MPC512x || COMPILE_TEST) && I2C 23 select VIDEOBUF_DMA_CONTIG 24 default y 25 help 26 Support for Freescale VIU video driver. This device captures 27 video data, or overlays video on DIU frame buffer. 28 29 Say Y here if you want to enable VIU device on MPC5121e Rev2+. 30 In doubt, say N. 31 32# mem2mem drivers 33 34config VIDEO_IMX_PXP 35 tristate "NXP i.MX Pixel Pipeline (PXP)" 36 depends on V4L_MEM2MEM_DRIVERS 37 depends on VIDEO_DEV && (ARCH_MXC || COMPILE_TEST) 38 select VIDEOBUF2_DMA_CONTIG 39 select V4L2_MEM2MEM_DEV 40 help 41 The i.MX Pixel Pipeline is a memory-to-memory engine for scaling, 42 color space conversion, and rotation. 43 44config VIDEO_MX2_EMMAPRP 45 tristate "NXP MX2 eMMa-PrP support" 46 depends on V4L_MEM2MEM_DRIVERS 47 depends on VIDEO_DEV 48 depends on SOC_IMX27 || COMPILE_TEST 49 select VIDEOBUF2_DMA_CONTIG 50 select V4L2_MEM2MEM_DEV 51 help 52 MX2X chips have a PrP that can be used to process buffers from 53 memory to memory. Operations include resizing and format 54 conversion. 55 56source "drivers/media/platform/nxp/imx-jpeg/Kconfig" 57