1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Microchip CSI2 Demux Controller (CSI2DC) driver
4  *
5  * Copyright (C) 2018 Microchip Technology, Inc.
6  *
7  * Author: Eugen Hristev <eugen.hristev@microchip.com>
8  *
9  */
10 
11 #include <linux/clk.h>
12 #include <linux/mod_devicetable.h>
13 #include <linux/module.h>
14 #include <linux/of_graph.h>
15 #include <linux/platform_device.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/videodev2.h>
18 
19 #include <media/v4l2-fwnode.h>
20 #include <media/v4l2-subdev.h>
21 
22 /* Global configuration register */
23 #define CSI2DC_GCFG			0x0
24 
25 /* MIPI sensor pixel clock is free running */
26 #define CSI2DC_GCFG_MIPIFRN		BIT(0)
27 /* GPIO parallel interface selection */
28 #define CSI2DC_GCFG_GPIOSEL		BIT(1)
29 /* Output waveform inter-line minimum delay */
30 #define CSI2DC_GCFG_HLC(v)		((v) << 4)
31 #define CSI2DC_GCFG_HLC_MASK		GENMASK(7, 4)
32 /* SAMA7G5 requires a HLC delay of 15 */
33 #define SAMA7G5_HLC			(15)
34 
35 /* Global control register */
36 #define CSI2DC_GCTLR			0x04
37 #define CSI2DC_GCTLR_SWRST		BIT(0)
38 
39 /* Global status register */
40 #define CSI2DC_GS			0x08
41 
42 /* SSP interrupt status register */
43 #define CSI2DC_SSPIS			0x28
44 /* Pipe update register */
45 #define CSI2DC_PU			0xc0
46 /* Video pipe attributes update */
47 #define CSI2DC_PU_VP			BIT(0)
48 
49 /* Pipe update status register */
50 #define CSI2DC_PUS			0xc4
51 
52 /* Video pipeline Interrupt Status Register */
53 #define CSI2DC_VPISR			0xf4
54 
55 /* Video pipeline enable register */
56 #define CSI2DC_VPE			0xf8
57 #define CSI2DC_VPE_ENABLE		BIT(0)
58 
59 /* Video pipeline configuration register */
60 #define CSI2DC_VPCFG			0xfc
61 /* Data type */
62 #define CSI2DC_VPCFG_DT(v)		((v) << 0)
63 #define CSI2DC_VPCFG_DT_MASK		GENMASK(5, 0)
64 /* Virtual channel identifier */
65 #define CSI2DC_VPCFG_VC(v)		((v) << 6)
66 #define CSI2DC_VPCFG_VC_MASK		GENMASK(7, 6)
67 /* Decompression enable */
68 #define CSI2DC_VPCFG_DE			BIT(8)
69 /* Decoder mode */
70 #define CSI2DC_VPCFG_DM(v)		((v) << 9)
71 #define CSI2DC_VPCFG_DM_DECODER8TO12	0
72 /* Decoder predictor 2 selection */
73 #define CSI2DC_VPCFG_DP2		BIT(12)
74 /* Recommended memory storage */
75 #define CSI2DC_VPCFG_RMS		BIT(13)
76 /* Post adjustment */
77 #define CSI2DC_VPCFG_PA			BIT(14)
78 
79 /* Video pipeline column register */
80 #define CSI2DC_VPCOL			0x100
81 /* Column number */
82 #define CSI2DC_VPCOL_COL(v)		((v) << 0)
83 #define CSI2DC_VPCOL_COL_MASK		GENMASK(15, 0)
84 
85 /* Video pipeline row register */
86 #define CSI2DC_VPROW			0x104
87 /* Row number */
88 #define CSI2DC_VPROW_ROW(v)		((v) << 0)
89 #define CSI2DC_VPROW_ROW_MASK		GENMASK(15, 0)
90 
91 /* Version register */
92 #define CSI2DC_VERSION			0x1fc
93 
94 /* register read/write helpers */
95 #define csi2dc_readl(st, reg)		readl_relaxed((st)->base + (reg))
96 #define csi2dc_writel(st, reg, val)	writel_relaxed((val), \
97 					(st)->base + (reg))
98 
99 /* supported RAW data types */
100 #define CSI2DC_DT_RAW6			0x28
101 #define CSI2DC_DT_RAW7			0x29
102 #define CSI2DC_DT_RAW8			0x2a
103 #define CSI2DC_DT_RAW10			0x2b
104 #define CSI2DC_DT_RAW12			0x2c
105 #define CSI2DC_DT_RAW14			0x2d
106 /* YUV data types */
107 #define CSI2DC_DT_YUV422_8B		0x1e
108 
109 /*
110  * struct csi2dc_format - CSI2DC format type struct
111  * @mbus_code:		Media bus code for the format
112  * @dt:			Data type constant for this format
113  */
114 struct csi2dc_format {
115 	u32				mbus_code;
116 	u32				dt;
117 };
118 
119 static const struct csi2dc_format csi2dc_formats[] = {
120 	{
121 		.mbus_code =		MEDIA_BUS_FMT_SRGGB8_1X8,
122 		.dt =			CSI2DC_DT_RAW8,
123 	}, {
124 		.mbus_code =		MEDIA_BUS_FMT_SBGGR8_1X8,
125 		.dt =			CSI2DC_DT_RAW8,
126 	}, {
127 		.mbus_code =		MEDIA_BUS_FMT_SGRBG8_1X8,
128 		.dt =			CSI2DC_DT_RAW8,
129 	}, {
130 		.mbus_code =		MEDIA_BUS_FMT_SGBRG8_1X8,
131 		.dt =			CSI2DC_DT_RAW8,
132 	}, {
133 		.mbus_code =		MEDIA_BUS_FMT_SRGGB10_1X10,
134 		.dt =			CSI2DC_DT_RAW10,
135 	}, {
136 		.mbus_code =		MEDIA_BUS_FMT_SBGGR10_1X10,
137 		.dt =			CSI2DC_DT_RAW10,
138 	}, {
139 		.mbus_code =		MEDIA_BUS_FMT_SGRBG10_1X10,
140 		.dt =			CSI2DC_DT_RAW10,
141 	}, {
142 		.mbus_code =		MEDIA_BUS_FMT_SGBRG10_1X10,
143 		.dt =			CSI2DC_DT_RAW10,
144 	}, {
145 		.mbus_code =		MEDIA_BUS_FMT_YUYV8_2X8,
146 		.dt =			CSI2DC_DT_YUV422_8B,
147 	},
148 };
149 
150 enum mipi_csi_pads {
151 	CSI2DC_PAD_SINK			= 0,
152 	CSI2DC_PAD_SOURCE		= 1,
153 	CSI2DC_PADS_NUM			= 2,
154 };
155 
156 /*
157  * struct csi2dc_device - CSI2DC device driver data/config struct
158  * @base:		Register map base address
159  * @csi2dc_sd:		v4l2 subdevice for the csi2dc device
160  *			This is the subdevice that the csi2dc device itself
161  *			registers in v4l2 subsystem
162  * @dev:		struct device for this csi2dc device
163  * @pclk:		Peripheral clock reference
164  *			Input clock that clocks the hardware block internal
165  *			logic
166  * @scck:		Sensor Controller clock reference
167  *			Input clock that is used to generate the pixel clock
168  * @format:		Current saved format used in g/s fmt
169  * @cur_fmt:		Current state format
170  * @try_fmt:		Try format that is being tried
171  * @pads:		Media entity pads for the csi2dc subdevice
172  * @clk_gated:		Whether the clock is gated or free running
173  * @video_pipe:		Whether video pipeline is configured
174  * @parallel_mode:	The underlying subdevice is connected on a parallel bus
175  * @vc:			Current set virtual channel
176  * @notifier:		Async notifier that is used to bound the underlying
177  *			subdevice to the csi2dc subdevice
178  * @input_sd:		Reference to the underlying subdevice bound to the
179  *			csi2dc subdevice
180  * @remote_pad:		Pad number of the underlying subdevice that is linked
181  *			to the csi2dc subdevice sink pad.
182  */
183 struct csi2dc_device {
184 	void __iomem			*base;
185 	struct v4l2_subdev		csi2dc_sd;
186 	struct device			*dev;
187 	struct clk			*pclk;
188 	struct clk			*scck;
189 
190 	struct v4l2_mbus_framefmt	 format;
191 
192 	const struct csi2dc_format	*cur_fmt;
193 	const struct csi2dc_format	*try_fmt;
194 
195 	struct media_pad		pads[CSI2DC_PADS_NUM];
196 
197 	bool				clk_gated;
198 	bool				video_pipe;
199 	bool				parallel_mode;
200 	u32				vc;
201 
202 	struct v4l2_async_notifier	notifier;
203 
204 	struct v4l2_subdev		*input_sd;
205 
206 	u32				remote_pad;
207 };
208 
209 static inline struct csi2dc_device *
210 csi2dc_sd_to_csi2dc_device(struct v4l2_subdev *csi2dc_sd)
211 {
212 	return container_of(csi2dc_sd, struct csi2dc_device, csi2dc_sd);
213 }
214 
215 static int csi2dc_enum_mbus_code(struct v4l2_subdev *csi2dc_sd,
216 				 struct v4l2_subdev_state *sd_state,
217 				 struct v4l2_subdev_mbus_code_enum *code)
218 {
219 	if (code->index >= ARRAY_SIZE(csi2dc_formats))
220 		return -EINVAL;
221 
222 	code->code = csi2dc_formats[code->index].mbus_code;
223 
224 	return 0;
225 }
226 
227 static int csi2dc_get_fmt(struct v4l2_subdev *csi2dc_sd,
228 			  struct v4l2_subdev_state *sd_state,
229 			  struct v4l2_subdev_format *format)
230 {
231 	struct csi2dc_device *csi2dc = csi2dc_sd_to_csi2dc_device(csi2dc_sd);
232 	struct v4l2_mbus_framefmt *v4l2_try_fmt;
233 
234 	if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
235 		v4l2_try_fmt = v4l2_subdev_get_try_format(csi2dc_sd, sd_state,
236 							  format->pad);
237 		format->format = *v4l2_try_fmt;
238 
239 		return 0;
240 	}
241 
242 	format->format = csi2dc->format;
243 
244 	return 0;
245 }
246 
247 static int csi2dc_set_fmt(struct v4l2_subdev *csi2dc_sd,
248 			  struct v4l2_subdev_state *sd_state,
249 			  struct v4l2_subdev_format *req_fmt)
250 {
251 	struct csi2dc_device *csi2dc = csi2dc_sd_to_csi2dc_device(csi2dc_sd);
252 	const struct csi2dc_format *fmt, *try_fmt = NULL;
253 	struct v4l2_mbus_framefmt *v4l2_try_fmt;
254 	unsigned int i;
255 
256 	/*
257 	 * Setting the source pad is disabled.
258 	 * The same format is being propagated from the sink to source.
259 	 */
260 	if (req_fmt->pad == CSI2DC_PAD_SOURCE)
261 		return -EINVAL;
262 
263 	for (i = 0; i < ARRAY_SIZE(csi2dc_formats);  i++) {
264 		fmt = &csi2dc_formats[i];
265 		if (req_fmt->format.code == fmt->mbus_code)
266 			try_fmt = fmt;
267 		fmt++;
268 	}
269 
270 	/* in case we could not find the desired format, default to something */
271 	if (!try_fmt) {
272 		try_fmt = &csi2dc_formats[0];
273 
274 		dev_dbg(csi2dc->dev,
275 			"CSI2DC unsupported format 0x%x, defaulting to 0x%x\n",
276 			req_fmt->format.code, csi2dc_formats[0].mbus_code);
277 	}
278 
279 	req_fmt->format.code = try_fmt->mbus_code;
280 	req_fmt->format.colorspace = V4L2_COLORSPACE_SRGB;
281 	req_fmt->format.field = V4L2_FIELD_NONE;
282 
283 	if (req_fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
284 		v4l2_try_fmt = v4l2_subdev_get_try_format(csi2dc_sd, sd_state,
285 							  req_fmt->pad);
286 		*v4l2_try_fmt = req_fmt->format;
287 		/* Trying on the sink pad makes the source pad change too */
288 		v4l2_try_fmt = v4l2_subdev_get_try_format(csi2dc_sd,
289 							  sd_state,
290 							  CSI2DC_PAD_SOURCE);
291 		*v4l2_try_fmt = req_fmt->format;
292 
293 		/* if we are just trying, we are done */
294 		return 0;
295 	}
296 
297 	/* save the format for later requests */
298 	csi2dc->format = req_fmt->format;
299 
300 	/* update config */
301 	csi2dc->cur_fmt = try_fmt;
302 
303 	dev_dbg(csi2dc->dev, "new format set: 0x%x @%dx%d\n",
304 		csi2dc->format.code, csi2dc->format.width,
305 		csi2dc->format.height);
306 
307 	return 0;
308 }
309 
310 static int csi2dc_power(struct csi2dc_device *csi2dc, int on)
311 {
312 	int ret = 0;
313 
314 	if (on) {
315 		ret = clk_prepare_enable(csi2dc->pclk);
316 		if (ret) {
317 			dev_err(csi2dc->dev, "failed to enable pclk:%d\n", ret);
318 			return ret;
319 		}
320 
321 		ret = clk_prepare_enable(csi2dc->scck);
322 		if (ret) {
323 			dev_err(csi2dc->dev, "failed to enable scck:%d\n", ret);
324 			clk_disable_unprepare(csi2dc->pclk);
325 			return ret;
326 		}
327 
328 		/* if powering up, deassert reset line */
329 		csi2dc_writel(csi2dc, CSI2DC_GCTLR, CSI2DC_GCTLR_SWRST);
330 	} else {
331 		/* if powering down, assert reset line */
332 		csi2dc_writel(csi2dc, CSI2DC_GCTLR, 0);
333 
334 		clk_disable_unprepare(csi2dc->scck);
335 		clk_disable_unprepare(csi2dc->pclk);
336 	}
337 
338 	return ret;
339 }
340 
341 static int csi2dc_get_mbus_config(struct csi2dc_device *csi2dc)
342 {
343 	struct v4l2_mbus_config mbus_config = { 0 };
344 	int ret;
345 
346 	ret = v4l2_subdev_call(csi2dc->input_sd, pad, get_mbus_config,
347 			       csi2dc->remote_pad, &mbus_config);
348 	if (ret == -ENOIOCTLCMD) {
349 		dev_dbg(csi2dc->dev,
350 			"no remote mbus configuration available\n");
351 		return 0;
352 	}
353 
354 	if (ret) {
355 		dev_err(csi2dc->dev,
356 			"failed to get remote mbus configuration\n");
357 		return 0;
358 	}
359 
360 	dev_dbg(csi2dc->dev, "subdev sending on channel %d\n", csi2dc->vc);
361 
362 	csi2dc->clk_gated = mbus_config.bus.parallel.flags &
363 				V4L2_MBUS_CSI2_NONCONTINUOUS_CLOCK;
364 
365 	dev_dbg(csi2dc->dev, "mbus_config: %s clock\n",
366 		csi2dc->clk_gated ? "gated" : "free running");
367 
368 	return 0;
369 }
370 
371 static void csi2dc_vp_update(struct csi2dc_device *csi2dc)
372 {
373 	u32 vp, gcfg;
374 
375 	if (!csi2dc->video_pipe) {
376 		dev_err(csi2dc->dev, "video pipeline unavailable\n");
377 		return;
378 	}
379 
380 	if (csi2dc->parallel_mode) {
381 		/* In parallel mode, GPIO parallel interface must be selected */
382 		gcfg = csi2dc_readl(csi2dc, CSI2DC_GCFG);
383 		gcfg |= CSI2DC_GCFG_GPIOSEL;
384 		csi2dc_writel(csi2dc, CSI2DC_GCFG, gcfg);
385 		return;
386 	}
387 
388 	/* serial video pipeline */
389 
390 	csi2dc_writel(csi2dc, CSI2DC_GCFG,
391 		      (SAMA7G5_HLC & CSI2DC_GCFG_HLC_MASK) |
392 		      (csi2dc->clk_gated ? 0 : CSI2DC_GCFG_MIPIFRN));
393 
394 	vp = CSI2DC_VPCFG_DT(csi2dc->cur_fmt->dt) & CSI2DC_VPCFG_DT_MASK;
395 	vp |= CSI2DC_VPCFG_VC(csi2dc->vc) & CSI2DC_VPCFG_VC_MASK;
396 	vp &= ~CSI2DC_VPCFG_DE;
397 	vp |= CSI2DC_VPCFG_DM(CSI2DC_VPCFG_DM_DECODER8TO12);
398 	vp &= ~CSI2DC_VPCFG_DP2;
399 	vp &= ~CSI2DC_VPCFG_RMS;
400 	vp |= CSI2DC_VPCFG_PA;
401 
402 	csi2dc_writel(csi2dc, CSI2DC_VPCFG, vp);
403 	csi2dc_writel(csi2dc, CSI2DC_VPE, CSI2DC_VPE_ENABLE);
404 	csi2dc_writel(csi2dc, CSI2DC_PU, CSI2DC_PU_VP);
405 }
406 
407 static int csi2dc_s_stream(struct v4l2_subdev *csi2dc_sd, int enable)
408 {
409 	struct csi2dc_device *csi2dc = csi2dc_sd_to_csi2dc_device(csi2dc_sd);
410 	int ret;
411 
412 	if (enable) {
413 		ret = pm_runtime_resume_and_get(csi2dc->dev);
414 		if (ret < 0)
415 			return ret;
416 
417 		csi2dc_get_mbus_config(csi2dc);
418 
419 		csi2dc_vp_update(csi2dc);
420 
421 		return v4l2_subdev_call(csi2dc->input_sd, video, s_stream,
422 					true);
423 	}
424 
425 	dev_dbg(csi2dc->dev,
426 		"Last frame received: VPCOLR = %u, VPROWR= %u, VPISR = %x\n",
427 		csi2dc_readl(csi2dc, CSI2DC_VPCOL),
428 		csi2dc_readl(csi2dc, CSI2DC_VPROW),
429 		csi2dc_readl(csi2dc, CSI2DC_VPISR));
430 
431 	/* stop streaming scenario */
432 	ret = v4l2_subdev_call(csi2dc->input_sd, video, s_stream, false);
433 
434 	pm_runtime_put_sync(csi2dc->dev);
435 
436 	return ret;
437 }
438 
439 static int csi2dc_init_cfg(struct v4l2_subdev *csi2dc_sd,
440 			   struct v4l2_subdev_state *sd_state)
441 {
442 	struct v4l2_mbus_framefmt *v4l2_try_fmt =
443 		v4l2_subdev_get_try_format(csi2dc_sd, sd_state, 0);
444 
445 	v4l2_try_fmt->height = 480;
446 	v4l2_try_fmt->width = 640;
447 	v4l2_try_fmt->code = csi2dc_formats[0].mbus_code;
448 	v4l2_try_fmt->colorspace = V4L2_COLORSPACE_SRGB;
449 	v4l2_try_fmt->field = V4L2_FIELD_NONE;
450 	v4l2_try_fmt->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT;
451 	v4l2_try_fmt->quantization = V4L2_QUANTIZATION_DEFAULT;
452 	v4l2_try_fmt->xfer_func = V4L2_XFER_FUNC_DEFAULT;
453 
454 	return 0;
455 }
456 
457 static const struct media_entity_operations csi2dc_entity_ops = {
458 	.link_validate = v4l2_subdev_link_validate,
459 };
460 
461 static const struct v4l2_subdev_pad_ops csi2dc_pad_ops = {
462 	.enum_mbus_code = csi2dc_enum_mbus_code,
463 	.set_fmt = csi2dc_set_fmt,
464 	.get_fmt = csi2dc_get_fmt,
465 	.init_cfg = csi2dc_init_cfg,
466 };
467 
468 static const struct v4l2_subdev_video_ops csi2dc_video_ops = {
469 	.s_stream = csi2dc_s_stream,
470 };
471 
472 static const struct v4l2_subdev_ops csi2dc_subdev_ops = {
473 	.pad = &csi2dc_pad_ops,
474 	.video = &csi2dc_video_ops,
475 };
476 
477 static int csi2dc_async_bound(struct v4l2_async_notifier *notifier,
478 			      struct v4l2_subdev *subdev,
479 			      struct v4l2_async_connection *asd)
480 {
481 	struct csi2dc_device *csi2dc = container_of(notifier,
482 						struct csi2dc_device, notifier);
483 	int pad;
484 	int ret;
485 
486 	csi2dc->input_sd = subdev;
487 
488 	pad = media_entity_get_fwnode_pad(&subdev->entity, asd->match.fwnode,
489 					  MEDIA_PAD_FL_SOURCE);
490 	if (pad < 0) {
491 		dev_err(csi2dc->dev, "Failed to find pad for %s\n",
492 			subdev->name);
493 		return pad;
494 	}
495 
496 	csi2dc->remote_pad = pad;
497 
498 	ret = media_create_pad_link(&csi2dc->input_sd->entity,
499 				    csi2dc->remote_pad,
500 				    &csi2dc->csi2dc_sd.entity, 0,
501 				    MEDIA_LNK_FL_ENABLED);
502 	if (ret) {
503 		dev_err(csi2dc->dev,
504 			"Failed to create pad link: %s to %s\n",
505 			csi2dc->input_sd->entity.name,
506 			csi2dc->csi2dc_sd.entity.name);
507 		return ret;
508 	}
509 
510 	dev_dbg(csi2dc->dev, "link with %s pad: %d\n",
511 		csi2dc->input_sd->name, csi2dc->remote_pad);
512 
513 	return ret;
514 }
515 
516 static const struct v4l2_async_notifier_operations csi2dc_async_ops = {
517 	.bound = csi2dc_async_bound,
518 };
519 
520 static int csi2dc_prepare_notifier(struct csi2dc_device *csi2dc,
521 				   struct fwnode_handle *input_fwnode)
522 {
523 	struct v4l2_async_connection *asd;
524 	int ret = 0;
525 
526 	v4l2_async_subdev_nf_init(&csi2dc->notifier, &csi2dc->csi2dc_sd);
527 
528 	asd = v4l2_async_nf_add_fwnode_remote(&csi2dc->notifier,
529 					      input_fwnode,
530 					      struct v4l2_async_connection);
531 
532 	fwnode_handle_put(input_fwnode);
533 
534 	if (IS_ERR(asd)) {
535 		ret = PTR_ERR(asd);
536 		dev_err(csi2dc->dev,
537 			"failed to add async notifier for node %pOF: %d\n",
538 			to_of_node(input_fwnode), ret);
539 		v4l2_async_nf_cleanup(&csi2dc->notifier);
540 		return ret;
541 	}
542 
543 	csi2dc->notifier.ops = &csi2dc_async_ops;
544 
545 	ret = v4l2_async_nf_register(&csi2dc->notifier);
546 	if (ret) {
547 		dev_err(csi2dc->dev, "fail to register async notifier: %d\n",
548 			ret);
549 		v4l2_async_nf_cleanup(&csi2dc->notifier);
550 	}
551 
552 	return ret;
553 }
554 
555 static int csi2dc_of_parse(struct csi2dc_device *csi2dc,
556 			   struct device_node *of_node)
557 {
558 	struct fwnode_handle *input_fwnode, *output_fwnode;
559 	struct v4l2_fwnode_endpoint input_endpoint = { 0 },
560 				    output_endpoint = { 0 };
561 	int ret;
562 
563 	input_fwnode = fwnode_graph_get_next_endpoint(of_fwnode_handle(of_node),
564 						      NULL);
565 	if (!input_fwnode) {
566 		dev_err(csi2dc->dev,
567 			"missing port node at %pOF, input node is mandatory.\n",
568 			of_node);
569 		return -EINVAL;
570 	}
571 
572 	ret = v4l2_fwnode_endpoint_parse(input_fwnode, &input_endpoint);
573 	if (ret) {
574 		dev_err(csi2dc->dev, "endpoint not defined at %pOF\n", of_node);
575 		goto csi2dc_of_parse_err;
576 	}
577 
578 	if (input_endpoint.bus_type == V4L2_MBUS_PARALLEL ||
579 	    input_endpoint.bus_type == V4L2_MBUS_BT656) {
580 		csi2dc->parallel_mode = true;
581 		dev_dbg(csi2dc->dev,
582 			"subdevice connected on parallel interface\n");
583 	}
584 
585 	if (input_endpoint.bus_type == V4L2_MBUS_CSI2_DPHY) {
586 		csi2dc->clk_gated = input_endpoint.bus.mipi_csi2.flags &
587 					V4L2_MBUS_CSI2_NONCONTINUOUS_CLOCK;
588 		dev_dbg(csi2dc->dev,
589 			"subdevice connected on serial interface\n");
590 		dev_dbg(csi2dc->dev, "DT: %s clock\n",
591 			csi2dc->clk_gated ? "gated" : "free running");
592 	}
593 
594 	output_fwnode = fwnode_graph_get_next_endpoint
595 				(of_fwnode_handle(of_node), input_fwnode);
596 
597 	if (output_fwnode)
598 		ret = v4l2_fwnode_endpoint_parse(output_fwnode,
599 						 &output_endpoint);
600 
601 	fwnode_handle_put(output_fwnode);
602 
603 	if (!output_fwnode || ret) {
604 		dev_info(csi2dc->dev,
605 			 "missing output node at %pOF, data pipe available only.\n",
606 			 of_node);
607 	} else {
608 		if (output_endpoint.bus_type != V4L2_MBUS_PARALLEL &&
609 		    output_endpoint.bus_type != V4L2_MBUS_BT656) {
610 			dev_err(csi2dc->dev,
611 				"output port must be parallel/bt656.\n");
612 			ret = -EINVAL;
613 			goto csi2dc_of_parse_err;
614 		}
615 
616 		csi2dc->video_pipe = true;
617 
618 		dev_dbg(csi2dc->dev,
619 			"block %pOF [%d.%d]->[%d.%d] video pipeline\n",
620 			of_node, input_endpoint.base.port,
621 			input_endpoint.base.id, output_endpoint.base.port,
622 			output_endpoint.base.id);
623 	}
624 
625 	/* prepare async notifier for subdevice completion */
626 	return csi2dc_prepare_notifier(csi2dc, input_fwnode);
627 
628 csi2dc_of_parse_err:
629 	fwnode_handle_put(input_fwnode);
630 	return ret;
631 }
632 
633 static void csi2dc_default_format(struct csi2dc_device *csi2dc)
634 {
635 	csi2dc->cur_fmt = &csi2dc_formats[0];
636 
637 	csi2dc->format.height = 480;
638 	csi2dc->format.width = 640;
639 	csi2dc->format.code = csi2dc_formats[0].mbus_code;
640 	csi2dc->format.colorspace = V4L2_COLORSPACE_SRGB;
641 	csi2dc->format.field = V4L2_FIELD_NONE;
642 	csi2dc->format.ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT;
643 	csi2dc->format.quantization = V4L2_QUANTIZATION_DEFAULT;
644 	csi2dc->format.xfer_func = V4L2_XFER_FUNC_DEFAULT;
645 }
646 
647 static int csi2dc_probe(struct platform_device *pdev)
648 {
649 	struct device *dev = &pdev->dev;
650 	struct csi2dc_device *csi2dc;
651 	int ret = 0;
652 	u32 ver;
653 
654 	csi2dc = devm_kzalloc(dev, sizeof(*csi2dc), GFP_KERNEL);
655 	if (!csi2dc)
656 		return -ENOMEM;
657 
658 	csi2dc->dev = dev;
659 
660 	csi2dc->base = devm_platform_ioremap_resource(pdev, 0);
661 	if (IS_ERR(csi2dc->base)) {
662 		dev_err(dev, "base address not set\n");
663 		return PTR_ERR(csi2dc->base);
664 	}
665 
666 	csi2dc->pclk = devm_clk_get(dev, "pclk");
667 	if (IS_ERR(csi2dc->pclk)) {
668 		ret = PTR_ERR(csi2dc->pclk);
669 		dev_err(dev, "failed to get pclk: %d\n", ret);
670 		return ret;
671 	}
672 
673 	csi2dc->scck = devm_clk_get(dev, "scck");
674 	if (IS_ERR(csi2dc->scck)) {
675 		ret = PTR_ERR(csi2dc->scck);
676 		dev_err(dev, "failed to get scck: %d\n", ret);
677 		return ret;
678 	}
679 
680 	v4l2_subdev_init(&csi2dc->csi2dc_sd, &csi2dc_subdev_ops);
681 
682 	csi2dc->csi2dc_sd.owner = THIS_MODULE;
683 	csi2dc->csi2dc_sd.dev = dev;
684 	snprintf(csi2dc->csi2dc_sd.name, sizeof(csi2dc->csi2dc_sd.name),
685 		 "csi2dc");
686 
687 	csi2dc->csi2dc_sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
688 	csi2dc->csi2dc_sd.entity.function = MEDIA_ENT_F_VID_IF_BRIDGE;
689 	csi2dc->csi2dc_sd.entity.ops = &csi2dc_entity_ops;
690 
691 	platform_set_drvdata(pdev, csi2dc);
692 
693 	ret = csi2dc_of_parse(csi2dc, dev->of_node);
694 	if (ret)
695 		goto csi2dc_probe_cleanup_entity;
696 
697 	csi2dc->pads[CSI2DC_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
698 	if (csi2dc->video_pipe)
699 		csi2dc->pads[CSI2DC_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
700 
701 	ret = media_entity_pads_init(&csi2dc->csi2dc_sd.entity,
702 				     csi2dc->video_pipe ? CSI2DC_PADS_NUM : 1,
703 				     csi2dc->pads);
704 	if (ret < 0) {
705 		dev_err(dev, "media entity init failed\n");
706 		goto csi2dc_probe_cleanup_notifier;
707 	}
708 
709 	csi2dc_default_format(csi2dc);
710 
711 	/* turn power on to validate capabilities */
712 	ret = csi2dc_power(csi2dc, true);
713 	if (ret < 0)
714 		goto csi2dc_probe_cleanup_notifier;
715 
716 	pm_runtime_set_active(dev);
717 	pm_runtime_enable(dev);
718 	ver = csi2dc_readl(csi2dc, CSI2DC_VERSION);
719 
720 	/*
721 	 * we must register the subdev after PM runtime has been requested,
722 	 * otherwise we might bound immediately and request pm_runtime_resume
723 	 * before runtime_enable.
724 	 */
725 	ret = v4l2_async_register_subdev(&csi2dc->csi2dc_sd);
726 	if (ret) {
727 		dev_err(csi2dc->dev, "failed to register the subdevice\n");
728 		goto csi2dc_probe_cleanup_notifier;
729 	}
730 
731 	dev_info(dev, "Microchip CSI2DC version %x\n", ver);
732 
733 	return 0;
734 
735 csi2dc_probe_cleanup_notifier:
736 	v4l2_async_nf_cleanup(&csi2dc->notifier);
737 csi2dc_probe_cleanup_entity:
738 	media_entity_cleanup(&csi2dc->csi2dc_sd.entity);
739 
740 	return ret;
741 }
742 
743 static void csi2dc_remove(struct platform_device *pdev)
744 {
745 	struct csi2dc_device *csi2dc = platform_get_drvdata(pdev);
746 
747 	pm_runtime_disable(&pdev->dev);
748 
749 	v4l2_async_unregister_subdev(&csi2dc->csi2dc_sd);
750 	v4l2_async_nf_unregister(&csi2dc->notifier);
751 	v4l2_async_nf_cleanup(&csi2dc->notifier);
752 	media_entity_cleanup(&csi2dc->csi2dc_sd.entity);
753 }
754 
755 static int __maybe_unused csi2dc_runtime_suspend(struct device *dev)
756 {
757 	struct csi2dc_device *csi2dc = dev_get_drvdata(dev);
758 
759 	return csi2dc_power(csi2dc, false);
760 }
761 
762 static int __maybe_unused csi2dc_runtime_resume(struct device *dev)
763 {
764 	struct csi2dc_device *csi2dc = dev_get_drvdata(dev);
765 
766 	return csi2dc_power(csi2dc, true);
767 }
768 
769 static const struct dev_pm_ops csi2dc_dev_pm_ops = {
770 	SET_RUNTIME_PM_OPS(csi2dc_runtime_suspend, csi2dc_runtime_resume, NULL)
771 };
772 
773 static const struct of_device_id csi2dc_of_match[] = {
774 	{ .compatible = "microchip,sama7g5-csi2dc" },
775 	{ }
776 };
777 
778 MODULE_DEVICE_TABLE(of, csi2dc_of_match);
779 
780 static struct platform_driver csi2dc_driver = {
781 	.probe	= csi2dc_probe,
782 	.remove_new = csi2dc_remove,
783 	.driver = {
784 		.name =			"microchip-csi2dc",
785 		.pm =			&csi2dc_dev_pm_ops,
786 		.of_match_table =	of_match_ptr(csi2dc_of_match),
787 	},
788 };
789 
790 module_platform_driver(csi2dc_driver);
791 
792 MODULE_AUTHOR("Eugen Hristev <eugen.hristev@microchip.com>");
793 MODULE_DESCRIPTION("Microchip CSI2 Demux Controller driver");
794 MODULE_LICENSE("GPL v2");
795