1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2022 MediaTek Inc. 4 * Author: Yunfei Dong <yunfei.dong@mediatek.com> 5 */ 6 7 #include <linux/module.h> 8 #include <linux/slab.h> 9 #include <media/v4l2-h264.h> 10 #include <media/v4l2-mem2mem.h> 11 #include <media/videobuf2-dma-contig.h> 12 13 #include "../mtk_vcodec_dec.h" 14 #include "../../common/mtk_vcodec_intr.h" 15 #include "../vdec_drv_base.h" 16 #include "../vdec_drv_if.h" 17 #include "../vdec_vpu_if.h" 18 #include "vdec_h264_req_common.h" 19 20 /** 21 * enum vdec_h264_core_dec_err_type - core decode error type 22 * 23 * @TRANS_BUFFER_FULL: trans buffer is full 24 * @SLICE_HEADER_FULL: slice header buffer is full 25 */ 26 enum vdec_h264_core_dec_err_type { 27 TRANS_BUFFER_FULL = 1, 28 SLICE_HEADER_FULL, 29 }; 30 31 /** 32 * struct vdec_h264_slice_lat_dec_param - parameters for decode current frame 33 * 34 * @sps: h264 sps syntax parameters 35 * @pps: h264 pps syntax parameters 36 * @slice_header: h264 slice header syntax parameters 37 * @scaling_matrix: h264 scaling list parameters 38 * @decode_params: decoder parameters of each frame used for hardware decode 39 * @h264_dpb_info: dpb reference list 40 */ 41 struct vdec_h264_slice_lat_dec_param { 42 struct mtk_h264_sps_param sps; 43 struct mtk_h264_pps_param pps; 44 struct mtk_h264_slice_hd_param slice_header; 45 struct slice_api_h264_scaling_matrix scaling_matrix; 46 struct slice_api_h264_decode_param decode_params; 47 struct mtk_h264_dpb_info h264_dpb_info[V4L2_H264_NUM_DPB_ENTRIES]; 48 }; 49 50 /** 51 * struct vdec_h264_slice_info - decode information 52 * 53 * @nal_info: nal info of current picture 54 * @timeout: Decode timeout: 1 timeout, 0 no timeount 55 * @bs_buf_size: bitstream size 56 * @bs_buf_addr: bitstream buffer dma address 57 * @y_fb_dma: Y frame buffer dma address 58 * @c_fb_dma: C frame buffer dma address 59 * @vdec_fb_va: VDEC frame buffer struct virtual address 60 * @crc: Used to check whether hardware's status is right 61 */ 62 struct vdec_h264_slice_info { 63 u16 nal_info; 64 u16 timeout; 65 u32 bs_buf_size; 66 u64 bs_buf_addr; 67 u64 y_fb_dma; 68 u64 c_fb_dma; 69 u64 vdec_fb_va; 70 u32 crc[8]; 71 }; 72 73 /** 74 * struct vdec_h264_slice_vsi - shared memory for decode information exchange 75 * between SCP and Host. 76 * 77 * @wdma_err_addr: wdma error dma address 78 * @wdma_start_addr: wdma start dma address 79 * @wdma_end_addr: wdma end dma address 80 * @slice_bc_start_addr: slice bc start dma address 81 * @slice_bc_end_addr: slice bc end dma address 82 * @row_info_start_addr: row info start dma address 83 * @row_info_end_addr: row info end dma address 84 * @trans_start: trans start dma address 85 * @trans_end: trans end dma address 86 * @wdma_end_addr_offset: wdma end address offset 87 * 88 * @mv_buf_dma: HW working motion vector buffer 89 * dma address (AP-W, VPU-R) 90 * @dec: decode information (AP-R, VPU-W) 91 * @h264_slice_params: decode parameters for hw used 92 */ 93 struct vdec_h264_slice_vsi { 94 /* LAT dec addr */ 95 u64 wdma_err_addr; 96 u64 wdma_start_addr; 97 u64 wdma_end_addr; 98 u64 slice_bc_start_addr; 99 u64 slice_bc_end_addr; 100 u64 row_info_start_addr; 101 u64 row_info_end_addr; 102 u64 trans_start; 103 u64 trans_end; 104 u64 wdma_end_addr_offset; 105 106 u64 mv_buf_dma[H264_MAX_MV_NUM]; 107 struct vdec_h264_slice_info dec; 108 struct vdec_h264_slice_lat_dec_param h264_slice_params; 109 }; 110 111 /** 112 * struct vdec_h264_slice_share_info - shared information used to exchange 113 * message between lat and core 114 * 115 * @sps: sequence header information from user space 116 * @dec_params: decoder params from user space 117 * @h264_slice_params: decoder params used for hardware 118 * @trans_start: trans start dma address 119 * @trans_end: trans end dma address 120 * @nal_info: nal info of current picture 121 */ 122 struct vdec_h264_slice_share_info { 123 struct v4l2_ctrl_h264_sps sps; 124 struct v4l2_ctrl_h264_decode_params dec_params; 125 struct vdec_h264_slice_lat_dec_param h264_slice_params; 126 u64 trans_start; 127 u64 trans_end; 128 u16 nal_info; 129 }; 130 131 /** 132 * struct vdec_h264_slice_inst - h264 decoder instance 133 * 134 * @slice_dec_num: how many picture be decoded 135 * @ctx: point to mtk_vcodec_dec_ctx 136 * @pred_buf: HW working predication buffer 137 * @mv_buf: HW working motion vector buffer 138 * @vpu: VPU instance 139 * @vsi: vsi used for lat 140 * @vsi_core: vsi used for core 141 * 142 * @vsi_ctx: Local VSI data for this decoding context 143 * @h264_slice_param: the parameters that hardware use to decode 144 * 145 * @resolution_changed:resolution changed 146 * @realloc_mv_buf: reallocate mv buffer 147 * @cap_num_planes: number of capture queue plane 148 * 149 * @dpb: decoded picture buffer used to store reference 150 * buffer information 151 *@is_field_bitstream: is field bitstream 152 */ 153 struct vdec_h264_slice_inst { 154 unsigned int slice_dec_num; 155 struct mtk_vcodec_dec_ctx *ctx; 156 struct mtk_vcodec_mem pred_buf; 157 struct mtk_vcodec_mem mv_buf[H264_MAX_MV_NUM]; 158 struct vdec_vpu_inst vpu; 159 struct vdec_h264_slice_vsi *vsi; 160 struct vdec_h264_slice_vsi *vsi_core; 161 162 struct vdec_h264_slice_vsi vsi_ctx; 163 struct vdec_h264_slice_lat_dec_param h264_slice_param; 164 165 unsigned int resolution_changed; 166 unsigned int realloc_mv_buf; 167 unsigned int cap_num_planes; 168 169 struct v4l2_h264_dpb_entry dpb[16]; 170 bool is_field_bitstream; 171 }; 172 173 static int vdec_h264_slice_fill_decode_parameters(struct vdec_h264_slice_inst *inst, 174 struct vdec_h264_slice_share_info *share_info) 175 { 176 struct vdec_h264_slice_lat_dec_param *slice_param = &inst->vsi->h264_slice_params; 177 const struct v4l2_ctrl_h264_decode_params *dec_params; 178 const struct v4l2_ctrl_h264_scaling_matrix *src_matrix; 179 const struct v4l2_ctrl_h264_sps *sps; 180 const struct v4l2_ctrl_h264_pps *pps; 181 182 dec_params = 183 mtk_vdec_h264_get_ctrl_ptr(inst->ctx, V4L2_CID_STATELESS_H264_DECODE_PARAMS); 184 if (IS_ERR(dec_params)) 185 return PTR_ERR(dec_params); 186 187 src_matrix = 188 mtk_vdec_h264_get_ctrl_ptr(inst->ctx, V4L2_CID_STATELESS_H264_SCALING_MATRIX); 189 if (IS_ERR(src_matrix)) 190 return PTR_ERR(src_matrix); 191 192 sps = mtk_vdec_h264_get_ctrl_ptr(inst->ctx, V4L2_CID_STATELESS_H264_SPS); 193 if (IS_ERR(sps)) 194 return PTR_ERR(sps); 195 196 pps = mtk_vdec_h264_get_ctrl_ptr(inst->ctx, V4L2_CID_STATELESS_H264_PPS); 197 if (IS_ERR(pps)) 198 return PTR_ERR(pps); 199 200 if (dec_params->flags & V4L2_H264_DECODE_PARAM_FLAG_FIELD_PIC) { 201 mtk_vdec_err(inst->ctx, "No support for H.264 field decoding."); 202 inst->is_field_bitstream = true; 203 return -EINVAL; 204 } 205 206 mtk_vdec_h264_copy_sps_params(&slice_param->sps, sps); 207 mtk_vdec_h264_copy_pps_params(&slice_param->pps, pps); 208 mtk_vdec_h264_copy_scaling_matrix(&slice_param->scaling_matrix, src_matrix); 209 210 memcpy(&share_info->sps, sps, sizeof(*sps)); 211 memcpy(&share_info->dec_params, dec_params, sizeof(*dec_params)); 212 213 return 0; 214 } 215 216 static int get_vdec_sig_decode_parameters(struct vdec_h264_slice_inst *inst) 217 { 218 const struct v4l2_ctrl_h264_decode_params *dec_params; 219 const struct v4l2_ctrl_h264_sps *sps; 220 const struct v4l2_ctrl_h264_pps *pps; 221 const struct v4l2_ctrl_h264_scaling_matrix *scaling_matrix; 222 struct vdec_h264_slice_lat_dec_param *slice_param = &inst->h264_slice_param; 223 struct v4l2_h264_reflist_builder reflist_builder; 224 struct v4l2_h264_reference v4l2_p0_reflist[V4L2_H264_REF_LIST_LEN]; 225 struct v4l2_h264_reference v4l2_b0_reflist[V4L2_H264_REF_LIST_LEN]; 226 struct v4l2_h264_reference v4l2_b1_reflist[V4L2_H264_REF_LIST_LEN]; 227 u8 *p0_reflist = slice_param->decode_params.ref_pic_list_p0; 228 u8 *b0_reflist = slice_param->decode_params.ref_pic_list_b0; 229 u8 *b1_reflist = slice_param->decode_params.ref_pic_list_b1; 230 231 dec_params = 232 mtk_vdec_h264_get_ctrl_ptr(inst->ctx, V4L2_CID_STATELESS_H264_DECODE_PARAMS); 233 if (IS_ERR(dec_params)) 234 return PTR_ERR(dec_params); 235 236 sps = mtk_vdec_h264_get_ctrl_ptr(inst->ctx, V4L2_CID_STATELESS_H264_SPS); 237 if (IS_ERR(sps)) 238 return PTR_ERR(sps); 239 240 pps = mtk_vdec_h264_get_ctrl_ptr(inst->ctx, V4L2_CID_STATELESS_H264_PPS); 241 if (IS_ERR(pps)) 242 return PTR_ERR(pps); 243 244 scaling_matrix = 245 mtk_vdec_h264_get_ctrl_ptr(inst->ctx, V4L2_CID_STATELESS_H264_SCALING_MATRIX); 246 if (IS_ERR(scaling_matrix)) 247 return PTR_ERR(scaling_matrix); 248 249 mtk_vdec_h264_update_dpb(dec_params, inst->dpb); 250 251 mtk_vdec_h264_copy_sps_params(&slice_param->sps, sps); 252 mtk_vdec_h264_copy_pps_params(&slice_param->pps, pps); 253 mtk_vdec_h264_copy_scaling_matrix(&slice_param->scaling_matrix, scaling_matrix); 254 255 mtk_vdec_h264_copy_decode_params(&slice_param->decode_params, dec_params, inst->dpb); 256 mtk_vdec_h264_fill_dpb_info(inst->ctx, &slice_param->decode_params, 257 slice_param->h264_dpb_info); 258 259 /* Build the reference lists */ 260 v4l2_h264_init_reflist_builder(&reflist_builder, dec_params, sps, inst->dpb); 261 v4l2_h264_build_p_ref_list(&reflist_builder, v4l2_p0_reflist); 262 v4l2_h264_build_b_ref_lists(&reflist_builder, v4l2_b0_reflist, v4l2_b1_reflist); 263 264 /* Adapt the built lists to the firmware's expectations */ 265 mtk_vdec_h264_get_ref_list(p0_reflist, v4l2_p0_reflist, reflist_builder.num_valid); 266 mtk_vdec_h264_get_ref_list(b0_reflist, v4l2_b0_reflist, reflist_builder.num_valid); 267 mtk_vdec_h264_get_ref_list(b1_reflist, v4l2_b1_reflist, reflist_builder.num_valid); 268 269 memcpy(&inst->vsi_ctx.h264_slice_params, slice_param, 270 sizeof(inst->vsi_ctx.h264_slice_params)); 271 272 return 0; 273 } 274 275 static void vdec_h264_slice_fill_decode_reflist(struct vdec_h264_slice_inst *inst, 276 struct vdec_h264_slice_lat_dec_param *slice_param, 277 struct vdec_h264_slice_share_info *share_info) 278 { 279 struct v4l2_ctrl_h264_decode_params *dec_params = &share_info->dec_params; 280 struct v4l2_ctrl_h264_sps *sps = &share_info->sps; 281 struct v4l2_h264_reflist_builder reflist_builder; 282 struct v4l2_h264_reference v4l2_p0_reflist[V4L2_H264_REF_LIST_LEN]; 283 struct v4l2_h264_reference v4l2_b0_reflist[V4L2_H264_REF_LIST_LEN]; 284 struct v4l2_h264_reference v4l2_b1_reflist[V4L2_H264_REF_LIST_LEN]; 285 u8 *p0_reflist = slice_param->decode_params.ref_pic_list_p0; 286 u8 *b0_reflist = slice_param->decode_params.ref_pic_list_b0; 287 u8 *b1_reflist = slice_param->decode_params.ref_pic_list_b1; 288 289 mtk_vdec_h264_update_dpb(dec_params, inst->dpb); 290 291 mtk_vdec_h264_copy_decode_params(&slice_param->decode_params, dec_params, 292 inst->dpb); 293 mtk_vdec_h264_fill_dpb_info(inst->ctx, &slice_param->decode_params, 294 slice_param->h264_dpb_info); 295 296 mtk_v4l2_vdec_dbg(3, inst->ctx, "cur poc = %d\n", dec_params->bottom_field_order_cnt); 297 /* Build the reference lists */ 298 v4l2_h264_init_reflist_builder(&reflist_builder, dec_params, sps, 299 inst->dpb); 300 v4l2_h264_build_p_ref_list(&reflist_builder, v4l2_p0_reflist); 301 v4l2_h264_build_b_ref_lists(&reflist_builder, v4l2_b0_reflist, v4l2_b1_reflist); 302 303 /* Adapt the built lists to the firmware's expectations */ 304 mtk_vdec_h264_get_ref_list(p0_reflist, v4l2_p0_reflist, reflist_builder.num_valid); 305 mtk_vdec_h264_get_ref_list(b0_reflist, v4l2_b0_reflist, reflist_builder.num_valid); 306 mtk_vdec_h264_get_ref_list(b1_reflist, v4l2_b1_reflist, reflist_builder.num_valid); 307 } 308 309 static int vdec_h264_slice_alloc_mv_buf(struct vdec_h264_slice_inst *inst, 310 struct vdec_pic_info *pic) 311 { 312 unsigned int buf_sz = mtk_vdec_h264_get_mv_buf_size(pic->buf_w, pic->buf_h); 313 struct mtk_vcodec_mem *mem; 314 int i, err; 315 316 mtk_v4l2_vdec_dbg(3, inst->ctx, "size = 0x%x", buf_sz); 317 for (i = 0; i < H264_MAX_MV_NUM; i++) { 318 mem = &inst->mv_buf[i]; 319 if (mem->va) 320 mtk_vcodec_mem_free(inst->ctx, mem); 321 mem->size = buf_sz; 322 err = mtk_vcodec_mem_alloc(inst->ctx, mem); 323 if (err) { 324 mtk_vdec_err(inst->ctx, "failed to allocate mv buf"); 325 return err; 326 } 327 } 328 329 return 0; 330 } 331 332 static void vdec_h264_slice_free_mv_buf(struct vdec_h264_slice_inst *inst) 333 { 334 int i; 335 struct mtk_vcodec_mem *mem; 336 337 for (i = 0; i < H264_MAX_MV_NUM; i++) { 338 mem = &inst->mv_buf[i]; 339 if (mem->va) 340 mtk_vcodec_mem_free(inst->ctx, mem); 341 } 342 } 343 344 static void vdec_h264_slice_get_pic_info(struct vdec_h264_slice_inst *inst) 345 { 346 struct mtk_vcodec_dec_ctx *ctx = inst->ctx; 347 u32 data[3]; 348 349 data[0] = ctx->picinfo.pic_w; 350 data[1] = ctx->picinfo.pic_h; 351 data[2] = ctx->capture_fourcc; 352 vpu_dec_get_param(&inst->vpu, data, 3, GET_PARAM_PIC_INFO); 353 354 ctx->picinfo.buf_w = ALIGN(ctx->picinfo.pic_w, VCODEC_DEC_ALIGNED_64); 355 ctx->picinfo.buf_h = ALIGN(ctx->picinfo.pic_h, VCODEC_DEC_ALIGNED_64); 356 ctx->picinfo.fb_sz[0] = inst->vpu.fb_sz[0]; 357 ctx->picinfo.fb_sz[1] = inst->vpu.fb_sz[1]; 358 inst->cap_num_planes = 359 ctx->q_data[MTK_Q_DATA_DST].fmt->num_planes; 360 361 mtk_vdec_debug(ctx, "pic(%d, %d), buf(%d, %d)", 362 ctx->picinfo.pic_w, ctx->picinfo.pic_h, 363 ctx->picinfo.buf_w, ctx->picinfo.buf_h); 364 mtk_vdec_debug(ctx, "Y/C(%d, %d)", ctx->picinfo.fb_sz[0], 365 ctx->picinfo.fb_sz[1]); 366 367 if (ctx->last_decoded_picinfo.pic_w != ctx->picinfo.pic_w || 368 ctx->last_decoded_picinfo.pic_h != ctx->picinfo.pic_h) { 369 inst->resolution_changed = true; 370 if (ctx->last_decoded_picinfo.buf_w != ctx->picinfo.buf_w || 371 ctx->last_decoded_picinfo.buf_h != ctx->picinfo.buf_h) 372 inst->realloc_mv_buf = true; 373 374 mtk_v4l2_vdec_dbg(1, inst->ctx, "resChg: (%d %d) : old(%d, %d) -> new(%d, %d)", 375 inst->resolution_changed, 376 inst->realloc_mv_buf, 377 ctx->last_decoded_picinfo.pic_w, 378 ctx->last_decoded_picinfo.pic_h, 379 ctx->picinfo.pic_w, ctx->picinfo.pic_h); 380 } 381 } 382 383 static void vdec_h264_slice_get_crop_info(struct vdec_h264_slice_inst *inst, 384 struct v4l2_rect *cr) 385 { 386 cr->left = 0; 387 cr->top = 0; 388 cr->width = inst->ctx->picinfo.pic_w; 389 cr->height = inst->ctx->picinfo.pic_h; 390 391 mtk_vdec_debug(inst->ctx, "l=%d, t=%d, w=%d, h=%d", 392 cr->left, cr->top, cr->width, cr->height); 393 } 394 395 static int vdec_h264_slice_init(struct mtk_vcodec_dec_ctx *ctx) 396 { 397 struct vdec_h264_slice_inst *inst; 398 int err, vsi_size; 399 400 inst = kzalloc(sizeof(*inst), GFP_KERNEL); 401 if (!inst) 402 return -ENOMEM; 403 404 inst->ctx = ctx; 405 406 inst->vpu.id = SCP_IPI_VDEC_LAT; 407 inst->vpu.core_id = SCP_IPI_VDEC_CORE; 408 inst->vpu.ctx = ctx; 409 inst->vpu.codec_type = ctx->current_codec; 410 inst->vpu.capture_type = ctx->capture_fourcc; 411 412 err = vpu_dec_init(&inst->vpu); 413 if (err) { 414 mtk_vdec_err(ctx, "vdec_h264 init err=%d", err); 415 goto error_free_inst; 416 } 417 418 vsi_size = round_up(sizeof(struct vdec_h264_slice_vsi), VCODEC_DEC_ALIGNED_64); 419 inst->vsi = inst->vpu.vsi; 420 inst->vsi_core = 421 (struct vdec_h264_slice_vsi *)(((char *)inst->vpu.vsi) + vsi_size); 422 inst->resolution_changed = true; 423 inst->realloc_mv_buf = true; 424 425 mtk_vdec_debug(ctx, "lat struct size = %d,%d,%d,%d vsi: %d\n", 426 (int)sizeof(struct mtk_h264_sps_param), 427 (int)sizeof(struct mtk_h264_pps_param), 428 (int)sizeof(struct vdec_h264_slice_lat_dec_param), 429 (int)sizeof(struct mtk_h264_dpb_info), 430 vsi_size); 431 mtk_vdec_debug(ctx, "lat H264 instance >> %p, codec_type = 0x%x", 432 inst, inst->vpu.codec_type); 433 434 ctx->drv_handle = inst; 435 return 0; 436 437 error_free_inst: 438 kfree(inst); 439 return err; 440 } 441 442 static void vdec_h264_slice_deinit(void *h_vdec) 443 { 444 struct vdec_h264_slice_inst *inst = h_vdec; 445 446 vpu_dec_deinit(&inst->vpu); 447 vdec_h264_slice_free_mv_buf(inst); 448 vdec_msg_queue_deinit(&inst->ctx->msg_queue, inst->ctx); 449 450 kfree(inst); 451 } 452 453 static int vdec_h264_slice_core_decode(struct vdec_lat_buf *lat_buf) 454 { 455 struct vdec_fb *fb; 456 u64 vdec_fb_va; 457 u64 y_fb_dma, c_fb_dma; 458 int err, timeout, i; 459 struct mtk_vcodec_dec_ctx *ctx = lat_buf->ctx; 460 struct vdec_h264_slice_inst *inst = ctx->drv_handle; 461 struct vb2_v4l2_buffer *vb2_v4l2; 462 struct vdec_h264_slice_share_info *share_info = lat_buf->private_data; 463 struct mtk_vcodec_mem *mem; 464 struct vdec_vpu_inst *vpu = &inst->vpu; 465 466 mtk_vdec_debug(ctx, "[h264-core] vdec_h264 core decode"); 467 memcpy(&inst->vsi_core->h264_slice_params, &share_info->h264_slice_params, 468 sizeof(share_info->h264_slice_params)); 469 470 fb = ctx->dev->vdec_pdata->get_cap_buffer(ctx); 471 if (!fb) { 472 err = -EBUSY; 473 mtk_vdec_err(ctx, "fb buffer is NULL"); 474 goto vdec_dec_end; 475 } 476 477 vdec_fb_va = (unsigned long)fb; 478 y_fb_dma = (u64)fb->base_y.dma_addr; 479 if (ctx->q_data[MTK_Q_DATA_DST].fmt->num_planes == 1) 480 c_fb_dma = 481 y_fb_dma + inst->ctx->picinfo.buf_w * inst->ctx->picinfo.buf_h; 482 else 483 c_fb_dma = (u64)fb->base_c.dma_addr; 484 485 mtk_vdec_debug(ctx, "[h264-core] y/c addr = 0x%llx 0x%llx", y_fb_dma, c_fb_dma); 486 487 inst->vsi_core->dec.y_fb_dma = y_fb_dma; 488 inst->vsi_core->dec.c_fb_dma = c_fb_dma; 489 inst->vsi_core->dec.vdec_fb_va = vdec_fb_va; 490 inst->vsi_core->dec.nal_info = share_info->nal_info; 491 inst->vsi_core->wdma_start_addr = 492 lat_buf->ctx->msg_queue.wdma_addr.dma_addr; 493 inst->vsi_core->wdma_end_addr = 494 lat_buf->ctx->msg_queue.wdma_addr.dma_addr + 495 lat_buf->ctx->msg_queue.wdma_addr.size; 496 inst->vsi_core->wdma_err_addr = lat_buf->wdma_err_addr.dma_addr; 497 inst->vsi_core->slice_bc_start_addr = lat_buf->slice_bc_addr.dma_addr; 498 inst->vsi_core->slice_bc_end_addr = lat_buf->slice_bc_addr.dma_addr + 499 lat_buf->slice_bc_addr.size; 500 inst->vsi_core->trans_start = share_info->trans_start; 501 inst->vsi_core->trans_end = share_info->trans_end; 502 for (i = 0; i < H264_MAX_MV_NUM; i++) { 503 mem = &inst->mv_buf[i]; 504 inst->vsi_core->mv_buf_dma[i] = mem->dma_addr; 505 } 506 507 vb2_v4l2 = v4l2_m2m_next_dst_buf(ctx->m2m_ctx); 508 v4l2_m2m_buf_copy_metadata(&lat_buf->ts_info, vb2_v4l2, true); 509 510 vdec_h264_slice_fill_decode_reflist(inst, &inst->vsi_core->h264_slice_params, 511 share_info); 512 513 err = vpu_dec_core(vpu); 514 if (err) { 515 mtk_vdec_err(ctx, "core decode err=%d", err); 516 goto vdec_dec_end; 517 } 518 519 /* wait decoder done interrupt */ 520 timeout = mtk_vcodec_wait_for_done_ctx(inst->ctx, MTK_INST_IRQ_RECEIVED, 521 WAIT_INTR_TIMEOUT_MS, MTK_VDEC_CORE); 522 if (timeout) 523 mtk_vdec_err(ctx, "core decode timeout: pic_%d", ctx->decoded_frame_cnt); 524 inst->vsi_core->dec.timeout = !!timeout; 525 526 vpu_dec_core_end(vpu); 527 mtk_vdec_debug(ctx, "pic[%d] crc: 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x", 528 ctx->decoded_frame_cnt, 529 inst->vsi_core->dec.crc[0], inst->vsi_core->dec.crc[1], 530 inst->vsi_core->dec.crc[2], inst->vsi_core->dec.crc[3], 531 inst->vsi_core->dec.crc[4], inst->vsi_core->dec.crc[5], 532 inst->vsi_core->dec.crc[6], inst->vsi_core->dec.crc[7]); 533 534 vdec_dec_end: 535 vdec_msg_queue_update_ube_rptr(&lat_buf->ctx->msg_queue, share_info->trans_end); 536 ctx->dev->vdec_pdata->cap_to_disp(ctx, !!err, lat_buf->src_buf_req); 537 mtk_vdec_debug(ctx, "core decode done err=%d", err); 538 ctx->decoded_frame_cnt++; 539 return 0; 540 } 541 542 static void vdec_h264_insert_startcode(struct mtk_vcodec_dec_dev *vcodec_dev, unsigned char *buf, 543 size_t *bs_size, struct mtk_h264_pps_param *pps) 544 { 545 struct device *dev = &vcodec_dev->plat_dev->dev; 546 547 /* Need to add pending data at the end of bitstream when bs_sz is small than 548 * 20 bytes for cavlc bitstream, or lat will decode fail. This pending data is 549 * useful for mt8192 and mt8195 platform. 550 * 551 * cavlc bitstream when entropy_coding_mode_flag is false. 552 */ 553 if (pps->entropy_coding_mode_flag || *bs_size > 20 || 554 !(of_device_is_compatible(dev->of_node, "mediatek,mt8192-vcodec-dec") || 555 of_device_is_compatible(dev->of_node, "mediatek,mt8195-vcodec-dec"))) 556 return; 557 558 buf[*bs_size] = 0; 559 buf[*bs_size + 1] = 0; 560 buf[*bs_size + 2] = 1; 561 buf[*bs_size + 3] = 0xff; 562 (*bs_size) += 4; 563 } 564 565 static int vdec_h264_slice_lat_decode(void *h_vdec, struct mtk_vcodec_mem *bs, 566 struct vdec_fb *fb, bool *res_chg) 567 { 568 struct vdec_h264_slice_inst *inst = h_vdec; 569 struct vdec_vpu_inst *vpu = &inst->vpu; 570 struct mtk_video_dec_buf *src_buf_info; 571 int nal_start_idx, err, timeout = 0, i; 572 unsigned int data[2]; 573 struct vdec_lat_buf *lat_buf; 574 struct vdec_h264_slice_share_info *share_info; 575 unsigned char *buf; 576 struct mtk_vcodec_mem *mem; 577 578 if (vdec_msg_queue_init(&inst->ctx->msg_queue, inst->ctx, 579 vdec_h264_slice_core_decode, 580 sizeof(*share_info))) 581 return -ENOMEM; 582 583 /* bs NULL means flush decoder */ 584 if (!bs) { 585 vdec_msg_queue_wait_lat_buf_full(&inst->ctx->msg_queue); 586 return vpu_dec_reset(vpu); 587 } 588 589 if (inst->is_field_bitstream) 590 return -EINVAL; 591 592 lat_buf = vdec_msg_queue_dqbuf(&inst->ctx->msg_queue.lat_ctx); 593 if (!lat_buf) { 594 mtk_vdec_debug(inst->ctx, "failed to get lat buffer"); 595 return -EAGAIN; 596 } 597 share_info = lat_buf->private_data; 598 src_buf_info = container_of(bs, struct mtk_video_dec_buf, bs_buffer); 599 600 buf = (unsigned char *)bs->va; 601 nal_start_idx = mtk_vdec_h264_find_start_code(buf, bs->size); 602 if (nal_start_idx < 0) { 603 err = -EINVAL; 604 goto err_free_fb_out; 605 } 606 607 inst->vsi->dec.nal_info = buf[nal_start_idx]; 608 lat_buf->src_buf_req = src_buf_info->m2m_buf.vb.vb2_buf.req_obj.req; 609 v4l2_m2m_buf_copy_metadata(&src_buf_info->m2m_buf.vb, &lat_buf->ts_info, true); 610 611 err = vdec_h264_slice_fill_decode_parameters(inst, share_info); 612 if (err) 613 goto err_free_fb_out; 614 615 vdec_h264_insert_startcode(inst->ctx->dev, buf, &bs->size, 616 &share_info->h264_slice_params.pps); 617 618 inst->vsi->dec.bs_buf_addr = (uint64_t)bs->dma_addr; 619 inst->vsi->dec.bs_buf_size = bs->size; 620 621 *res_chg = inst->resolution_changed; 622 if (inst->resolution_changed) { 623 mtk_vdec_debug(inst->ctx, "- resolution changed -"); 624 if (inst->realloc_mv_buf) { 625 err = vdec_h264_slice_alloc_mv_buf(inst, &inst->ctx->picinfo); 626 inst->realloc_mv_buf = false; 627 if (err) 628 goto err_free_fb_out; 629 } 630 inst->resolution_changed = false; 631 } 632 for (i = 0; i < H264_MAX_MV_NUM; i++) { 633 mem = &inst->mv_buf[i]; 634 inst->vsi->mv_buf_dma[i] = mem->dma_addr; 635 } 636 inst->vsi->wdma_start_addr = lat_buf->ctx->msg_queue.wdma_addr.dma_addr; 637 inst->vsi->wdma_end_addr = lat_buf->ctx->msg_queue.wdma_addr.dma_addr + 638 lat_buf->ctx->msg_queue.wdma_addr.size; 639 inst->vsi->wdma_err_addr = lat_buf->wdma_err_addr.dma_addr; 640 inst->vsi->slice_bc_start_addr = lat_buf->slice_bc_addr.dma_addr; 641 inst->vsi->slice_bc_end_addr = lat_buf->slice_bc_addr.dma_addr + 642 lat_buf->slice_bc_addr.size; 643 644 inst->vsi->trans_end = inst->ctx->msg_queue.wdma_rptr_addr; 645 inst->vsi->trans_start = inst->ctx->msg_queue.wdma_wptr_addr; 646 mtk_vdec_debug(inst->ctx, "lat:trans(0x%llx 0x%llx) err:0x%llx", 647 inst->vsi->wdma_start_addr, 648 inst->vsi->wdma_end_addr, 649 inst->vsi->wdma_err_addr); 650 651 mtk_vdec_debug(inst->ctx, "slice(0x%llx 0x%llx) rprt((0x%llx 0x%llx))", 652 inst->vsi->slice_bc_start_addr, 653 inst->vsi->slice_bc_end_addr, 654 inst->vsi->trans_start, 655 inst->vsi->trans_end); 656 err = vpu_dec_start(vpu, data, 2); 657 if (err) { 658 mtk_vdec_debug(inst->ctx, "lat decode err: %d", err); 659 goto err_free_fb_out; 660 } 661 662 share_info->trans_end = inst->ctx->msg_queue.wdma_addr.dma_addr + 663 inst->vsi->wdma_end_addr_offset; 664 share_info->trans_start = inst->ctx->msg_queue.wdma_wptr_addr; 665 share_info->nal_info = inst->vsi->dec.nal_info; 666 667 if (IS_VDEC_INNER_RACING(inst->ctx->dev->dec_capability)) { 668 memcpy(&share_info->h264_slice_params, &inst->vsi->h264_slice_params, 669 sizeof(share_info->h264_slice_params)); 670 vdec_msg_queue_qbuf(&inst->ctx->msg_queue.core_ctx, lat_buf); 671 } 672 673 /* wait decoder done interrupt */ 674 timeout = mtk_vcodec_wait_for_done_ctx(inst->ctx, MTK_INST_IRQ_RECEIVED, 675 WAIT_INTR_TIMEOUT_MS, MTK_VDEC_LAT0); 676 if (timeout) 677 mtk_vdec_err(inst->ctx, "lat decode timeout: pic_%d", inst->slice_dec_num); 678 inst->vsi->dec.timeout = !!timeout; 679 680 err = vpu_dec_end(vpu); 681 if (err == SLICE_HEADER_FULL || err == TRANS_BUFFER_FULL) { 682 if (!IS_VDEC_INNER_RACING(inst->ctx->dev->dec_capability)) 683 vdec_msg_queue_qbuf(&inst->ctx->msg_queue.lat_ctx, lat_buf); 684 inst->slice_dec_num++; 685 mtk_vdec_err(inst->ctx, "lat dec fail: pic_%d err:%d", inst->slice_dec_num, err); 686 return -EINVAL; 687 } 688 689 share_info->trans_end = inst->ctx->msg_queue.wdma_addr.dma_addr + 690 inst->vsi->wdma_end_addr_offset; 691 vdec_msg_queue_update_ube_wptr(&lat_buf->ctx->msg_queue, share_info->trans_end); 692 693 if (!IS_VDEC_INNER_RACING(inst->ctx->dev->dec_capability)) { 694 memcpy(&share_info->h264_slice_params, &inst->vsi->h264_slice_params, 695 sizeof(share_info->h264_slice_params)); 696 vdec_msg_queue_qbuf(&inst->ctx->msg_queue.core_ctx, lat_buf); 697 } 698 mtk_vdec_debug(inst->ctx, "dec num: %d lat crc: 0x%x 0x%x 0x%x", inst->slice_dec_num, 699 inst->vsi->dec.crc[0], inst->vsi->dec.crc[1], inst->vsi->dec.crc[2]); 700 701 inst->slice_dec_num++; 702 return 0; 703 err_free_fb_out: 704 vdec_msg_queue_qbuf(&inst->ctx->msg_queue.lat_ctx, lat_buf); 705 mtk_vdec_err(inst->ctx, "slice dec number: %d err: %d", inst->slice_dec_num, err); 706 return err; 707 } 708 709 static int vdec_h264_slice_single_decode(void *h_vdec, struct mtk_vcodec_mem *bs, 710 struct vdec_fb *unused, bool *res_chg) 711 { 712 struct vdec_h264_slice_inst *inst = h_vdec; 713 struct vdec_vpu_inst *vpu = &inst->vpu; 714 struct mtk_video_dec_buf *src_buf_info, *dst_buf_info; 715 struct vdec_fb *fb; 716 unsigned char *buf; 717 unsigned int data[2], i; 718 u64 y_fb_dma, c_fb_dma; 719 struct mtk_vcodec_mem *mem; 720 int err, nal_start_idx; 721 722 /* bs NULL means flush decoder */ 723 if (!bs) 724 return vpu_dec_reset(vpu); 725 726 fb = inst->ctx->dev->vdec_pdata->get_cap_buffer(inst->ctx); 727 src_buf_info = container_of(bs, struct mtk_video_dec_buf, bs_buffer); 728 dst_buf_info = container_of(fb, struct mtk_video_dec_buf, frame_buffer); 729 730 y_fb_dma = fb ? (u64)fb->base_y.dma_addr : 0; 731 c_fb_dma = fb ? (u64)fb->base_c.dma_addr : 0; 732 mtk_vdec_debug(inst->ctx, "[h264-dec] [%d] y_dma=%llx c_dma=%llx", 733 inst->ctx->decoded_frame_cnt, y_fb_dma, c_fb_dma); 734 735 inst->vsi_ctx.dec.bs_buf_addr = (u64)bs->dma_addr; 736 inst->vsi_ctx.dec.bs_buf_size = bs->size; 737 inst->vsi_ctx.dec.y_fb_dma = y_fb_dma; 738 inst->vsi_ctx.dec.c_fb_dma = c_fb_dma; 739 inst->vsi_ctx.dec.vdec_fb_va = (u64)(uintptr_t)fb; 740 741 v4l2_m2m_buf_copy_metadata(&src_buf_info->m2m_buf.vb, 742 &dst_buf_info->m2m_buf.vb, true); 743 err = get_vdec_sig_decode_parameters(inst); 744 if (err) 745 goto err_free_fb_out; 746 747 buf = (unsigned char *)bs->va; 748 nal_start_idx = mtk_vdec_h264_find_start_code(buf, bs->size); 749 if (nal_start_idx < 0) { 750 err = -EINVAL; 751 goto err_free_fb_out; 752 } 753 inst->vsi_ctx.dec.nal_info = buf[nal_start_idx]; 754 755 *res_chg = inst->resolution_changed; 756 if (inst->resolution_changed) { 757 mtk_vdec_debug(inst->ctx, "- resolution changed -"); 758 if (inst->realloc_mv_buf) { 759 err = vdec_h264_slice_alloc_mv_buf(inst, &inst->ctx->picinfo); 760 inst->realloc_mv_buf = false; 761 if (err) 762 goto err_free_fb_out; 763 } 764 inst->resolution_changed = false; 765 766 for (i = 0; i < H264_MAX_MV_NUM; i++) { 767 mem = &inst->mv_buf[i]; 768 inst->vsi_ctx.mv_buf_dma[i] = mem->dma_addr; 769 } 770 } 771 772 memcpy(inst->vpu.vsi, &inst->vsi_ctx, sizeof(inst->vsi_ctx)); 773 err = vpu_dec_start(vpu, data, 2); 774 if (err) 775 goto err_free_fb_out; 776 777 /* wait decoder done interrupt */ 778 err = mtk_vcodec_wait_for_done_ctx(inst->ctx, MTK_INST_IRQ_RECEIVED, 779 WAIT_INTR_TIMEOUT_MS, MTK_VDEC_CORE); 780 if (err) 781 mtk_vdec_err(inst->ctx, "decode timeout: pic_%d", inst->ctx->decoded_frame_cnt); 782 783 inst->vsi->dec.timeout = !!err; 784 err = vpu_dec_end(vpu); 785 if (err) 786 goto err_free_fb_out; 787 788 memcpy(&inst->vsi_ctx, inst->vpu.vsi, sizeof(inst->vsi_ctx)); 789 mtk_vdec_debug(inst->ctx, "pic[%d] crc: 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x", 790 inst->ctx->decoded_frame_cnt, 791 inst->vsi_ctx.dec.crc[0], inst->vsi_ctx.dec.crc[1], 792 inst->vsi_ctx.dec.crc[2], inst->vsi_ctx.dec.crc[3], 793 inst->vsi_ctx.dec.crc[4], inst->vsi_ctx.dec.crc[5], 794 inst->vsi_ctx.dec.crc[6], inst->vsi_ctx.dec.crc[7]); 795 796 inst->ctx->decoded_frame_cnt++; 797 return 0; 798 799 err_free_fb_out: 800 mtk_vdec_err(inst->ctx, "dec frame number: %d err: %d", inst->ctx->decoded_frame_cnt, err); 801 return err; 802 } 803 804 static int vdec_h264_slice_decode(void *h_vdec, struct mtk_vcodec_mem *bs, 805 struct vdec_fb *unused, bool *res_chg) 806 { 807 struct vdec_h264_slice_inst *inst = h_vdec; 808 int ret; 809 810 if (!h_vdec) 811 return -EINVAL; 812 813 if (inst->ctx->dev->vdec_pdata->hw_arch == MTK_VDEC_PURE_SINGLE_CORE) 814 ret = vdec_h264_slice_single_decode(h_vdec, bs, unused, res_chg); 815 else 816 ret = vdec_h264_slice_lat_decode(h_vdec, bs, unused, res_chg); 817 818 return ret; 819 } 820 821 static int vdec_h264_slice_get_param(void *h_vdec, enum vdec_get_param_type type, 822 void *out) 823 { 824 struct vdec_h264_slice_inst *inst = h_vdec; 825 826 switch (type) { 827 case GET_PARAM_PIC_INFO: 828 vdec_h264_slice_get_pic_info(inst); 829 break; 830 case GET_PARAM_DPB_SIZE: 831 *(unsigned int *)out = 6; 832 break; 833 case GET_PARAM_CROP_INFO: 834 vdec_h264_slice_get_crop_info(inst, out); 835 break; 836 default: 837 mtk_vdec_err(inst->ctx, "invalid get parameter type=%d", type); 838 return -EINVAL; 839 } 840 return 0; 841 } 842 843 const struct vdec_common_if vdec_h264_slice_multi_if = { 844 .init = vdec_h264_slice_init, 845 .decode = vdec_h264_slice_decode, 846 .get_param = vdec_h264_slice_get_param, 847 .deinit = vdec_h264_slice_deinit, 848 }; 849