1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2011 Atmel Corporation 4 * Josh Wu, <josh.wu@atmel.com> 5 * 6 * Based on previous work by Lars Haring, <lars.haring@atmel.com> 7 * and Sedji Gaouaou 8 * Based on the bttv driver for Bt848 with respective copyright holders 9 */ 10 11 #include <linux/clk.h> 12 #include <linux/completion.h> 13 #include <linux/delay.h> 14 #include <linux/fs.h> 15 #include <linux/init.h> 16 #include <linux/interrupt.h> 17 #include <linux/kernel.h> 18 #include <linux/module.h> 19 #include <linux/of_graph.h> 20 #include <linux/platform_device.h> 21 #include <linux/pm_runtime.h> 22 #include <linux/slab.h> 23 #include <linux/of.h> 24 25 #include <linux/videodev2.h> 26 #include <media/v4l2-ctrls.h> 27 #include <media/v4l2-device.h> 28 #include <media/v4l2-dev.h> 29 #include <media/v4l2-ioctl.h> 30 #include <media/v4l2-event.h> 31 #include <media/v4l2-fwnode.h> 32 #include <media/videobuf2-dma-contig.h> 33 #include <media/v4l2-image-sizes.h> 34 35 #include "atmel-isi.h" 36 37 #define MAX_SUPPORT_WIDTH 2048U 38 #define MAX_SUPPORT_HEIGHT 2048U 39 #define MIN_FRAME_RATE 15 40 #define FRAME_INTERVAL_MILLI_SEC (1000 / MIN_FRAME_RATE) 41 42 /* Frame buffer descriptor */ 43 struct fbd { 44 /* Physical address of the frame buffer */ 45 u32 fb_address; 46 /* DMA Control Register(only in HISI2) */ 47 u32 dma_ctrl; 48 /* Physical address of the next fbd */ 49 u32 next_fbd_address; 50 }; 51 52 static void set_dma_ctrl(struct fbd *fb_desc, u32 ctrl) 53 { 54 fb_desc->dma_ctrl = ctrl; 55 } 56 57 struct isi_dma_desc { 58 struct list_head list; 59 struct fbd *p_fbd; 60 dma_addr_t fbd_phys; 61 }; 62 63 /* Frame buffer data */ 64 struct frame_buffer { 65 struct vb2_v4l2_buffer vb; 66 struct isi_dma_desc *p_dma_desc; 67 struct list_head list; 68 }; 69 70 struct isi_graph_entity { 71 struct device_node *node; 72 73 struct v4l2_subdev *subdev; 74 }; 75 76 /* 77 * struct isi_format - ISI media bus format information 78 * @fourcc: Fourcc code for this format 79 * @mbus_code: V4L2 media bus format code. 80 * @bpp: Bytes per pixel (when stored in memory) 81 * @swap: Byte swap configuration value 82 * @support: Indicates format supported by subdev 83 * @skip: Skip duplicate format supported by subdev 84 */ 85 struct isi_format { 86 u32 fourcc; 87 u32 mbus_code; 88 u8 bpp; 89 u32 swap; 90 }; 91 92 93 struct atmel_isi { 94 /* Protects the access of variables shared with the ISR */ 95 spinlock_t irqlock; 96 struct device *dev; 97 void __iomem *regs; 98 99 int sequence; 100 101 /* Allocate descriptors for dma buffer use */ 102 struct fbd *p_fb_descriptors; 103 dma_addr_t fb_descriptors_phys; 104 struct list_head dma_desc_head; 105 struct isi_dma_desc dma_desc[VIDEO_MAX_FRAME]; 106 bool enable_preview_path; 107 108 struct completion complete; 109 /* ISI peripheral clock */ 110 struct clk *pclk; 111 unsigned int irq; 112 113 struct isi_platform_data pdata; 114 u16 width_flags; /* max 12 bits */ 115 116 struct list_head video_buffer_list; 117 struct frame_buffer *active; 118 119 struct v4l2_device v4l2_dev; 120 struct video_device *vdev; 121 struct v4l2_async_notifier notifier; 122 struct isi_graph_entity entity; 123 struct v4l2_format fmt; 124 125 const struct isi_format **user_formats; 126 unsigned int num_user_formats; 127 const struct isi_format *current_fmt; 128 129 struct mutex lock; 130 struct vb2_queue queue; 131 }; 132 133 #define notifier_to_isi(n) container_of(n, struct atmel_isi, notifier) 134 135 static void isi_writel(struct atmel_isi *isi, u32 reg, u32 val) 136 { 137 writel(val, isi->regs + reg); 138 } 139 static u32 isi_readl(struct atmel_isi *isi, u32 reg) 140 { 141 return readl(isi->regs + reg); 142 } 143 144 static void configure_geometry(struct atmel_isi *isi) 145 { 146 u32 cfg2, psize; 147 u32 fourcc = isi->current_fmt->fourcc; 148 149 isi->enable_preview_path = fourcc == V4L2_PIX_FMT_RGB565 || 150 fourcc == V4L2_PIX_FMT_RGB32 || 151 fourcc == V4L2_PIX_FMT_Y16; 152 153 /* According to sensor's output format to set cfg2 */ 154 cfg2 = isi->current_fmt->swap; 155 156 isi_writel(isi, ISI_CTRL, ISI_CTRL_DIS); 157 /* Set width */ 158 cfg2 |= ((isi->fmt.fmt.pix.width - 1) << ISI_CFG2_IM_HSIZE_OFFSET) & 159 ISI_CFG2_IM_HSIZE_MASK; 160 /* Set height */ 161 cfg2 |= ((isi->fmt.fmt.pix.height - 1) << ISI_CFG2_IM_VSIZE_OFFSET) 162 & ISI_CFG2_IM_VSIZE_MASK; 163 isi_writel(isi, ISI_CFG2, cfg2); 164 165 /* No down sampling, preview size equal to sensor output size */ 166 psize = ((isi->fmt.fmt.pix.width - 1) << ISI_PSIZE_PREV_HSIZE_OFFSET) & 167 ISI_PSIZE_PREV_HSIZE_MASK; 168 psize |= ((isi->fmt.fmt.pix.height - 1) << ISI_PSIZE_PREV_VSIZE_OFFSET) & 169 ISI_PSIZE_PREV_VSIZE_MASK; 170 isi_writel(isi, ISI_PSIZE, psize); 171 isi_writel(isi, ISI_PDECF, ISI_PDECF_NO_SAMPLING); 172 } 173 174 static irqreturn_t atmel_isi_handle_streaming(struct atmel_isi *isi) 175 { 176 if (isi->active) { 177 struct vb2_v4l2_buffer *vbuf = &isi->active->vb; 178 struct frame_buffer *buf = isi->active; 179 180 list_del_init(&buf->list); 181 vbuf->vb2_buf.timestamp = ktime_get_ns(); 182 vbuf->sequence = isi->sequence++; 183 vbuf->field = V4L2_FIELD_NONE; 184 vb2_buffer_done(&vbuf->vb2_buf, VB2_BUF_STATE_DONE); 185 } 186 187 if (list_empty(&isi->video_buffer_list)) { 188 isi->active = NULL; 189 } else { 190 /* start next dma frame. */ 191 isi->active = list_entry(isi->video_buffer_list.next, 192 struct frame_buffer, list); 193 if (!isi->enable_preview_path) { 194 isi_writel(isi, ISI_DMA_C_DSCR, 195 (u32)isi->active->p_dma_desc->fbd_phys); 196 isi_writel(isi, ISI_DMA_C_CTRL, 197 ISI_DMA_CTRL_FETCH | ISI_DMA_CTRL_DONE); 198 isi_writel(isi, ISI_DMA_CHER, ISI_DMA_CHSR_C_CH); 199 } else { 200 isi_writel(isi, ISI_DMA_P_DSCR, 201 (u32)isi->active->p_dma_desc->fbd_phys); 202 isi_writel(isi, ISI_DMA_P_CTRL, 203 ISI_DMA_CTRL_FETCH | ISI_DMA_CTRL_DONE); 204 isi_writel(isi, ISI_DMA_CHER, ISI_DMA_CHSR_P_CH); 205 } 206 } 207 return IRQ_HANDLED; 208 } 209 210 /* ISI interrupt service routine */ 211 static irqreturn_t isi_interrupt(int irq, void *dev_id) 212 { 213 struct atmel_isi *isi = dev_id; 214 u32 status, mask, pending; 215 irqreturn_t ret = IRQ_NONE; 216 217 spin_lock(&isi->irqlock); 218 219 status = isi_readl(isi, ISI_STATUS); 220 mask = isi_readl(isi, ISI_INTMASK); 221 pending = status & mask; 222 223 if (pending & ISI_CTRL_SRST) { 224 complete(&isi->complete); 225 isi_writel(isi, ISI_INTDIS, ISI_CTRL_SRST); 226 ret = IRQ_HANDLED; 227 } else if (pending & ISI_CTRL_DIS) { 228 complete(&isi->complete); 229 isi_writel(isi, ISI_INTDIS, ISI_CTRL_DIS); 230 ret = IRQ_HANDLED; 231 } else { 232 if (likely(pending & ISI_SR_CXFR_DONE) || 233 likely(pending & ISI_SR_PXFR_DONE)) 234 ret = atmel_isi_handle_streaming(isi); 235 } 236 237 spin_unlock(&isi->irqlock); 238 return ret; 239 } 240 241 #define WAIT_ISI_RESET 1 242 #define WAIT_ISI_DISABLE 0 243 static int atmel_isi_wait_status(struct atmel_isi *isi, int wait_reset) 244 { 245 unsigned long timeout; 246 /* 247 * The reset or disable will only succeed if we have a 248 * pixel clock from the camera. 249 */ 250 init_completion(&isi->complete); 251 252 if (wait_reset) { 253 isi_writel(isi, ISI_INTEN, ISI_CTRL_SRST); 254 isi_writel(isi, ISI_CTRL, ISI_CTRL_SRST); 255 } else { 256 isi_writel(isi, ISI_INTEN, ISI_CTRL_DIS); 257 isi_writel(isi, ISI_CTRL, ISI_CTRL_DIS); 258 } 259 260 timeout = wait_for_completion_timeout(&isi->complete, 261 msecs_to_jiffies(500)); 262 if (timeout == 0) 263 return -ETIMEDOUT; 264 265 return 0; 266 } 267 268 /* ------------------------------------------------------------------ 269 Videobuf operations 270 ------------------------------------------------------------------*/ 271 static int queue_setup(struct vb2_queue *vq, 272 unsigned int *nbuffers, unsigned int *nplanes, 273 unsigned int sizes[], struct device *alloc_devs[]) 274 { 275 struct atmel_isi *isi = vb2_get_drv_priv(vq); 276 unsigned long size; 277 278 size = isi->fmt.fmt.pix.sizeimage; 279 280 /* Make sure the image size is large enough. */ 281 if (*nplanes) 282 return sizes[0] < size ? -EINVAL : 0; 283 284 *nplanes = 1; 285 sizes[0] = size; 286 287 isi->active = NULL; 288 289 dev_dbg(isi->dev, "%s, count=%d, size=%ld\n", __func__, 290 *nbuffers, size); 291 292 return 0; 293 } 294 295 static int buffer_init(struct vb2_buffer *vb) 296 { 297 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); 298 struct frame_buffer *buf = container_of(vbuf, struct frame_buffer, vb); 299 300 buf->p_dma_desc = NULL; 301 INIT_LIST_HEAD(&buf->list); 302 303 return 0; 304 } 305 306 static int buffer_prepare(struct vb2_buffer *vb) 307 { 308 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); 309 struct frame_buffer *buf = container_of(vbuf, struct frame_buffer, vb); 310 struct atmel_isi *isi = vb2_get_drv_priv(vb->vb2_queue); 311 unsigned long size; 312 struct isi_dma_desc *desc; 313 314 size = isi->fmt.fmt.pix.sizeimage; 315 316 if (vb2_plane_size(vb, 0) < size) { 317 dev_err(isi->dev, "%s data will not fit into plane (%lu < %lu)\n", 318 __func__, vb2_plane_size(vb, 0), size); 319 return -EINVAL; 320 } 321 322 vb2_set_plane_payload(vb, 0, size); 323 324 if (!buf->p_dma_desc) { 325 if (list_empty(&isi->dma_desc_head)) { 326 dev_err(isi->dev, "Not enough dma descriptors.\n"); 327 return -EINVAL; 328 } else { 329 /* Get an available descriptor */ 330 desc = list_entry(isi->dma_desc_head.next, 331 struct isi_dma_desc, list); 332 /* Delete the descriptor since now it is used */ 333 list_del_init(&desc->list); 334 335 /* Initialize the dma descriptor */ 336 desc->p_fbd->fb_address = 337 vb2_dma_contig_plane_dma_addr(vb, 0); 338 desc->p_fbd->next_fbd_address = 0; 339 set_dma_ctrl(desc->p_fbd, ISI_DMA_CTRL_WB); 340 341 buf->p_dma_desc = desc; 342 } 343 } 344 return 0; 345 } 346 347 static void buffer_cleanup(struct vb2_buffer *vb) 348 { 349 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); 350 struct atmel_isi *isi = vb2_get_drv_priv(vb->vb2_queue); 351 struct frame_buffer *buf = container_of(vbuf, struct frame_buffer, vb); 352 353 /* This descriptor is available now and we add to head list */ 354 if (buf->p_dma_desc) 355 list_add(&buf->p_dma_desc->list, &isi->dma_desc_head); 356 } 357 358 static void start_dma(struct atmel_isi *isi, struct frame_buffer *buffer) 359 { 360 u32 ctrl, cfg1; 361 362 cfg1 = isi_readl(isi, ISI_CFG1); 363 /* Enable irq: cxfr for the codec path, pxfr for the preview path */ 364 isi_writel(isi, ISI_INTEN, 365 ISI_SR_CXFR_DONE | ISI_SR_PXFR_DONE); 366 367 /* Check if already in a frame */ 368 if (!isi->enable_preview_path) { 369 if (isi_readl(isi, ISI_STATUS) & ISI_CTRL_CDC) { 370 dev_err(isi->dev, "Already in frame handling.\n"); 371 return; 372 } 373 374 isi_writel(isi, ISI_DMA_C_DSCR, 375 (u32)buffer->p_dma_desc->fbd_phys); 376 isi_writel(isi, ISI_DMA_C_CTRL, 377 ISI_DMA_CTRL_FETCH | ISI_DMA_CTRL_DONE); 378 isi_writel(isi, ISI_DMA_CHER, ISI_DMA_CHSR_C_CH); 379 } else { 380 isi_writel(isi, ISI_DMA_P_DSCR, 381 (u32)buffer->p_dma_desc->fbd_phys); 382 isi_writel(isi, ISI_DMA_P_CTRL, 383 ISI_DMA_CTRL_FETCH | ISI_DMA_CTRL_DONE); 384 isi_writel(isi, ISI_DMA_CHER, ISI_DMA_CHSR_P_CH); 385 } 386 387 cfg1 &= ~ISI_CFG1_FRATE_DIV_MASK; 388 /* Enable linked list */ 389 cfg1 |= isi->pdata.frate | ISI_CFG1_DISCR; 390 391 /* Enable ISI */ 392 ctrl = ISI_CTRL_EN; 393 394 if (!isi->enable_preview_path) 395 ctrl |= ISI_CTRL_CDC; 396 397 isi_writel(isi, ISI_CTRL, ctrl); 398 isi_writel(isi, ISI_CFG1, cfg1); 399 } 400 401 static void buffer_queue(struct vb2_buffer *vb) 402 { 403 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); 404 struct atmel_isi *isi = vb2_get_drv_priv(vb->vb2_queue); 405 struct frame_buffer *buf = container_of(vbuf, struct frame_buffer, vb); 406 unsigned long flags = 0; 407 408 spin_lock_irqsave(&isi->irqlock, flags); 409 list_add_tail(&buf->list, &isi->video_buffer_list); 410 411 if (!isi->active) { 412 isi->active = buf; 413 if (vb2_is_streaming(vb->vb2_queue)) 414 start_dma(isi, buf); 415 } 416 spin_unlock_irqrestore(&isi->irqlock, flags); 417 } 418 419 static int start_streaming(struct vb2_queue *vq, unsigned int count) 420 { 421 struct atmel_isi *isi = vb2_get_drv_priv(vq); 422 struct frame_buffer *buf, *node; 423 int ret; 424 425 pm_runtime_get_sync(isi->dev); 426 427 /* Enable stream on the sub device */ 428 ret = v4l2_subdev_call(isi->entity.subdev, video, s_stream, 1); 429 if (ret && ret != -ENOIOCTLCMD) { 430 dev_err(isi->dev, "stream on failed in subdev\n"); 431 goto err_start_stream; 432 } 433 434 /* Reset ISI */ 435 ret = atmel_isi_wait_status(isi, WAIT_ISI_RESET); 436 if (ret < 0) { 437 dev_err(isi->dev, "Reset ISI timed out\n"); 438 goto err_reset; 439 } 440 /* Disable all interrupts */ 441 isi_writel(isi, ISI_INTDIS, (u32)~0UL); 442 443 isi->sequence = 0; 444 configure_geometry(isi); 445 446 spin_lock_irq(&isi->irqlock); 447 /* Clear any pending interrupt */ 448 isi_readl(isi, ISI_STATUS); 449 450 start_dma(isi, isi->active); 451 spin_unlock_irq(&isi->irqlock); 452 453 return 0; 454 455 err_reset: 456 v4l2_subdev_call(isi->entity.subdev, video, s_stream, 0); 457 458 err_start_stream: 459 pm_runtime_put(isi->dev); 460 461 spin_lock_irq(&isi->irqlock); 462 isi->active = NULL; 463 /* Release all active buffers */ 464 list_for_each_entry_safe(buf, node, &isi->video_buffer_list, list) { 465 list_del_init(&buf->list); 466 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_QUEUED); 467 } 468 spin_unlock_irq(&isi->irqlock); 469 470 return ret; 471 } 472 473 /* abort streaming and wait for last buffer */ 474 static void stop_streaming(struct vb2_queue *vq) 475 { 476 struct atmel_isi *isi = vb2_get_drv_priv(vq); 477 struct frame_buffer *buf, *node; 478 int ret = 0; 479 unsigned long timeout; 480 481 /* Disable stream on the sub device */ 482 ret = v4l2_subdev_call(isi->entity.subdev, video, s_stream, 0); 483 if (ret && ret != -ENOIOCTLCMD) 484 dev_err(isi->dev, "stream off failed in subdev\n"); 485 486 spin_lock_irq(&isi->irqlock); 487 isi->active = NULL; 488 /* Release all active buffers */ 489 list_for_each_entry_safe(buf, node, &isi->video_buffer_list, list) { 490 list_del_init(&buf->list); 491 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR); 492 } 493 spin_unlock_irq(&isi->irqlock); 494 495 if (!isi->enable_preview_path) { 496 timeout = jiffies + (FRAME_INTERVAL_MILLI_SEC * HZ) / 1000; 497 /* Wait until the end of the current frame. */ 498 while ((isi_readl(isi, ISI_STATUS) & ISI_CTRL_CDC) && 499 time_before(jiffies, timeout)) 500 msleep(1); 501 502 if (time_after(jiffies, timeout)) 503 dev_err(isi->dev, 504 "Timeout waiting for finishing codec request\n"); 505 } 506 507 /* Disable interrupts */ 508 isi_writel(isi, ISI_INTDIS, 509 ISI_SR_CXFR_DONE | ISI_SR_PXFR_DONE); 510 511 /* Disable ISI and wait for it is done */ 512 ret = atmel_isi_wait_status(isi, WAIT_ISI_DISABLE); 513 if (ret < 0) 514 dev_err(isi->dev, "Disable ISI timed out\n"); 515 516 pm_runtime_put(isi->dev); 517 } 518 519 static const struct vb2_ops isi_video_qops = { 520 .queue_setup = queue_setup, 521 .buf_init = buffer_init, 522 .buf_prepare = buffer_prepare, 523 .buf_cleanup = buffer_cleanup, 524 .buf_queue = buffer_queue, 525 .start_streaming = start_streaming, 526 .stop_streaming = stop_streaming, 527 .wait_prepare = vb2_ops_wait_prepare, 528 .wait_finish = vb2_ops_wait_finish, 529 }; 530 531 static int isi_g_fmt_vid_cap(struct file *file, void *priv, 532 struct v4l2_format *fmt) 533 { 534 struct atmel_isi *isi = video_drvdata(file); 535 536 *fmt = isi->fmt; 537 538 return 0; 539 } 540 541 static const struct isi_format *find_format_by_fourcc(struct atmel_isi *isi, 542 unsigned int fourcc) 543 { 544 unsigned int num_formats = isi->num_user_formats; 545 const struct isi_format *fmt; 546 unsigned int i; 547 548 for (i = 0; i < num_formats; i++) { 549 fmt = isi->user_formats[i]; 550 if (fmt->fourcc == fourcc) 551 return fmt; 552 } 553 554 return NULL; 555 } 556 557 static void isi_try_fse(struct atmel_isi *isi, const struct isi_format *isi_fmt, 558 struct v4l2_subdev_pad_config *pad_cfg) 559 { 560 int ret; 561 struct v4l2_subdev_frame_size_enum fse = { 562 .code = isi_fmt->mbus_code, 563 .which = V4L2_SUBDEV_FORMAT_TRY, 564 }; 565 566 ret = v4l2_subdev_call(isi->entity.subdev, pad, enum_frame_size, 567 pad_cfg, &fse); 568 /* 569 * Attempt to obtain format size from subdev. If not available, 570 * just use the maximum ISI can receive. 571 */ 572 if (ret) { 573 pad_cfg->try_crop.width = MAX_SUPPORT_WIDTH; 574 pad_cfg->try_crop.height = MAX_SUPPORT_HEIGHT; 575 } else { 576 pad_cfg->try_crop.width = fse.max_width; 577 pad_cfg->try_crop.height = fse.max_height; 578 } 579 } 580 581 static int isi_try_fmt(struct atmel_isi *isi, struct v4l2_format *f, 582 const struct isi_format **current_fmt) 583 { 584 const struct isi_format *isi_fmt; 585 struct v4l2_pix_format *pixfmt = &f->fmt.pix; 586 struct v4l2_subdev_pad_config pad_cfg = {}; 587 struct v4l2_subdev_format format = { 588 .which = V4L2_SUBDEV_FORMAT_TRY, 589 }; 590 int ret; 591 592 isi_fmt = find_format_by_fourcc(isi, pixfmt->pixelformat); 593 if (!isi_fmt) { 594 isi_fmt = isi->user_formats[isi->num_user_formats - 1]; 595 pixfmt->pixelformat = isi_fmt->fourcc; 596 } 597 598 /* Limit to Atmel ISI hardware capabilities */ 599 pixfmt->width = clamp(pixfmt->width, 0U, MAX_SUPPORT_WIDTH); 600 pixfmt->height = clamp(pixfmt->height, 0U, MAX_SUPPORT_HEIGHT); 601 602 v4l2_fill_mbus_format(&format.format, pixfmt, isi_fmt->mbus_code); 603 604 isi_try_fse(isi, isi_fmt, &pad_cfg); 605 606 ret = v4l2_subdev_call(isi->entity.subdev, pad, set_fmt, 607 &pad_cfg, &format); 608 if (ret < 0) 609 return ret; 610 611 v4l2_fill_pix_format(pixfmt, &format.format); 612 613 pixfmt->field = V4L2_FIELD_NONE; 614 pixfmt->bytesperline = pixfmt->width * isi_fmt->bpp; 615 pixfmt->sizeimage = pixfmt->bytesperline * pixfmt->height; 616 617 if (current_fmt) 618 *current_fmt = isi_fmt; 619 620 return 0; 621 } 622 623 static int isi_set_fmt(struct atmel_isi *isi, struct v4l2_format *f) 624 { 625 struct v4l2_subdev_format format = { 626 .which = V4L2_SUBDEV_FORMAT_ACTIVE, 627 }; 628 const struct isi_format *current_fmt; 629 int ret; 630 631 ret = isi_try_fmt(isi, f, ¤t_fmt); 632 if (ret) 633 return ret; 634 635 v4l2_fill_mbus_format(&format.format, &f->fmt.pix, 636 current_fmt->mbus_code); 637 ret = v4l2_subdev_call(isi->entity.subdev, pad, 638 set_fmt, NULL, &format); 639 if (ret < 0) 640 return ret; 641 642 isi->fmt = *f; 643 isi->current_fmt = current_fmt; 644 645 return 0; 646 } 647 648 static int isi_s_fmt_vid_cap(struct file *file, void *priv, 649 struct v4l2_format *f) 650 { 651 struct atmel_isi *isi = video_drvdata(file); 652 653 if (vb2_is_streaming(&isi->queue)) 654 return -EBUSY; 655 656 return isi_set_fmt(isi, f); 657 } 658 659 static int isi_try_fmt_vid_cap(struct file *file, void *priv, 660 struct v4l2_format *f) 661 { 662 struct atmel_isi *isi = video_drvdata(file); 663 664 return isi_try_fmt(isi, f, NULL); 665 } 666 667 static int isi_enum_fmt_vid_cap(struct file *file, void *priv, 668 struct v4l2_fmtdesc *f) 669 { 670 struct atmel_isi *isi = video_drvdata(file); 671 672 if (f->index >= isi->num_user_formats) 673 return -EINVAL; 674 675 f->pixelformat = isi->user_formats[f->index]->fourcc; 676 return 0; 677 } 678 679 static int isi_querycap(struct file *file, void *priv, 680 struct v4l2_capability *cap) 681 { 682 strscpy(cap->driver, "atmel-isi", sizeof(cap->driver)); 683 strscpy(cap->card, "Atmel Image Sensor Interface", sizeof(cap->card)); 684 strscpy(cap->bus_info, "platform:isi", sizeof(cap->bus_info)); 685 return 0; 686 } 687 688 static int isi_enum_input(struct file *file, void *priv, 689 struct v4l2_input *i) 690 { 691 if (i->index != 0) 692 return -EINVAL; 693 694 i->type = V4L2_INPUT_TYPE_CAMERA; 695 strscpy(i->name, "Camera", sizeof(i->name)); 696 return 0; 697 } 698 699 static int isi_g_input(struct file *file, void *priv, unsigned int *i) 700 { 701 *i = 0; 702 return 0; 703 } 704 705 static int isi_s_input(struct file *file, void *priv, unsigned int i) 706 { 707 if (i > 0) 708 return -EINVAL; 709 return 0; 710 } 711 712 static int isi_g_parm(struct file *file, void *fh, struct v4l2_streamparm *a) 713 { 714 struct atmel_isi *isi = video_drvdata(file); 715 716 return v4l2_g_parm_cap(video_devdata(file), isi->entity.subdev, a); 717 } 718 719 static int isi_s_parm(struct file *file, void *fh, struct v4l2_streamparm *a) 720 { 721 struct atmel_isi *isi = video_drvdata(file); 722 723 return v4l2_s_parm_cap(video_devdata(file), isi->entity.subdev, a); 724 } 725 726 static int isi_enum_framesizes(struct file *file, void *fh, 727 struct v4l2_frmsizeenum *fsize) 728 { 729 struct atmel_isi *isi = video_drvdata(file); 730 const struct isi_format *isi_fmt; 731 struct v4l2_subdev_frame_size_enum fse = { 732 .index = fsize->index, 733 .which = V4L2_SUBDEV_FORMAT_ACTIVE, 734 }; 735 int ret; 736 737 isi_fmt = find_format_by_fourcc(isi, fsize->pixel_format); 738 if (!isi_fmt) 739 return -EINVAL; 740 741 fse.code = isi_fmt->mbus_code; 742 743 ret = v4l2_subdev_call(isi->entity.subdev, pad, enum_frame_size, 744 NULL, &fse); 745 if (ret) 746 return ret; 747 748 fsize->type = V4L2_FRMSIZE_TYPE_DISCRETE; 749 fsize->discrete.width = fse.max_width; 750 fsize->discrete.height = fse.max_height; 751 752 return 0; 753 } 754 755 static int isi_enum_frameintervals(struct file *file, void *fh, 756 struct v4l2_frmivalenum *fival) 757 { 758 struct atmel_isi *isi = video_drvdata(file); 759 const struct isi_format *isi_fmt; 760 struct v4l2_subdev_frame_interval_enum fie = { 761 .index = fival->index, 762 .width = fival->width, 763 .height = fival->height, 764 .which = V4L2_SUBDEV_FORMAT_ACTIVE, 765 }; 766 int ret; 767 768 isi_fmt = find_format_by_fourcc(isi, fival->pixel_format); 769 if (!isi_fmt) 770 return -EINVAL; 771 772 fie.code = isi_fmt->mbus_code; 773 774 ret = v4l2_subdev_call(isi->entity.subdev, pad, 775 enum_frame_interval, NULL, &fie); 776 if (ret) 777 return ret; 778 779 fival->type = V4L2_FRMIVAL_TYPE_DISCRETE; 780 fival->discrete = fie.interval; 781 782 return 0; 783 } 784 785 static void isi_camera_set_bus_param(struct atmel_isi *isi) 786 { 787 u32 cfg1 = 0; 788 789 /* set bus param for ISI */ 790 if (isi->pdata.hsync_act_low) 791 cfg1 |= ISI_CFG1_HSYNC_POL_ACTIVE_LOW; 792 if (isi->pdata.vsync_act_low) 793 cfg1 |= ISI_CFG1_VSYNC_POL_ACTIVE_LOW; 794 if (isi->pdata.pclk_act_falling) 795 cfg1 |= ISI_CFG1_PIXCLK_POL_ACTIVE_FALLING; 796 if (isi->pdata.has_emb_sync) 797 cfg1 |= ISI_CFG1_EMB_SYNC; 798 if (isi->pdata.full_mode) 799 cfg1 |= ISI_CFG1_FULL_MODE; 800 801 cfg1 |= ISI_CFG1_THMASK_BEATS_16; 802 803 /* Enable PM and peripheral clock before operate isi registers */ 804 pm_runtime_get_sync(isi->dev); 805 806 isi_writel(isi, ISI_CTRL, ISI_CTRL_DIS); 807 isi_writel(isi, ISI_CFG1, cfg1); 808 809 pm_runtime_put(isi->dev); 810 } 811 812 /* -----------------------------------------------------------------------*/ 813 static int atmel_isi_parse_dt(struct atmel_isi *isi, 814 struct platform_device *pdev) 815 { 816 struct device_node *np = pdev->dev.of_node; 817 struct v4l2_fwnode_endpoint ep = { .bus_type = 0 }; 818 int err; 819 820 /* Default settings for ISI */ 821 isi->pdata.full_mode = 1; 822 isi->pdata.frate = ISI_CFG1_FRATE_CAPTURE_ALL; 823 824 np = of_graph_get_next_endpoint(np, NULL); 825 if (!np) { 826 dev_err(&pdev->dev, "Could not find the endpoint\n"); 827 return -EINVAL; 828 } 829 830 err = v4l2_fwnode_endpoint_parse(of_fwnode_handle(np), &ep); 831 of_node_put(np); 832 if (err) { 833 dev_err(&pdev->dev, "Could not parse the endpoint\n"); 834 return err; 835 } 836 837 switch (ep.bus.parallel.bus_width) { 838 case 8: 839 isi->pdata.data_width_flags = ISI_DATAWIDTH_8; 840 break; 841 case 10: 842 isi->pdata.data_width_flags = 843 ISI_DATAWIDTH_8 | ISI_DATAWIDTH_10; 844 break; 845 default: 846 dev_err(&pdev->dev, "Unsupported bus width: %d\n", 847 ep.bus.parallel.bus_width); 848 return -EINVAL; 849 } 850 851 if (ep.bus.parallel.flags & V4L2_MBUS_HSYNC_ACTIVE_LOW) 852 isi->pdata.hsync_act_low = true; 853 if (ep.bus.parallel.flags & V4L2_MBUS_VSYNC_ACTIVE_LOW) 854 isi->pdata.vsync_act_low = true; 855 if (ep.bus.parallel.flags & V4L2_MBUS_PCLK_SAMPLE_FALLING) 856 isi->pdata.pclk_act_falling = true; 857 858 if (ep.bus_type == V4L2_MBUS_BT656) 859 isi->pdata.has_emb_sync = true; 860 861 return 0; 862 } 863 864 static int isi_open(struct file *file) 865 { 866 struct atmel_isi *isi = video_drvdata(file); 867 struct v4l2_subdev *sd = isi->entity.subdev; 868 int ret; 869 870 if (mutex_lock_interruptible(&isi->lock)) 871 return -ERESTARTSYS; 872 873 ret = v4l2_fh_open(file); 874 if (ret < 0) 875 goto unlock; 876 877 if (!v4l2_fh_is_singular_file(file)) 878 goto fh_rel; 879 880 ret = v4l2_subdev_call(sd, core, s_power, 1); 881 if (ret < 0 && ret != -ENOIOCTLCMD) 882 goto fh_rel; 883 884 ret = isi_set_fmt(isi, &isi->fmt); 885 if (ret) 886 v4l2_subdev_call(sd, core, s_power, 0); 887 fh_rel: 888 if (ret) 889 v4l2_fh_release(file); 890 unlock: 891 mutex_unlock(&isi->lock); 892 return ret; 893 } 894 895 static int isi_release(struct file *file) 896 { 897 struct atmel_isi *isi = video_drvdata(file); 898 struct v4l2_subdev *sd = isi->entity.subdev; 899 bool fh_singular; 900 int ret; 901 902 mutex_lock(&isi->lock); 903 904 fh_singular = v4l2_fh_is_singular_file(file); 905 906 ret = _vb2_fop_release(file, NULL); 907 908 if (fh_singular) 909 v4l2_subdev_call(sd, core, s_power, 0); 910 911 mutex_unlock(&isi->lock); 912 913 return ret; 914 } 915 916 static const struct v4l2_ioctl_ops isi_ioctl_ops = { 917 .vidioc_querycap = isi_querycap, 918 919 .vidioc_try_fmt_vid_cap = isi_try_fmt_vid_cap, 920 .vidioc_g_fmt_vid_cap = isi_g_fmt_vid_cap, 921 .vidioc_s_fmt_vid_cap = isi_s_fmt_vid_cap, 922 .vidioc_enum_fmt_vid_cap = isi_enum_fmt_vid_cap, 923 924 .vidioc_enum_input = isi_enum_input, 925 .vidioc_g_input = isi_g_input, 926 .vidioc_s_input = isi_s_input, 927 928 .vidioc_g_parm = isi_g_parm, 929 .vidioc_s_parm = isi_s_parm, 930 .vidioc_enum_framesizes = isi_enum_framesizes, 931 .vidioc_enum_frameintervals = isi_enum_frameintervals, 932 933 .vidioc_reqbufs = vb2_ioctl_reqbufs, 934 .vidioc_create_bufs = vb2_ioctl_create_bufs, 935 .vidioc_querybuf = vb2_ioctl_querybuf, 936 .vidioc_qbuf = vb2_ioctl_qbuf, 937 .vidioc_dqbuf = vb2_ioctl_dqbuf, 938 .vidioc_expbuf = vb2_ioctl_expbuf, 939 .vidioc_prepare_buf = vb2_ioctl_prepare_buf, 940 .vidioc_streamon = vb2_ioctl_streamon, 941 .vidioc_streamoff = vb2_ioctl_streamoff, 942 943 .vidioc_log_status = v4l2_ctrl_log_status, 944 .vidioc_subscribe_event = v4l2_ctrl_subscribe_event, 945 .vidioc_unsubscribe_event = v4l2_event_unsubscribe, 946 }; 947 948 static const struct v4l2_file_operations isi_fops = { 949 .owner = THIS_MODULE, 950 .unlocked_ioctl = video_ioctl2, 951 .open = isi_open, 952 .release = isi_release, 953 .poll = vb2_fop_poll, 954 .mmap = vb2_fop_mmap, 955 .read = vb2_fop_read, 956 }; 957 958 static int isi_set_default_fmt(struct atmel_isi *isi) 959 { 960 struct v4l2_format f = { 961 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE, 962 .fmt.pix = { 963 .width = VGA_WIDTH, 964 .height = VGA_HEIGHT, 965 .field = V4L2_FIELD_NONE, 966 .pixelformat = isi->user_formats[0]->fourcc, 967 }, 968 }; 969 int ret; 970 971 ret = isi_try_fmt(isi, &f, NULL); 972 if (ret) 973 return ret; 974 isi->current_fmt = isi->user_formats[0]; 975 isi->fmt = f; 976 return 0; 977 } 978 979 static const struct isi_format isi_formats[] = { 980 { 981 .fourcc = V4L2_PIX_FMT_YUYV, 982 .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8, 983 .bpp = 2, 984 .swap = ISI_CFG2_YCC_SWAP_DEFAULT, 985 }, { 986 .fourcc = V4L2_PIX_FMT_YUYV, 987 .mbus_code = MEDIA_BUS_FMT_YVYU8_2X8, 988 .bpp = 2, 989 .swap = ISI_CFG2_YCC_SWAP_MODE_1, 990 }, { 991 .fourcc = V4L2_PIX_FMT_YUYV, 992 .mbus_code = MEDIA_BUS_FMT_UYVY8_2X8, 993 .bpp = 2, 994 .swap = ISI_CFG2_YCC_SWAP_MODE_2, 995 }, { 996 .fourcc = V4L2_PIX_FMT_YUYV, 997 .mbus_code = MEDIA_BUS_FMT_VYUY8_2X8, 998 .bpp = 2, 999 .swap = ISI_CFG2_YCC_SWAP_MODE_3, 1000 }, { 1001 .fourcc = V4L2_PIX_FMT_RGB565, 1002 .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8, 1003 .bpp = 2, 1004 .swap = ISI_CFG2_YCC_SWAP_MODE_2, 1005 }, { 1006 .fourcc = V4L2_PIX_FMT_RGB565, 1007 .mbus_code = MEDIA_BUS_FMT_YVYU8_2X8, 1008 .bpp = 2, 1009 .swap = ISI_CFG2_YCC_SWAP_MODE_3, 1010 }, { 1011 .fourcc = V4L2_PIX_FMT_RGB565, 1012 .mbus_code = MEDIA_BUS_FMT_UYVY8_2X8, 1013 .bpp = 2, 1014 .swap = ISI_CFG2_YCC_SWAP_DEFAULT, 1015 }, { 1016 .fourcc = V4L2_PIX_FMT_RGB565, 1017 .mbus_code = MEDIA_BUS_FMT_VYUY8_2X8, 1018 .bpp = 2, 1019 .swap = ISI_CFG2_YCC_SWAP_MODE_1, 1020 }, { 1021 .fourcc = V4L2_PIX_FMT_GREY, 1022 .mbus_code = MEDIA_BUS_FMT_Y10_1X10, 1023 .bpp = 1, 1024 .swap = ISI_CFG2_GS_MODE_2_PIXEL | ISI_CFG2_GRAYSCALE, 1025 }, { 1026 .fourcc = V4L2_PIX_FMT_Y16, 1027 .mbus_code = MEDIA_BUS_FMT_Y10_1X10, 1028 .bpp = 2, 1029 .swap = ISI_CFG2_GS_MODE_2_PIXEL | ISI_CFG2_GRAYSCALE, 1030 }, 1031 }; 1032 1033 static int isi_formats_init(struct atmel_isi *isi) 1034 { 1035 const struct isi_format *isi_fmts[ARRAY_SIZE(isi_formats)]; 1036 unsigned int num_fmts = 0, i, j; 1037 struct v4l2_subdev *subdev = isi->entity.subdev; 1038 struct v4l2_subdev_mbus_code_enum mbus_code = { 1039 .which = V4L2_SUBDEV_FORMAT_ACTIVE, 1040 }; 1041 1042 while (!v4l2_subdev_call(subdev, pad, enum_mbus_code, 1043 NULL, &mbus_code)) { 1044 for (i = 0; i < ARRAY_SIZE(isi_formats); i++) { 1045 if (isi_formats[i].mbus_code != mbus_code.code) 1046 continue; 1047 1048 /* Code supported, have we got this fourcc yet? */ 1049 for (j = 0; j < num_fmts; j++) 1050 if (isi_fmts[j]->fourcc == isi_formats[i].fourcc) 1051 /* Already available */ 1052 break; 1053 if (j == num_fmts) 1054 /* new */ 1055 isi_fmts[num_fmts++] = isi_formats + i; 1056 } 1057 mbus_code.index++; 1058 } 1059 1060 if (!num_fmts) 1061 return -ENXIO; 1062 1063 isi->num_user_formats = num_fmts; 1064 isi->user_formats = devm_kcalloc(isi->dev, 1065 num_fmts, sizeof(struct isi_format *), 1066 GFP_KERNEL); 1067 if (!isi->user_formats) 1068 return -ENOMEM; 1069 1070 memcpy(isi->user_formats, isi_fmts, 1071 num_fmts * sizeof(struct isi_format *)); 1072 isi->current_fmt = isi->user_formats[0]; 1073 1074 return 0; 1075 } 1076 1077 static int isi_graph_notify_complete(struct v4l2_async_notifier *notifier) 1078 { 1079 struct atmel_isi *isi = notifier_to_isi(notifier); 1080 int ret; 1081 1082 isi->vdev->ctrl_handler = isi->entity.subdev->ctrl_handler; 1083 ret = isi_formats_init(isi); 1084 if (ret) { 1085 dev_err(isi->dev, "No supported mediabus format found\n"); 1086 return ret; 1087 } 1088 isi_camera_set_bus_param(isi); 1089 1090 ret = isi_set_default_fmt(isi); 1091 if (ret) { 1092 dev_err(isi->dev, "Could not set default format\n"); 1093 return ret; 1094 } 1095 1096 ret = video_register_device(isi->vdev, VFL_TYPE_VIDEO, -1); 1097 if (ret) { 1098 dev_err(isi->dev, "Failed to register video device\n"); 1099 return ret; 1100 } 1101 1102 dev_dbg(isi->dev, "Device registered as %s\n", 1103 video_device_node_name(isi->vdev)); 1104 return 0; 1105 } 1106 1107 static void isi_graph_notify_unbind(struct v4l2_async_notifier *notifier, 1108 struct v4l2_subdev *sd, 1109 struct v4l2_async_subdev *asd) 1110 { 1111 struct atmel_isi *isi = notifier_to_isi(notifier); 1112 1113 dev_dbg(isi->dev, "Removing %s\n", video_device_node_name(isi->vdev)); 1114 1115 /* Checks internally if vdev have been init or not */ 1116 video_unregister_device(isi->vdev); 1117 } 1118 1119 static int isi_graph_notify_bound(struct v4l2_async_notifier *notifier, 1120 struct v4l2_subdev *subdev, 1121 struct v4l2_async_subdev *asd) 1122 { 1123 struct atmel_isi *isi = notifier_to_isi(notifier); 1124 1125 dev_dbg(isi->dev, "subdev %s bound\n", subdev->name); 1126 1127 isi->entity.subdev = subdev; 1128 1129 return 0; 1130 } 1131 1132 static const struct v4l2_async_notifier_operations isi_graph_notify_ops = { 1133 .bound = isi_graph_notify_bound, 1134 .unbind = isi_graph_notify_unbind, 1135 .complete = isi_graph_notify_complete, 1136 }; 1137 1138 static int isi_graph_init(struct atmel_isi *isi) 1139 { 1140 struct v4l2_async_subdev *asd; 1141 struct device_node *ep; 1142 int ret; 1143 1144 ep = of_graph_get_next_endpoint(isi->dev->of_node, NULL); 1145 if (!ep) 1146 return -EINVAL; 1147 1148 v4l2_async_notifier_init(&isi->notifier); 1149 1150 asd = v4l2_async_notifier_add_fwnode_remote_subdev( 1151 &isi->notifier, 1152 of_fwnode_handle(ep), 1153 struct v4l2_async_subdev); 1154 of_node_put(ep); 1155 1156 if (IS_ERR(asd)) 1157 return PTR_ERR(asd); 1158 1159 isi->notifier.ops = &isi_graph_notify_ops; 1160 1161 ret = v4l2_async_notifier_register(&isi->v4l2_dev, &isi->notifier); 1162 if (ret < 0) { 1163 dev_err(isi->dev, "Notifier registration failed\n"); 1164 v4l2_async_notifier_cleanup(&isi->notifier); 1165 return ret; 1166 } 1167 1168 return 0; 1169 } 1170 1171 1172 static int atmel_isi_probe(struct platform_device *pdev) 1173 { 1174 int irq; 1175 struct atmel_isi *isi; 1176 struct vb2_queue *q; 1177 struct resource *regs; 1178 int ret, i; 1179 1180 isi = devm_kzalloc(&pdev->dev, sizeof(struct atmel_isi), GFP_KERNEL); 1181 if (!isi) 1182 return -ENOMEM; 1183 1184 isi->pclk = devm_clk_get(&pdev->dev, "isi_clk"); 1185 if (IS_ERR(isi->pclk)) 1186 return PTR_ERR(isi->pclk); 1187 1188 ret = atmel_isi_parse_dt(isi, pdev); 1189 if (ret) 1190 return ret; 1191 1192 isi->active = NULL; 1193 isi->dev = &pdev->dev; 1194 mutex_init(&isi->lock); 1195 spin_lock_init(&isi->irqlock); 1196 INIT_LIST_HEAD(&isi->video_buffer_list); 1197 INIT_LIST_HEAD(&isi->dma_desc_head); 1198 1199 q = &isi->queue; 1200 1201 /* Initialize the top-level structure */ 1202 ret = v4l2_device_register(&pdev->dev, &isi->v4l2_dev); 1203 if (ret) 1204 return ret; 1205 1206 isi->vdev = video_device_alloc(); 1207 if (!isi->vdev) { 1208 ret = -ENOMEM; 1209 goto err_vdev_alloc; 1210 } 1211 1212 /* video node */ 1213 isi->vdev->fops = &isi_fops; 1214 isi->vdev->v4l2_dev = &isi->v4l2_dev; 1215 isi->vdev->queue = &isi->queue; 1216 strscpy(isi->vdev->name, KBUILD_MODNAME, sizeof(isi->vdev->name)); 1217 isi->vdev->release = video_device_release; 1218 isi->vdev->ioctl_ops = &isi_ioctl_ops; 1219 isi->vdev->lock = &isi->lock; 1220 isi->vdev->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING | 1221 V4L2_CAP_READWRITE; 1222 video_set_drvdata(isi->vdev, isi); 1223 1224 /* buffer queue */ 1225 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; 1226 q->io_modes = VB2_MMAP | VB2_READ | VB2_DMABUF; 1227 q->lock = &isi->lock; 1228 q->drv_priv = isi; 1229 q->buf_struct_size = sizeof(struct frame_buffer); 1230 q->ops = &isi_video_qops; 1231 q->mem_ops = &vb2_dma_contig_memops; 1232 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; 1233 q->min_buffers_needed = 2; 1234 q->dev = &pdev->dev; 1235 1236 ret = vb2_queue_init(q); 1237 if (ret < 0) { 1238 dev_err(&pdev->dev, "failed to initialize VB2 queue\n"); 1239 goto err_vb2_queue; 1240 } 1241 isi->p_fb_descriptors = dma_alloc_coherent(&pdev->dev, 1242 sizeof(struct fbd) * VIDEO_MAX_FRAME, 1243 &isi->fb_descriptors_phys, 1244 GFP_KERNEL); 1245 if (!isi->p_fb_descriptors) { 1246 dev_err(&pdev->dev, "Can't allocate descriptors!\n"); 1247 ret = -ENOMEM; 1248 goto err_dma_alloc; 1249 } 1250 1251 for (i = 0; i < VIDEO_MAX_FRAME; i++) { 1252 isi->dma_desc[i].p_fbd = isi->p_fb_descriptors + i; 1253 isi->dma_desc[i].fbd_phys = isi->fb_descriptors_phys + 1254 i * sizeof(struct fbd); 1255 list_add(&isi->dma_desc[i].list, &isi->dma_desc_head); 1256 } 1257 1258 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1259 isi->regs = devm_ioremap_resource(&pdev->dev, regs); 1260 if (IS_ERR(isi->regs)) { 1261 ret = PTR_ERR(isi->regs); 1262 goto err_ioremap; 1263 } 1264 1265 if (isi->pdata.data_width_flags & ISI_DATAWIDTH_8) 1266 isi->width_flags = 1 << 7; 1267 if (isi->pdata.data_width_flags & ISI_DATAWIDTH_10) 1268 isi->width_flags |= 1 << 9; 1269 1270 irq = platform_get_irq(pdev, 0); 1271 if (irq < 0) { 1272 ret = irq; 1273 goto err_req_irq; 1274 } 1275 1276 ret = devm_request_irq(&pdev->dev, irq, isi_interrupt, 0, "isi", isi); 1277 if (ret) { 1278 dev_err(&pdev->dev, "Unable to request irq %d\n", irq); 1279 goto err_req_irq; 1280 } 1281 isi->irq = irq; 1282 1283 ret = isi_graph_init(isi); 1284 if (ret < 0) 1285 goto err_req_irq; 1286 1287 pm_suspend_ignore_children(&pdev->dev, true); 1288 pm_runtime_enable(&pdev->dev); 1289 platform_set_drvdata(pdev, isi); 1290 return 0; 1291 1292 err_req_irq: 1293 err_ioremap: 1294 dma_free_coherent(&pdev->dev, 1295 sizeof(struct fbd) * VIDEO_MAX_FRAME, 1296 isi->p_fb_descriptors, 1297 isi->fb_descriptors_phys); 1298 err_dma_alloc: 1299 err_vb2_queue: 1300 video_device_release(isi->vdev); 1301 err_vdev_alloc: 1302 v4l2_device_unregister(&isi->v4l2_dev); 1303 1304 return ret; 1305 } 1306 1307 static int atmel_isi_remove(struct platform_device *pdev) 1308 { 1309 struct atmel_isi *isi = platform_get_drvdata(pdev); 1310 1311 dma_free_coherent(&pdev->dev, 1312 sizeof(struct fbd) * VIDEO_MAX_FRAME, 1313 isi->p_fb_descriptors, 1314 isi->fb_descriptors_phys); 1315 pm_runtime_disable(&pdev->dev); 1316 v4l2_async_notifier_unregister(&isi->notifier); 1317 v4l2_async_notifier_cleanup(&isi->notifier); 1318 v4l2_device_unregister(&isi->v4l2_dev); 1319 1320 return 0; 1321 } 1322 1323 #ifdef CONFIG_PM 1324 static int atmel_isi_runtime_suspend(struct device *dev) 1325 { 1326 struct atmel_isi *isi = dev_get_drvdata(dev); 1327 1328 clk_disable_unprepare(isi->pclk); 1329 1330 return 0; 1331 } 1332 static int atmel_isi_runtime_resume(struct device *dev) 1333 { 1334 struct atmel_isi *isi = dev_get_drvdata(dev); 1335 1336 return clk_prepare_enable(isi->pclk); 1337 } 1338 #endif /* CONFIG_PM */ 1339 1340 static const struct dev_pm_ops atmel_isi_dev_pm_ops = { 1341 SET_RUNTIME_PM_OPS(atmel_isi_runtime_suspend, 1342 atmel_isi_runtime_resume, NULL) 1343 }; 1344 1345 static const struct of_device_id atmel_isi_of_match[] = { 1346 { .compatible = "atmel,at91sam9g45-isi" }, 1347 { } 1348 }; 1349 MODULE_DEVICE_TABLE(of, atmel_isi_of_match); 1350 1351 static struct platform_driver atmel_isi_driver = { 1352 .driver = { 1353 .name = "atmel_isi", 1354 .of_match_table = of_match_ptr(atmel_isi_of_match), 1355 .pm = &atmel_isi_dev_pm_ops, 1356 }, 1357 .probe = atmel_isi_probe, 1358 .remove = atmel_isi_remove, 1359 }; 1360 1361 module_platform_driver(atmel_isi_driver); 1362 1363 MODULE_AUTHOR("Josh Wu <josh.wu@atmel.com>"); 1364 MODULE_DESCRIPTION("The V4L2 driver for Atmel Linux"); 1365 MODULE_LICENSE("GPL"); 1366 MODULE_SUPPORTED_DEVICE("video"); 1367