1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (C) 2019 Pengutronix, Michael Tretter <kernel@pengutronix.de> 4 * 5 * Convert NAL units between raw byte sequence payloads (RBSP) and C structs. 6 */ 7 8 #ifndef __NAL_HEVC_H__ 9 #define __NAL_HEVC_H__ 10 11 #include <linux/errno.h> 12 #include <linux/kernel.h> 13 #include <linux/types.h> 14 #include <linux/v4l2-controls.h> 15 #include <linux/videodev2.h> 16 17 struct nal_hevc_profile_tier_level { 18 unsigned int general_profile_space; 19 unsigned int general_tier_flag; 20 unsigned int general_profile_idc; 21 unsigned int general_profile_compatibility_flag[32]; 22 unsigned int general_progressive_source_flag; 23 unsigned int general_interlaced_source_flag; 24 unsigned int general_non_packed_constraint_flag; 25 unsigned int general_frame_only_constraint_flag; 26 union { 27 struct { 28 unsigned int general_max_12bit_constraint_flag; 29 unsigned int general_max_10bit_constraint_flag; 30 unsigned int general_max_8bit_constraint_flag; 31 unsigned int general_max_422chroma_constraint_flag; 32 unsigned int general_max_420chroma_constraint_flag; 33 unsigned int general_max_monochrome_constraint_flag; 34 unsigned int general_intra_constraint_flag; 35 unsigned int general_one_picture_only_constraint_flag; 36 unsigned int general_lower_bit_rate_constraint_flag; 37 union { 38 struct { 39 unsigned int general_max_14bit_constraint_flag; 40 unsigned int general_reserved_zero_33bits; 41 }; 42 unsigned int general_reserved_zero_34bits; 43 }; 44 }; 45 struct { 46 unsigned int general_reserved_zero_7bits; 47 /* unsigned int general_one_picture_only_constraint_flag; */ 48 unsigned int general_reserved_zero_35bits; 49 }; 50 unsigned int general_reserved_zero_43bits; 51 }; 52 union { 53 unsigned int general_inbld_flag; 54 unsigned int general_reserved_zero_bit; 55 }; 56 unsigned int general_level_idc; 57 }; 58 59 /* 60 * struct nal_hevc_vps - Video parameter set 61 * 62 * C struct representation of the video parameter set NAL unit as defined by 63 * Rec. ITU-T H.265 (02/2018) 7.3.2.1 Video parameter set RBSP syntax 64 */ 65 struct nal_hevc_vps { 66 unsigned int video_parameter_set_id; 67 unsigned int base_layer_internal_flag; 68 unsigned int base_layer_available_flag; 69 unsigned int max_layers_minus1; 70 unsigned int max_sub_layers_minus1; 71 unsigned int temporal_id_nesting_flag; 72 struct nal_hevc_profile_tier_level profile_tier_level; 73 unsigned int sub_layer_ordering_info_present_flag; 74 struct { 75 unsigned int max_dec_pic_buffering_minus1[7]; 76 unsigned int max_num_reorder_pics[7]; 77 unsigned int max_latency_increase_plus1[7]; 78 }; 79 unsigned int max_layer_id; 80 unsigned int num_layer_sets_minus1; 81 unsigned int layer_id_included_flag[1024][64]; 82 unsigned int timing_info_present_flag; 83 struct { 84 unsigned int num_units_in_tick; 85 unsigned int time_scale; 86 unsigned int poc_proportional_to_timing_flag; 87 unsigned int num_ticks_poc_diff_one_minus1; 88 unsigned int num_hrd_parameters; 89 struct { 90 unsigned int hrd_layer_set_idx[0]; 91 unsigned int cprms_present_flag[0]; 92 }; 93 /* hrd_parameters( cprms_present_flag[ i ], max_sub_layers_minus1 ) */ 94 }; 95 unsigned int extension_flag; 96 unsigned int extension_data_flag; 97 }; 98 99 struct nal_hevc_sub_layer_hrd_parameters { 100 unsigned int bit_rate_value_minus1[1]; 101 unsigned int cpb_size_value_minus1[1]; 102 unsigned int cbr_flag[1]; 103 }; 104 105 struct nal_hevc_hrd_parameters { 106 unsigned int nal_hrd_parameters_present_flag; 107 unsigned int vcl_hrd_parameters_present_flag; 108 struct { 109 unsigned int sub_pic_hrd_params_present_flag; 110 struct { 111 unsigned int tick_divisor_minus2; 112 unsigned int du_cpb_removal_delay_increment_length_minus1; 113 unsigned int sub_pic_cpb_params_in_pic_timing_sei_flag; 114 unsigned int dpb_output_delay_du_length_minus1; 115 }; 116 unsigned int bit_rate_scale; 117 unsigned int cpb_size_scale; 118 unsigned int cpb_size_du_scale; 119 unsigned int initial_cpb_removal_delay_length_minus1; 120 unsigned int au_cpb_removal_delay_length_minus1; 121 unsigned int dpb_output_delay_length_minus1; 122 }; 123 struct { 124 unsigned int fixed_pic_rate_general_flag[1]; 125 unsigned int fixed_pic_rate_within_cvs_flag[1]; 126 unsigned int elemental_duration_in_tc_minus1[1]; 127 unsigned int low_delay_hrd_flag[1]; 128 unsigned int cpb_cnt_minus1[1]; 129 struct nal_hevc_sub_layer_hrd_parameters nal_hrd[1]; 130 struct nal_hevc_sub_layer_hrd_parameters vcl_hrd[1]; 131 }; 132 }; 133 134 /* 135 * struct nal_hevc_vui_parameters - VUI parameters 136 * 137 * C struct representation of the VUI parameters as defined by Rec. ITU-T 138 * H.265 (02/2018) E.2.1 VUI parameters syntax. 139 */ 140 struct nal_hevc_vui_parameters { 141 unsigned int aspect_ratio_info_present_flag; 142 struct { 143 unsigned int aspect_ratio_idc; 144 unsigned int sar_width; 145 unsigned int sar_height; 146 }; 147 unsigned int overscan_info_present_flag; 148 unsigned int overscan_appropriate_flag; 149 unsigned int video_signal_type_present_flag; 150 struct { 151 unsigned int video_format; 152 unsigned int video_full_range_flag; 153 unsigned int colour_description_present_flag; 154 struct { 155 unsigned int colour_primaries; 156 unsigned int transfer_characteristics; 157 unsigned int matrix_coeffs; 158 }; 159 }; 160 unsigned int chroma_loc_info_present_flag; 161 struct { 162 unsigned int chroma_sample_loc_type_top_field; 163 unsigned int chroma_sample_loc_type_bottom_field; 164 }; 165 unsigned int neutral_chroma_indication_flag; 166 unsigned int field_seq_flag; 167 unsigned int frame_field_info_present_flag; 168 unsigned int default_display_window_flag; 169 struct { 170 unsigned int def_disp_win_left_offset; 171 unsigned int def_disp_win_right_offset; 172 unsigned int def_disp_win_top_offset; 173 unsigned int def_disp_win_bottom_offset; 174 }; 175 unsigned int vui_timing_info_present_flag; 176 struct { 177 unsigned int vui_num_units_in_tick; 178 unsigned int vui_time_scale; 179 unsigned int vui_poc_proportional_to_timing_flag; 180 unsigned int vui_num_ticks_poc_diff_one_minus1; 181 unsigned int vui_hrd_parameters_present_flag; 182 struct nal_hevc_hrd_parameters nal_hrd_parameters; 183 }; 184 unsigned int bitstream_restriction_flag; 185 struct { 186 unsigned int tiles_fixed_structure_flag; 187 unsigned int motion_vectors_over_pic_boundaries_flag; 188 unsigned int restricted_ref_pic_lists_flag; 189 unsigned int min_spatial_segmentation_idc; 190 unsigned int max_bytes_per_pic_denom; 191 unsigned int max_bits_per_min_cu_denom; 192 unsigned int log2_max_mv_length_horizontal; 193 unsigned int log2_max_mv_length_vertical; 194 }; 195 }; 196 197 /* 198 * struct nal_hevc_sps - Sequence parameter set 199 * 200 * C struct representation of the video parameter set NAL unit as defined by 201 * Rec. ITU-T H.265 (02/2018) 7.3.2.2 Sequence parameter set RBSP syntax 202 */ 203 struct nal_hevc_sps { 204 unsigned int video_parameter_set_id; 205 unsigned int max_sub_layers_minus1; 206 unsigned int temporal_id_nesting_flag; 207 struct nal_hevc_profile_tier_level profile_tier_level; 208 unsigned int seq_parameter_set_id; 209 unsigned int chroma_format_idc; 210 unsigned int separate_colour_plane_flag; 211 unsigned int pic_width_in_luma_samples; 212 unsigned int pic_height_in_luma_samples; 213 unsigned int conformance_window_flag; 214 struct { 215 unsigned int conf_win_left_offset; 216 unsigned int conf_win_right_offset; 217 unsigned int conf_win_top_offset; 218 unsigned int conf_win_bottom_offset; 219 }; 220 221 unsigned int bit_depth_luma_minus8; 222 unsigned int bit_depth_chroma_minus8; 223 unsigned int log2_max_pic_order_cnt_lsb_minus4; 224 unsigned int sub_layer_ordering_info_present_flag; 225 struct { 226 unsigned int max_dec_pic_buffering_minus1[7]; 227 unsigned int max_num_reorder_pics[7]; 228 unsigned int max_latency_increase_plus1[7]; 229 }; 230 unsigned int log2_min_luma_coding_block_size_minus3; 231 unsigned int log2_diff_max_min_luma_coding_block_size; 232 unsigned int log2_min_luma_transform_block_size_minus2; 233 unsigned int log2_diff_max_min_luma_transform_block_size; 234 unsigned int max_transform_hierarchy_depth_inter; 235 unsigned int max_transform_hierarchy_depth_intra; 236 237 unsigned int scaling_list_enabled_flag; 238 unsigned int scaling_list_data_present_flag; 239 unsigned int amp_enabled_flag; 240 unsigned int sample_adaptive_offset_enabled_flag; 241 unsigned int pcm_enabled_flag; 242 struct { 243 unsigned int pcm_sample_bit_depth_luma_minus1; 244 unsigned int pcm_sample_bit_depth_chroma_minus1; 245 unsigned int log2_min_pcm_luma_coding_block_size_minus3; 246 unsigned int log2_diff_max_min_pcm_luma_coding_block_size; 247 unsigned int pcm_loop_filter_disabled_flag; 248 }; 249 250 unsigned int num_short_term_ref_pic_sets; 251 unsigned int long_term_ref_pics_present_flag; 252 unsigned int sps_temporal_mvp_enabled_flag; 253 unsigned int strong_intra_smoothing_enabled_flag; 254 unsigned int vui_parameters_present_flag; 255 struct nal_hevc_vui_parameters vui; 256 unsigned int extension_present_flag; 257 struct { 258 unsigned int sps_range_extension_flag; 259 unsigned int sps_multilayer_extension_flag; 260 unsigned int sps_3d_extension_flag; 261 unsigned int sps_scc_extension_flag; 262 unsigned int sps_extension_4bits; 263 }; 264 }; 265 266 struct nal_hevc_pps { 267 unsigned int pps_pic_parameter_set_id; 268 unsigned int pps_seq_parameter_set_id; 269 unsigned int dependent_slice_segments_enabled_flag; 270 unsigned int output_flag_present_flag; 271 unsigned int num_extra_slice_header_bits; 272 unsigned int sign_data_hiding_enabled_flag; 273 unsigned int cabac_init_present_flag; 274 unsigned int num_ref_idx_l0_default_active_minus1; 275 unsigned int num_ref_idx_l1_default_active_minus1; 276 int init_qp_minus26; 277 unsigned int constrained_intra_pred_flag; 278 unsigned int transform_skip_enabled_flag; 279 unsigned int cu_qp_delta_enabled_flag; 280 unsigned int diff_cu_qp_delta_depth; 281 int pps_cb_qp_offset; 282 int pps_cr_qp_offset; 283 unsigned int pps_slice_chroma_qp_offsets_present_flag; 284 unsigned int weighted_pred_flag; 285 unsigned int weighted_bipred_flag; 286 unsigned int transquant_bypass_enabled_flag; 287 unsigned int tiles_enabled_flag; 288 unsigned int entropy_coding_sync_enabled_flag; 289 struct { 290 unsigned int num_tile_columns_minus1; 291 unsigned int num_tile_rows_minus1; 292 unsigned int uniform_spacing_flag; 293 struct { 294 unsigned int column_width_minus1[1]; 295 unsigned int row_height_minus1[1]; 296 }; 297 unsigned int loop_filter_across_tiles_enabled_flag; 298 }; 299 unsigned int pps_loop_filter_across_slices_enabled_flag; 300 unsigned int deblocking_filter_control_present_flag; 301 struct { 302 unsigned int deblocking_filter_override_enabled_flag; 303 unsigned int pps_deblocking_filter_disabled_flag; 304 struct { 305 int pps_beta_offset_div2; 306 int pps_tc_offset_div2; 307 }; 308 }; 309 unsigned int pps_scaling_list_data_present_flag; 310 unsigned int lists_modification_present_flag; 311 unsigned int log2_parallel_merge_level_minus2; 312 unsigned int slice_segment_header_extension_present_flag; 313 unsigned int pps_extension_present_flag; 314 struct { 315 unsigned int pps_range_extension_flag; 316 unsigned int pps_multilayer_extension_flag; 317 unsigned int pps_3d_extension_flag; 318 unsigned int pps_scc_extension_flag; 319 unsigned int pps_extension_4bits; 320 }; 321 }; 322 323 /** 324 * nal_hevc_profile() - Get profile_idc for v4l2 hevc profile 325 * @profile: the profile as &enum v4l2_mpeg_video_hevc_profile 326 * 327 * Convert the &enum v4l2_mpeg_video_hevc_profile to profile_idc as specified 328 * in Rec. ITU-T H.265 (02/2018) A.3. 329 * 330 * Return: the profile_idc for the passed level 331 */ 332 static inline int nal_hevc_profile(enum v4l2_mpeg_video_hevc_profile profile) 333 { 334 switch (profile) { 335 case V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN: 336 return 1; 337 case V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10: 338 return 2; 339 case V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE: 340 return 3; 341 default: 342 return -EINVAL; 343 } 344 } 345 346 /** 347 * nal_hevc_tier() - Get tier_flag for v4l2 hevc tier 348 * @tier: the tier as &enum v4l2_mpeg_video_hevc_tier 349 * 350 * Convert the &enum v4l2_mpeg_video_hevc_tier to tier_flag as specified 351 * in Rec. ITU-T H.265 (02/2018) A.4.1. 352 * 353 * Return: the tier_flag for the passed tier 354 */ 355 static inline int nal_hevc_tier(enum v4l2_mpeg_video_hevc_tier tier) 356 { 357 switch (tier) { 358 case V4L2_MPEG_VIDEO_HEVC_TIER_MAIN: 359 return 0; 360 case V4L2_MPEG_VIDEO_HEVC_TIER_HIGH: 361 return 1; 362 default: 363 return -EINVAL; 364 } 365 } 366 367 /** 368 * nal_hevc_level() - Get level_idc for v4l2 hevc level 369 * @level: the level as &enum v4l2_mpeg_video_hevc_level 370 * 371 * Convert the &enum v4l2_mpeg_video_hevc_level to level_idc as specified in 372 * Rec. ITU-T H.265 (02/2018) A.4.1. 373 * 374 * Return: the level_idc for the passed level 375 */ 376 static inline int nal_hevc_level(enum v4l2_mpeg_video_hevc_level level) 377 { 378 /* 379 * T-Rec-H.265 p. 280: general_level_idc and sub_layer_level_idc[ i ] 380 * shall be set equal to a value of 30 times the level number 381 * specified in Table A.6. 382 */ 383 int factor = 30 / 10; 384 385 switch (level) { 386 case V4L2_MPEG_VIDEO_HEVC_LEVEL_1: 387 return factor * 10; 388 case V4L2_MPEG_VIDEO_HEVC_LEVEL_2: 389 return factor * 20; 390 case V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1: 391 return factor * 21; 392 case V4L2_MPEG_VIDEO_HEVC_LEVEL_3: 393 return factor * 30; 394 case V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1: 395 return factor * 31; 396 case V4L2_MPEG_VIDEO_HEVC_LEVEL_4: 397 return factor * 40; 398 case V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1: 399 return factor * 41; 400 case V4L2_MPEG_VIDEO_HEVC_LEVEL_5: 401 return factor * 50; 402 case V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1: 403 return factor * 51; 404 case V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2: 405 return factor * 52; 406 case V4L2_MPEG_VIDEO_HEVC_LEVEL_6: 407 return factor * 60; 408 case V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1: 409 return factor * 61; 410 case V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2: 411 return factor * 62; 412 default: 413 return -EINVAL; 414 } 415 } 416 417 static inline int nal_hevc_full_range(enum v4l2_quantization quantization) 418 { 419 switch (quantization) { 420 case V4L2_QUANTIZATION_FULL_RANGE: 421 return 1; 422 case V4L2_QUANTIZATION_LIM_RANGE: 423 return 0; 424 default: 425 break; 426 } 427 428 return 0; 429 } 430 431 static inline int nal_hevc_color_primaries(enum v4l2_colorspace colorspace) 432 { 433 switch (colorspace) { 434 case V4L2_COLORSPACE_SMPTE170M: 435 return 6; 436 case V4L2_COLORSPACE_SMPTE240M: 437 return 7; 438 case V4L2_COLORSPACE_REC709: 439 return 1; 440 case V4L2_COLORSPACE_470_SYSTEM_M: 441 return 4; 442 case V4L2_COLORSPACE_JPEG: 443 case V4L2_COLORSPACE_SRGB: 444 case V4L2_COLORSPACE_470_SYSTEM_BG: 445 return 5; 446 case V4L2_COLORSPACE_BT2020: 447 return 9; 448 case V4L2_COLORSPACE_DEFAULT: 449 case V4L2_COLORSPACE_OPRGB: 450 case V4L2_COLORSPACE_RAW: 451 case V4L2_COLORSPACE_DCI_P3: 452 default: 453 return 2; 454 } 455 } 456 457 static inline int nal_hevc_transfer_characteristics(enum v4l2_colorspace colorspace, 458 enum v4l2_xfer_func xfer_func) 459 { 460 if (xfer_func == V4L2_XFER_FUNC_DEFAULT) 461 xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(colorspace); 462 463 switch (xfer_func) { 464 case V4L2_XFER_FUNC_709: 465 return 6; 466 case V4L2_XFER_FUNC_SMPTE2084: 467 return 16; 468 case V4L2_XFER_FUNC_SRGB: 469 case V4L2_XFER_FUNC_OPRGB: 470 case V4L2_XFER_FUNC_NONE: 471 case V4L2_XFER_FUNC_DCI_P3: 472 case V4L2_XFER_FUNC_SMPTE240M: 473 default: 474 return 2; 475 } 476 } 477 478 static inline int nal_hevc_matrix_coeffs(enum v4l2_colorspace colorspace, 479 enum v4l2_ycbcr_encoding ycbcr_encoding) 480 { 481 if (ycbcr_encoding == V4L2_YCBCR_ENC_DEFAULT) 482 ycbcr_encoding = V4L2_MAP_YCBCR_ENC_DEFAULT(colorspace); 483 484 switch (ycbcr_encoding) { 485 case V4L2_YCBCR_ENC_601: 486 case V4L2_YCBCR_ENC_XV601: 487 return 5; 488 case V4L2_YCBCR_ENC_709: 489 case V4L2_YCBCR_ENC_XV709: 490 return 1; 491 case V4L2_YCBCR_ENC_BT2020: 492 return 9; 493 case V4L2_YCBCR_ENC_BT2020_CONST_LUM: 494 return 10; 495 case V4L2_YCBCR_ENC_SMPTE240M: 496 default: 497 return 2; 498 } 499 } 500 501 ssize_t nal_hevc_write_vps(const struct device *dev, 502 void *dest, size_t n, struct nal_hevc_vps *vps); 503 ssize_t nal_hevc_read_vps(const struct device *dev, 504 struct nal_hevc_vps *vps, void *src, size_t n); 505 506 ssize_t nal_hevc_write_sps(const struct device *dev, 507 void *dest, size_t n, struct nal_hevc_sps *sps); 508 ssize_t nal_hevc_read_sps(const struct device *dev, 509 struct nal_hevc_sps *sps, void *src, size_t n); 510 511 ssize_t nal_hevc_write_pps(const struct device *dev, 512 void *dest, size_t n, struct nal_hevc_pps *pps); 513 ssize_t nal_hevc_read_pps(const struct device *dev, 514 struct nal_hevc_pps *pps, void *src, size_t n); 515 516 ssize_t nal_hevc_write_filler(const struct device *dev, void *dest, size_t n); 517 ssize_t nal_hevc_read_filler(const struct device *dev, void *src, size_t n); 518 519 #endif /* __NAL_HEVC_H__ */ 520