1 /* 2 * Zoran ZR36060 basic configuration functions - header file 3 * 4 * Copyright (C) 2002 Laurent Pinchart <laurent.pinchart@skynet.be> 5 * 6 * $Id: zr36060.h,v 1.1.1.1.2.3 2003/01/14 21:18:47 rbultje Exp $ 7 * 8 * ------------------------------------------------------------------------ 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * ------------------------------------------------------------------------ 21 */ 22 23 #ifndef ZR36060_H 24 #define ZR36060_H 25 26 #include "videocodec.h" 27 28 /* data stored for each zoran jpeg codec chip */ 29 struct zr36060 { 30 char name[32]; 31 int num; 32 /* io datastructure */ 33 struct videocodec *codec; 34 // last coder status 35 __u8 status; 36 // actual coder setup 37 int mode; 38 39 __u16 width; 40 __u16 height; 41 42 __u16 bitrate_ctrl; 43 44 __u32 total_code_vol; 45 __u32 real_code_vol; 46 __u16 max_block_vol; 47 48 __u8 h_samp_ratio[8]; 49 __u8 v_samp_ratio[8]; 50 __u16 scalefact; 51 __u16 dri; 52 53 /* app/com marker data */ 54 struct jpeg_app_marker app; 55 struct jpeg_com_marker com; 56 }; 57 58 /* ZR36060 register addresses */ 59 #define ZR060_LOAD 0x000 60 #define ZR060_CFSR 0x001 61 #define ZR060_CIR 0x002 62 #define ZR060_CMR 0x003 63 #define ZR060_MBZ 0x004 64 #define ZR060_MBCVR 0x005 65 #define ZR060_MER 0x006 66 #define ZR060_IMR 0x007 67 #define ZR060_ISR 0x008 68 #define ZR060_TCV_NET_HI 0x009 69 #define ZR060_TCV_NET_MH 0x00a 70 #define ZR060_TCV_NET_ML 0x00b 71 #define ZR060_TCV_NET_LO 0x00c 72 #define ZR060_TCV_DATA_HI 0x00d 73 #define ZR060_TCV_DATA_MH 0x00e 74 #define ZR060_TCV_DATA_ML 0x00f 75 #define ZR060_TCV_DATA_LO 0x010 76 #define ZR060_SF_HI 0x011 77 #define ZR060_SF_LO 0x012 78 #define ZR060_AF_HI 0x013 79 #define ZR060_AF_M 0x014 80 #define ZR060_AF_LO 0x015 81 #define ZR060_ACV_HI 0x016 82 #define ZR060_ACV_MH 0x017 83 #define ZR060_ACV_ML 0x018 84 #define ZR060_ACV_LO 0x019 85 #define ZR060_ACT_HI 0x01a 86 #define ZR060_ACT_MH 0x01b 87 #define ZR060_ACT_ML 0x01c 88 #define ZR060_ACT_LO 0x01d 89 #define ZR060_ACV_TRUN_HI 0x01e 90 #define ZR060_ACV_TRUN_MH 0x01f 91 #define ZR060_ACV_TRUN_ML 0x020 92 #define ZR060_ACV_TRUN_LO 0x021 93 #define ZR060_IDR_DEV 0x022 94 #define ZR060_IDR_REV 0x023 95 #define ZR060_TCR_HI 0x024 96 #define ZR060_TCR_LO 0x025 97 #define ZR060_VCR 0x030 98 #define ZR060_VPR 0x031 99 #define ZR060_SR 0x032 100 #define ZR060_BCR_Y 0x033 101 #define ZR060_BCR_U 0x034 102 #define ZR060_BCR_V 0x035 103 #define ZR060_SGR_VTOTAL_HI 0x036 104 #define ZR060_SGR_VTOTAL_LO 0x037 105 #define ZR060_SGR_HTOTAL_HI 0x038 106 #define ZR060_SGR_HTOTAL_LO 0x039 107 #define ZR060_SGR_VSYNC 0x03a 108 #define ZR060_SGR_HSYNC 0x03b 109 #define ZR060_SGR_BVSTART 0x03c 110 #define ZR060_SGR_BHSTART 0x03d 111 #define ZR060_SGR_BVEND_HI 0x03e 112 #define ZR060_SGR_BVEND_LO 0x03f 113 #define ZR060_SGR_BHEND_HI 0x040 114 #define ZR060_SGR_BHEND_LO 0x041 115 #define ZR060_AAR_VSTART_HI 0x042 116 #define ZR060_AAR_VSTART_LO 0x043 117 #define ZR060_AAR_VEND_HI 0x044 118 #define ZR060_AAR_VEND_LO 0x045 119 #define ZR060_AAR_HSTART_HI 0x046 120 #define ZR060_AAR_HSTART_LO 0x047 121 #define ZR060_AAR_HEND_HI 0x048 122 #define ZR060_AAR_HEND_LO 0x049 123 #define ZR060_SWR_VSTART_HI 0x04a 124 #define ZR060_SWR_VSTART_LO 0x04b 125 #define ZR060_SWR_VEND_HI 0x04c 126 #define ZR060_SWR_VEND_LO 0x04d 127 #define ZR060_SWR_HSTART_HI 0x04e 128 #define ZR060_SWR_HSTART_LO 0x04f 129 #define ZR060_SWR_HEND_HI 0x050 130 #define ZR060_SWR_HEND_LO 0x051 131 132 #define ZR060_SOF_IDX 0x060 133 #define ZR060_SOS_IDX 0x07a 134 #define ZR060_DRI_IDX 0x0c0 135 #define ZR060_DQT_IDX 0x0cc 136 #define ZR060_DHT_IDX 0x1d4 137 #define ZR060_APP_IDX 0x380 138 #define ZR060_COM_IDX 0x3c0 139 140 /* ZR36060 LOAD register bits */ 141 142 #define ZR060_LOAD_Load (1 << 7) 143 #define ZR060_LOAD_SyncRst (1 << 0) 144 145 /* ZR36060 Code FIFO Status register bits */ 146 147 #define ZR060_CFSR_Busy (1 << 7) 148 #define ZR060_CFSR_CBusy (1 << 2) 149 #define ZR060_CFSR_CFIFO (3 << 0) 150 151 /* ZR36060 Code Interface register */ 152 153 #define ZR060_CIR_Code16 (1 << 7) 154 #define ZR060_CIR_Endian (1 << 6) 155 #define ZR060_CIR_CFIS (1 << 2) 156 #define ZR060_CIR_CodeMstr (1 << 0) 157 158 /* ZR36060 Codec Mode register */ 159 160 #define ZR060_CMR_Comp (1 << 7) 161 #define ZR060_CMR_ATP (1 << 6) 162 #define ZR060_CMR_Pass2 (1 << 5) 163 #define ZR060_CMR_TLM (1 << 4) 164 #define ZR060_CMR_BRB (1 << 2) 165 #define ZR060_CMR_FSF (1 << 1) 166 167 /* ZR36060 Markers Enable register */ 168 169 #define ZR060_MER_App (1 << 7) 170 #define ZR060_MER_Com (1 << 6) 171 #define ZR060_MER_DRI (1 << 5) 172 #define ZR060_MER_DQT (1 << 4) 173 #define ZR060_MER_DHT (1 << 3) 174 175 /* ZR36060 Interrupt Mask register */ 176 177 #define ZR060_IMR_EOAV (1 << 3) 178 #define ZR060_IMR_EOI (1 << 2) 179 #define ZR060_IMR_End (1 << 1) 180 #define ZR060_IMR_DataErr (1 << 0) 181 182 /* ZR36060 Interrupt Status register */ 183 184 #define ZR060_ISR_ProCnt (3 << 6) 185 #define ZR060_ISR_EOAV (1 << 3) 186 #define ZR060_ISR_EOI (1 << 2) 187 #define ZR060_ISR_End (1 << 1) 188 #define ZR060_ISR_DataErr (1 << 0) 189 190 /* ZR36060 Video Control register */ 191 192 #define ZR060_VCR_Video8 (1 << 7) 193 #define ZR060_VCR_Range (1 << 6) 194 #define ZR060_VCR_FIDet (1 << 3) 195 #define ZR060_VCR_FIVedge (1 << 2) 196 #define ZR060_VCR_FIExt (1 << 1) 197 #define ZR060_VCR_SyncMstr (1 << 0) 198 199 /* ZR36060 Video Polarity register */ 200 201 #define ZR060_VPR_VCLKPol (1 << 7) 202 #define ZR060_VPR_PValPol (1 << 6) 203 #define ZR060_VPR_PoePol (1 << 5) 204 #define ZR060_VPR_SImgPol (1 << 4) 205 #define ZR060_VPR_BLPol (1 << 3) 206 #define ZR060_VPR_FIPol (1 << 2) 207 #define ZR060_VPR_HSPol (1 << 1) 208 #define ZR060_VPR_VSPol (1 << 0) 209 210 /* ZR36060 Scaling register */ 211 212 #define ZR060_SR_VScale (1 << 2) 213 #define ZR060_SR_HScale2 (1 << 0) 214 #define ZR060_SR_HScale4 (2 << 0) 215 216 #endif /*fndef ZR36060_H */ 217