1 /* 2 * Copyright (C) 2010-2013 Bluecherry, LLC <http://www.bluecherrydvr.com> 3 * 4 * Original author: 5 * Ben Collins <bcollins@ubuntu.com> 6 * 7 * Additional work by: 8 * John Brooks <john.brooks@bluecherry.net> 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 */ 20 21 #ifndef __SOLO6X10_H 22 #define __SOLO6X10_H 23 24 #include <linux/pci.h> 25 #include <linux/i2c.h> 26 #include <linux/mutex.h> 27 #include <linux/list.h> 28 #include <linux/wait.h> 29 #include <linux/stringify.h> 30 #include <linux/io.h> 31 #include <linux/atomic.h> 32 #include <linux/slab.h> 33 #include <linux/videodev2.h> 34 35 #include <media/v4l2-dev.h> 36 #include <media/v4l2-device.h> 37 #include <media/v4l2-ctrls.h> 38 #include <media/videobuf2-core.h> 39 40 #include "solo6x10-regs.h" 41 42 #ifndef PCI_VENDOR_ID_SOFTLOGIC 43 #define PCI_VENDOR_ID_SOFTLOGIC 0x9413 44 #define PCI_DEVICE_ID_SOLO6010 0x6010 45 #define PCI_DEVICE_ID_SOLO6110 0x6110 46 #endif 47 48 #ifndef PCI_VENDOR_ID_BLUECHERRY 49 #define PCI_VENDOR_ID_BLUECHERRY 0x1BB3 50 /* Neugent Softlogic 6010 based cards */ 51 #define PCI_DEVICE_ID_NEUSOLO_4 0x4304 52 #define PCI_DEVICE_ID_NEUSOLO_9 0x4309 53 #define PCI_DEVICE_ID_NEUSOLO_16 0x4310 54 /* Bluecherry Softlogic 6010 based cards */ 55 #define PCI_DEVICE_ID_BC_SOLO_4 0x4E04 56 #define PCI_DEVICE_ID_BC_SOLO_9 0x4E09 57 #define PCI_DEVICE_ID_BC_SOLO_16 0x4E10 58 /* Bluecherry Softlogic 6110 based cards */ 59 #define PCI_DEVICE_ID_BC_6110_4 0x5304 60 #define PCI_DEVICE_ID_BC_6110_8 0x5308 61 #define PCI_DEVICE_ID_BC_6110_16 0x5310 62 #endif /* Bluecherry */ 63 64 /* Used in pci_device_id, and solo_dev->type */ 65 #define SOLO_DEV_6010 0 66 #define SOLO_DEV_6110 1 67 68 #define SOLO6X10_NAME "solo6x10" 69 70 #define SOLO_MAX_CHANNELS 16 71 72 #define SOLO6X10_VERSION "3.0.0" 73 74 /* 75 * The SOLO6x10 actually has 8 i2c channels, but we only use 2. 76 * 0 - Techwell chip(s) 77 * 1 - SAA7128 78 */ 79 #define SOLO_I2C_ADAPTERS 2 80 #define SOLO_I2C_TW 0 81 #define SOLO_I2C_SAA 1 82 83 /* DMA Engine setup */ 84 #define SOLO_NR_P2M 4 85 #define SOLO_NR_P2M_DESC 256 86 #define SOLO_P2M_DESC_SIZE (SOLO_NR_P2M_DESC * 16) 87 88 /* Encoder standard modes */ 89 #define SOLO_ENC_MODE_CIF 2 90 #define SOLO_ENC_MODE_HD1 1 91 #define SOLO_ENC_MODE_D1 9 92 93 #define SOLO_DEFAULT_QP 3 94 95 #define SOLO_CID_CUSTOM_BASE (V4L2_CID_USER_BASE | 0xf000) 96 #define V4L2_CID_MOTION_TRACE (SOLO_CID_CUSTOM_BASE+2) 97 #define V4L2_CID_OSD_TEXT (SOLO_CID_CUSTOM_BASE+3) 98 99 /* 100 * Motion thresholds are in a table of 64x64 samples, with 101 * each sample representing 16x16 pixels of the source. In 102 * effect, 44x30 samples are used for NTSC, and 44x36 for PAL. 103 * The 5th sample on the 10th row is (10*64)+5 = 645. 104 * 105 * Internally it is stored as a 45x45 array (45*16 = 720, which is the 106 * maximum PAL/NTSC width). 107 */ 108 #define SOLO_MOTION_SZ (45) 109 110 enum SOLO_I2C_STATE { 111 IIC_STATE_IDLE, 112 IIC_STATE_START, 113 IIC_STATE_READ, 114 IIC_STATE_WRITE, 115 IIC_STATE_STOP 116 }; 117 118 /* Defined in Table 4-16, Page 68-69 of the 6010 Datasheet */ 119 struct solo_p2m_desc { 120 u32 ctrl; 121 u32 cfg; 122 u32 dma_addr; 123 u32 ext_addr; 124 }; 125 126 struct solo_p2m_dev { 127 struct mutex mutex; 128 struct completion completion; 129 int desc_count; 130 int desc_idx; 131 struct solo_p2m_desc *descs; 132 int error; 133 }; 134 135 #define OSD_TEXT_MAX 44 136 137 struct solo_vb2_buf { 138 struct vb2_buffer vb; 139 struct list_head list; 140 }; 141 142 enum solo_enc_types { 143 SOLO_ENC_TYPE_STD, 144 SOLO_ENC_TYPE_EXT, 145 }; 146 147 struct solo_enc_dev { 148 struct solo_dev *solo_dev; 149 /* V4L2 Items */ 150 struct v4l2_ctrl_handler hdl; 151 struct v4l2_ctrl *md_thresholds; 152 struct video_device *vfd; 153 /* General accounting */ 154 struct mutex lock; 155 spinlock_t motion_lock; 156 u8 ch; 157 u8 mode, gop, qp, interlaced, interval; 158 u8 bw_weight; 159 u16 motion_thresh; 160 bool motion_global; 161 bool motion_enabled; 162 bool motion_last_state; 163 u8 frames_since_last_motion; 164 u16 width; 165 u16 height; 166 167 /* OSD buffers */ 168 char osd_text[OSD_TEXT_MAX + 1]; 169 u8 osd_buf[SOLO_EOSD_EXT_SIZE_MAX] 170 __aligned(4); 171 172 /* VOP stuff */ 173 unsigned char vop[64]; 174 int vop_len; 175 unsigned char jpeg_header[1024]; 176 int jpeg_len; 177 178 u32 fmt; 179 enum solo_enc_types type; 180 u32 sequence; 181 struct vb2_queue vidq; 182 struct list_head vidq_active; 183 void *alloc_ctx; 184 int desc_count; 185 int desc_nelts; 186 struct solo_p2m_desc *desc_items; 187 dma_addr_t desc_dma; 188 spinlock_t av_lock; 189 }; 190 191 /* The SOLO6x10 PCI Device */ 192 struct solo_dev { 193 /* General stuff */ 194 struct pci_dev *pdev; 195 int type; 196 unsigned int time_sync; 197 unsigned int usec_lsb; 198 unsigned int clock_mhz; 199 u8 __iomem *reg_base; 200 int nr_chans; 201 int nr_ext; 202 u32 irq_mask; 203 u32 motion_mask; 204 spinlock_t reg_io_lock; 205 struct v4l2_device v4l2_dev; 206 207 /* tw28xx accounting */ 208 u8 tw2865, tw2864, tw2815; 209 u8 tw28_cnt; 210 211 /* i2c related items */ 212 struct i2c_adapter i2c_adap[SOLO_I2C_ADAPTERS]; 213 enum SOLO_I2C_STATE i2c_state; 214 struct mutex i2c_mutex; 215 int i2c_id; 216 wait_queue_head_t i2c_wait; 217 struct i2c_msg *i2c_msg; 218 unsigned int i2c_msg_num; 219 unsigned int i2c_msg_ptr; 220 221 /* P2M DMA Engine */ 222 struct solo_p2m_dev p2m_dev[SOLO_NR_P2M]; 223 atomic_t p2m_count; 224 int p2m_jiffies; 225 unsigned int p2m_timeouts; 226 227 /* V4L2 Display items */ 228 struct video_device *vfd; 229 unsigned int erasing; 230 unsigned int frame_blank; 231 u8 cur_disp_ch; 232 wait_queue_head_t disp_thread_wait; 233 struct v4l2_ctrl_handler disp_hdl; 234 235 /* V4L2 Encoder items */ 236 struct solo_enc_dev *v4l2_enc[SOLO_MAX_CHANNELS]; 237 u16 enc_bw_remain; 238 /* IDX into hw mp4 encoder */ 239 u8 enc_idx; 240 241 /* Current video settings */ 242 u32 video_type; 243 u16 video_hsize, video_vsize; 244 u16 vout_hstart, vout_vstart; 245 u16 vin_hstart, vin_vstart; 246 u8 fps; 247 248 /* JPEG Qp setting */ 249 spinlock_t jpeg_qp_lock; 250 u32 jpeg_qp[2]; 251 252 /* Audio components */ 253 struct snd_card *snd_card; 254 struct snd_pcm *snd_pcm; 255 atomic_t snd_users; 256 int g723_hw_idx; 257 258 /* sysfs stuffs */ 259 struct device dev; 260 int sdram_size; 261 struct bin_attribute sdram_attr; 262 unsigned int sys_config; 263 264 /* Ring thread */ 265 struct task_struct *ring_thread; 266 wait_queue_head_t ring_thread_wait; 267 268 /* VOP_HEADER handling */ 269 void *vh_buf; 270 dma_addr_t vh_dma; 271 int vh_size; 272 273 /* Buffer handling */ 274 struct vb2_queue vidq; 275 struct vb2_alloc_ctx *alloc_ctx; 276 u32 sequence; 277 struct task_struct *kthread; 278 struct mutex lock; 279 spinlock_t slock; 280 int old_write; 281 struct list_head vidq_active; 282 }; 283 284 static inline u32 solo_reg_read(struct solo_dev *solo_dev, int reg) 285 { 286 unsigned long flags; 287 u32 ret; 288 u16 val; 289 290 spin_lock_irqsave(&solo_dev->reg_io_lock, flags); 291 292 ret = readl(solo_dev->reg_base + reg); 293 rmb(); 294 pci_read_config_word(solo_dev->pdev, PCI_STATUS, &val); 295 rmb(); 296 297 spin_unlock_irqrestore(&solo_dev->reg_io_lock, flags); 298 299 return ret; 300 } 301 302 static inline void solo_reg_write(struct solo_dev *solo_dev, int reg, 303 u32 data) 304 { 305 unsigned long flags; 306 u16 val; 307 308 spin_lock_irqsave(&solo_dev->reg_io_lock, flags); 309 310 writel(data, solo_dev->reg_base + reg); 311 wmb(); 312 pci_read_config_word(solo_dev->pdev, PCI_STATUS, &val); 313 rmb(); 314 315 spin_unlock_irqrestore(&solo_dev->reg_io_lock, flags); 316 } 317 318 static inline void solo_irq_on(struct solo_dev *dev, u32 mask) 319 { 320 dev->irq_mask |= mask; 321 solo_reg_write(dev, SOLO_IRQ_MASK, dev->irq_mask); 322 } 323 324 static inline void solo_irq_off(struct solo_dev *dev, u32 mask) 325 { 326 dev->irq_mask &= ~mask; 327 solo_reg_write(dev, SOLO_IRQ_MASK, dev->irq_mask); 328 } 329 330 /* Init/exit routines for subsystems */ 331 int solo_disp_init(struct solo_dev *solo_dev); 332 void solo_disp_exit(struct solo_dev *solo_dev); 333 334 int solo_gpio_init(struct solo_dev *solo_dev); 335 void solo_gpio_exit(struct solo_dev *solo_dev); 336 337 int solo_i2c_init(struct solo_dev *solo_dev); 338 void solo_i2c_exit(struct solo_dev *solo_dev); 339 340 int solo_p2m_init(struct solo_dev *solo_dev); 341 void solo_p2m_exit(struct solo_dev *solo_dev); 342 343 int solo_v4l2_init(struct solo_dev *solo_dev, unsigned nr); 344 void solo_v4l2_exit(struct solo_dev *solo_dev); 345 346 int solo_enc_init(struct solo_dev *solo_dev); 347 void solo_enc_exit(struct solo_dev *solo_dev); 348 349 int solo_enc_v4l2_init(struct solo_dev *solo_dev, unsigned nr); 350 void solo_enc_v4l2_exit(struct solo_dev *solo_dev); 351 352 int solo_g723_init(struct solo_dev *solo_dev); 353 void solo_g723_exit(struct solo_dev *solo_dev); 354 355 /* ISR's */ 356 int solo_i2c_isr(struct solo_dev *solo_dev); 357 void solo_p2m_isr(struct solo_dev *solo_dev, int id); 358 void solo_p2m_error_isr(struct solo_dev *solo_dev); 359 void solo_enc_v4l2_isr(struct solo_dev *solo_dev); 360 void solo_g723_isr(struct solo_dev *solo_dev); 361 void solo_motion_isr(struct solo_dev *solo_dev); 362 void solo_video_in_isr(struct solo_dev *solo_dev); 363 364 /* i2c read/write */ 365 u8 solo_i2c_readbyte(struct solo_dev *solo_dev, int id, u8 addr, u8 off); 366 void solo_i2c_writebyte(struct solo_dev *solo_dev, int id, u8 addr, u8 off, 367 u8 data); 368 369 /* P2M DMA */ 370 int solo_p2m_dma_t(struct solo_dev *solo_dev, int wr, 371 dma_addr_t dma_addr, u32 ext_addr, u32 size, 372 int repeat, u32 ext_size); 373 int solo_p2m_dma(struct solo_dev *solo_dev, int wr, 374 void *sys_addr, u32 ext_addr, u32 size, 375 int repeat, u32 ext_size); 376 void solo_p2m_fill_desc(struct solo_p2m_desc *desc, int wr, 377 dma_addr_t dma_addr, u32 ext_addr, u32 size, 378 int repeat, u32 ext_size); 379 int solo_p2m_dma_desc(struct solo_dev *solo_dev, 380 struct solo_p2m_desc *desc, dma_addr_t desc_dma, 381 int desc_cnt); 382 383 /* Global s_std ioctl */ 384 int solo_set_video_type(struct solo_dev *solo_dev, bool is_50hz); 385 void solo_update_mode(struct solo_enc_dev *solo_enc); 386 387 /* Set the threshold for motion detection */ 388 int solo_set_motion_threshold(struct solo_dev *solo_dev, u8 ch, u16 val); 389 int solo_set_motion_block(struct solo_dev *solo_dev, u8 ch, 390 const u16 *thresholds); 391 #define SOLO_DEF_MOT_THRESH 0x0300 392 393 /* Write text on OSD */ 394 int solo_osd_print(struct solo_enc_dev *solo_enc); 395 396 /* EEPROM commands */ 397 unsigned int solo_eeprom_ewen(struct solo_dev *solo_dev, int w_en); 398 __be16 solo_eeprom_read(struct solo_dev *solo_dev, int loc); 399 int solo_eeprom_write(struct solo_dev *solo_dev, int loc, 400 __be16 data); 401 402 /* JPEG Qp functions */ 403 void solo_s_jpeg_qp(struct solo_dev *solo_dev, unsigned int ch, 404 unsigned int qp); 405 int solo_g_jpeg_qp(struct solo_dev *solo_dev, unsigned int ch); 406 407 #define CHK_FLAGS(v, flags) (((v) & (flags)) == (flags)) 408 409 #endif /* __SOLO6X10_H */ 410