1b285192aSMauro Carvalho Chehab /* 2b285192aSMauro Carvalho Chehab * Driver for the NXP SAA7164 PCIe bridge 3b285192aSMauro Carvalho Chehab * 463a412ecSSteven Toth * Copyright (c) 2010-2015 Steven Toth <stoth@kernellabs.com> 5b285192aSMauro Carvalho Chehab * 6b285192aSMauro Carvalho Chehab * This program is free software; you can redistribute it and/or modify 7b285192aSMauro Carvalho Chehab * it under the terms of the GNU General Public License as published by 8b285192aSMauro Carvalho Chehab * the Free Software Foundation; either version 2 of the License, or 9b285192aSMauro Carvalho Chehab * (at your option) any later version. 10b285192aSMauro Carvalho Chehab * 11b285192aSMauro Carvalho Chehab * This program is distributed in the hope that it will be useful, 12b285192aSMauro Carvalho Chehab * but WITHOUT ANY WARRANTY; without even the implied warranty of 13b285192aSMauro Carvalho Chehab * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14b285192aSMauro Carvalho Chehab * 15b285192aSMauro Carvalho Chehab * GNU General Public License for more details. 16b285192aSMauro Carvalho Chehab * 17b285192aSMauro Carvalho Chehab * You should have received a copy of the GNU General Public License 18b285192aSMauro Carvalho Chehab * along with this program; if not, write to the Free Software 19b285192aSMauro Carvalho Chehab * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 20b285192aSMauro Carvalho Chehab */ 21b285192aSMauro Carvalho Chehab 22b285192aSMauro Carvalho Chehab /* TODO: Retest the driver with errors expressed as negatives */ 23b285192aSMauro Carvalho Chehab 24b285192aSMauro Carvalho Chehab /* Result codes */ 25b285192aSMauro Carvalho Chehab #define SAA_OK 0 26b285192aSMauro Carvalho Chehab #define SAA_ERR_BAD_PARAMETER 0x09 27b285192aSMauro Carvalho Chehab #define SAA_ERR_NO_RESOURCES 0x0c 28b285192aSMauro Carvalho Chehab #define SAA_ERR_NOT_SUPPORTED 0x13 29b285192aSMauro Carvalho Chehab #define SAA_ERR_BUSY 0x15 30b285192aSMauro Carvalho Chehab #define SAA_ERR_READ 0x17 31b285192aSMauro Carvalho Chehab #define SAA_ERR_TIMEOUT 0x1f 32b285192aSMauro Carvalho Chehab #define SAA_ERR_OVERFLOW 0x20 33b285192aSMauro Carvalho Chehab #define SAA_ERR_EMPTY 0x22 34b285192aSMauro Carvalho Chehab #define SAA_ERR_NOT_STARTED 0x23 35b285192aSMauro Carvalho Chehab #define SAA_ERR_ALREADY_STARTED 0x24 36b285192aSMauro Carvalho Chehab #define SAA_ERR_NOT_STOPPED 0x25 37b285192aSMauro Carvalho Chehab #define SAA_ERR_ALREADY_STOPPED 0x26 38b285192aSMauro Carvalho Chehab #define SAA_ERR_INVALID_COMMAND 0x3e 39b285192aSMauro Carvalho Chehab #define SAA_ERR_NULL_PACKET 0x59 40b285192aSMauro Carvalho Chehab 41b285192aSMauro Carvalho Chehab /* Errors and flags from the silicon */ 42b285192aSMauro Carvalho Chehab #define PVC_ERRORCODE_UNKNOWN 0x00 43b285192aSMauro Carvalho Chehab #define PVC_ERRORCODE_INVALID_COMMAND 0x01 44b285192aSMauro Carvalho Chehab #define PVC_ERRORCODE_INVALID_CONTROL 0x02 45b285192aSMauro Carvalho Chehab #define PVC_ERRORCODE_INVALID_DATA 0x03 46b285192aSMauro Carvalho Chehab #define PVC_ERRORCODE_TIMEOUT 0x04 47b285192aSMauro Carvalho Chehab #define PVC_ERRORCODE_NAK 0x05 48b285192aSMauro Carvalho Chehab #define PVC_RESPONSEFLAG_ERROR 0x01 49b285192aSMauro Carvalho Chehab #define PVC_RESPONSEFLAG_OVERFLOW 0x02 50b285192aSMauro Carvalho Chehab #define PVC_RESPONSEFLAG_RESET 0x04 51b285192aSMauro Carvalho Chehab #define PVC_RESPONSEFLAG_INTERFACE 0x08 52b285192aSMauro Carvalho Chehab #define PVC_RESPONSEFLAG_CONTINUED 0x10 53b285192aSMauro Carvalho Chehab #define PVC_CMDFLAG_INTERRUPT 0x02 54b285192aSMauro Carvalho Chehab #define PVC_CMDFLAG_INTERFACE 0x04 55b285192aSMauro Carvalho Chehab #define PVC_CMDFLAG_SERIALIZE 0x08 56b285192aSMauro Carvalho Chehab #define PVC_CMDFLAG_CONTINUE 0x10 57b285192aSMauro Carvalho Chehab 58b285192aSMauro Carvalho Chehab /* Silicon Commands */ 59b285192aSMauro Carvalho Chehab #define GET_DESCRIPTORS_CONTROL 0x01 60b285192aSMauro Carvalho Chehab #define GET_STRING_CONTROL 0x03 61b285192aSMauro Carvalho Chehab #define GET_LANGUAGE_CONTROL 0x05 62b285192aSMauro Carvalho Chehab #define SET_POWER_CONTROL 0x07 63b285192aSMauro Carvalho Chehab #define GET_FW_STATUS_CONTROL 0x08 64b285192aSMauro Carvalho Chehab #define GET_FW_VERSION_CONTROL 0x09 65b285192aSMauro Carvalho Chehab #define SET_DEBUG_LEVEL_CONTROL 0x0B 66b285192aSMauro Carvalho Chehab #define GET_DEBUG_DATA_CONTROL 0x0C 67b285192aSMauro Carvalho Chehab #define GET_PRODUCTION_INFO_CONTROL 0x0D 68b285192aSMauro Carvalho Chehab 69b285192aSMauro Carvalho Chehab /* cmd defines */ 70b285192aSMauro Carvalho Chehab #define SAA_CMDFLAG_CONTINUE 0x10 71b285192aSMauro Carvalho Chehab #define SAA_CMD_MAX_MSG_UNITS 256 72b285192aSMauro Carvalho Chehab 73b285192aSMauro Carvalho Chehab /* Some defines */ 74b285192aSMauro Carvalho Chehab #define SAA_BUS_TIMEOUT 50 75b285192aSMauro Carvalho Chehab #define SAA_DEVICE_TIMEOUT 5000 76b285192aSMauro Carvalho Chehab #define SAA_DEVICE_MAXREQUESTSIZE 256 77b285192aSMauro Carvalho Chehab 78b285192aSMauro Carvalho Chehab /* Register addresses */ 79b285192aSMauro Carvalho Chehab #define SAA_DEVICE_VERSION 0x30 80b285192aSMauro Carvalho Chehab #define SAA_DOWNLOAD_FLAGS 0x34 81b285192aSMauro Carvalho Chehab #define SAA_DOWNLOAD_FLAG 0x34 82b285192aSMauro Carvalho Chehab #define SAA_DOWNLOAD_FLAG_ACK 0x38 83b285192aSMauro Carvalho Chehab #define SAA_DATAREADY_FLAG 0x3C 84b285192aSMauro Carvalho Chehab #define SAA_DATAREADY_FLAG_ACK 0x40 85b285192aSMauro Carvalho Chehab 86b285192aSMauro Carvalho Chehab /* Boot loader register and bit definitions */ 87b285192aSMauro Carvalho Chehab #define SAA_BOOTLOADERERROR_FLAGS 0x44 88b285192aSMauro Carvalho Chehab #define SAA_DEVICE_IMAGE_SEARCHING 0x01 89b285192aSMauro Carvalho Chehab #define SAA_DEVICE_IMAGE_LOADING 0x02 90b285192aSMauro Carvalho Chehab #define SAA_DEVICE_IMAGE_BOOTING 0x03 91b285192aSMauro Carvalho Chehab #define SAA_DEVICE_IMAGE_CORRUPT 0x04 92b285192aSMauro Carvalho Chehab #define SAA_DEVICE_MEMORY_CORRUPT 0x08 93b285192aSMauro Carvalho Chehab #define SAA_DEVICE_NO_IMAGE 0x10 94b285192aSMauro Carvalho Chehab 95b285192aSMauro Carvalho Chehab /* Register addresses */ 96b285192aSMauro Carvalho Chehab #define SAA_DEVICE_2ND_VERSION 0x50 97b285192aSMauro Carvalho Chehab #define SAA_DEVICE_2ND_DOWNLOADFLAG_OFFSET 0x54 98b285192aSMauro Carvalho Chehab 99b285192aSMauro Carvalho Chehab /* Register addresses */ 100b285192aSMauro Carvalho Chehab #define SAA_SECONDSTAGEERROR_FLAGS 0x64 101b285192aSMauro Carvalho Chehab 102b285192aSMauro Carvalho Chehab /* Bootloader regs and flags */ 103b285192aSMauro Carvalho Chehab #define SAA_DEVICE_DEADLOCK_DETECTED_OFFSET 0x6C 104b285192aSMauro Carvalho Chehab #define SAA_DEVICE_DEADLOCK_DETECTED 0xDEADDEAD 105b285192aSMauro Carvalho Chehab 106b285192aSMauro Carvalho Chehab /* Basic firmware status registers */ 107b285192aSMauro Carvalho Chehab #define SAA_DEVICE_SYSINIT_STATUS_OFFSET 0x70 108b285192aSMauro Carvalho Chehab #define SAA_DEVICE_SYSINIT_STATUS 0x70 109b285192aSMauro Carvalho Chehab #define SAA_DEVICE_SYSINIT_MODE 0x74 110b285192aSMauro Carvalho Chehab #define SAA_DEVICE_SYSINIT_SPEC 0x78 111b285192aSMauro Carvalho Chehab #define SAA_DEVICE_SYSINIT_INST 0x7C 112b285192aSMauro Carvalho Chehab #define SAA_DEVICE_SYSINIT_CPULOAD 0x80 113b285192aSMauro Carvalho Chehab #define SAA_DEVICE_SYSINIT_REMAINHEAP 0x84 114b285192aSMauro Carvalho Chehab 115b285192aSMauro Carvalho Chehab #define SAA_DEVICE_DOWNLOAD_OFFSET 0x1000 116b285192aSMauro Carvalho Chehab #define SAA_DEVICE_BUFFERBLOCKSIZE 0x1000 117b285192aSMauro Carvalho Chehab 118b285192aSMauro Carvalho Chehab #define SAA_DEVICE_2ND_BUFFERBLOCKSIZE 0x100000 119b285192aSMauro Carvalho Chehab #define SAA_DEVICE_2ND_DOWNLOAD_OFFSET 0x200000 120b285192aSMauro Carvalho Chehab 121b285192aSMauro Carvalho Chehab /* Descriptors */ 122b285192aSMauro Carvalho Chehab #define CS_INTERFACE 0x24 123b285192aSMauro Carvalho Chehab 124b285192aSMauro Carvalho Chehab /* Descriptor subtypes */ 125b285192aSMauro Carvalho Chehab #define VC_INPUT_TERMINAL 0x02 126b285192aSMauro Carvalho Chehab #define VC_OUTPUT_TERMINAL 0x03 127b285192aSMauro Carvalho Chehab #define VC_SELECTOR_UNIT 0x04 128b285192aSMauro Carvalho Chehab #define VC_PROCESSING_UNIT 0x05 129b285192aSMauro Carvalho Chehab #define FEATURE_UNIT 0x06 130b285192aSMauro Carvalho Chehab #define TUNER_UNIT 0x09 131b285192aSMauro Carvalho Chehab #define ENCODER_UNIT 0x0A 132b285192aSMauro Carvalho Chehab #define EXTENSION_UNIT 0x0B 133b285192aSMauro Carvalho Chehab #define VC_TUNER_PATH 0xF0 134b285192aSMauro Carvalho Chehab #define PVC_HARDWARE_DESCRIPTOR 0xF1 135b285192aSMauro Carvalho Chehab #define PVC_INTERFACE_DESCRIPTOR 0xF2 136b285192aSMauro Carvalho Chehab #define PVC_INFRARED_UNIT 0xF3 137b285192aSMauro Carvalho Chehab #define DRM_UNIT 0xF4 138b285192aSMauro Carvalho Chehab #define GENERAL_REQUEST 0xF5 139b285192aSMauro Carvalho Chehab 140b285192aSMauro Carvalho Chehab /* Format Types */ 141b285192aSMauro Carvalho Chehab #define VS_FORMAT_TYPE 0x02 142b285192aSMauro Carvalho Chehab #define VS_FORMAT_TYPE_I 0x01 143b285192aSMauro Carvalho Chehab #define VS_FORMAT_UNCOMPRESSED 0x04 144b285192aSMauro Carvalho Chehab #define VS_FRAME_UNCOMPRESSED 0x05 145b285192aSMauro Carvalho Chehab #define VS_FORMAT_MPEG2PS 0x09 146b285192aSMauro Carvalho Chehab #define VS_FORMAT_MPEG2TS 0x0A 147b285192aSMauro Carvalho Chehab #define VS_FORMAT_MPEG4SL 0x0B 148b285192aSMauro Carvalho Chehab #define VS_FORMAT_WM9 0x0C 149b285192aSMauro Carvalho Chehab #define VS_FORMAT_DIVX 0x0D 150b285192aSMauro Carvalho Chehab #define VS_FORMAT_VBI 0x0E 151b285192aSMauro Carvalho Chehab #define VS_FORMAT_RDS 0x0F 152b285192aSMauro Carvalho Chehab 153b285192aSMauro Carvalho Chehab /* Device extension commands */ 154b285192aSMauro Carvalho Chehab #define EXU_REGISTER_ACCESS_CONTROL 0x00 155b285192aSMauro Carvalho Chehab #define EXU_GPIO_CONTROL 0x01 156b285192aSMauro Carvalho Chehab #define EXU_GPIO_GROUP_CONTROL 0x02 157b285192aSMauro Carvalho Chehab #define EXU_INTERRUPT_CONTROL 0x03 158b285192aSMauro Carvalho Chehab 159b285192aSMauro Carvalho Chehab /* State Transition and args */ 160b285192aSMauro Carvalho Chehab #define SAA_PROBE_CONTROL 0x01 161b285192aSMauro Carvalho Chehab #define SAA_COMMIT_CONTROL 0x02 162b285192aSMauro Carvalho Chehab #define SAA_STATE_CONTROL 0x03 163b285192aSMauro Carvalho Chehab #define SAA_DMASTATE_STOP 0x00 164b285192aSMauro Carvalho Chehab #define SAA_DMASTATE_ACQUIRE 0x01 165b285192aSMauro Carvalho Chehab #define SAA_DMASTATE_PAUSE 0x02 166b285192aSMauro Carvalho Chehab #define SAA_DMASTATE_RUN 0x03 167b285192aSMauro Carvalho Chehab 168b285192aSMauro Carvalho Chehab /* A/V Mux Input Selector */ 169b285192aSMauro Carvalho Chehab #define SU_INPUT_SELECT_CONTROL 0x01 170b285192aSMauro Carvalho Chehab 171b285192aSMauro Carvalho Chehab /* Encoder Profiles */ 172b285192aSMauro Carvalho Chehab #define EU_PROFILE_PS_DVD 0x06 173b285192aSMauro Carvalho Chehab #define EU_PROFILE_TS_HQ 0x09 174b285192aSMauro Carvalho Chehab #define EU_VIDEO_FORMAT_MPEG_2 0x02 175b285192aSMauro Carvalho Chehab 176b285192aSMauro Carvalho Chehab /* Tuner */ 177b285192aSMauro Carvalho Chehab #define TU_AUDIO_MODE_CONTROL 0x17 178b285192aSMauro Carvalho Chehab 179b285192aSMauro Carvalho Chehab /* Video Formats */ 180b285192aSMauro Carvalho Chehab #define TU_STANDARD_CONTROL 0x00 181b285192aSMauro Carvalho Chehab #define TU_STANDARD_AUTO_CONTROL 0x01 182b285192aSMauro Carvalho Chehab #define TU_STANDARD_NONE 0x00 183b285192aSMauro Carvalho Chehab #define TU_STANDARD_NTSC_M 0x01 184b285192aSMauro Carvalho Chehab #define TU_STANDARD_PAL_I 0x08 185b285192aSMauro Carvalho Chehab #define TU_STANDARD_MANUAL 0x00 186b285192aSMauro Carvalho Chehab #define TU_STANDARD_AUTO 0x01 187b285192aSMauro Carvalho Chehab 188b285192aSMauro Carvalho Chehab /* Video Controls */ 189b285192aSMauro Carvalho Chehab #define PU_BRIGHTNESS_CONTROL 0x02 190b285192aSMauro Carvalho Chehab #define PU_CONTRAST_CONTROL 0x03 191b285192aSMauro Carvalho Chehab #define PU_HUE_CONTROL 0x06 192b285192aSMauro Carvalho Chehab #define PU_SATURATION_CONTROL 0x07 193b285192aSMauro Carvalho Chehab #define PU_SHARPNESS_CONTROL 0x08 194b285192aSMauro Carvalho Chehab 195b285192aSMauro Carvalho Chehab /* Audio Controls */ 196b285192aSMauro Carvalho Chehab #define MUTE_CONTROL 0x01 197b285192aSMauro Carvalho Chehab #define VOLUME_CONTROL 0x02 198b285192aSMauro Carvalho Chehab #define AUDIO_DEFAULT_CONTROL 0x0D 199b285192aSMauro Carvalho Chehab 200b285192aSMauro Carvalho Chehab /* Default Volume Levels */ 201b285192aSMauro Carvalho Chehab #define TMHW_LEV_ADJ_DECLEV_DEFAULT 0x00 202b285192aSMauro Carvalho Chehab #define TMHW_LEV_ADJ_MONOLEV_DEFAULT 0x00 203b285192aSMauro Carvalho Chehab #define TMHW_LEV_ADJ_NICLEV_DEFAULT 0x00 204b285192aSMauro Carvalho Chehab #define TMHW_LEV_ADJ_SAPLEV_DEFAULT 0x00 205b285192aSMauro Carvalho Chehab #define TMHW_LEV_ADJ_ADCLEV_DEFAULT 0x00 206b285192aSMauro Carvalho Chehab 207b285192aSMauro Carvalho Chehab /* Encoder Related Commands */ 208b285192aSMauro Carvalho Chehab #define EU_PROFILE_CONTROL 0x00 209b285192aSMauro Carvalho Chehab #define EU_VIDEO_FORMAT_CONTROL 0x01 210b285192aSMauro Carvalho Chehab #define EU_VIDEO_BIT_RATE_CONTROL 0x02 211b285192aSMauro Carvalho Chehab #define EU_VIDEO_RESOLUTION_CONTROL 0x03 212b285192aSMauro Carvalho Chehab #define EU_VIDEO_GOP_STRUCTURE_CONTROL 0x04 213b285192aSMauro Carvalho Chehab #define EU_VIDEO_INPUT_ASPECT_CONTROL 0x0A 214b285192aSMauro Carvalho Chehab #define EU_AUDIO_FORMAT_CONTROL 0x0C 215b285192aSMauro Carvalho Chehab #define EU_AUDIO_BIT_RATE_CONTROL 0x0D 216b285192aSMauro Carvalho Chehab 217b285192aSMauro Carvalho Chehab /* Firmware Debugging */ 218b285192aSMauro Carvalho Chehab #define SET_DEBUG_LEVEL_CONTROL 0x0B 219b285192aSMauro Carvalho Chehab #define GET_DEBUG_DATA_CONTROL 0x0C 220