1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  *  Driver for the NXP SAA7164 PCIe bridge
4  *
5  *  Copyright (c) 2010-2015 Steven Toth <stoth@kernellabs.com>
6  */
7 
8 #include <linux/init.h>
9 #include <linux/list.h>
10 #include <linux/module.h>
11 #include <linux/moduleparam.h>
12 #include <linux/kmod.h>
13 #include <linux/kernel.h>
14 #include <linux/slab.h>
15 #include <linux/interrupt.h>
16 #include <linux/debugfs.h>
17 #include <linux/delay.h>
18 #include <asm/div64.h>
19 
20 #include "saa7164.h"
21 
22 MODULE_DESCRIPTION("Driver for NXP SAA7164 based TV cards");
23 MODULE_AUTHOR("Steven Toth <stoth@kernellabs.com>");
24 MODULE_LICENSE("GPL");
25 
26 /*
27  *  1 Basic
28  *  2
29  *  4 i2c
30  *  8 api
31  * 16 cmd
32  * 32 bus
33  */
34 
35 unsigned int saa_debug;
36 module_param_named(debug, saa_debug, int, 0644);
37 MODULE_PARM_DESC(debug, "enable debug messages");
38 
39 static unsigned int fw_debug;
40 module_param(fw_debug, int, 0644);
41 MODULE_PARM_DESC(fw_debug, "Firmware debug level def:2");
42 
43 unsigned int encoder_buffers = SAA7164_MAX_ENCODER_BUFFERS;
44 module_param(encoder_buffers, int, 0644);
45 MODULE_PARM_DESC(encoder_buffers, "Total buffers in read queue 16-512 def:64");
46 
47 unsigned int vbi_buffers = SAA7164_MAX_VBI_BUFFERS;
48 module_param(vbi_buffers, int, 0644);
49 MODULE_PARM_DESC(vbi_buffers, "Total buffers in read queue 16-512 def:64");
50 
51 unsigned int waitsecs = 10;
52 module_param(waitsecs, int, 0644);
53 MODULE_PARM_DESC(waitsecs, "timeout on firmware messages");
54 
55 static unsigned int card[]  = {[0 ... (SAA7164_MAXBOARDS - 1)] = UNSET };
56 module_param_array(card,  int, NULL, 0444);
57 MODULE_PARM_DESC(card, "card type");
58 
59 static unsigned int print_histogram = 64;
60 module_param(print_histogram, int, 0644);
61 MODULE_PARM_DESC(print_histogram, "print histogram values once");
62 
63 unsigned int crc_checking = 1;
64 module_param(crc_checking, int, 0644);
65 MODULE_PARM_DESC(crc_checking, "enable crc sanity checking on buffers");
66 
67 static unsigned int guard_checking = 1;
68 module_param(guard_checking, int, 0644);
69 MODULE_PARM_DESC(guard_checking,
70 	"enable dma sanity checking for buffer overruns");
71 
72 static bool enable_msi = true;
73 module_param(enable_msi, bool, 0444);
74 MODULE_PARM_DESC(enable_msi,
75 		"enable the use of an msi interrupt if available");
76 
77 static unsigned int saa7164_devcount;
78 
79 static DEFINE_MUTEX(devlist);
80 LIST_HEAD(saa7164_devlist);
81 
82 #define INT_SIZE 16
83 
84 static void saa7164_pack_verifier(struct saa7164_buffer *buf)
85 {
86 	u8 *p = (u8 *)buf->cpu;
87 	int i;
88 
89 	for (i = 0; i < buf->actual_size; i += 2048) {
90 
91 		if ((*(p + i + 0) != 0x00) || (*(p + i + 1) != 0x00) ||
92 			(*(p + i + 2) != 0x01) || (*(p + i + 3) != 0xBA)) {
93 			printk(KERN_ERR "No pack at 0x%x\n", i);
94 #if 0
95 			print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 16, 1,
96 				       p + 1, 32, false);
97 #endif
98 		}
99 	}
100 }
101 
102 #define FIXED_VIDEO_PID 0xf1
103 #define FIXED_AUDIO_PID 0xf2
104 
105 static void saa7164_ts_verifier(struct saa7164_buffer *buf)
106 {
107 	struct saa7164_port *port = buf->port;
108 	u32 i;
109 	u8 cc, a;
110 	u16 pid;
111 	u8 *bufcpu = (u8 *)buf->cpu;
112 
113 	port->sync_errors = 0;
114 	port->v_cc_errors = 0;
115 	port->a_cc_errors = 0;
116 
117 	for (i = 0; i < buf->actual_size; i += 188) {
118 		if (*(bufcpu + i) != 0x47)
119 			port->sync_errors++;
120 
121 		/* TODO: Query pid lower 8 bits, ignoring upper bits intensionally */
122 		pid = ((*(bufcpu + i + 1) & 0x1f) << 8) | *(bufcpu + i + 2);
123 		cc = *(bufcpu + i + 3) & 0x0f;
124 
125 		if (pid == FIXED_VIDEO_PID) {
126 			a = ((port->last_v_cc + 1) & 0x0f);
127 			if (a != cc) {
128 				printk(KERN_ERR "video cc last = %x current = %x i = %d\n",
129 					port->last_v_cc, cc, i);
130 				port->v_cc_errors++;
131 			}
132 
133 			port->last_v_cc = cc;
134 		} else
135 		if (pid == FIXED_AUDIO_PID) {
136 			a = ((port->last_a_cc + 1) & 0x0f);
137 			if (a != cc) {
138 				printk(KERN_ERR "audio cc last = %x current = %x i = %d\n",
139 					port->last_a_cc, cc, i);
140 				port->a_cc_errors++;
141 			}
142 
143 			port->last_a_cc = cc;
144 		}
145 
146 	}
147 
148 	/* Only report errors if we've been through this function at least
149 	 * once already and the cached cc values are primed. First time through
150 	 * always generates errors.
151 	 */
152 	if (port->v_cc_errors && (port->done_first_interrupt > 1))
153 		printk(KERN_ERR "video pid cc, %d errors\n", port->v_cc_errors);
154 
155 	if (port->a_cc_errors && (port->done_first_interrupt > 1))
156 		printk(KERN_ERR "audio pid cc, %d errors\n", port->a_cc_errors);
157 
158 	if (port->sync_errors && (port->done_first_interrupt > 1))
159 		printk(KERN_ERR "sync_errors = %d\n", port->sync_errors);
160 
161 	if (port->done_first_interrupt == 1)
162 		port->done_first_interrupt++;
163 }
164 
165 static void saa7164_histogram_reset(struct saa7164_histogram *hg, char *name)
166 {
167 	int i;
168 
169 	memset(hg, 0, sizeof(struct saa7164_histogram));
170 	strscpy(hg->name, name, sizeof(hg->name));
171 
172 	/* First 30ms x 1ms */
173 	for (i = 0; i < 30; i++)
174 		hg->counter1[0 + i].val = i;
175 
176 	/* 30 - 200ms x 10ms  */
177 	for (i = 0; i < 18; i++)
178 		hg->counter1[30 + i].val = 30 + (i * 10);
179 
180 	/* 200 - 2000ms x 100ms  */
181 	for (i = 0; i < 15; i++)
182 		hg->counter1[48 + i].val = 200 + (i * 200);
183 
184 	/* Catch all massive value (2secs) */
185 	hg->counter1[55].val = 2000;
186 
187 	/* Catch all massive value (4secs) */
188 	hg->counter1[56].val = 4000;
189 
190 	/* Catch all massive value (8secs) */
191 	hg->counter1[57].val = 8000;
192 
193 	/* Catch all massive value (15secs) */
194 	hg->counter1[58].val = 15000;
195 
196 	/* Catch all massive value (30secs) */
197 	hg->counter1[59].val = 30000;
198 
199 	/* Catch all massive value (60secs) */
200 	hg->counter1[60].val = 60000;
201 
202 	/* Catch all massive value (5mins) */
203 	hg->counter1[61].val = 300000;
204 
205 	/* Catch all massive value (15mins) */
206 	hg->counter1[62].val = 900000;
207 
208 	/* Catch all massive values (1hr) */
209 	hg->counter1[63].val = 3600000;
210 }
211 
212 void saa7164_histogram_update(struct saa7164_histogram *hg, u32 val)
213 {
214 	int i;
215 	for (i = 0; i < 64; i++) {
216 		if (val <= hg->counter1[i].val) {
217 			hg->counter1[i].count++;
218 			hg->counter1[i].update_time = jiffies;
219 			break;
220 		}
221 	}
222 }
223 
224 static void saa7164_histogram_print(struct saa7164_port *port,
225 	struct saa7164_histogram *hg)
226 {
227 	u32 entries = 0;
228 	int i;
229 
230 	printk(KERN_ERR "Histogram named %s (ms, count, last_update_jiffy)\n", hg->name);
231 	for (i = 0; i < 64; i++) {
232 		if (hg->counter1[i].count == 0)
233 			continue;
234 
235 		printk(KERN_ERR " %4d %12d %Ld\n",
236 			hg->counter1[i].val,
237 			hg->counter1[i].count,
238 			hg->counter1[i].update_time);
239 
240 		entries++;
241 	}
242 	printk(KERN_ERR "Total: %d\n", entries);
243 }
244 
245 static void saa7164_work_enchandler_helper(struct saa7164_port *port, int bufnr)
246 {
247 	struct saa7164_dev *dev = port->dev;
248 	struct saa7164_buffer *buf = NULL;
249 	struct saa7164_user_buffer *ubuf = NULL;
250 	struct list_head *c, *n;
251 	int i = 0;
252 	u8 *p;
253 
254 	mutex_lock(&port->dmaqueue_lock);
255 	list_for_each_safe(c, n, &port->dmaqueue.list) {
256 
257 		buf = list_entry(c, struct saa7164_buffer, list);
258 		if (i++ > port->hwcfg.buffercount) {
259 			printk(KERN_ERR "%s() illegal i count %d\n",
260 				__func__, i);
261 			break;
262 		}
263 
264 		if (buf->idx == bufnr) {
265 
266 			/* Found the buffer, deal with it */
267 			dprintk(DBGLVL_IRQ, "%s() bufnr: %d\n", __func__, bufnr);
268 
269 			if (crc_checking) {
270 				/* Throw a new checksum on the dma buffer */
271 				buf->crc = crc32(0, buf->cpu, buf->actual_size);
272 			}
273 
274 			if (guard_checking) {
275 				p = (u8 *)buf->cpu;
276 				if ((*(p + buf->actual_size + 0) != 0xff) ||
277 					(*(p + buf->actual_size + 1) != 0xff) ||
278 					(*(p + buf->actual_size + 2) != 0xff) ||
279 					(*(p + buf->actual_size + 3) != 0xff) ||
280 					(*(p + buf->actual_size + 0x10) != 0xff) ||
281 					(*(p + buf->actual_size + 0x11) != 0xff) ||
282 					(*(p + buf->actual_size + 0x12) != 0xff) ||
283 					(*(p + buf->actual_size + 0x13) != 0xff)) {
284 						printk(KERN_ERR "%s() buf %p guard buffer breach\n",
285 							__func__, buf);
286 #if 0
287 			print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 16, 1,
288 				       p + buf->actual_size - 32, 64, false);
289 #endif
290 				}
291 			}
292 
293 			if ((port->nr != SAA7164_PORT_VBI1) && (port->nr != SAA7164_PORT_VBI2)) {
294 				/* Validate the incoming buffer content */
295 				if (port->encoder_params.stream_type == V4L2_MPEG_STREAM_TYPE_MPEG2_TS)
296 					saa7164_ts_verifier(buf);
297 				else if (port->encoder_params.stream_type == V4L2_MPEG_STREAM_TYPE_MPEG2_PS)
298 					saa7164_pack_verifier(buf);
299 			}
300 
301 			/* find a free user buffer and clone to it */
302 			if (!list_empty(&port->list_buf_free.list)) {
303 
304 				/* Pull the first buffer from the used list */
305 				ubuf = list_first_entry(&port->list_buf_free.list,
306 					struct saa7164_user_buffer, list);
307 
308 				if (buf->actual_size <= ubuf->actual_size) {
309 
310 					memcpy(ubuf->data, buf->cpu, ubuf->actual_size);
311 
312 					if (crc_checking) {
313 						/* Throw a new checksum on the read buffer */
314 						ubuf->crc = crc32(0, ubuf->data, ubuf->actual_size);
315 					}
316 
317 					/* Requeue the buffer on the free list */
318 					ubuf->pos = 0;
319 
320 					list_move_tail(&ubuf->list,
321 						&port->list_buf_used.list);
322 
323 					/* Flag any userland waiters */
324 					wake_up_interruptible(&port->wait_read);
325 
326 				} else {
327 					printk(KERN_ERR "buf %p bufsize fails match\n", buf);
328 				}
329 
330 			} else
331 				printk(KERN_ERR "encirq no free buffers, increase param encoder_buffers\n");
332 
333 			/* Ensure offset into buffer remains 0, fill buffer
334 			 * with known bad data. We check for this data at a later point
335 			 * in time. */
336 			saa7164_buffer_zero_offsets(port, bufnr);
337 			memset(buf->cpu, 0xff, buf->pci_size);
338 			if (crc_checking) {
339 				/* Throw yet aanother new checksum on the dma buffer */
340 				buf->crc = crc32(0, buf->cpu, buf->actual_size);
341 			}
342 
343 			break;
344 		}
345 	}
346 	mutex_unlock(&port->dmaqueue_lock);
347 }
348 
349 static void saa7164_work_enchandler(struct work_struct *w)
350 {
351 	struct saa7164_port *port =
352 		container_of(w, struct saa7164_port, workenc);
353 	struct saa7164_dev *dev = port->dev;
354 
355 	u32 wp, mcb, rp, cnt = 0;
356 
357 	port->last_svc_msecs_diff = port->last_svc_msecs;
358 	port->last_svc_msecs = jiffies_to_msecs(jiffies);
359 
360 	port->last_svc_msecs_diff = port->last_svc_msecs -
361 		port->last_svc_msecs_diff;
362 
363 	saa7164_histogram_update(&port->svc_interval,
364 		port->last_svc_msecs_diff);
365 
366 	port->last_irq_svc_msecs_diff = port->last_svc_msecs -
367 		port->last_irq_msecs;
368 
369 	saa7164_histogram_update(&port->irq_svc_interval,
370 		port->last_irq_svc_msecs_diff);
371 
372 	dprintk(DBGLVL_IRQ,
373 		"%s() %Ldms elapsed irq->deferred %Ldms wp: %d rp: %d\n",
374 		__func__,
375 		port->last_svc_msecs_diff,
376 		port->last_irq_svc_msecs_diff,
377 		port->last_svc_wp,
378 		port->last_svc_rp
379 		);
380 
381 	/* Current write position */
382 	wp = saa7164_readl(port->bufcounter);
383 	if (wp > (port->hwcfg.buffercount - 1)) {
384 		printk(KERN_ERR "%s() illegal buf count %d\n", __func__, wp);
385 		return;
386 	}
387 
388 	/* Most current complete buffer */
389 	if (wp == 0)
390 		mcb = (port->hwcfg.buffercount - 1);
391 	else
392 		mcb = wp - 1;
393 
394 	while (1) {
395 		if (port->done_first_interrupt == 0) {
396 			port->done_first_interrupt++;
397 			rp = mcb;
398 		} else
399 			rp = (port->last_svc_rp + 1) % 8;
400 
401 		if (rp > (port->hwcfg.buffercount - 1)) {
402 			printk(KERN_ERR "%s() illegal rp count %d\n", __func__, rp);
403 			break;
404 		}
405 
406 		saa7164_work_enchandler_helper(port, rp);
407 		port->last_svc_rp = rp;
408 		cnt++;
409 
410 		if (rp == mcb)
411 			break;
412 	}
413 
414 	/* TODO: Convert this into a /proc/saa7164 style readable file */
415 	if (print_histogram == port->nr) {
416 		saa7164_histogram_print(port, &port->irq_interval);
417 		saa7164_histogram_print(port, &port->svc_interval);
418 		saa7164_histogram_print(port, &port->irq_svc_interval);
419 		saa7164_histogram_print(port, &port->read_interval);
420 		saa7164_histogram_print(port, &port->poll_interval);
421 		/* TODO: fix this to preserve any previous state */
422 		print_histogram = 64 + port->nr;
423 	}
424 }
425 
426 static void saa7164_work_vbihandler(struct work_struct *w)
427 {
428 	struct saa7164_port *port =
429 		container_of(w, struct saa7164_port, workenc);
430 	struct saa7164_dev *dev = port->dev;
431 
432 	u32 wp, mcb, rp, cnt = 0;
433 
434 	port->last_svc_msecs_diff = port->last_svc_msecs;
435 	port->last_svc_msecs = jiffies_to_msecs(jiffies);
436 	port->last_svc_msecs_diff = port->last_svc_msecs -
437 		port->last_svc_msecs_diff;
438 
439 	saa7164_histogram_update(&port->svc_interval,
440 		port->last_svc_msecs_diff);
441 
442 	port->last_irq_svc_msecs_diff = port->last_svc_msecs -
443 		port->last_irq_msecs;
444 
445 	saa7164_histogram_update(&port->irq_svc_interval,
446 		port->last_irq_svc_msecs_diff);
447 
448 	dprintk(DBGLVL_IRQ,
449 		"%s() %Ldms elapsed irq->deferred %Ldms wp: %d rp: %d\n",
450 		__func__,
451 		port->last_svc_msecs_diff,
452 		port->last_irq_svc_msecs_diff,
453 		port->last_svc_wp,
454 		port->last_svc_rp
455 		);
456 
457 	/* Current write position */
458 	wp = saa7164_readl(port->bufcounter);
459 	if (wp > (port->hwcfg.buffercount - 1)) {
460 		printk(KERN_ERR "%s() illegal buf count %d\n", __func__, wp);
461 		return;
462 	}
463 
464 	/* Most current complete buffer */
465 	if (wp == 0)
466 		mcb = (port->hwcfg.buffercount - 1);
467 	else
468 		mcb = wp - 1;
469 
470 	while (1) {
471 		if (port->done_first_interrupt == 0) {
472 			port->done_first_interrupt++;
473 			rp = mcb;
474 		} else
475 			rp = (port->last_svc_rp + 1) % 8;
476 
477 		if (rp > (port->hwcfg.buffercount - 1)) {
478 			printk(KERN_ERR "%s() illegal rp count %d\n", __func__, rp);
479 			break;
480 		}
481 
482 		saa7164_work_enchandler_helper(port, rp);
483 		port->last_svc_rp = rp;
484 		cnt++;
485 
486 		if (rp == mcb)
487 			break;
488 	}
489 
490 	/* TODO: Convert this into a /proc/saa7164 style readable file */
491 	if (print_histogram == port->nr) {
492 		saa7164_histogram_print(port, &port->irq_interval);
493 		saa7164_histogram_print(port, &port->svc_interval);
494 		saa7164_histogram_print(port, &port->irq_svc_interval);
495 		saa7164_histogram_print(port, &port->read_interval);
496 		saa7164_histogram_print(port, &port->poll_interval);
497 		/* TODO: fix this to preserve any previous state */
498 		print_histogram = 64 + port->nr;
499 	}
500 }
501 
502 static void saa7164_work_cmdhandler(struct work_struct *w)
503 {
504 	struct saa7164_dev *dev = container_of(w, struct saa7164_dev, workcmd);
505 
506 	/* Wake up any complete commands */
507 	saa7164_irq_dequeue(dev);
508 }
509 
510 static void saa7164_buffer_deliver(struct saa7164_buffer *buf)
511 {
512 	struct saa7164_port *port = buf->port;
513 
514 	/* Feed the transport payload into the kernel demux */
515 	dvb_dmx_swfilter_packets(&port->dvb.demux, (u8 *)buf->cpu,
516 		SAA7164_TS_NUMBER_OF_LINES);
517 
518 }
519 
520 static irqreturn_t saa7164_irq_vbi(struct saa7164_port *port)
521 {
522 	struct saa7164_dev *dev = port->dev;
523 
524 	/* Store old time */
525 	port->last_irq_msecs_diff = port->last_irq_msecs;
526 
527 	/* Collect new stats */
528 	port->last_irq_msecs = jiffies_to_msecs(jiffies);
529 
530 	/* Calculate stats */
531 	port->last_irq_msecs_diff = port->last_irq_msecs -
532 		port->last_irq_msecs_diff;
533 
534 	saa7164_histogram_update(&port->irq_interval,
535 		port->last_irq_msecs_diff);
536 
537 	dprintk(DBGLVL_IRQ, "%s() %Ldms elapsed\n", __func__,
538 		port->last_irq_msecs_diff);
539 
540 	/* Tis calls the vbi irq handler */
541 	schedule_work(&port->workenc);
542 	return 0;
543 }
544 
545 static irqreturn_t saa7164_irq_encoder(struct saa7164_port *port)
546 {
547 	struct saa7164_dev *dev = port->dev;
548 
549 	/* Store old time */
550 	port->last_irq_msecs_diff = port->last_irq_msecs;
551 
552 	/* Collect new stats */
553 	port->last_irq_msecs = jiffies_to_msecs(jiffies);
554 
555 	/* Calculate stats */
556 	port->last_irq_msecs_diff = port->last_irq_msecs -
557 		port->last_irq_msecs_diff;
558 
559 	saa7164_histogram_update(&port->irq_interval,
560 		port->last_irq_msecs_diff);
561 
562 	dprintk(DBGLVL_IRQ, "%s() %Ldms elapsed\n", __func__,
563 		port->last_irq_msecs_diff);
564 
565 	schedule_work(&port->workenc);
566 	return 0;
567 }
568 
569 static irqreturn_t saa7164_irq_ts(struct saa7164_port *port)
570 {
571 	struct saa7164_dev *dev = port->dev;
572 	struct saa7164_buffer *buf;
573 	struct list_head *c, *n;
574 	int wp, i = 0, rp;
575 
576 	/* Find the current write point from the hardware */
577 	wp = saa7164_readl(port->bufcounter);
578 	if (wp > (port->hwcfg.buffercount - 1))
579 		BUG();
580 
581 	/* Find the previous buffer to the current write point */
582 	if (wp == 0)
583 		rp = (port->hwcfg.buffercount - 1);
584 	else
585 		rp = wp - 1;
586 
587 	/* Lookup the WP in the buffer list */
588 	/* TODO: turn this into a worker thread */
589 	list_for_each_safe(c, n, &port->dmaqueue.list) {
590 		buf = list_entry(c, struct saa7164_buffer, list);
591 		if (i++ > port->hwcfg.buffercount)
592 			BUG();
593 
594 		if (buf->idx == rp) {
595 			/* Found the buffer, deal with it */
596 			dprintk(DBGLVL_IRQ, "%s() wp: %d processing: %d\n",
597 				__func__, wp, rp);
598 			saa7164_buffer_deliver(buf);
599 			break;
600 		}
601 
602 	}
603 	return 0;
604 }
605 
606 /* Primary IRQ handler and dispatch mechanism */
607 static irqreturn_t saa7164_irq(int irq, void *dev_id)
608 {
609 	struct saa7164_dev *dev = dev_id;
610 	struct saa7164_port *porta, *portb, *portc, *portd, *porte, *portf;
611 
612 	u32 intid, intstat[INT_SIZE/4];
613 	int i, handled = 0, bit;
614 
615 	if (dev == NULL) {
616 		printk(KERN_ERR "%s() No device specified\n", __func__);
617 		handled = 0;
618 		goto out;
619 	}
620 
621 	porta = &dev->ports[SAA7164_PORT_TS1];
622 	portb = &dev->ports[SAA7164_PORT_TS2];
623 	portc = &dev->ports[SAA7164_PORT_ENC1];
624 	portd = &dev->ports[SAA7164_PORT_ENC2];
625 	porte = &dev->ports[SAA7164_PORT_VBI1];
626 	portf = &dev->ports[SAA7164_PORT_VBI2];
627 
628 	/* Check that the hardware is accessible. If the status bytes are
629 	 * 0xFF then the device is not accessible, the the IRQ belongs
630 	 * to another driver.
631 	 * 4 x u32 interrupt registers.
632 	 */
633 	for (i = 0; i < INT_SIZE/4; i++) {
634 
635 		/* TODO: Convert into saa7164_readl() */
636 		/* Read the 4 hardware interrupt registers */
637 		intstat[i] = saa7164_readl(dev->int_status + (i * 4));
638 
639 		if (intstat[i])
640 			handled = 1;
641 	}
642 	if (handled == 0)
643 		goto out;
644 
645 	/* For each of the HW interrupt registers */
646 	for (i = 0; i < INT_SIZE/4; i++) {
647 
648 		if (intstat[i]) {
649 			/* Each function of the board has it's own interruptid.
650 			 * Find the function that triggered then call
651 			 * it's handler.
652 			 */
653 			for (bit = 0; bit < 32; bit++) {
654 
655 				if (((intstat[i] >> bit) & 0x00000001) == 0)
656 					continue;
657 
658 				/* Calculate the interrupt id (0x00 to 0x7f) */
659 
660 				intid = (i * 32) + bit;
661 				if (intid == dev->intfdesc.bInterruptId) {
662 					/* A response to an cmd/api call */
663 					schedule_work(&dev->workcmd);
664 				} else if (intid == porta->hwcfg.interruptid) {
665 
666 					/* Transport path 1 */
667 					saa7164_irq_ts(porta);
668 
669 				} else if (intid == portb->hwcfg.interruptid) {
670 
671 					/* Transport path 2 */
672 					saa7164_irq_ts(portb);
673 
674 				} else if (intid == portc->hwcfg.interruptid) {
675 
676 					/* Encoder path 1 */
677 					saa7164_irq_encoder(portc);
678 
679 				} else if (intid == portd->hwcfg.interruptid) {
680 
681 					/* Encoder path 2 */
682 					saa7164_irq_encoder(portd);
683 
684 				} else if (intid == porte->hwcfg.interruptid) {
685 
686 					/* VBI path 1 */
687 					saa7164_irq_vbi(porte);
688 
689 				} else if (intid == portf->hwcfg.interruptid) {
690 
691 					/* VBI path 2 */
692 					saa7164_irq_vbi(portf);
693 
694 				} else {
695 					/* Find the function */
696 					dprintk(DBGLVL_IRQ,
697 						"%s() unhandled interrupt reg 0x%x bit 0x%x intid = 0x%x\n",
698 						__func__, i, bit, intid);
699 				}
700 			}
701 
702 			/* Ack it */
703 			saa7164_writel(dev->int_ack + (i * 4), intstat[i]);
704 
705 		}
706 	}
707 out:
708 	return IRQ_RETVAL(handled);
709 }
710 
711 void saa7164_getfirmwarestatus(struct saa7164_dev *dev)
712 {
713 	struct saa7164_fw_status *s = &dev->fw_status;
714 
715 	dev->fw_status.status = saa7164_readl(SAA_DEVICE_SYSINIT_STATUS);
716 	dev->fw_status.mode = saa7164_readl(SAA_DEVICE_SYSINIT_MODE);
717 	dev->fw_status.spec = saa7164_readl(SAA_DEVICE_SYSINIT_SPEC);
718 	dev->fw_status.inst = saa7164_readl(SAA_DEVICE_SYSINIT_INST);
719 	dev->fw_status.cpuload = saa7164_readl(SAA_DEVICE_SYSINIT_CPULOAD);
720 	dev->fw_status.remainheap =
721 		saa7164_readl(SAA_DEVICE_SYSINIT_REMAINHEAP);
722 
723 	dprintk(1, "Firmware status:\n");
724 	dprintk(1, " .status     = 0x%08x\n", s->status);
725 	dprintk(1, " .mode       = 0x%08x\n", s->mode);
726 	dprintk(1, " .spec       = 0x%08x\n", s->spec);
727 	dprintk(1, " .inst       = 0x%08x\n", s->inst);
728 	dprintk(1, " .cpuload    = 0x%08x\n", s->cpuload);
729 	dprintk(1, " .remainheap = 0x%08x\n", s->remainheap);
730 }
731 
732 u32 saa7164_getcurrentfirmwareversion(struct saa7164_dev *dev)
733 {
734 	u32 reg;
735 
736 	reg = saa7164_readl(SAA_DEVICE_VERSION);
737 	dprintk(1, "Device running firmware version %d.%d.%d.%d (0x%x)\n",
738 		(reg & 0x0000fc00) >> 10,
739 		(reg & 0x000003e0) >> 5,
740 		(reg & 0x0000001f),
741 		(reg & 0xffff0000) >> 16,
742 		reg);
743 
744 	return reg;
745 }
746 
747 /* TODO: Debugging func, remove */
748 void saa7164_dumpregs(struct saa7164_dev *dev, u32 addr)
749 {
750 	int i;
751 
752 	dprintk(1, "--------------------> 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n");
753 
754 	for (i = 0; i < 0x100; i += 16)
755 		dprintk(1, "region0[0x%08x] = %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
756 			i,
757 			(u8)saa7164_readb(addr + i + 0),
758 			(u8)saa7164_readb(addr + i + 1),
759 			(u8)saa7164_readb(addr + i + 2),
760 			(u8)saa7164_readb(addr + i + 3),
761 			(u8)saa7164_readb(addr + i + 4),
762 			(u8)saa7164_readb(addr + i + 5),
763 			(u8)saa7164_readb(addr + i + 6),
764 			(u8)saa7164_readb(addr + i + 7),
765 			(u8)saa7164_readb(addr + i + 8),
766 			(u8)saa7164_readb(addr + i + 9),
767 			(u8)saa7164_readb(addr + i + 10),
768 			(u8)saa7164_readb(addr + i + 11),
769 			(u8)saa7164_readb(addr + i + 12),
770 			(u8)saa7164_readb(addr + i + 13),
771 			(u8)saa7164_readb(addr + i + 14),
772 			(u8)saa7164_readb(addr + i + 15)
773 			);
774 }
775 
776 static void saa7164_dump_hwdesc(struct saa7164_dev *dev)
777 {
778 	dprintk(1, "@0x%p hwdesc sizeof(struct tmComResHWDescr) = %d bytes\n",
779 		&dev->hwdesc, (u32)sizeof(struct tmComResHWDescr));
780 
781 	dprintk(1, " .bLength = 0x%x\n", dev->hwdesc.bLength);
782 	dprintk(1, " .bDescriptorType = 0x%x\n", dev->hwdesc.bDescriptorType);
783 	dprintk(1, " .bDescriptorSubtype = 0x%x\n",
784 		dev->hwdesc.bDescriptorSubtype);
785 
786 	dprintk(1, " .bcdSpecVersion = 0x%x\n", dev->hwdesc.bcdSpecVersion);
787 	dprintk(1, " .dwClockFrequency = 0x%x\n", dev->hwdesc.dwClockFrequency);
788 	dprintk(1, " .dwClockUpdateRes = 0x%x\n", dev->hwdesc.dwClockUpdateRes);
789 	dprintk(1, " .bCapabilities = 0x%x\n", dev->hwdesc.bCapabilities);
790 	dprintk(1, " .dwDeviceRegistersLocation = 0x%x\n",
791 		dev->hwdesc.dwDeviceRegistersLocation);
792 
793 	dprintk(1, " .dwHostMemoryRegion = 0x%x\n",
794 		dev->hwdesc.dwHostMemoryRegion);
795 
796 	dprintk(1, " .dwHostMemoryRegionSize = 0x%x\n",
797 		dev->hwdesc.dwHostMemoryRegionSize);
798 
799 	dprintk(1, " .dwHostHibernatMemRegion = 0x%x\n",
800 		dev->hwdesc.dwHostHibernatMemRegion);
801 
802 	dprintk(1, " .dwHostHibernatMemRegionSize = 0x%x\n",
803 		dev->hwdesc.dwHostHibernatMemRegionSize);
804 }
805 
806 static void saa7164_dump_intfdesc(struct saa7164_dev *dev)
807 {
808 	dprintk(1, "@0x%p intfdesc sizeof(struct tmComResInterfaceDescr) = %d bytes\n",
809 		&dev->intfdesc, (u32)sizeof(struct tmComResInterfaceDescr));
810 
811 	dprintk(1, " .bLength = 0x%x\n", dev->intfdesc.bLength);
812 	dprintk(1, " .bDescriptorType = 0x%x\n", dev->intfdesc.bDescriptorType);
813 	dprintk(1, " .bDescriptorSubtype = 0x%x\n",
814 		dev->intfdesc.bDescriptorSubtype);
815 
816 	dprintk(1, " .bFlags = 0x%x\n", dev->intfdesc.bFlags);
817 	dprintk(1, " .bInterfaceType = 0x%x\n", dev->intfdesc.bInterfaceType);
818 	dprintk(1, " .bInterfaceId = 0x%x\n", dev->intfdesc.bInterfaceId);
819 	dprintk(1, " .bBaseInterface = 0x%x\n", dev->intfdesc.bBaseInterface);
820 	dprintk(1, " .bInterruptId = 0x%x\n", dev->intfdesc.bInterruptId);
821 	dprintk(1, " .bDebugInterruptId = 0x%x\n",
822 		dev->intfdesc.bDebugInterruptId);
823 
824 	dprintk(1, " .BARLocation = 0x%x\n", dev->intfdesc.BARLocation);
825 }
826 
827 static void saa7164_dump_busdesc(struct saa7164_dev *dev)
828 {
829 	dprintk(1, "@0x%p busdesc sizeof(struct tmComResBusDescr) = %d bytes\n",
830 		&dev->busdesc, (u32)sizeof(struct tmComResBusDescr));
831 
832 	dprintk(1, " .CommandRing   = 0x%016Lx\n", dev->busdesc.CommandRing);
833 	dprintk(1, " .ResponseRing  = 0x%016Lx\n", dev->busdesc.ResponseRing);
834 	dprintk(1, " .CommandWrite  = 0x%x\n", dev->busdesc.CommandWrite);
835 	dprintk(1, " .CommandRead   = 0x%x\n", dev->busdesc.CommandRead);
836 	dprintk(1, " .ResponseWrite = 0x%x\n", dev->busdesc.ResponseWrite);
837 	dprintk(1, " .ResponseRead  = 0x%x\n", dev->busdesc.ResponseRead);
838 }
839 
840 /* Much of the hardware configuration and PCI registers are configured
841  * dynamically depending on firmware. We have to cache some initial
842  * structures then use these to locate other important structures
843  * from PCI space.
844  */
845 static void saa7164_get_descriptors(struct saa7164_dev *dev)
846 {
847 	memcpy_fromio(&dev->hwdesc, dev->bmmio, sizeof(struct tmComResHWDescr));
848 	memcpy_fromio(&dev->intfdesc, dev->bmmio + sizeof(struct tmComResHWDescr),
849 		sizeof(struct tmComResInterfaceDescr));
850 	memcpy_fromio(&dev->busdesc, dev->bmmio + dev->intfdesc.BARLocation,
851 		sizeof(struct tmComResBusDescr));
852 
853 	if (dev->hwdesc.bLength != sizeof(struct tmComResHWDescr)) {
854 		printk(KERN_ERR "Structure struct tmComResHWDescr is mangled\n");
855 		printk(KERN_ERR "Need %x got %d\n", dev->hwdesc.bLength,
856 			(u32)sizeof(struct tmComResHWDescr));
857 	} else
858 		saa7164_dump_hwdesc(dev);
859 
860 	if (dev->intfdesc.bLength != sizeof(struct tmComResInterfaceDescr)) {
861 		printk(KERN_ERR "struct struct tmComResInterfaceDescr is mangled\n");
862 		printk(KERN_ERR "Need %x got %d\n", dev->intfdesc.bLength,
863 			(u32)sizeof(struct tmComResInterfaceDescr));
864 	} else
865 		saa7164_dump_intfdesc(dev);
866 
867 	saa7164_dump_busdesc(dev);
868 }
869 
870 static int saa7164_pci_quirks(struct saa7164_dev *dev)
871 {
872 	return 0;
873 }
874 
875 static int get_resources(struct saa7164_dev *dev)
876 {
877 	if (request_mem_region(pci_resource_start(dev->pci, 0),
878 		pci_resource_len(dev->pci, 0), dev->name)) {
879 
880 		if (request_mem_region(pci_resource_start(dev->pci, 2),
881 			pci_resource_len(dev->pci, 2), dev->name))
882 			return 0;
883 	}
884 
885 	printk(KERN_ERR "%s: can't get MMIO memory @ 0x%llx or 0x%llx\n",
886 		dev->name,
887 		(u64)pci_resource_start(dev->pci, 0),
888 		(u64)pci_resource_start(dev->pci, 2));
889 
890 	return -EBUSY;
891 }
892 
893 static int saa7164_port_init(struct saa7164_dev *dev, int portnr)
894 {
895 	struct saa7164_port *port = NULL;
896 
897 	if ((portnr < 0) || (portnr >= SAA7164_MAX_PORTS))
898 		BUG();
899 
900 	port = &dev->ports[portnr];
901 
902 	port->dev = dev;
903 	port->nr = portnr;
904 
905 	if ((portnr == SAA7164_PORT_TS1) || (portnr == SAA7164_PORT_TS2))
906 		port->type = SAA7164_MPEG_DVB;
907 	else
908 	if ((portnr == SAA7164_PORT_ENC1) || (portnr == SAA7164_PORT_ENC2)) {
909 		port->type = SAA7164_MPEG_ENCODER;
910 
911 		/* We need a deferred interrupt handler for cmd handling */
912 		INIT_WORK(&port->workenc, saa7164_work_enchandler);
913 	} else if ((portnr == SAA7164_PORT_VBI1) || (portnr == SAA7164_PORT_VBI2)) {
914 		port->type = SAA7164_MPEG_VBI;
915 
916 		/* We need a deferred interrupt handler for cmd handling */
917 		INIT_WORK(&port->workenc, saa7164_work_vbihandler);
918 	} else
919 		BUG();
920 
921 	/* Init all the critical resources */
922 	mutex_init(&port->dvb.lock);
923 	INIT_LIST_HEAD(&port->dmaqueue.list);
924 	mutex_init(&port->dmaqueue_lock);
925 
926 	INIT_LIST_HEAD(&port->list_buf_used.list);
927 	INIT_LIST_HEAD(&port->list_buf_free.list);
928 	init_waitqueue_head(&port->wait_read);
929 
930 
931 	saa7164_histogram_reset(&port->irq_interval, "irq intervals");
932 	saa7164_histogram_reset(&port->svc_interval, "deferred intervals");
933 	saa7164_histogram_reset(&port->irq_svc_interval,
934 		"irq to deferred intervals");
935 	saa7164_histogram_reset(&port->read_interval,
936 		"encoder/vbi read() intervals");
937 	saa7164_histogram_reset(&port->poll_interval,
938 		"encoder/vbi poll() intervals");
939 
940 	return 0;
941 }
942 
943 static int saa7164_dev_setup(struct saa7164_dev *dev)
944 {
945 	int i;
946 
947 	mutex_init(&dev->lock);
948 	atomic_inc(&dev->refcount);
949 	dev->nr = saa7164_devcount++;
950 
951 	snprintf(dev->name, sizeof(dev->name), "saa7164[%d]", dev->nr);
952 
953 	mutex_lock(&devlist);
954 	list_add_tail(&dev->devlist, &saa7164_devlist);
955 	mutex_unlock(&devlist);
956 
957 	/* board config */
958 	dev->board = UNSET;
959 	if (card[dev->nr] < saa7164_bcount)
960 		dev->board = card[dev->nr];
961 
962 	for (i = 0; UNSET == dev->board  &&  i < saa7164_idcount; i++)
963 		if (dev->pci->subsystem_vendor == saa7164_subids[i].subvendor &&
964 			dev->pci->subsystem_device ==
965 				saa7164_subids[i].subdevice)
966 				dev->board = saa7164_subids[i].card;
967 
968 	if (UNSET == dev->board) {
969 		dev->board = SAA7164_BOARD_UNKNOWN;
970 		saa7164_card_list(dev);
971 	}
972 
973 	dev->pci_bus  = dev->pci->bus->number;
974 	dev->pci_slot = PCI_SLOT(dev->pci->devfn);
975 
976 	/* I2C Defaults / setup */
977 	dev->i2c_bus[0].dev = dev;
978 	dev->i2c_bus[0].nr = 0;
979 	dev->i2c_bus[1].dev = dev;
980 	dev->i2c_bus[1].nr = 1;
981 	dev->i2c_bus[2].dev = dev;
982 	dev->i2c_bus[2].nr = 2;
983 
984 	/* Transport + Encoder ports 1, 2, 3, 4 - Defaults / setup */
985 	saa7164_port_init(dev, SAA7164_PORT_TS1);
986 	saa7164_port_init(dev, SAA7164_PORT_TS2);
987 	saa7164_port_init(dev, SAA7164_PORT_ENC1);
988 	saa7164_port_init(dev, SAA7164_PORT_ENC2);
989 	saa7164_port_init(dev, SAA7164_PORT_VBI1);
990 	saa7164_port_init(dev, SAA7164_PORT_VBI2);
991 
992 	if (get_resources(dev) < 0) {
993 		printk(KERN_ERR "CORE %s No more PCIe resources for subsystem: %04x:%04x\n",
994 		       dev->name, dev->pci->subsystem_vendor,
995 		       dev->pci->subsystem_device);
996 
997 		saa7164_devcount--;
998 		return -ENODEV;
999 	}
1000 
1001 	/* PCI/e allocations */
1002 	dev->lmmio = ioremap(pci_resource_start(dev->pci, 0),
1003 			     pci_resource_len(dev->pci, 0));
1004 
1005 	dev->lmmio2 = ioremap(pci_resource_start(dev->pci, 2),
1006 			     pci_resource_len(dev->pci, 2));
1007 
1008 	dev->bmmio = (u8 __iomem *)dev->lmmio;
1009 	dev->bmmio2 = (u8 __iomem *)dev->lmmio2;
1010 
1011 	/* Interrupt and ack register locations offset of bmmio */
1012 	dev->int_status = 0x183000 + 0xf80;
1013 	dev->int_ack = 0x183000 + 0xf90;
1014 
1015 	printk(KERN_INFO
1016 		"CORE %s: subsystem: %04x:%04x, board: %s [card=%d,%s]\n",
1017 	       dev->name, dev->pci->subsystem_vendor,
1018 	       dev->pci->subsystem_device, saa7164_boards[dev->board].name,
1019 	       dev->board, card[dev->nr] == dev->board ?
1020 	       "insmod option" : "autodetected");
1021 
1022 	saa7164_pci_quirks(dev);
1023 
1024 	return 0;
1025 }
1026 
1027 static void saa7164_dev_unregister(struct saa7164_dev *dev)
1028 {
1029 	dprintk(1, "%s()\n", __func__);
1030 
1031 	release_mem_region(pci_resource_start(dev->pci, 0),
1032 		pci_resource_len(dev->pci, 0));
1033 
1034 	release_mem_region(pci_resource_start(dev->pci, 2),
1035 		pci_resource_len(dev->pci, 2));
1036 
1037 	if (!atomic_dec_and_test(&dev->refcount))
1038 		return;
1039 
1040 	iounmap(dev->lmmio);
1041 	iounmap(dev->lmmio2);
1042 
1043 	return;
1044 }
1045 
1046 #ifdef CONFIG_DEBUG_FS
1047 static void *saa7164_seq_start(struct seq_file *s, loff_t *pos)
1048 {
1049 	struct saa7164_dev *dev;
1050 	loff_t index = *pos;
1051 
1052 	mutex_lock(&devlist);
1053 	list_for_each_entry(dev, &saa7164_devlist, devlist) {
1054 		if (index-- == 0) {
1055 			mutex_unlock(&devlist);
1056 			return dev;
1057 		}
1058 	}
1059 	mutex_unlock(&devlist);
1060 
1061 	return NULL;
1062 }
1063 
1064 static void *saa7164_seq_next(struct seq_file *s, void *v, loff_t *pos)
1065 {
1066 	struct saa7164_dev *dev = v;
1067 	void *ret;
1068 
1069 	mutex_lock(&devlist);
1070 	if (list_is_last(&dev->devlist, &saa7164_devlist))
1071 		ret = NULL;
1072 	else
1073 		ret = list_next_entry(dev, devlist);
1074 	mutex_unlock(&devlist);
1075 
1076 	++*pos;
1077 
1078 	return ret;
1079 }
1080 
1081 static void saa7164_seq_stop(struct seq_file *s, void *v)
1082 {
1083 }
1084 
1085 static int saa7164_seq_show(struct seq_file *m, void *v)
1086 {
1087 	struct saa7164_dev *dev = v;
1088 	struct tmComResBusInfo *b;
1089 	int i, c;
1090 
1091 	seq_printf(m, "%s = %p\n", dev->name, dev);
1092 
1093 	/* Lock the bus from any other access */
1094 	b = &dev->bus;
1095 	mutex_lock(&b->lock);
1096 
1097 	seq_printf(m, " .m_pdwSetWritePos = 0x%x (0x%08x)\n",
1098 		   b->m_dwSetReadPos, saa7164_readl(b->m_dwSetReadPos));
1099 
1100 	seq_printf(m, " .m_pdwSetReadPos  = 0x%x (0x%08x)\n",
1101 		   b->m_dwSetWritePos, saa7164_readl(b->m_dwSetWritePos));
1102 
1103 	seq_printf(m, " .m_pdwGetWritePos = 0x%x (0x%08x)\n",
1104 		   b->m_dwGetReadPos, saa7164_readl(b->m_dwGetReadPos));
1105 
1106 	seq_printf(m, " .m_pdwGetReadPos  = 0x%x (0x%08x)\n",
1107 		   b->m_dwGetWritePos, saa7164_readl(b->m_dwGetWritePos));
1108 	c = 0;
1109 	seq_puts(m, "\n  Set Ring:\n");
1110 	seq_puts(m, "\n addr  00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n");
1111 	for (i = 0; i < b->m_dwSizeSetRing; i++) {
1112 		if (c == 0)
1113 			seq_printf(m, " %04x:", i);
1114 
1115 		seq_printf(m, " %02x", readb(b->m_pdwSetRing + i));
1116 
1117 		if (++c == 16) {
1118 			seq_puts(m, "\n");
1119 			c = 0;
1120 		}
1121 	}
1122 
1123 	c = 0;
1124 	seq_puts(m, "\n  Get Ring:\n");
1125 	seq_puts(m, "\n addr  00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n");
1126 	for (i = 0; i < b->m_dwSizeGetRing; i++) {
1127 		if (c == 0)
1128 			seq_printf(m, " %04x:", i);
1129 
1130 		seq_printf(m, " %02x", readb(b->m_pdwGetRing + i));
1131 
1132 		if (++c == 16) {
1133 			seq_puts(m, "\n");
1134 			c = 0;
1135 		}
1136 	}
1137 
1138 	mutex_unlock(&b->lock);
1139 
1140 	return 0;
1141 }
1142 
1143 static const struct seq_operations saa7164_seq_ops = {
1144 	.start = saa7164_seq_start,
1145 	.next = saa7164_seq_next,
1146 	.stop = saa7164_seq_stop,
1147 	.show = saa7164_seq_show,
1148 };
1149 
1150 static int saa7164_open(struct inode *inode, struct file *file)
1151 {
1152 	return seq_open(file, &saa7164_seq_ops);
1153 }
1154 
1155 static const struct file_operations saa7164_operations = {
1156 	.owner          = THIS_MODULE,
1157 	.open           = saa7164_open,
1158 	.read           = seq_read,
1159 	.llseek         = seq_lseek,
1160 	.release        = seq_release,
1161 };
1162 
1163 static struct dentry *saa7614_dentry;
1164 
1165 static void __init saa7164_debugfs_create(void)
1166 {
1167 	saa7614_dentry = debugfs_create_file("saa7164", 0444, NULL, NULL,
1168 					     &saa7164_operations);
1169 }
1170 
1171 static void __exit saa7164_debugfs_remove(void)
1172 {
1173 	debugfs_remove(saa7614_dentry);
1174 }
1175 #else
1176 static void saa7164_debugfs_create(void) { }
1177 static void saa7164_debugfs_remove(void) { }
1178 #endif
1179 
1180 static int saa7164_thread_function(void *data)
1181 {
1182 	struct saa7164_dev *dev = data;
1183 	struct tmFwInfoStruct fwinfo;
1184 	u64 last_poll_time = 0;
1185 
1186 	dprintk(DBGLVL_THR, "thread started\n");
1187 
1188 	set_freezable();
1189 
1190 	while (1) {
1191 		msleep_interruptible(100);
1192 		if (kthread_should_stop())
1193 			break;
1194 		try_to_freeze();
1195 
1196 		dprintk(DBGLVL_THR, "thread running\n");
1197 
1198 		/* Dump the firmware debug message to console */
1199 		/* Polling this costs us 1-2% of the arm CPU */
1200 		/* convert this into a respnde to interrupt 0x7a */
1201 		saa7164_api_collect_debug(dev);
1202 
1203 		/* Monitor CPU load every 1 second */
1204 		if ((last_poll_time + 1000 /* ms */) < jiffies_to_msecs(jiffies)) {
1205 			saa7164_api_get_load_info(dev, &fwinfo);
1206 			last_poll_time = jiffies_to_msecs(jiffies);
1207 		}
1208 
1209 	}
1210 
1211 	dprintk(DBGLVL_THR, "thread exiting\n");
1212 	return 0;
1213 }
1214 
1215 static bool saa7164_enable_msi(struct pci_dev *pci_dev, struct saa7164_dev *dev)
1216 {
1217 	int err;
1218 
1219 	if (!enable_msi) {
1220 		printk(KERN_WARNING "%s() MSI disabled by module parameter 'enable_msi'"
1221 		       , __func__);
1222 		return false;
1223 	}
1224 
1225 	err = pci_enable_msi(pci_dev);
1226 
1227 	if (err) {
1228 		printk(KERN_ERR "%s() Failed to enable MSI interrupt. Falling back to a shared IRQ\n",
1229 		       __func__);
1230 		return false;
1231 	}
1232 
1233 	/* no error - so request an msi interrupt */
1234 	err = request_irq(pci_dev->irq, saa7164_irq, 0,
1235 						dev->name, dev);
1236 
1237 	if (err) {
1238 		/* fall back to legacy interrupt */
1239 		printk(KERN_ERR "%s() Failed to get an MSI interrupt. Falling back to a shared IRQ\n",
1240 		       __func__);
1241 		pci_disable_msi(pci_dev);
1242 		return false;
1243 	}
1244 
1245 	return true;
1246 }
1247 
1248 static int saa7164_initdev(struct pci_dev *pci_dev,
1249 			   const struct pci_device_id *pci_id)
1250 {
1251 	struct saa7164_dev *dev;
1252 	int err, i;
1253 	u32 version;
1254 
1255 	dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1256 	if (NULL == dev)
1257 		return -ENOMEM;
1258 
1259 	err = v4l2_device_register(&pci_dev->dev, &dev->v4l2_dev);
1260 	if (err < 0) {
1261 		dev_err(&pci_dev->dev, "v4l2_device_register failed\n");
1262 		goto fail_free;
1263 	}
1264 
1265 	/* pci init */
1266 	dev->pci = pci_dev;
1267 	if (pci_enable_device(pci_dev)) {
1268 		err = -EIO;
1269 		goto fail_free;
1270 	}
1271 
1272 	if (saa7164_dev_setup(dev) < 0) {
1273 		err = -EINVAL;
1274 		goto fail_free;
1275 	}
1276 
1277 	/* print pci info */
1278 	dev->pci_rev = pci_dev->revision;
1279 	pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER,  &dev->pci_lat);
1280 	printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, latency: %d, mmio: 0x%llx\n",
1281 	       dev->name,
1282 	       pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
1283 	       dev->pci_lat,
1284 		(unsigned long long)pci_resource_start(pci_dev, 0));
1285 
1286 	pci_set_master(pci_dev);
1287 	/* TODO */
1288 	err = pci_set_dma_mask(pci_dev, 0xffffffff);
1289 	if (err) {
1290 		printk("%s/0: Oops: no 32bit PCI DMA ???\n", dev->name);
1291 		goto fail_irq;
1292 	}
1293 
1294 	/* irq bit */
1295 	if (saa7164_enable_msi(pci_dev, dev)) {
1296 		dev->msi = true;
1297 	} else {
1298 		/* if we have an error (i.e. we don't have an interrupt)
1299 			 or msi is not enabled - fallback to shared interrupt */
1300 
1301 		err = request_irq(pci_dev->irq, saa7164_irq,
1302 				IRQF_SHARED, dev->name, dev);
1303 
1304 		if (err < 0) {
1305 			printk(KERN_ERR "%s: can't get IRQ %d\n", dev->name,
1306 			       pci_dev->irq);
1307 			err = -EIO;
1308 			goto fail_irq;
1309 		}
1310 	}
1311 
1312 	pci_set_drvdata(pci_dev, dev);
1313 
1314 	/* Init the internal command list */
1315 	for (i = 0; i < SAA_CMD_MAX_MSG_UNITS; i++) {
1316 		dev->cmds[i].seqno = i;
1317 		dev->cmds[i].inuse = 0;
1318 		mutex_init(&dev->cmds[i].lock);
1319 		init_waitqueue_head(&dev->cmds[i].wait);
1320 	}
1321 
1322 	/* We need a deferred interrupt handler for cmd handling */
1323 	INIT_WORK(&dev->workcmd, saa7164_work_cmdhandler);
1324 
1325 	/* Only load the firmware if we know the board */
1326 	if (dev->board != SAA7164_BOARD_UNKNOWN) {
1327 
1328 		err = saa7164_downloadfirmware(dev);
1329 		if (err < 0) {
1330 			printk(KERN_ERR
1331 				"Failed to boot firmware, no features registered\n");
1332 			goto fail_fw;
1333 		}
1334 
1335 		saa7164_get_descriptors(dev);
1336 		saa7164_dumpregs(dev, 0);
1337 		saa7164_getcurrentfirmwareversion(dev);
1338 		saa7164_getfirmwarestatus(dev);
1339 		err = saa7164_bus_setup(dev);
1340 		if (err < 0)
1341 			printk(KERN_ERR
1342 				"Failed to setup the bus, will continue\n");
1343 		saa7164_bus_dump(dev);
1344 
1345 		/* Ping the running firmware via the command bus and get the
1346 		 * firmware version, this checks the bus is running OK.
1347 		 */
1348 		version = 0;
1349 		if (saa7164_api_get_fw_version(dev, &version) == SAA_OK)
1350 			dprintk(1, "Bus is operating correctly using version %d.%d.%d.%d (0x%x)\n",
1351 				(version & 0x0000fc00) >> 10,
1352 				(version & 0x000003e0) >> 5,
1353 				(version & 0x0000001f),
1354 				(version & 0xffff0000) >> 16,
1355 				version);
1356 		else
1357 			printk(KERN_ERR
1358 				"Failed to communicate with the firmware\n");
1359 
1360 		/* Bring up the I2C buses */
1361 		saa7164_i2c_register(&dev->i2c_bus[0]);
1362 		saa7164_i2c_register(&dev->i2c_bus[1]);
1363 		saa7164_i2c_register(&dev->i2c_bus[2]);
1364 		saa7164_gpio_setup(dev);
1365 		saa7164_card_setup(dev);
1366 
1367 		/* Parse the dynamic device configuration, find various
1368 		 * media endpoints (MPEG, WMV, PS, TS) and cache their
1369 		 * configuration details into the driver, so we can
1370 		 * reference them later during simething_register() func,
1371 		 * interrupt handlers, deferred work handlers etc.
1372 		 */
1373 		saa7164_api_enum_subdevs(dev);
1374 
1375 		/* Begin to create the video sub-systems and register funcs */
1376 		if (saa7164_boards[dev->board].porta == SAA7164_MPEG_DVB) {
1377 			if (saa7164_dvb_register(&dev->ports[SAA7164_PORT_TS1]) < 0) {
1378 				printk(KERN_ERR "%s() Failed to register dvb adapters on porta\n",
1379 					__func__);
1380 			}
1381 		}
1382 
1383 		if (saa7164_boards[dev->board].portb == SAA7164_MPEG_DVB) {
1384 			if (saa7164_dvb_register(&dev->ports[SAA7164_PORT_TS2]) < 0) {
1385 				printk(KERN_ERR"%s() Failed to register dvb adapters on portb\n",
1386 					__func__);
1387 			}
1388 		}
1389 
1390 		if (saa7164_boards[dev->board].portc == SAA7164_MPEG_ENCODER) {
1391 			if (saa7164_encoder_register(&dev->ports[SAA7164_PORT_ENC1]) < 0) {
1392 				printk(KERN_ERR"%s() Failed to register mpeg encoder\n",
1393 				       __func__);
1394 			}
1395 		}
1396 
1397 		if (saa7164_boards[dev->board].portd == SAA7164_MPEG_ENCODER) {
1398 			if (saa7164_encoder_register(&dev->ports[SAA7164_PORT_ENC2]) < 0) {
1399 				printk(KERN_ERR"%s() Failed to register mpeg encoder\n",
1400 				       __func__);
1401 			}
1402 		}
1403 
1404 		if (saa7164_boards[dev->board].porte == SAA7164_MPEG_VBI) {
1405 			if (saa7164_vbi_register(&dev->ports[SAA7164_PORT_VBI1]) < 0) {
1406 				printk(KERN_ERR"%s() Failed to register vbi device\n",
1407 				       __func__);
1408 			}
1409 		}
1410 
1411 		if (saa7164_boards[dev->board].portf == SAA7164_MPEG_VBI) {
1412 			if (saa7164_vbi_register(&dev->ports[SAA7164_PORT_VBI2]) < 0) {
1413 				printk(KERN_ERR"%s() Failed to register vbi device\n",
1414 				       __func__);
1415 			}
1416 		}
1417 		saa7164_api_set_debug(dev, fw_debug);
1418 
1419 		if (fw_debug) {
1420 			dev->kthread = kthread_run(saa7164_thread_function, dev,
1421 				"saa7164 debug");
1422 			if (IS_ERR(dev->kthread)) {
1423 				dev->kthread = NULL;
1424 				printk(KERN_ERR "%s() Failed to create debug kernel thread\n",
1425 				       __func__);
1426 			}
1427 		}
1428 
1429 	} /* != BOARD_UNKNOWN */
1430 	else
1431 		printk(KERN_ERR "%s() Unsupported board detected, registering without firmware\n",
1432 		       __func__);
1433 
1434 	dprintk(1, "%s() parameter debug = %d\n", __func__, saa_debug);
1435 	dprintk(1, "%s() parameter waitsecs = %d\n", __func__, waitsecs);
1436 
1437 fail_fw:
1438 	return 0;
1439 
1440 fail_irq:
1441 	saa7164_dev_unregister(dev);
1442 fail_free:
1443 	v4l2_device_unregister(&dev->v4l2_dev);
1444 	kfree(dev);
1445 	return err;
1446 }
1447 
1448 static void saa7164_shutdown(struct saa7164_dev *dev)
1449 {
1450 	dprintk(1, "%s()\n", __func__);
1451 }
1452 
1453 static void saa7164_finidev(struct pci_dev *pci_dev)
1454 {
1455 	struct saa7164_dev *dev = pci_get_drvdata(pci_dev);
1456 
1457 	if (dev->board != SAA7164_BOARD_UNKNOWN) {
1458 		if (fw_debug && dev->kthread) {
1459 			kthread_stop(dev->kthread);
1460 			dev->kthread = NULL;
1461 		}
1462 		if (dev->firmwareloaded)
1463 			saa7164_api_set_debug(dev, 0x00);
1464 	}
1465 
1466 	saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],
1467 		&dev->ports[SAA7164_PORT_ENC1].irq_interval);
1468 	saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],
1469 		&dev->ports[SAA7164_PORT_ENC1].svc_interval);
1470 	saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],
1471 		&dev->ports[SAA7164_PORT_ENC1].irq_svc_interval);
1472 	saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],
1473 		&dev->ports[SAA7164_PORT_ENC1].read_interval);
1474 	saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],
1475 		&dev->ports[SAA7164_PORT_ENC1].poll_interval);
1476 	saa7164_histogram_print(&dev->ports[SAA7164_PORT_VBI1],
1477 		&dev->ports[SAA7164_PORT_VBI1].read_interval);
1478 	saa7164_histogram_print(&dev->ports[SAA7164_PORT_VBI2],
1479 		&dev->ports[SAA7164_PORT_VBI2].poll_interval);
1480 
1481 	saa7164_shutdown(dev);
1482 
1483 	if (saa7164_boards[dev->board].porta == SAA7164_MPEG_DVB)
1484 		saa7164_dvb_unregister(&dev->ports[SAA7164_PORT_TS1]);
1485 
1486 	if (saa7164_boards[dev->board].portb == SAA7164_MPEG_DVB)
1487 		saa7164_dvb_unregister(&dev->ports[SAA7164_PORT_TS2]);
1488 
1489 	if (saa7164_boards[dev->board].portc == SAA7164_MPEG_ENCODER)
1490 		saa7164_encoder_unregister(&dev->ports[SAA7164_PORT_ENC1]);
1491 
1492 	if (saa7164_boards[dev->board].portd == SAA7164_MPEG_ENCODER)
1493 		saa7164_encoder_unregister(&dev->ports[SAA7164_PORT_ENC2]);
1494 
1495 	if (saa7164_boards[dev->board].porte == SAA7164_MPEG_VBI)
1496 		saa7164_vbi_unregister(&dev->ports[SAA7164_PORT_VBI1]);
1497 
1498 	if (saa7164_boards[dev->board].portf == SAA7164_MPEG_VBI)
1499 		saa7164_vbi_unregister(&dev->ports[SAA7164_PORT_VBI2]);
1500 
1501 	saa7164_i2c_unregister(&dev->i2c_bus[0]);
1502 	saa7164_i2c_unregister(&dev->i2c_bus[1]);
1503 	saa7164_i2c_unregister(&dev->i2c_bus[2]);
1504 
1505 	/* unregister stuff */
1506 	free_irq(pci_dev->irq, dev);
1507 
1508 	if (dev->msi) {
1509 		pci_disable_msi(pci_dev);
1510 		dev->msi = false;
1511 	}
1512 
1513 	pci_disable_device(pci_dev);
1514 
1515 	mutex_lock(&devlist);
1516 	list_del(&dev->devlist);
1517 	mutex_unlock(&devlist);
1518 
1519 	saa7164_dev_unregister(dev);
1520 	v4l2_device_unregister(&dev->v4l2_dev);
1521 	kfree(dev);
1522 }
1523 
1524 static const struct pci_device_id saa7164_pci_tbl[] = {
1525 	{
1526 		/* SAA7164 */
1527 		.vendor       = 0x1131,
1528 		.device       = 0x7164,
1529 		.subvendor    = PCI_ANY_ID,
1530 		.subdevice    = PCI_ANY_ID,
1531 	}, {
1532 		/* --- end of list --- */
1533 	}
1534 };
1535 MODULE_DEVICE_TABLE(pci, saa7164_pci_tbl);
1536 
1537 static struct pci_driver saa7164_pci_driver = {
1538 	.name     = "saa7164",
1539 	.id_table = saa7164_pci_tbl,
1540 	.probe    = saa7164_initdev,
1541 	.remove   = saa7164_finidev,
1542 	/* TODO */
1543 	.suspend  = NULL,
1544 	.resume   = NULL,
1545 };
1546 
1547 static int __init saa7164_init(void)
1548 {
1549 	int ret = pci_register_driver(&saa7164_pci_driver);
1550 
1551 	if (ret)
1552 		return ret;
1553 
1554 	saa7164_debugfs_create();
1555 
1556 	pr_info("saa7164 driver loaded\n");
1557 
1558 	return 0;
1559 }
1560 
1561 static void __exit saa7164_fini(void)
1562 {
1563 	saa7164_debugfs_remove();
1564 	pci_unregister_driver(&saa7164_pci_driver);
1565 }
1566 
1567 module_init(saa7164_init);
1568 module_exit(saa7164_fini);
1569 
1570