1c942fddfSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
2b285192aSMauro Carvalho Chehab /*
3b285192aSMauro Carvalho Chehab  *  Driver for the NXP SAA7164 PCIe bridge
4b285192aSMauro Carvalho Chehab  *
563a412ecSSteven Toth  *  Copyright (c) 2010-2015 Steven Toth <stoth@kernellabs.com>
6b285192aSMauro Carvalho Chehab  */
7b285192aSMauro Carvalho Chehab 
8b285192aSMauro Carvalho Chehab #include <linux/init.h>
9b285192aSMauro Carvalho Chehab #include <linux/list.h>
10b285192aSMauro Carvalho Chehab #include <linux/module.h>
11b285192aSMauro Carvalho Chehab #include <linux/moduleparam.h>
12b285192aSMauro Carvalho Chehab #include <linux/kmod.h>
13b285192aSMauro Carvalho Chehab #include <linux/kernel.h>
14b285192aSMauro Carvalho Chehab #include <linux/slab.h>
15b285192aSMauro Carvalho Chehab #include <linux/interrupt.h>
16b285192aSMauro Carvalho Chehab #include <linux/delay.h>
17b285192aSMauro Carvalho Chehab #include <asm/div64.h>
18b285192aSMauro Carvalho Chehab 
19b285192aSMauro Carvalho Chehab #ifdef CONFIG_PROC_FS
20b285192aSMauro Carvalho Chehab #include <linux/proc_fs.h>
21b285192aSMauro Carvalho Chehab #endif
22b285192aSMauro Carvalho Chehab #include "saa7164.h"
23b285192aSMauro Carvalho Chehab 
24b285192aSMauro Carvalho Chehab MODULE_DESCRIPTION("Driver for NXP SAA7164 based TV cards");
25b285192aSMauro Carvalho Chehab MODULE_AUTHOR("Steven Toth <stoth@kernellabs.com>");
26b285192aSMauro Carvalho Chehab MODULE_LICENSE("GPL");
27b285192aSMauro Carvalho Chehab 
28b285192aSMauro Carvalho Chehab /*
29b285192aSMauro Carvalho Chehab  *  1 Basic
30b285192aSMauro Carvalho Chehab  *  2
31b285192aSMauro Carvalho Chehab  *  4 i2c
32b285192aSMauro Carvalho Chehab  *  8 api
33b285192aSMauro Carvalho Chehab  * 16 cmd
34b285192aSMauro Carvalho Chehab  * 32 bus
35b285192aSMauro Carvalho Chehab  */
36b285192aSMauro Carvalho Chehab 
37b285192aSMauro Carvalho Chehab unsigned int saa_debug;
38b285192aSMauro Carvalho Chehab module_param_named(debug, saa_debug, int, 0644);
39b285192aSMauro Carvalho Chehab MODULE_PARM_DESC(debug, "enable debug messages");
40b285192aSMauro Carvalho Chehab 
415a9ff85dSMauro Carvalho Chehab static unsigned int fw_debug;
42b285192aSMauro Carvalho Chehab module_param(fw_debug, int, 0644);
43a895d57dSMasanari Iida MODULE_PARM_DESC(fw_debug, "Firmware debug level def:2");
44b285192aSMauro Carvalho Chehab 
45b285192aSMauro Carvalho Chehab unsigned int encoder_buffers = SAA7164_MAX_ENCODER_BUFFERS;
46b285192aSMauro Carvalho Chehab module_param(encoder_buffers, int, 0644);
47b285192aSMauro Carvalho Chehab MODULE_PARM_DESC(encoder_buffers, "Total buffers in read queue 16-512 def:64");
48b285192aSMauro Carvalho Chehab 
49b285192aSMauro Carvalho Chehab unsigned int vbi_buffers = SAA7164_MAX_VBI_BUFFERS;
50b285192aSMauro Carvalho Chehab module_param(vbi_buffers, int, 0644);
51b285192aSMauro Carvalho Chehab MODULE_PARM_DESC(vbi_buffers, "Total buffers in read queue 16-512 def:64");
52b285192aSMauro Carvalho Chehab 
53b285192aSMauro Carvalho Chehab unsigned int waitsecs = 10;
54b285192aSMauro Carvalho Chehab module_param(waitsecs, int, 0644);
55b285192aSMauro Carvalho Chehab MODULE_PARM_DESC(waitsecs, "timeout on firmware messages");
56b285192aSMauro Carvalho Chehab 
57b285192aSMauro Carvalho Chehab static unsigned int card[]  = {[0 ... (SAA7164_MAXBOARDS - 1)] = UNSET };
58b285192aSMauro Carvalho Chehab module_param_array(card,  int, NULL, 0444);
59b285192aSMauro Carvalho Chehab MODULE_PARM_DESC(card, "card type");
60b285192aSMauro Carvalho Chehab 
615a9ff85dSMauro Carvalho Chehab static unsigned int print_histogram = 64;
62b285192aSMauro Carvalho Chehab module_param(print_histogram, int, 0644);
63b285192aSMauro Carvalho Chehab MODULE_PARM_DESC(print_histogram, "print histogram values once");
64b285192aSMauro Carvalho Chehab 
65b285192aSMauro Carvalho Chehab unsigned int crc_checking = 1;
66b285192aSMauro Carvalho Chehab module_param(crc_checking, int, 0644);
67b285192aSMauro Carvalho Chehab MODULE_PARM_DESC(crc_checking, "enable crc sanity checking on buffers");
68b285192aSMauro Carvalho Chehab 
695a9ff85dSMauro Carvalho Chehab static unsigned int guard_checking = 1;
70b285192aSMauro Carvalho Chehab module_param(guard_checking, int, 0644);
71b285192aSMauro Carvalho Chehab MODULE_PARM_DESC(guard_checking,
72b285192aSMauro Carvalho Chehab 	"enable dma sanity checking for buffer overruns");
73b285192aSMauro Carvalho Chehab 
7477978089SBrendan McGrath static bool enable_msi = true;
7577978089SBrendan McGrath module_param(enable_msi, bool, 0444);
7677978089SBrendan McGrath MODULE_PARM_DESC(enable_msi,
7777978089SBrendan McGrath 		"enable the use of an msi interrupt if available");
7877978089SBrendan McGrath 
79b285192aSMauro Carvalho Chehab static unsigned int saa7164_devcount;
80b285192aSMauro Carvalho Chehab 
81b285192aSMauro Carvalho Chehab static DEFINE_MUTEX(devlist);
82b285192aSMauro Carvalho Chehab LIST_HEAD(saa7164_devlist);
83b285192aSMauro Carvalho Chehab 
84b285192aSMauro Carvalho Chehab #define INT_SIZE 16
85b285192aSMauro Carvalho Chehab 
86b285192aSMauro Carvalho Chehab static void saa7164_pack_verifier(struct saa7164_buffer *buf)
87b285192aSMauro Carvalho Chehab {
88b285192aSMauro Carvalho Chehab 	u8 *p = (u8 *)buf->cpu;
89b285192aSMauro Carvalho Chehab 	int i;
90b285192aSMauro Carvalho Chehab 
91b285192aSMauro Carvalho Chehab 	for (i = 0; i < buf->actual_size; i += 2048) {
92b285192aSMauro Carvalho Chehab 
93b285192aSMauro Carvalho Chehab 		if ((*(p + i + 0) != 0x00) || (*(p + i + 1) != 0x00) ||
94b285192aSMauro Carvalho Chehab 			(*(p + i + 2) != 0x01) || (*(p + i + 3) != 0xBA)) {
95b285192aSMauro Carvalho Chehab 			printk(KERN_ERR "No pack at 0x%x\n", i);
96b285192aSMauro Carvalho Chehab #if 0
97b285192aSMauro Carvalho Chehab 			print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 16, 1,
98b285192aSMauro Carvalho Chehab 				       p + 1, 32, false);
99b285192aSMauro Carvalho Chehab #endif
100b285192aSMauro Carvalho Chehab 		}
101b285192aSMauro Carvalho Chehab 	}
102b285192aSMauro Carvalho Chehab }
103b285192aSMauro Carvalho Chehab 
104b285192aSMauro Carvalho Chehab #define FIXED_VIDEO_PID 0xf1
105b285192aSMauro Carvalho Chehab #define FIXED_AUDIO_PID 0xf2
106b285192aSMauro Carvalho Chehab 
107b285192aSMauro Carvalho Chehab static void saa7164_ts_verifier(struct saa7164_buffer *buf)
108b285192aSMauro Carvalho Chehab {
109b285192aSMauro Carvalho Chehab 	struct saa7164_port *port = buf->port;
110b285192aSMauro Carvalho Chehab 	u32 i;
111b285192aSMauro Carvalho Chehab 	u8 cc, a;
112b285192aSMauro Carvalho Chehab 	u16 pid;
113065e1477SHans Verkuil 	u8 *bufcpu = (u8 *)buf->cpu;
114b285192aSMauro Carvalho Chehab 
115b285192aSMauro Carvalho Chehab 	port->sync_errors = 0;
116b285192aSMauro Carvalho Chehab 	port->v_cc_errors = 0;
117b285192aSMauro Carvalho Chehab 	port->a_cc_errors = 0;
118b285192aSMauro Carvalho Chehab 
119b285192aSMauro Carvalho Chehab 	for (i = 0; i < buf->actual_size; i += 188) {
120b285192aSMauro Carvalho Chehab 		if (*(bufcpu + i) != 0x47)
121b285192aSMauro Carvalho Chehab 			port->sync_errors++;
122b285192aSMauro Carvalho Chehab 
123b285192aSMauro Carvalho Chehab 		/* TODO: Query pid lower 8 bits, ignoring upper bits intensionally */
124b285192aSMauro Carvalho Chehab 		pid = ((*(bufcpu + i + 1) & 0x1f) << 8) | *(bufcpu + i + 2);
125b285192aSMauro Carvalho Chehab 		cc = *(bufcpu + i + 3) & 0x0f;
126b285192aSMauro Carvalho Chehab 
127b285192aSMauro Carvalho Chehab 		if (pid == FIXED_VIDEO_PID) {
128b285192aSMauro Carvalho Chehab 			a = ((port->last_v_cc + 1) & 0x0f);
129b285192aSMauro Carvalho Chehab 			if (a != cc) {
130b285192aSMauro Carvalho Chehab 				printk(KERN_ERR "video cc last = %x current = %x i = %d\n",
131b285192aSMauro Carvalho Chehab 					port->last_v_cc, cc, i);
132b285192aSMauro Carvalho Chehab 				port->v_cc_errors++;
133b285192aSMauro Carvalho Chehab 			}
134b285192aSMauro Carvalho Chehab 
135b285192aSMauro Carvalho Chehab 			port->last_v_cc = cc;
136b285192aSMauro Carvalho Chehab 		} else
137b285192aSMauro Carvalho Chehab 		if (pid == FIXED_AUDIO_PID) {
138b285192aSMauro Carvalho Chehab 			a = ((port->last_a_cc + 1) & 0x0f);
139b285192aSMauro Carvalho Chehab 			if (a != cc) {
140b285192aSMauro Carvalho Chehab 				printk(KERN_ERR "audio cc last = %x current = %x i = %d\n",
141b285192aSMauro Carvalho Chehab 					port->last_a_cc, cc, i);
142b285192aSMauro Carvalho Chehab 				port->a_cc_errors++;
143b285192aSMauro Carvalho Chehab 			}
144b285192aSMauro Carvalho Chehab 
145b285192aSMauro Carvalho Chehab 			port->last_a_cc = cc;
146b285192aSMauro Carvalho Chehab 		}
147b285192aSMauro Carvalho Chehab 
148b285192aSMauro Carvalho Chehab 	}
149b285192aSMauro Carvalho Chehab 
150b285192aSMauro Carvalho Chehab 	/* Only report errors if we've been through this function at least
151b285192aSMauro Carvalho Chehab 	 * once already and the cached cc values are primed. First time through
152b285192aSMauro Carvalho Chehab 	 * always generates errors.
153b285192aSMauro Carvalho Chehab 	 */
154b285192aSMauro Carvalho Chehab 	if (port->v_cc_errors && (port->done_first_interrupt > 1))
155b285192aSMauro Carvalho Chehab 		printk(KERN_ERR "video pid cc, %d errors\n", port->v_cc_errors);
156b285192aSMauro Carvalho Chehab 
157b285192aSMauro Carvalho Chehab 	if (port->a_cc_errors && (port->done_first_interrupt > 1))
158b285192aSMauro Carvalho Chehab 		printk(KERN_ERR "audio pid cc, %d errors\n", port->a_cc_errors);
159b285192aSMauro Carvalho Chehab 
160b285192aSMauro Carvalho Chehab 	if (port->sync_errors && (port->done_first_interrupt > 1))
161b285192aSMauro Carvalho Chehab 		printk(KERN_ERR "sync_errors = %d\n", port->sync_errors);
162b285192aSMauro Carvalho Chehab 
163b285192aSMauro Carvalho Chehab 	if (port->done_first_interrupt == 1)
164b285192aSMauro Carvalho Chehab 		port->done_first_interrupt++;
165b285192aSMauro Carvalho Chehab }
166b285192aSMauro Carvalho Chehab 
167b285192aSMauro Carvalho Chehab static void saa7164_histogram_reset(struct saa7164_histogram *hg, char *name)
168b285192aSMauro Carvalho Chehab {
169b285192aSMauro Carvalho Chehab 	int i;
170b285192aSMauro Carvalho Chehab 
171b285192aSMauro Carvalho Chehab 	memset(hg, 0, sizeof(struct saa7164_histogram));
172cc1e6315SMauro Carvalho Chehab 	strscpy(hg->name, name, sizeof(hg->name));
173b285192aSMauro Carvalho Chehab 
174b285192aSMauro Carvalho Chehab 	/* First 30ms x 1ms */
175b285192aSMauro Carvalho Chehab 	for (i = 0; i < 30; i++)
176b285192aSMauro Carvalho Chehab 		hg->counter1[0 + i].val = i;
177b285192aSMauro Carvalho Chehab 
178b285192aSMauro Carvalho Chehab 	/* 30 - 200ms x 10ms  */
179b285192aSMauro Carvalho Chehab 	for (i = 0; i < 18; i++)
180b285192aSMauro Carvalho Chehab 		hg->counter1[30 + i].val = 30 + (i * 10);
181b285192aSMauro Carvalho Chehab 
182b285192aSMauro Carvalho Chehab 	/* 200 - 2000ms x 100ms  */
183b285192aSMauro Carvalho Chehab 	for (i = 0; i < 15; i++)
184b285192aSMauro Carvalho Chehab 		hg->counter1[48 + i].val = 200 + (i * 200);
185b285192aSMauro Carvalho Chehab 
186b285192aSMauro Carvalho Chehab 	/* Catch all massive value (2secs) */
187b285192aSMauro Carvalho Chehab 	hg->counter1[55].val = 2000;
188b285192aSMauro Carvalho Chehab 
189b285192aSMauro Carvalho Chehab 	/* Catch all massive value (4secs) */
190b285192aSMauro Carvalho Chehab 	hg->counter1[56].val = 4000;
191b285192aSMauro Carvalho Chehab 
192b285192aSMauro Carvalho Chehab 	/* Catch all massive value (8secs) */
193b285192aSMauro Carvalho Chehab 	hg->counter1[57].val = 8000;
194b285192aSMauro Carvalho Chehab 
195b285192aSMauro Carvalho Chehab 	/* Catch all massive value (15secs) */
196b285192aSMauro Carvalho Chehab 	hg->counter1[58].val = 15000;
197b285192aSMauro Carvalho Chehab 
198b285192aSMauro Carvalho Chehab 	/* Catch all massive value (30secs) */
199b285192aSMauro Carvalho Chehab 	hg->counter1[59].val = 30000;
200b285192aSMauro Carvalho Chehab 
201b285192aSMauro Carvalho Chehab 	/* Catch all massive value (60secs) */
202b285192aSMauro Carvalho Chehab 	hg->counter1[60].val = 60000;
203b285192aSMauro Carvalho Chehab 
204b285192aSMauro Carvalho Chehab 	/* Catch all massive value (5mins) */
205b285192aSMauro Carvalho Chehab 	hg->counter1[61].val = 300000;
206b285192aSMauro Carvalho Chehab 
207b285192aSMauro Carvalho Chehab 	/* Catch all massive value (15mins) */
208b285192aSMauro Carvalho Chehab 	hg->counter1[62].val = 900000;
209b285192aSMauro Carvalho Chehab 
210b285192aSMauro Carvalho Chehab 	/* Catch all massive values (1hr) */
211b285192aSMauro Carvalho Chehab 	hg->counter1[63].val = 3600000;
212b285192aSMauro Carvalho Chehab }
213b285192aSMauro Carvalho Chehab 
214b285192aSMauro Carvalho Chehab void saa7164_histogram_update(struct saa7164_histogram *hg, u32 val)
215b285192aSMauro Carvalho Chehab {
216b285192aSMauro Carvalho Chehab 	int i;
217b285192aSMauro Carvalho Chehab 	for (i = 0; i < 64; i++) {
218b285192aSMauro Carvalho Chehab 		if (val <= hg->counter1[i].val) {
219b285192aSMauro Carvalho Chehab 			hg->counter1[i].count++;
220b285192aSMauro Carvalho Chehab 			hg->counter1[i].update_time = jiffies;
221b285192aSMauro Carvalho Chehab 			break;
222b285192aSMauro Carvalho Chehab 		}
223b285192aSMauro Carvalho Chehab 	}
224b285192aSMauro Carvalho Chehab }
225b285192aSMauro Carvalho Chehab 
226b285192aSMauro Carvalho Chehab static void saa7164_histogram_print(struct saa7164_port *port,
227b285192aSMauro Carvalho Chehab 	struct saa7164_histogram *hg)
228b285192aSMauro Carvalho Chehab {
229b285192aSMauro Carvalho Chehab 	u32 entries = 0;
230b285192aSMauro Carvalho Chehab 	int i;
231b285192aSMauro Carvalho Chehab 
232b285192aSMauro Carvalho Chehab 	printk(KERN_ERR "Histogram named %s (ms, count, last_update_jiffy)\n", hg->name);
233b285192aSMauro Carvalho Chehab 	for (i = 0; i < 64; i++) {
234b285192aSMauro Carvalho Chehab 		if (hg->counter1[i].count == 0)
235b285192aSMauro Carvalho Chehab 			continue;
236b285192aSMauro Carvalho Chehab 
237b285192aSMauro Carvalho Chehab 		printk(KERN_ERR " %4d %12d %Ld\n",
238b285192aSMauro Carvalho Chehab 			hg->counter1[i].val,
239b285192aSMauro Carvalho Chehab 			hg->counter1[i].count,
240b285192aSMauro Carvalho Chehab 			hg->counter1[i].update_time);
241b285192aSMauro Carvalho Chehab 
242b285192aSMauro Carvalho Chehab 		entries++;
243b285192aSMauro Carvalho Chehab 	}
244b285192aSMauro Carvalho Chehab 	printk(KERN_ERR "Total: %d\n", entries);
245b285192aSMauro Carvalho Chehab }
246b285192aSMauro Carvalho Chehab 
247b285192aSMauro Carvalho Chehab static void saa7164_work_enchandler_helper(struct saa7164_port *port, int bufnr)
248b285192aSMauro Carvalho Chehab {
249b285192aSMauro Carvalho Chehab 	struct saa7164_dev *dev = port->dev;
250b285192aSMauro Carvalho Chehab 	struct saa7164_buffer *buf = NULL;
251b285192aSMauro Carvalho Chehab 	struct saa7164_user_buffer *ubuf = NULL;
252b285192aSMauro Carvalho Chehab 	struct list_head *c, *n;
253b285192aSMauro Carvalho Chehab 	int i = 0;
254065e1477SHans Verkuil 	u8 *p;
255b285192aSMauro Carvalho Chehab 
256b285192aSMauro Carvalho Chehab 	mutex_lock(&port->dmaqueue_lock);
257b285192aSMauro Carvalho Chehab 	list_for_each_safe(c, n, &port->dmaqueue.list) {
258b285192aSMauro Carvalho Chehab 
259b285192aSMauro Carvalho Chehab 		buf = list_entry(c, struct saa7164_buffer, list);
260b285192aSMauro Carvalho Chehab 		if (i++ > port->hwcfg.buffercount) {
261b285192aSMauro Carvalho Chehab 			printk(KERN_ERR "%s() illegal i count %d\n",
262b285192aSMauro Carvalho Chehab 				__func__, i);
263b285192aSMauro Carvalho Chehab 			break;
264b285192aSMauro Carvalho Chehab 		}
265b285192aSMauro Carvalho Chehab 
266b285192aSMauro Carvalho Chehab 		if (buf->idx == bufnr) {
267b285192aSMauro Carvalho Chehab 
268b285192aSMauro Carvalho Chehab 			/* Found the buffer, deal with it */
269b285192aSMauro Carvalho Chehab 			dprintk(DBGLVL_IRQ, "%s() bufnr: %d\n", __func__, bufnr);
270b285192aSMauro Carvalho Chehab 
271b285192aSMauro Carvalho Chehab 			if (crc_checking) {
272b285192aSMauro Carvalho Chehab 				/* Throw a new checksum on the dma buffer */
273b285192aSMauro Carvalho Chehab 				buf->crc = crc32(0, buf->cpu, buf->actual_size);
274b285192aSMauro Carvalho Chehab 			}
275b285192aSMauro Carvalho Chehab 
276b285192aSMauro Carvalho Chehab 			if (guard_checking) {
277b285192aSMauro Carvalho Chehab 				p = (u8 *)buf->cpu;
278b285192aSMauro Carvalho Chehab 				if ((*(p + buf->actual_size + 0) != 0xff) ||
279b285192aSMauro Carvalho Chehab 					(*(p + buf->actual_size + 1) != 0xff) ||
280b285192aSMauro Carvalho Chehab 					(*(p + buf->actual_size + 2) != 0xff) ||
281b285192aSMauro Carvalho Chehab 					(*(p + buf->actual_size + 3) != 0xff) ||
282b285192aSMauro Carvalho Chehab 					(*(p + buf->actual_size + 0x10) != 0xff) ||
283b285192aSMauro Carvalho Chehab 					(*(p + buf->actual_size + 0x11) != 0xff) ||
284b285192aSMauro Carvalho Chehab 					(*(p + buf->actual_size + 0x12) != 0xff) ||
285b285192aSMauro Carvalho Chehab 					(*(p + buf->actual_size + 0x13) != 0xff)) {
286b285192aSMauro Carvalho Chehab 						printk(KERN_ERR "%s() buf %p guard buffer breach\n",
287b285192aSMauro Carvalho Chehab 							__func__, buf);
288b285192aSMauro Carvalho Chehab #if 0
289b285192aSMauro Carvalho Chehab 			print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 16, 1,
290b285192aSMauro Carvalho Chehab 				       p + buf->actual_size - 32, 64, false);
291b285192aSMauro Carvalho Chehab #endif
292b285192aSMauro Carvalho Chehab 				}
293b285192aSMauro Carvalho Chehab 			}
294b285192aSMauro Carvalho Chehab 
295b285192aSMauro Carvalho Chehab 			if ((port->nr != SAA7164_PORT_VBI1) && (port->nr != SAA7164_PORT_VBI2)) {
296b285192aSMauro Carvalho Chehab 				/* Validate the incoming buffer content */
297b285192aSMauro Carvalho Chehab 				if (port->encoder_params.stream_type == V4L2_MPEG_STREAM_TYPE_MPEG2_TS)
298b285192aSMauro Carvalho Chehab 					saa7164_ts_verifier(buf);
299b285192aSMauro Carvalho Chehab 				else if (port->encoder_params.stream_type == V4L2_MPEG_STREAM_TYPE_MPEG2_PS)
300b285192aSMauro Carvalho Chehab 					saa7164_pack_verifier(buf);
301b285192aSMauro Carvalho Chehab 			}
302b285192aSMauro Carvalho Chehab 
303b285192aSMauro Carvalho Chehab 			/* find a free user buffer and clone to it */
304b285192aSMauro Carvalho Chehab 			if (!list_empty(&port->list_buf_free.list)) {
305b285192aSMauro Carvalho Chehab 
306b285192aSMauro Carvalho Chehab 				/* Pull the first buffer from the used list */
307b285192aSMauro Carvalho Chehab 				ubuf = list_first_entry(&port->list_buf_free.list,
308b285192aSMauro Carvalho Chehab 					struct saa7164_user_buffer, list);
309b285192aSMauro Carvalho Chehab 
310b285192aSMauro Carvalho Chehab 				if (buf->actual_size <= ubuf->actual_size) {
311b285192aSMauro Carvalho Chehab 
312065e1477SHans Verkuil 					memcpy(ubuf->data, buf->cpu, ubuf->actual_size);
313b285192aSMauro Carvalho Chehab 
314b285192aSMauro Carvalho Chehab 					if (crc_checking) {
315b285192aSMauro Carvalho Chehab 						/* Throw a new checksum on the read buffer */
316b285192aSMauro Carvalho Chehab 						ubuf->crc = crc32(0, ubuf->data, ubuf->actual_size);
317b285192aSMauro Carvalho Chehab 					}
318b285192aSMauro Carvalho Chehab 
319b285192aSMauro Carvalho Chehab 					/* Requeue the buffer on the free list */
320b285192aSMauro Carvalho Chehab 					ubuf->pos = 0;
321b285192aSMauro Carvalho Chehab 
322b285192aSMauro Carvalho Chehab 					list_move_tail(&ubuf->list,
323b285192aSMauro Carvalho Chehab 						&port->list_buf_used.list);
324b285192aSMauro Carvalho Chehab 
325b285192aSMauro Carvalho Chehab 					/* Flag any userland waiters */
326b285192aSMauro Carvalho Chehab 					wake_up_interruptible(&port->wait_read);
327b285192aSMauro Carvalho Chehab 
328b285192aSMauro Carvalho Chehab 				} else {
329b285192aSMauro Carvalho Chehab 					printk(KERN_ERR "buf %p bufsize fails match\n", buf);
330b285192aSMauro Carvalho Chehab 				}
331b285192aSMauro Carvalho Chehab 
332b285192aSMauro Carvalho Chehab 			} else
333b285192aSMauro Carvalho Chehab 				printk(KERN_ERR "encirq no free buffers, increase param encoder_buffers\n");
334b285192aSMauro Carvalho Chehab 
335b285192aSMauro Carvalho Chehab 			/* Ensure offset into buffer remains 0, fill buffer
336b285192aSMauro Carvalho Chehab 			 * with known bad data. We check for this data at a later point
337b285192aSMauro Carvalho Chehab 			 * in time. */
338b285192aSMauro Carvalho Chehab 			saa7164_buffer_zero_offsets(port, bufnr);
339065e1477SHans Verkuil 			memset(buf->cpu, 0xff, buf->pci_size);
340b285192aSMauro Carvalho Chehab 			if (crc_checking) {
341b285192aSMauro Carvalho Chehab 				/* Throw yet aanother new checksum on the dma buffer */
342b285192aSMauro Carvalho Chehab 				buf->crc = crc32(0, buf->cpu, buf->actual_size);
343b285192aSMauro Carvalho Chehab 			}
344b285192aSMauro Carvalho Chehab 
345b285192aSMauro Carvalho Chehab 			break;
346b285192aSMauro Carvalho Chehab 		}
347b285192aSMauro Carvalho Chehab 	}
348b285192aSMauro Carvalho Chehab 	mutex_unlock(&port->dmaqueue_lock);
349b285192aSMauro Carvalho Chehab }
350b285192aSMauro Carvalho Chehab 
351b285192aSMauro Carvalho Chehab static void saa7164_work_enchandler(struct work_struct *w)
352b285192aSMauro Carvalho Chehab {
353b285192aSMauro Carvalho Chehab 	struct saa7164_port *port =
354b285192aSMauro Carvalho Chehab 		container_of(w, struct saa7164_port, workenc);
355b285192aSMauro Carvalho Chehab 	struct saa7164_dev *dev = port->dev;
356b285192aSMauro Carvalho Chehab 
357b285192aSMauro Carvalho Chehab 	u32 wp, mcb, rp, cnt = 0;
358b285192aSMauro Carvalho Chehab 
359b285192aSMauro Carvalho Chehab 	port->last_svc_msecs_diff = port->last_svc_msecs;
360b285192aSMauro Carvalho Chehab 	port->last_svc_msecs = jiffies_to_msecs(jiffies);
361b285192aSMauro Carvalho Chehab 
362b285192aSMauro Carvalho Chehab 	port->last_svc_msecs_diff = port->last_svc_msecs -
363b285192aSMauro Carvalho Chehab 		port->last_svc_msecs_diff;
364b285192aSMauro Carvalho Chehab 
365b285192aSMauro Carvalho Chehab 	saa7164_histogram_update(&port->svc_interval,
366b285192aSMauro Carvalho Chehab 		port->last_svc_msecs_diff);
367b285192aSMauro Carvalho Chehab 
368b285192aSMauro Carvalho Chehab 	port->last_irq_svc_msecs_diff = port->last_svc_msecs -
369b285192aSMauro Carvalho Chehab 		port->last_irq_msecs;
370b285192aSMauro Carvalho Chehab 
371b285192aSMauro Carvalho Chehab 	saa7164_histogram_update(&port->irq_svc_interval,
372b285192aSMauro Carvalho Chehab 		port->last_irq_svc_msecs_diff);
373b285192aSMauro Carvalho Chehab 
374b285192aSMauro Carvalho Chehab 	dprintk(DBGLVL_IRQ,
375b285192aSMauro Carvalho Chehab 		"%s() %Ldms elapsed irq->deferred %Ldms wp: %d rp: %d\n",
376b285192aSMauro Carvalho Chehab 		__func__,
377b285192aSMauro Carvalho Chehab 		port->last_svc_msecs_diff,
378b285192aSMauro Carvalho Chehab 		port->last_irq_svc_msecs_diff,
379b285192aSMauro Carvalho Chehab 		port->last_svc_wp,
380b285192aSMauro Carvalho Chehab 		port->last_svc_rp
381b285192aSMauro Carvalho Chehab 		);
382b285192aSMauro Carvalho Chehab 
383b285192aSMauro Carvalho Chehab 	/* Current write position */
384b285192aSMauro Carvalho Chehab 	wp = saa7164_readl(port->bufcounter);
385b285192aSMauro Carvalho Chehab 	if (wp > (port->hwcfg.buffercount - 1)) {
386b285192aSMauro Carvalho Chehab 		printk(KERN_ERR "%s() illegal buf count %d\n", __func__, wp);
387b285192aSMauro Carvalho Chehab 		return;
388b285192aSMauro Carvalho Chehab 	}
389b285192aSMauro Carvalho Chehab 
390b285192aSMauro Carvalho Chehab 	/* Most current complete buffer */
391b285192aSMauro Carvalho Chehab 	if (wp == 0)
392b285192aSMauro Carvalho Chehab 		mcb = (port->hwcfg.buffercount - 1);
393b285192aSMauro Carvalho Chehab 	else
394b285192aSMauro Carvalho Chehab 		mcb = wp - 1;
395b285192aSMauro Carvalho Chehab 
396b285192aSMauro Carvalho Chehab 	while (1) {
397b285192aSMauro Carvalho Chehab 		if (port->done_first_interrupt == 0) {
398b285192aSMauro Carvalho Chehab 			port->done_first_interrupt++;
399b285192aSMauro Carvalho Chehab 			rp = mcb;
400b285192aSMauro Carvalho Chehab 		} else
401b285192aSMauro Carvalho Chehab 			rp = (port->last_svc_rp + 1) % 8;
402b285192aSMauro Carvalho Chehab 
4033eeba4a7SMauro Carvalho Chehab 		if (rp > (port->hwcfg.buffercount - 1)) {
404b285192aSMauro Carvalho Chehab 			printk(KERN_ERR "%s() illegal rp count %d\n", __func__, rp);
405b285192aSMauro Carvalho Chehab 			break;
406b285192aSMauro Carvalho Chehab 		}
407b285192aSMauro Carvalho Chehab 
408b285192aSMauro Carvalho Chehab 		saa7164_work_enchandler_helper(port, rp);
409b285192aSMauro Carvalho Chehab 		port->last_svc_rp = rp;
410b285192aSMauro Carvalho Chehab 		cnt++;
411b285192aSMauro Carvalho Chehab 
412b285192aSMauro Carvalho Chehab 		if (rp == mcb)
413b285192aSMauro Carvalho Chehab 			break;
414b285192aSMauro Carvalho Chehab 	}
415b285192aSMauro Carvalho Chehab 
416b285192aSMauro Carvalho Chehab 	/* TODO: Convert this into a /proc/saa7164 style readable file */
417b285192aSMauro Carvalho Chehab 	if (print_histogram == port->nr) {
418b285192aSMauro Carvalho Chehab 		saa7164_histogram_print(port, &port->irq_interval);
419b285192aSMauro Carvalho Chehab 		saa7164_histogram_print(port, &port->svc_interval);
420b285192aSMauro Carvalho Chehab 		saa7164_histogram_print(port, &port->irq_svc_interval);
421b285192aSMauro Carvalho Chehab 		saa7164_histogram_print(port, &port->read_interval);
422b285192aSMauro Carvalho Chehab 		saa7164_histogram_print(port, &port->poll_interval);
423b285192aSMauro Carvalho Chehab 		/* TODO: fix this to preserve any previous state */
424b285192aSMauro Carvalho Chehab 		print_histogram = 64 + port->nr;
425b285192aSMauro Carvalho Chehab 	}
426b285192aSMauro Carvalho Chehab }
427b285192aSMauro Carvalho Chehab 
428b285192aSMauro Carvalho Chehab static void saa7164_work_vbihandler(struct work_struct *w)
429b285192aSMauro Carvalho Chehab {
430b285192aSMauro Carvalho Chehab 	struct saa7164_port *port =
431b285192aSMauro Carvalho Chehab 		container_of(w, struct saa7164_port, workenc);
432b285192aSMauro Carvalho Chehab 	struct saa7164_dev *dev = port->dev;
433b285192aSMauro Carvalho Chehab 
434b285192aSMauro Carvalho Chehab 	u32 wp, mcb, rp, cnt = 0;
435b285192aSMauro Carvalho Chehab 
436b285192aSMauro Carvalho Chehab 	port->last_svc_msecs_diff = port->last_svc_msecs;
437b285192aSMauro Carvalho Chehab 	port->last_svc_msecs = jiffies_to_msecs(jiffies);
438b285192aSMauro Carvalho Chehab 	port->last_svc_msecs_diff = port->last_svc_msecs -
439b285192aSMauro Carvalho Chehab 		port->last_svc_msecs_diff;
440b285192aSMauro Carvalho Chehab 
441b285192aSMauro Carvalho Chehab 	saa7164_histogram_update(&port->svc_interval,
442b285192aSMauro Carvalho Chehab 		port->last_svc_msecs_diff);
443b285192aSMauro Carvalho Chehab 
444b285192aSMauro Carvalho Chehab 	port->last_irq_svc_msecs_diff = port->last_svc_msecs -
445b285192aSMauro Carvalho Chehab 		port->last_irq_msecs;
446b285192aSMauro Carvalho Chehab 
447b285192aSMauro Carvalho Chehab 	saa7164_histogram_update(&port->irq_svc_interval,
448b285192aSMauro Carvalho Chehab 		port->last_irq_svc_msecs_diff);
449b285192aSMauro Carvalho Chehab 
450b285192aSMauro Carvalho Chehab 	dprintk(DBGLVL_IRQ,
451b285192aSMauro Carvalho Chehab 		"%s() %Ldms elapsed irq->deferred %Ldms wp: %d rp: %d\n",
452b285192aSMauro Carvalho Chehab 		__func__,
453b285192aSMauro Carvalho Chehab 		port->last_svc_msecs_diff,
454b285192aSMauro Carvalho Chehab 		port->last_irq_svc_msecs_diff,
455b285192aSMauro Carvalho Chehab 		port->last_svc_wp,
456b285192aSMauro Carvalho Chehab 		port->last_svc_rp
457b285192aSMauro Carvalho Chehab 		);
458b285192aSMauro Carvalho Chehab 
459b285192aSMauro Carvalho Chehab 	/* Current write position */
460b285192aSMauro Carvalho Chehab 	wp = saa7164_readl(port->bufcounter);
461b285192aSMauro Carvalho Chehab 	if (wp > (port->hwcfg.buffercount - 1)) {
462b285192aSMauro Carvalho Chehab 		printk(KERN_ERR "%s() illegal buf count %d\n", __func__, wp);
463b285192aSMauro Carvalho Chehab 		return;
464b285192aSMauro Carvalho Chehab 	}
465b285192aSMauro Carvalho Chehab 
466b285192aSMauro Carvalho Chehab 	/* Most current complete buffer */
467b285192aSMauro Carvalho Chehab 	if (wp == 0)
468b285192aSMauro Carvalho Chehab 		mcb = (port->hwcfg.buffercount - 1);
469b285192aSMauro Carvalho Chehab 	else
470b285192aSMauro Carvalho Chehab 		mcb = wp - 1;
471b285192aSMauro Carvalho Chehab 
472b285192aSMauro Carvalho Chehab 	while (1) {
473b285192aSMauro Carvalho Chehab 		if (port->done_first_interrupt == 0) {
474b285192aSMauro Carvalho Chehab 			port->done_first_interrupt++;
475b285192aSMauro Carvalho Chehab 			rp = mcb;
476b285192aSMauro Carvalho Chehab 		} else
477b285192aSMauro Carvalho Chehab 			rp = (port->last_svc_rp + 1) % 8;
478b285192aSMauro Carvalho Chehab 
4793eeba4a7SMauro Carvalho Chehab 		if (rp > (port->hwcfg.buffercount - 1)) {
480b285192aSMauro Carvalho Chehab 			printk(KERN_ERR "%s() illegal rp count %d\n", __func__, rp);
481b285192aSMauro Carvalho Chehab 			break;
482b285192aSMauro Carvalho Chehab 		}
483b285192aSMauro Carvalho Chehab 
484b285192aSMauro Carvalho Chehab 		saa7164_work_enchandler_helper(port, rp);
485b285192aSMauro Carvalho Chehab 		port->last_svc_rp = rp;
486b285192aSMauro Carvalho Chehab 		cnt++;
487b285192aSMauro Carvalho Chehab 
488b285192aSMauro Carvalho Chehab 		if (rp == mcb)
489b285192aSMauro Carvalho Chehab 			break;
490b285192aSMauro Carvalho Chehab 	}
491b285192aSMauro Carvalho Chehab 
492b285192aSMauro Carvalho Chehab 	/* TODO: Convert this into a /proc/saa7164 style readable file */
493b285192aSMauro Carvalho Chehab 	if (print_histogram == port->nr) {
494b285192aSMauro Carvalho Chehab 		saa7164_histogram_print(port, &port->irq_interval);
495b285192aSMauro Carvalho Chehab 		saa7164_histogram_print(port, &port->svc_interval);
496b285192aSMauro Carvalho Chehab 		saa7164_histogram_print(port, &port->irq_svc_interval);
497b285192aSMauro Carvalho Chehab 		saa7164_histogram_print(port, &port->read_interval);
498b285192aSMauro Carvalho Chehab 		saa7164_histogram_print(port, &port->poll_interval);
499b285192aSMauro Carvalho Chehab 		/* TODO: fix this to preserve any previous state */
500b285192aSMauro Carvalho Chehab 		print_histogram = 64 + port->nr;
501b285192aSMauro Carvalho Chehab 	}
502b285192aSMauro Carvalho Chehab }
503b285192aSMauro Carvalho Chehab 
504b285192aSMauro Carvalho Chehab static void saa7164_work_cmdhandler(struct work_struct *w)
505b285192aSMauro Carvalho Chehab {
506b285192aSMauro Carvalho Chehab 	struct saa7164_dev *dev = container_of(w, struct saa7164_dev, workcmd);
507b285192aSMauro Carvalho Chehab 
508b285192aSMauro Carvalho Chehab 	/* Wake up any complete commands */
509b285192aSMauro Carvalho Chehab 	saa7164_irq_dequeue(dev);
510b285192aSMauro Carvalho Chehab }
511b285192aSMauro Carvalho Chehab 
512b285192aSMauro Carvalho Chehab static void saa7164_buffer_deliver(struct saa7164_buffer *buf)
513b285192aSMauro Carvalho Chehab {
514b285192aSMauro Carvalho Chehab 	struct saa7164_port *port = buf->port;
515b285192aSMauro Carvalho Chehab 
516b285192aSMauro Carvalho Chehab 	/* Feed the transport payload into the kernel demux */
517b285192aSMauro Carvalho Chehab 	dvb_dmx_swfilter_packets(&port->dvb.demux, (u8 *)buf->cpu,
518b285192aSMauro Carvalho Chehab 		SAA7164_TS_NUMBER_OF_LINES);
519b285192aSMauro Carvalho Chehab 
520b285192aSMauro Carvalho Chehab }
521b285192aSMauro Carvalho Chehab 
522b285192aSMauro Carvalho Chehab static irqreturn_t saa7164_irq_vbi(struct saa7164_port *port)
523b285192aSMauro Carvalho Chehab {
524b285192aSMauro Carvalho Chehab 	struct saa7164_dev *dev = port->dev;
525b285192aSMauro Carvalho Chehab 
526b285192aSMauro Carvalho Chehab 	/* Store old time */
527b285192aSMauro Carvalho Chehab 	port->last_irq_msecs_diff = port->last_irq_msecs;
528b285192aSMauro Carvalho Chehab 
529b285192aSMauro Carvalho Chehab 	/* Collect new stats */
530b285192aSMauro Carvalho Chehab 	port->last_irq_msecs = jiffies_to_msecs(jiffies);
531b285192aSMauro Carvalho Chehab 
532b285192aSMauro Carvalho Chehab 	/* Calculate stats */
533b285192aSMauro Carvalho Chehab 	port->last_irq_msecs_diff = port->last_irq_msecs -
534b285192aSMauro Carvalho Chehab 		port->last_irq_msecs_diff;
535b285192aSMauro Carvalho Chehab 
536b285192aSMauro Carvalho Chehab 	saa7164_histogram_update(&port->irq_interval,
537b285192aSMauro Carvalho Chehab 		port->last_irq_msecs_diff);
538b285192aSMauro Carvalho Chehab 
539b285192aSMauro Carvalho Chehab 	dprintk(DBGLVL_IRQ, "%s() %Ldms elapsed\n", __func__,
540b285192aSMauro Carvalho Chehab 		port->last_irq_msecs_diff);
541b285192aSMauro Carvalho Chehab 
542b285192aSMauro Carvalho Chehab 	/* Tis calls the vbi irq handler */
543b285192aSMauro Carvalho Chehab 	schedule_work(&port->workenc);
544b285192aSMauro Carvalho Chehab 	return 0;
545b285192aSMauro Carvalho Chehab }
546b285192aSMauro Carvalho Chehab 
547b285192aSMauro Carvalho Chehab static irqreturn_t saa7164_irq_encoder(struct saa7164_port *port)
548b285192aSMauro Carvalho Chehab {
549b285192aSMauro Carvalho Chehab 	struct saa7164_dev *dev = port->dev;
550b285192aSMauro Carvalho Chehab 
551b285192aSMauro Carvalho Chehab 	/* Store old time */
552b285192aSMauro Carvalho Chehab 	port->last_irq_msecs_diff = port->last_irq_msecs;
553b285192aSMauro Carvalho Chehab 
554b285192aSMauro Carvalho Chehab 	/* Collect new stats */
555b285192aSMauro Carvalho Chehab 	port->last_irq_msecs = jiffies_to_msecs(jiffies);
556b285192aSMauro Carvalho Chehab 
557b285192aSMauro Carvalho Chehab 	/* Calculate stats */
558b285192aSMauro Carvalho Chehab 	port->last_irq_msecs_diff = port->last_irq_msecs -
559b285192aSMauro Carvalho Chehab 		port->last_irq_msecs_diff;
560b285192aSMauro Carvalho Chehab 
561b285192aSMauro Carvalho Chehab 	saa7164_histogram_update(&port->irq_interval,
562b285192aSMauro Carvalho Chehab 		port->last_irq_msecs_diff);
563b285192aSMauro Carvalho Chehab 
564b285192aSMauro Carvalho Chehab 	dprintk(DBGLVL_IRQ, "%s() %Ldms elapsed\n", __func__,
565b285192aSMauro Carvalho Chehab 		port->last_irq_msecs_diff);
566b285192aSMauro Carvalho Chehab 
567b285192aSMauro Carvalho Chehab 	schedule_work(&port->workenc);
568b285192aSMauro Carvalho Chehab 	return 0;
569b285192aSMauro Carvalho Chehab }
570b285192aSMauro Carvalho Chehab 
571b285192aSMauro Carvalho Chehab static irqreturn_t saa7164_irq_ts(struct saa7164_port *port)
572b285192aSMauro Carvalho Chehab {
573b285192aSMauro Carvalho Chehab 	struct saa7164_dev *dev = port->dev;
574b285192aSMauro Carvalho Chehab 	struct saa7164_buffer *buf;
575b285192aSMauro Carvalho Chehab 	struct list_head *c, *n;
576b285192aSMauro Carvalho Chehab 	int wp, i = 0, rp;
577b285192aSMauro Carvalho Chehab 
578b285192aSMauro Carvalho Chehab 	/* Find the current write point from the hardware */
579b285192aSMauro Carvalho Chehab 	wp = saa7164_readl(port->bufcounter);
580b285192aSMauro Carvalho Chehab 	if (wp > (port->hwcfg.buffercount - 1))
581b285192aSMauro Carvalho Chehab 		BUG();
582b285192aSMauro Carvalho Chehab 
583b285192aSMauro Carvalho Chehab 	/* Find the previous buffer to the current write point */
584b285192aSMauro Carvalho Chehab 	if (wp == 0)
585b285192aSMauro Carvalho Chehab 		rp = (port->hwcfg.buffercount - 1);
586b285192aSMauro Carvalho Chehab 	else
587b285192aSMauro Carvalho Chehab 		rp = wp - 1;
588b285192aSMauro Carvalho Chehab 
589b285192aSMauro Carvalho Chehab 	/* Lookup the WP in the buffer list */
590b285192aSMauro Carvalho Chehab 	/* TODO: turn this into a worker thread */
591b285192aSMauro Carvalho Chehab 	list_for_each_safe(c, n, &port->dmaqueue.list) {
592b285192aSMauro Carvalho Chehab 		buf = list_entry(c, struct saa7164_buffer, list);
593b285192aSMauro Carvalho Chehab 		if (i++ > port->hwcfg.buffercount)
594b285192aSMauro Carvalho Chehab 			BUG();
595b285192aSMauro Carvalho Chehab 
596b285192aSMauro Carvalho Chehab 		if (buf->idx == rp) {
597b285192aSMauro Carvalho Chehab 			/* Found the buffer, deal with it */
598b285192aSMauro Carvalho Chehab 			dprintk(DBGLVL_IRQ, "%s() wp: %d processing: %d\n",
599b285192aSMauro Carvalho Chehab 				__func__, wp, rp);
600b285192aSMauro Carvalho Chehab 			saa7164_buffer_deliver(buf);
601b285192aSMauro Carvalho Chehab 			break;
602b285192aSMauro Carvalho Chehab 		}
603b285192aSMauro Carvalho Chehab 
604b285192aSMauro Carvalho Chehab 	}
605b285192aSMauro Carvalho Chehab 	return 0;
606b285192aSMauro Carvalho Chehab }
607b285192aSMauro Carvalho Chehab 
608b285192aSMauro Carvalho Chehab /* Primary IRQ handler and dispatch mechanism */
609b285192aSMauro Carvalho Chehab static irqreturn_t saa7164_irq(int irq, void *dev_id)
610b285192aSMauro Carvalho Chehab {
611b285192aSMauro Carvalho Chehab 	struct saa7164_dev *dev = dev_id;
6123c71d978SMauro Carvalho Chehab 	struct saa7164_port *porta, *portb, *portc, *portd, *porte, *portf;
613b285192aSMauro Carvalho Chehab 
614b285192aSMauro Carvalho Chehab 	u32 intid, intstat[INT_SIZE/4];
615b285192aSMauro Carvalho Chehab 	int i, handled = 0, bit;
616b285192aSMauro Carvalho Chehab 
617b285192aSMauro Carvalho Chehab 	if (dev == NULL) {
618b285192aSMauro Carvalho Chehab 		printk(KERN_ERR "%s() No device specified\n", __func__);
619b285192aSMauro Carvalho Chehab 		handled = 0;
620b285192aSMauro Carvalho Chehab 		goto out;
621b285192aSMauro Carvalho Chehab 	}
622b285192aSMauro Carvalho Chehab 
6233c71d978SMauro Carvalho Chehab 	porta = &dev->ports[SAA7164_PORT_TS1];
6243c71d978SMauro Carvalho Chehab 	portb = &dev->ports[SAA7164_PORT_TS2];
6253c71d978SMauro Carvalho Chehab 	portc = &dev->ports[SAA7164_PORT_ENC1];
6263c71d978SMauro Carvalho Chehab 	portd = &dev->ports[SAA7164_PORT_ENC2];
6273c71d978SMauro Carvalho Chehab 	porte = &dev->ports[SAA7164_PORT_VBI1];
6283c71d978SMauro Carvalho Chehab 	portf = &dev->ports[SAA7164_PORT_VBI2];
6293c71d978SMauro Carvalho Chehab 
630b285192aSMauro Carvalho Chehab 	/* Check that the hardware is accessible. If the status bytes are
631b285192aSMauro Carvalho Chehab 	 * 0xFF then the device is not accessible, the the IRQ belongs
632b285192aSMauro Carvalho Chehab 	 * to another driver.
633b285192aSMauro Carvalho Chehab 	 * 4 x u32 interrupt registers.
634b285192aSMauro Carvalho Chehab 	 */
635b285192aSMauro Carvalho Chehab 	for (i = 0; i < INT_SIZE/4; i++) {
636b285192aSMauro Carvalho Chehab 
637b285192aSMauro Carvalho Chehab 		/* TODO: Convert into saa7164_readl() */
638b285192aSMauro Carvalho Chehab 		/* Read the 4 hardware interrupt registers */
639b285192aSMauro Carvalho Chehab 		intstat[i] = saa7164_readl(dev->int_status + (i * 4));
640b285192aSMauro Carvalho Chehab 
641b285192aSMauro Carvalho Chehab 		if (intstat[i])
642b285192aSMauro Carvalho Chehab 			handled = 1;
643b285192aSMauro Carvalho Chehab 	}
644b285192aSMauro Carvalho Chehab 	if (handled == 0)
645b285192aSMauro Carvalho Chehab 		goto out;
646b285192aSMauro Carvalho Chehab 
647b285192aSMauro Carvalho Chehab 	/* For each of the HW interrupt registers */
648b285192aSMauro Carvalho Chehab 	for (i = 0; i < INT_SIZE/4; i++) {
649b285192aSMauro Carvalho Chehab 
650b285192aSMauro Carvalho Chehab 		if (intstat[i]) {
651b285192aSMauro Carvalho Chehab 			/* Each function of the board has it's own interruptid.
652b285192aSMauro Carvalho Chehab 			 * Find the function that triggered then call
653b285192aSMauro Carvalho Chehab 			 * it's handler.
654b285192aSMauro Carvalho Chehab 			 */
655b285192aSMauro Carvalho Chehab 			for (bit = 0; bit < 32; bit++) {
656b285192aSMauro Carvalho Chehab 
657b285192aSMauro Carvalho Chehab 				if (((intstat[i] >> bit) & 0x00000001) == 0)
658b285192aSMauro Carvalho Chehab 					continue;
659b285192aSMauro Carvalho Chehab 
660b285192aSMauro Carvalho Chehab 				/* Calculate the interrupt id (0x00 to 0x7f) */
661b285192aSMauro Carvalho Chehab 
662b285192aSMauro Carvalho Chehab 				intid = (i * 32) + bit;
663b285192aSMauro Carvalho Chehab 				if (intid == dev->intfdesc.bInterruptId) {
664b285192aSMauro Carvalho Chehab 					/* A response to an cmd/api call */
665b285192aSMauro Carvalho Chehab 					schedule_work(&dev->workcmd);
666b285192aSMauro Carvalho Chehab 				} else if (intid == porta->hwcfg.interruptid) {
667b285192aSMauro Carvalho Chehab 
668b285192aSMauro Carvalho Chehab 					/* Transport path 1 */
669b285192aSMauro Carvalho Chehab 					saa7164_irq_ts(porta);
670b285192aSMauro Carvalho Chehab 
671b285192aSMauro Carvalho Chehab 				} else if (intid == portb->hwcfg.interruptid) {
672b285192aSMauro Carvalho Chehab 
673b285192aSMauro Carvalho Chehab 					/* Transport path 2 */
674b285192aSMauro Carvalho Chehab 					saa7164_irq_ts(portb);
675b285192aSMauro Carvalho Chehab 
676b285192aSMauro Carvalho Chehab 				} else if (intid == portc->hwcfg.interruptid) {
677b285192aSMauro Carvalho Chehab 
678b285192aSMauro Carvalho Chehab 					/* Encoder path 1 */
679b285192aSMauro Carvalho Chehab 					saa7164_irq_encoder(portc);
680b285192aSMauro Carvalho Chehab 
681b285192aSMauro Carvalho Chehab 				} else if (intid == portd->hwcfg.interruptid) {
682b285192aSMauro Carvalho Chehab 
683b285192aSMauro Carvalho Chehab 					/* Encoder path 2 */
684b285192aSMauro Carvalho Chehab 					saa7164_irq_encoder(portd);
685b285192aSMauro Carvalho Chehab 
686b285192aSMauro Carvalho Chehab 				} else if (intid == porte->hwcfg.interruptid) {
687b285192aSMauro Carvalho Chehab 
688b285192aSMauro Carvalho Chehab 					/* VBI path 1 */
689b285192aSMauro Carvalho Chehab 					saa7164_irq_vbi(porte);
690b285192aSMauro Carvalho Chehab 
691b285192aSMauro Carvalho Chehab 				} else if (intid == portf->hwcfg.interruptid) {
692b285192aSMauro Carvalho Chehab 
693b285192aSMauro Carvalho Chehab 					/* VBI path 2 */
694b285192aSMauro Carvalho Chehab 					saa7164_irq_vbi(portf);
695b285192aSMauro Carvalho Chehab 
696b285192aSMauro Carvalho Chehab 				} else {
697b285192aSMauro Carvalho Chehab 					/* Find the function */
698b285192aSMauro Carvalho Chehab 					dprintk(DBGLVL_IRQ,
69924f711c1SMauro Carvalho Chehab 						"%s() unhandled interrupt reg 0x%x bit 0x%x intid = 0x%x\n",
700b285192aSMauro Carvalho Chehab 						__func__, i, bit, intid);
701b285192aSMauro Carvalho Chehab 				}
702b285192aSMauro Carvalho Chehab 			}
703b285192aSMauro Carvalho Chehab 
704b285192aSMauro Carvalho Chehab 			/* Ack it */
705b285192aSMauro Carvalho Chehab 			saa7164_writel(dev->int_ack + (i * 4), intstat[i]);
706b285192aSMauro Carvalho Chehab 
707b285192aSMauro Carvalho Chehab 		}
708b285192aSMauro Carvalho Chehab 	}
709b285192aSMauro Carvalho Chehab out:
710b285192aSMauro Carvalho Chehab 	return IRQ_RETVAL(handled);
711b285192aSMauro Carvalho Chehab }
712b285192aSMauro Carvalho Chehab 
713b285192aSMauro Carvalho Chehab void saa7164_getfirmwarestatus(struct saa7164_dev *dev)
714b285192aSMauro Carvalho Chehab {
715b285192aSMauro Carvalho Chehab 	struct saa7164_fw_status *s = &dev->fw_status;
716b285192aSMauro Carvalho Chehab 
717b285192aSMauro Carvalho Chehab 	dev->fw_status.status = saa7164_readl(SAA_DEVICE_SYSINIT_STATUS);
718b285192aSMauro Carvalho Chehab 	dev->fw_status.mode = saa7164_readl(SAA_DEVICE_SYSINIT_MODE);
719b285192aSMauro Carvalho Chehab 	dev->fw_status.spec = saa7164_readl(SAA_DEVICE_SYSINIT_SPEC);
720b285192aSMauro Carvalho Chehab 	dev->fw_status.inst = saa7164_readl(SAA_DEVICE_SYSINIT_INST);
721b285192aSMauro Carvalho Chehab 	dev->fw_status.cpuload = saa7164_readl(SAA_DEVICE_SYSINIT_CPULOAD);
722b285192aSMauro Carvalho Chehab 	dev->fw_status.remainheap =
723b285192aSMauro Carvalho Chehab 		saa7164_readl(SAA_DEVICE_SYSINIT_REMAINHEAP);
724b285192aSMauro Carvalho Chehab 
725b285192aSMauro Carvalho Chehab 	dprintk(1, "Firmware status:\n");
726b285192aSMauro Carvalho Chehab 	dprintk(1, " .status     = 0x%08x\n", s->status);
727b285192aSMauro Carvalho Chehab 	dprintk(1, " .mode       = 0x%08x\n", s->mode);
728b285192aSMauro Carvalho Chehab 	dprintk(1, " .spec       = 0x%08x\n", s->spec);
729b285192aSMauro Carvalho Chehab 	dprintk(1, " .inst       = 0x%08x\n", s->inst);
730b285192aSMauro Carvalho Chehab 	dprintk(1, " .cpuload    = 0x%08x\n", s->cpuload);
731b285192aSMauro Carvalho Chehab 	dprintk(1, " .remainheap = 0x%08x\n", s->remainheap);
732b285192aSMauro Carvalho Chehab }
733b285192aSMauro Carvalho Chehab 
734b285192aSMauro Carvalho Chehab u32 saa7164_getcurrentfirmwareversion(struct saa7164_dev *dev)
735b285192aSMauro Carvalho Chehab {
736b285192aSMauro Carvalho Chehab 	u32 reg;
737b285192aSMauro Carvalho Chehab 
738b285192aSMauro Carvalho Chehab 	reg = saa7164_readl(SAA_DEVICE_VERSION);
739b285192aSMauro Carvalho Chehab 	dprintk(1, "Device running firmware version %d.%d.%d.%d (0x%x)\n",
740b285192aSMauro Carvalho Chehab 		(reg & 0x0000fc00) >> 10,
741b285192aSMauro Carvalho Chehab 		(reg & 0x000003e0) >> 5,
742b285192aSMauro Carvalho Chehab 		(reg & 0x0000001f),
743b285192aSMauro Carvalho Chehab 		(reg & 0xffff0000) >> 16,
744b285192aSMauro Carvalho Chehab 		reg);
745b285192aSMauro Carvalho Chehab 
746b285192aSMauro Carvalho Chehab 	return reg;
747b285192aSMauro Carvalho Chehab }
748b285192aSMauro Carvalho Chehab 
749b285192aSMauro Carvalho Chehab /* TODO: Debugging func, remove */
750b285192aSMauro Carvalho Chehab void saa7164_dumpregs(struct saa7164_dev *dev, u32 addr)
751b285192aSMauro Carvalho Chehab {
752b285192aSMauro Carvalho Chehab 	int i;
753b285192aSMauro Carvalho Chehab 
75424f711c1SMauro Carvalho Chehab 	dprintk(1, "--------------------> 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n");
755b285192aSMauro Carvalho Chehab 
756b285192aSMauro Carvalho Chehab 	for (i = 0; i < 0x100; i += 16)
75724f711c1SMauro Carvalho Chehab 		dprintk(1, "region0[0x%08x] = %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
75824f711c1SMauro Carvalho Chehab 			i,
759b285192aSMauro Carvalho Chehab 			(u8)saa7164_readb(addr + i + 0),
760b285192aSMauro Carvalho Chehab 			(u8)saa7164_readb(addr + i + 1),
761b285192aSMauro Carvalho Chehab 			(u8)saa7164_readb(addr + i + 2),
762b285192aSMauro Carvalho Chehab 			(u8)saa7164_readb(addr + i + 3),
763b285192aSMauro Carvalho Chehab 			(u8)saa7164_readb(addr + i + 4),
764b285192aSMauro Carvalho Chehab 			(u8)saa7164_readb(addr + i + 5),
765b285192aSMauro Carvalho Chehab 			(u8)saa7164_readb(addr + i + 6),
766b285192aSMauro Carvalho Chehab 			(u8)saa7164_readb(addr + i + 7),
767b285192aSMauro Carvalho Chehab 			(u8)saa7164_readb(addr + i + 8),
768b285192aSMauro Carvalho Chehab 			(u8)saa7164_readb(addr + i + 9),
769b285192aSMauro Carvalho Chehab 			(u8)saa7164_readb(addr + i + 10),
770b285192aSMauro Carvalho Chehab 			(u8)saa7164_readb(addr + i + 11),
771b285192aSMauro Carvalho Chehab 			(u8)saa7164_readb(addr + i + 12),
772b285192aSMauro Carvalho Chehab 			(u8)saa7164_readb(addr + i + 13),
773b285192aSMauro Carvalho Chehab 			(u8)saa7164_readb(addr + i + 14),
774b285192aSMauro Carvalho Chehab 			(u8)saa7164_readb(addr + i + 15)
775b285192aSMauro Carvalho Chehab 			);
776b285192aSMauro Carvalho Chehab }
777b285192aSMauro Carvalho Chehab 
778b285192aSMauro Carvalho Chehab static void saa7164_dump_hwdesc(struct saa7164_dev *dev)
779b285192aSMauro Carvalho Chehab {
780b285192aSMauro Carvalho Chehab 	dprintk(1, "@0x%p hwdesc sizeof(struct tmComResHWDescr) = %d bytes\n",
781b285192aSMauro Carvalho Chehab 		&dev->hwdesc, (u32)sizeof(struct tmComResHWDescr));
782b285192aSMauro Carvalho Chehab 
783b285192aSMauro Carvalho Chehab 	dprintk(1, " .bLength = 0x%x\n", dev->hwdesc.bLength);
784b285192aSMauro Carvalho Chehab 	dprintk(1, " .bDescriptorType = 0x%x\n", dev->hwdesc.bDescriptorType);
785b285192aSMauro Carvalho Chehab 	dprintk(1, " .bDescriptorSubtype = 0x%x\n",
786b285192aSMauro Carvalho Chehab 		dev->hwdesc.bDescriptorSubtype);
787b285192aSMauro Carvalho Chehab 
788b285192aSMauro Carvalho Chehab 	dprintk(1, " .bcdSpecVersion = 0x%x\n", dev->hwdesc.bcdSpecVersion);
789b285192aSMauro Carvalho Chehab 	dprintk(1, " .dwClockFrequency = 0x%x\n", dev->hwdesc.dwClockFrequency);
790b285192aSMauro Carvalho Chehab 	dprintk(1, " .dwClockUpdateRes = 0x%x\n", dev->hwdesc.dwClockUpdateRes);
791b285192aSMauro Carvalho Chehab 	dprintk(1, " .bCapabilities = 0x%x\n", dev->hwdesc.bCapabilities);
792b285192aSMauro Carvalho Chehab 	dprintk(1, " .dwDeviceRegistersLocation = 0x%x\n",
793b285192aSMauro Carvalho Chehab 		dev->hwdesc.dwDeviceRegistersLocation);
794b285192aSMauro Carvalho Chehab 
795b285192aSMauro Carvalho Chehab 	dprintk(1, " .dwHostMemoryRegion = 0x%x\n",
796b285192aSMauro Carvalho Chehab 		dev->hwdesc.dwHostMemoryRegion);
797b285192aSMauro Carvalho Chehab 
798b285192aSMauro Carvalho Chehab 	dprintk(1, " .dwHostMemoryRegionSize = 0x%x\n",
799b285192aSMauro Carvalho Chehab 		dev->hwdesc.dwHostMemoryRegionSize);
800b285192aSMauro Carvalho Chehab 
801b285192aSMauro Carvalho Chehab 	dprintk(1, " .dwHostHibernatMemRegion = 0x%x\n",
802b285192aSMauro Carvalho Chehab 		dev->hwdesc.dwHostHibernatMemRegion);
803b285192aSMauro Carvalho Chehab 
804b285192aSMauro Carvalho Chehab 	dprintk(1, " .dwHostHibernatMemRegionSize = 0x%x\n",
805b285192aSMauro Carvalho Chehab 		dev->hwdesc.dwHostHibernatMemRegionSize);
806b285192aSMauro Carvalho Chehab }
807b285192aSMauro Carvalho Chehab 
808b285192aSMauro Carvalho Chehab static void saa7164_dump_intfdesc(struct saa7164_dev *dev)
809b285192aSMauro Carvalho Chehab {
81024f711c1SMauro Carvalho Chehab 	dprintk(1, "@0x%p intfdesc sizeof(struct tmComResInterfaceDescr) = %d bytes\n",
811b285192aSMauro Carvalho Chehab 		&dev->intfdesc, (u32)sizeof(struct tmComResInterfaceDescr));
812b285192aSMauro Carvalho Chehab 
813b285192aSMauro Carvalho Chehab 	dprintk(1, " .bLength = 0x%x\n", dev->intfdesc.bLength);
814b285192aSMauro Carvalho Chehab 	dprintk(1, " .bDescriptorType = 0x%x\n", dev->intfdesc.bDescriptorType);
815b285192aSMauro Carvalho Chehab 	dprintk(1, " .bDescriptorSubtype = 0x%x\n",
816b285192aSMauro Carvalho Chehab 		dev->intfdesc.bDescriptorSubtype);
817b285192aSMauro Carvalho Chehab 
818b285192aSMauro Carvalho Chehab 	dprintk(1, " .bFlags = 0x%x\n", dev->intfdesc.bFlags);
819b285192aSMauro Carvalho Chehab 	dprintk(1, " .bInterfaceType = 0x%x\n", dev->intfdesc.bInterfaceType);
820b285192aSMauro Carvalho Chehab 	dprintk(1, " .bInterfaceId = 0x%x\n", dev->intfdesc.bInterfaceId);
821b285192aSMauro Carvalho Chehab 	dprintk(1, " .bBaseInterface = 0x%x\n", dev->intfdesc.bBaseInterface);
822b285192aSMauro Carvalho Chehab 	dprintk(1, " .bInterruptId = 0x%x\n", dev->intfdesc.bInterruptId);
823b285192aSMauro Carvalho Chehab 	dprintk(1, " .bDebugInterruptId = 0x%x\n",
824b285192aSMauro Carvalho Chehab 		dev->intfdesc.bDebugInterruptId);
825b285192aSMauro Carvalho Chehab 
826b285192aSMauro Carvalho Chehab 	dprintk(1, " .BARLocation = 0x%x\n", dev->intfdesc.BARLocation);
827b285192aSMauro Carvalho Chehab }
828b285192aSMauro Carvalho Chehab 
829b285192aSMauro Carvalho Chehab static void saa7164_dump_busdesc(struct saa7164_dev *dev)
830b285192aSMauro Carvalho Chehab {
831b285192aSMauro Carvalho Chehab 	dprintk(1, "@0x%p busdesc sizeof(struct tmComResBusDescr) = %d bytes\n",
832b285192aSMauro Carvalho Chehab 		&dev->busdesc, (u32)sizeof(struct tmComResBusDescr));
833b285192aSMauro Carvalho Chehab 
834b285192aSMauro Carvalho Chehab 	dprintk(1, " .CommandRing   = 0x%016Lx\n", dev->busdesc.CommandRing);
835b285192aSMauro Carvalho Chehab 	dprintk(1, " .ResponseRing  = 0x%016Lx\n", dev->busdesc.ResponseRing);
836b285192aSMauro Carvalho Chehab 	dprintk(1, " .CommandWrite  = 0x%x\n", dev->busdesc.CommandWrite);
837b285192aSMauro Carvalho Chehab 	dprintk(1, " .CommandRead   = 0x%x\n", dev->busdesc.CommandRead);
838b285192aSMauro Carvalho Chehab 	dprintk(1, " .ResponseWrite = 0x%x\n", dev->busdesc.ResponseWrite);
839b285192aSMauro Carvalho Chehab 	dprintk(1, " .ResponseRead  = 0x%x\n", dev->busdesc.ResponseRead);
840b285192aSMauro Carvalho Chehab }
841b285192aSMauro Carvalho Chehab 
842b285192aSMauro Carvalho Chehab /* Much of the hardware configuration and PCI registers are configured
843b285192aSMauro Carvalho Chehab  * dynamically depending on firmware. We have to cache some initial
844b285192aSMauro Carvalho Chehab  * structures then use these to locate other important structures
845b285192aSMauro Carvalho Chehab  * from PCI space.
846b285192aSMauro Carvalho Chehab  */
847b285192aSMauro Carvalho Chehab static void saa7164_get_descriptors(struct saa7164_dev *dev)
848b285192aSMauro Carvalho Chehab {
849b285192aSMauro Carvalho Chehab 	memcpy_fromio(&dev->hwdesc, dev->bmmio, sizeof(struct tmComResHWDescr));
850b285192aSMauro Carvalho Chehab 	memcpy_fromio(&dev->intfdesc, dev->bmmio + sizeof(struct tmComResHWDescr),
851b285192aSMauro Carvalho Chehab 		sizeof(struct tmComResInterfaceDescr));
852b285192aSMauro Carvalho Chehab 	memcpy_fromio(&dev->busdesc, dev->bmmio + dev->intfdesc.BARLocation,
853b285192aSMauro Carvalho Chehab 		sizeof(struct tmComResBusDescr));
854b285192aSMauro Carvalho Chehab 
855b285192aSMauro Carvalho Chehab 	if (dev->hwdesc.bLength != sizeof(struct tmComResHWDescr)) {
856b285192aSMauro Carvalho Chehab 		printk(KERN_ERR "Structure struct tmComResHWDescr is mangled\n");
857b285192aSMauro Carvalho Chehab 		printk(KERN_ERR "Need %x got %d\n", dev->hwdesc.bLength,
858b285192aSMauro Carvalho Chehab 			(u32)sizeof(struct tmComResHWDescr));
859b285192aSMauro Carvalho Chehab 	} else
860b285192aSMauro Carvalho Chehab 		saa7164_dump_hwdesc(dev);
861b285192aSMauro Carvalho Chehab 
862b285192aSMauro Carvalho Chehab 	if (dev->intfdesc.bLength != sizeof(struct tmComResInterfaceDescr)) {
863b285192aSMauro Carvalho Chehab 		printk(KERN_ERR "struct struct tmComResInterfaceDescr is mangled\n");
864b285192aSMauro Carvalho Chehab 		printk(KERN_ERR "Need %x got %d\n", dev->intfdesc.bLength,
865b285192aSMauro Carvalho Chehab 			(u32)sizeof(struct tmComResInterfaceDescr));
866b285192aSMauro Carvalho Chehab 	} else
867b285192aSMauro Carvalho Chehab 		saa7164_dump_intfdesc(dev);
868b285192aSMauro Carvalho Chehab 
869b285192aSMauro Carvalho Chehab 	saa7164_dump_busdesc(dev);
870b285192aSMauro Carvalho Chehab }
871b285192aSMauro Carvalho Chehab 
872b285192aSMauro Carvalho Chehab static int saa7164_pci_quirks(struct saa7164_dev *dev)
873b285192aSMauro Carvalho Chehab {
874b285192aSMauro Carvalho Chehab 	return 0;
875b285192aSMauro Carvalho Chehab }
876b285192aSMauro Carvalho Chehab 
877b285192aSMauro Carvalho Chehab static int get_resources(struct saa7164_dev *dev)
878b285192aSMauro Carvalho Chehab {
879b285192aSMauro Carvalho Chehab 	if (request_mem_region(pci_resource_start(dev->pci, 0),
880b285192aSMauro Carvalho Chehab 		pci_resource_len(dev->pci, 0), dev->name)) {
881b285192aSMauro Carvalho Chehab 
882b285192aSMauro Carvalho Chehab 		if (request_mem_region(pci_resource_start(dev->pci, 2),
883b285192aSMauro Carvalho Chehab 			pci_resource_len(dev->pci, 2), dev->name))
884b285192aSMauro Carvalho Chehab 			return 0;
885b285192aSMauro Carvalho Chehab 	}
886b285192aSMauro Carvalho Chehab 
887b285192aSMauro Carvalho Chehab 	printk(KERN_ERR "%s: can't get MMIO memory @ 0x%llx or 0x%llx\n",
888b285192aSMauro Carvalho Chehab 		dev->name,
889b285192aSMauro Carvalho Chehab 		(u64)pci_resource_start(dev->pci, 0),
890b285192aSMauro Carvalho Chehab 		(u64)pci_resource_start(dev->pci, 2));
891b285192aSMauro Carvalho Chehab 
892b285192aSMauro Carvalho Chehab 	return -EBUSY;
893b285192aSMauro Carvalho Chehab }
894b285192aSMauro Carvalho Chehab 
895b285192aSMauro Carvalho Chehab static int saa7164_port_init(struct saa7164_dev *dev, int portnr)
896b285192aSMauro Carvalho Chehab {
897b285192aSMauro Carvalho Chehab 	struct saa7164_port *port = NULL;
898b285192aSMauro Carvalho Chehab 
899b285192aSMauro Carvalho Chehab 	if ((portnr < 0) || (portnr >= SAA7164_MAX_PORTS))
900b285192aSMauro Carvalho Chehab 		BUG();
901b285192aSMauro Carvalho Chehab 
902b285192aSMauro Carvalho Chehab 	port = &dev->ports[portnr];
903b285192aSMauro Carvalho Chehab 
904b285192aSMauro Carvalho Chehab 	port->dev = dev;
905b285192aSMauro Carvalho Chehab 	port->nr = portnr;
906b285192aSMauro Carvalho Chehab 
907b285192aSMauro Carvalho Chehab 	if ((portnr == SAA7164_PORT_TS1) || (portnr == SAA7164_PORT_TS2))
908b285192aSMauro Carvalho Chehab 		port->type = SAA7164_MPEG_DVB;
909b285192aSMauro Carvalho Chehab 	else
910b285192aSMauro Carvalho Chehab 	if ((portnr == SAA7164_PORT_ENC1) || (portnr == SAA7164_PORT_ENC2)) {
911b285192aSMauro Carvalho Chehab 		port->type = SAA7164_MPEG_ENCODER;
912b285192aSMauro Carvalho Chehab 
913b285192aSMauro Carvalho Chehab 		/* We need a deferred interrupt handler for cmd handling */
914b285192aSMauro Carvalho Chehab 		INIT_WORK(&port->workenc, saa7164_work_enchandler);
915b285192aSMauro Carvalho Chehab 	} else if ((portnr == SAA7164_PORT_VBI1) || (portnr == SAA7164_PORT_VBI2)) {
916b285192aSMauro Carvalho Chehab 		port->type = SAA7164_MPEG_VBI;
917b285192aSMauro Carvalho Chehab 
918b285192aSMauro Carvalho Chehab 		/* We need a deferred interrupt handler for cmd handling */
919b285192aSMauro Carvalho Chehab 		INIT_WORK(&port->workenc, saa7164_work_vbihandler);
920b285192aSMauro Carvalho Chehab 	} else
921b285192aSMauro Carvalho Chehab 		BUG();
922b285192aSMauro Carvalho Chehab 
923b285192aSMauro Carvalho Chehab 	/* Init all the critical resources */
924b285192aSMauro Carvalho Chehab 	mutex_init(&port->dvb.lock);
925b285192aSMauro Carvalho Chehab 	INIT_LIST_HEAD(&port->dmaqueue.list);
926b285192aSMauro Carvalho Chehab 	mutex_init(&port->dmaqueue_lock);
927b285192aSMauro Carvalho Chehab 
928b285192aSMauro Carvalho Chehab 	INIT_LIST_HEAD(&port->list_buf_used.list);
929b285192aSMauro Carvalho Chehab 	INIT_LIST_HEAD(&port->list_buf_free.list);
930b285192aSMauro Carvalho Chehab 	init_waitqueue_head(&port->wait_read);
931b285192aSMauro Carvalho Chehab 
932b285192aSMauro Carvalho Chehab 
933b285192aSMauro Carvalho Chehab 	saa7164_histogram_reset(&port->irq_interval, "irq intervals");
934b285192aSMauro Carvalho Chehab 	saa7164_histogram_reset(&port->svc_interval, "deferred intervals");
935b285192aSMauro Carvalho Chehab 	saa7164_histogram_reset(&port->irq_svc_interval,
936b285192aSMauro Carvalho Chehab 		"irq to deferred intervals");
937b285192aSMauro Carvalho Chehab 	saa7164_histogram_reset(&port->read_interval,
938b285192aSMauro Carvalho Chehab 		"encoder/vbi read() intervals");
939b285192aSMauro Carvalho Chehab 	saa7164_histogram_reset(&port->poll_interval,
940b285192aSMauro Carvalho Chehab 		"encoder/vbi poll() intervals");
941b285192aSMauro Carvalho Chehab 
942b285192aSMauro Carvalho Chehab 	return 0;
943b285192aSMauro Carvalho Chehab }
944b285192aSMauro Carvalho Chehab 
945b285192aSMauro Carvalho Chehab static int saa7164_dev_setup(struct saa7164_dev *dev)
946b285192aSMauro Carvalho Chehab {
947b285192aSMauro Carvalho Chehab 	int i;
948b285192aSMauro Carvalho Chehab 
949b285192aSMauro Carvalho Chehab 	mutex_init(&dev->lock);
950b285192aSMauro Carvalho Chehab 	atomic_inc(&dev->refcount);
951b285192aSMauro Carvalho Chehab 	dev->nr = saa7164_devcount++;
952b285192aSMauro Carvalho Chehab 
953b285192aSMauro Carvalho Chehab 	snprintf(dev->name, sizeof(dev->name), "saa7164[%d]", dev->nr);
954b285192aSMauro Carvalho Chehab 
955b285192aSMauro Carvalho Chehab 	mutex_lock(&devlist);
956b285192aSMauro Carvalho Chehab 	list_add_tail(&dev->devlist, &saa7164_devlist);
957b285192aSMauro Carvalho Chehab 	mutex_unlock(&devlist);
958b285192aSMauro Carvalho Chehab 
959b285192aSMauro Carvalho Chehab 	/* board config */
960b285192aSMauro Carvalho Chehab 	dev->board = UNSET;
961b285192aSMauro Carvalho Chehab 	if (card[dev->nr] < saa7164_bcount)
962b285192aSMauro Carvalho Chehab 		dev->board = card[dev->nr];
963b285192aSMauro Carvalho Chehab 
964b285192aSMauro Carvalho Chehab 	for (i = 0; UNSET == dev->board  &&  i < saa7164_idcount; i++)
965b285192aSMauro Carvalho Chehab 		if (dev->pci->subsystem_vendor == saa7164_subids[i].subvendor &&
966b285192aSMauro Carvalho Chehab 			dev->pci->subsystem_device ==
967b285192aSMauro Carvalho Chehab 				saa7164_subids[i].subdevice)
968b285192aSMauro Carvalho Chehab 				dev->board = saa7164_subids[i].card;
969b285192aSMauro Carvalho Chehab 
970b285192aSMauro Carvalho Chehab 	if (UNSET == dev->board) {
971b285192aSMauro Carvalho Chehab 		dev->board = SAA7164_BOARD_UNKNOWN;
972b285192aSMauro Carvalho Chehab 		saa7164_card_list(dev);
973b285192aSMauro Carvalho Chehab 	}
974b285192aSMauro Carvalho Chehab 
975b285192aSMauro Carvalho Chehab 	dev->pci_bus  = dev->pci->bus->number;
976b285192aSMauro Carvalho Chehab 	dev->pci_slot = PCI_SLOT(dev->pci->devfn);
977b285192aSMauro Carvalho Chehab 
978b285192aSMauro Carvalho Chehab 	/* I2C Defaults / setup */
979b285192aSMauro Carvalho Chehab 	dev->i2c_bus[0].dev = dev;
980b285192aSMauro Carvalho Chehab 	dev->i2c_bus[0].nr = 0;
981b285192aSMauro Carvalho Chehab 	dev->i2c_bus[1].dev = dev;
982b285192aSMauro Carvalho Chehab 	dev->i2c_bus[1].nr = 1;
983b285192aSMauro Carvalho Chehab 	dev->i2c_bus[2].dev = dev;
984b285192aSMauro Carvalho Chehab 	dev->i2c_bus[2].nr = 2;
985b285192aSMauro Carvalho Chehab 
986b285192aSMauro Carvalho Chehab 	/* Transport + Encoder ports 1, 2, 3, 4 - Defaults / setup */
987b285192aSMauro Carvalho Chehab 	saa7164_port_init(dev, SAA7164_PORT_TS1);
988b285192aSMauro Carvalho Chehab 	saa7164_port_init(dev, SAA7164_PORT_TS2);
989b285192aSMauro Carvalho Chehab 	saa7164_port_init(dev, SAA7164_PORT_ENC1);
990b285192aSMauro Carvalho Chehab 	saa7164_port_init(dev, SAA7164_PORT_ENC2);
991b285192aSMauro Carvalho Chehab 	saa7164_port_init(dev, SAA7164_PORT_VBI1);
992b285192aSMauro Carvalho Chehab 	saa7164_port_init(dev, SAA7164_PORT_VBI2);
993b285192aSMauro Carvalho Chehab 
994b285192aSMauro Carvalho Chehab 	if (get_resources(dev) < 0) {
99524f711c1SMauro Carvalho Chehab 		printk(KERN_ERR "CORE %s No more PCIe resources for subsystem: %04x:%04x\n",
996b285192aSMauro Carvalho Chehab 		       dev->name, dev->pci->subsystem_vendor,
997b285192aSMauro Carvalho Chehab 		       dev->pci->subsystem_device);
998b285192aSMauro Carvalho Chehab 
999b285192aSMauro Carvalho Chehab 		saa7164_devcount--;
1000b285192aSMauro Carvalho Chehab 		return -ENODEV;
1001b285192aSMauro Carvalho Chehab 	}
1002b285192aSMauro Carvalho Chehab 
1003b285192aSMauro Carvalho Chehab 	/* PCI/e allocations */
1004b285192aSMauro Carvalho Chehab 	dev->lmmio = ioremap(pci_resource_start(dev->pci, 0),
1005b285192aSMauro Carvalho Chehab 			     pci_resource_len(dev->pci, 0));
1006b285192aSMauro Carvalho Chehab 
1007b285192aSMauro Carvalho Chehab 	dev->lmmio2 = ioremap(pci_resource_start(dev->pci, 2),
1008b285192aSMauro Carvalho Chehab 			     pci_resource_len(dev->pci, 2));
1009b285192aSMauro Carvalho Chehab 
1010b285192aSMauro Carvalho Chehab 	dev->bmmio = (u8 __iomem *)dev->lmmio;
1011b285192aSMauro Carvalho Chehab 	dev->bmmio2 = (u8 __iomem *)dev->lmmio2;
1012b285192aSMauro Carvalho Chehab 
101316790554SMauro Carvalho Chehab 	/* Interrupt and ack register locations offset of bmmio */
1014b285192aSMauro Carvalho Chehab 	dev->int_status = 0x183000 + 0xf80;
1015b285192aSMauro Carvalho Chehab 	dev->int_ack = 0x183000 + 0xf90;
1016b285192aSMauro Carvalho Chehab 
1017b285192aSMauro Carvalho Chehab 	printk(KERN_INFO
1018b285192aSMauro Carvalho Chehab 		"CORE %s: subsystem: %04x:%04x, board: %s [card=%d,%s]\n",
1019b285192aSMauro Carvalho Chehab 	       dev->name, dev->pci->subsystem_vendor,
1020b285192aSMauro Carvalho Chehab 	       dev->pci->subsystem_device, saa7164_boards[dev->board].name,
1021b285192aSMauro Carvalho Chehab 	       dev->board, card[dev->nr] == dev->board ?
1022b285192aSMauro Carvalho Chehab 	       "insmod option" : "autodetected");
1023b285192aSMauro Carvalho Chehab 
1024b285192aSMauro Carvalho Chehab 	saa7164_pci_quirks(dev);
1025b285192aSMauro Carvalho Chehab 
1026b285192aSMauro Carvalho Chehab 	return 0;
1027b285192aSMauro Carvalho Chehab }
1028b285192aSMauro Carvalho Chehab 
1029b285192aSMauro Carvalho Chehab static void saa7164_dev_unregister(struct saa7164_dev *dev)
1030b285192aSMauro Carvalho Chehab {
1031b285192aSMauro Carvalho Chehab 	dprintk(1, "%s()\n", __func__);
1032b285192aSMauro Carvalho Chehab 
1033b285192aSMauro Carvalho Chehab 	release_mem_region(pci_resource_start(dev->pci, 0),
1034b285192aSMauro Carvalho Chehab 		pci_resource_len(dev->pci, 0));
1035b285192aSMauro Carvalho Chehab 
1036b285192aSMauro Carvalho Chehab 	release_mem_region(pci_resource_start(dev->pci, 2),
1037b285192aSMauro Carvalho Chehab 		pci_resource_len(dev->pci, 2));
1038b285192aSMauro Carvalho Chehab 
1039b285192aSMauro Carvalho Chehab 	if (!atomic_dec_and_test(&dev->refcount))
1040b285192aSMauro Carvalho Chehab 		return;
1041b285192aSMauro Carvalho Chehab 
1042b285192aSMauro Carvalho Chehab 	iounmap(dev->lmmio);
1043b285192aSMauro Carvalho Chehab 	iounmap(dev->lmmio2);
1044b285192aSMauro Carvalho Chehab 
1045b285192aSMauro Carvalho Chehab 	return;
1046b285192aSMauro Carvalho Chehab }
1047b285192aSMauro Carvalho Chehab 
1048b285192aSMauro Carvalho Chehab #ifdef CONFIG_PROC_FS
1049b285192aSMauro Carvalho Chehab static int saa7164_proc_show(struct seq_file *m, void *v)
1050b285192aSMauro Carvalho Chehab {
1051b285192aSMauro Carvalho Chehab 	struct saa7164_dev *dev;
1052b285192aSMauro Carvalho Chehab 	struct tmComResBusInfo *b;
1053b285192aSMauro Carvalho Chehab 	struct list_head *list;
1054b285192aSMauro Carvalho Chehab 	int i, c;
1055b285192aSMauro Carvalho Chehab 
1056b285192aSMauro Carvalho Chehab 	if (saa7164_devcount == 0)
1057b285192aSMauro Carvalho Chehab 		return 0;
1058b285192aSMauro Carvalho Chehab 
1059b285192aSMauro Carvalho Chehab 	list_for_each(list, &saa7164_devlist) {
1060b285192aSMauro Carvalho Chehab 		dev = list_entry(list, struct saa7164_dev, devlist);
1061b285192aSMauro Carvalho Chehab 		seq_printf(m, "%s = %p\n", dev->name, dev);
1062b285192aSMauro Carvalho Chehab 
1063b285192aSMauro Carvalho Chehab 		/* Lock the bus from any other access */
1064b285192aSMauro Carvalho Chehab 		b = &dev->bus;
1065b285192aSMauro Carvalho Chehab 		mutex_lock(&b->lock);
1066b285192aSMauro Carvalho Chehab 
1067b285192aSMauro Carvalho Chehab 		seq_printf(m, " .m_pdwSetWritePos = 0x%x (0x%08x)\n",
1068b285192aSMauro Carvalho Chehab 			b->m_dwSetReadPos, saa7164_readl(b->m_dwSetReadPos));
1069b285192aSMauro Carvalho Chehab 
1070b285192aSMauro Carvalho Chehab 		seq_printf(m, " .m_pdwSetReadPos  = 0x%x (0x%08x)\n",
1071b285192aSMauro Carvalho Chehab 			b->m_dwSetWritePos, saa7164_readl(b->m_dwSetWritePos));
1072b285192aSMauro Carvalho Chehab 
1073b285192aSMauro Carvalho Chehab 		seq_printf(m, " .m_pdwGetWritePos = 0x%x (0x%08x)\n",
1074b285192aSMauro Carvalho Chehab 			b->m_dwGetReadPos, saa7164_readl(b->m_dwGetReadPos));
1075b285192aSMauro Carvalho Chehab 
1076b285192aSMauro Carvalho Chehab 		seq_printf(m, " .m_pdwGetReadPos  = 0x%x (0x%08x)\n",
1077b285192aSMauro Carvalho Chehab 			b->m_dwGetWritePos, saa7164_readl(b->m_dwGetWritePos));
1078b285192aSMauro Carvalho Chehab 		c = 0;
1079b285192aSMauro Carvalho Chehab 		seq_printf(m, "\n  Set Ring:\n");
1080b285192aSMauro Carvalho Chehab 		seq_printf(m, "\n addr  00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n");
1081b285192aSMauro Carvalho Chehab 		for (i = 0; i < b->m_dwSizeSetRing; i++) {
1082b285192aSMauro Carvalho Chehab 			if (c == 0)
1083b285192aSMauro Carvalho Chehab 				seq_printf(m, " %04x:", i);
1084b285192aSMauro Carvalho Chehab 
1085065e1477SHans Verkuil 			seq_printf(m, " %02x", readb(b->m_pdwSetRing + i));
1086b285192aSMauro Carvalho Chehab 
1087b285192aSMauro Carvalho Chehab 			if (++c == 16) {
1088b285192aSMauro Carvalho Chehab 				seq_printf(m, "\n");
1089b285192aSMauro Carvalho Chehab 				c = 0;
1090b285192aSMauro Carvalho Chehab 			}
1091b285192aSMauro Carvalho Chehab 		}
1092b285192aSMauro Carvalho Chehab 
1093b285192aSMauro Carvalho Chehab 		c = 0;
1094b285192aSMauro Carvalho Chehab 		seq_printf(m, "\n  Get Ring:\n");
1095b285192aSMauro Carvalho Chehab 		seq_printf(m, "\n addr  00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n");
1096b285192aSMauro Carvalho Chehab 		for (i = 0; i < b->m_dwSizeGetRing; i++) {
1097b285192aSMauro Carvalho Chehab 			if (c == 0)
1098b285192aSMauro Carvalho Chehab 				seq_printf(m, " %04x:", i);
1099b285192aSMauro Carvalho Chehab 
1100065e1477SHans Verkuil 			seq_printf(m, " %02x", readb(b->m_pdwGetRing + i));
1101b285192aSMauro Carvalho Chehab 
1102b285192aSMauro Carvalho Chehab 			if (++c == 16) {
1103b285192aSMauro Carvalho Chehab 				seq_printf(m, "\n");
1104b285192aSMauro Carvalho Chehab 				c = 0;
1105b285192aSMauro Carvalho Chehab 			}
1106b285192aSMauro Carvalho Chehab 		}
1107b285192aSMauro Carvalho Chehab 
1108b285192aSMauro Carvalho Chehab 		mutex_unlock(&b->lock);
1109b285192aSMauro Carvalho Chehab 
1110b285192aSMauro Carvalho Chehab 	}
1111b285192aSMauro Carvalho Chehab 
1112b285192aSMauro Carvalho Chehab 	return 0;
1113b285192aSMauro Carvalho Chehab }
1114b285192aSMauro Carvalho Chehab 
1115b285192aSMauro Carvalho Chehab static int saa7164_proc_create(void)
1116b285192aSMauro Carvalho Chehab {
1117b285192aSMauro Carvalho Chehab 	struct proc_dir_entry *pe;
1118b285192aSMauro Carvalho Chehab 
11193f3942acSChristoph Hellwig 	pe = proc_create_single("saa7164", S_IRUGO, NULL, saa7164_proc_show);
1120b285192aSMauro Carvalho Chehab 	if (!pe)
1121b285192aSMauro Carvalho Chehab 		return -ENOMEM;
1122b285192aSMauro Carvalho Chehab 
1123b285192aSMauro Carvalho Chehab 	return 0;
1124b285192aSMauro Carvalho Chehab }
1125b285192aSMauro Carvalho Chehab #endif
1126b285192aSMauro Carvalho Chehab 
1127b285192aSMauro Carvalho Chehab static int saa7164_thread_function(void *data)
1128b285192aSMauro Carvalho Chehab {
1129b285192aSMauro Carvalho Chehab 	struct saa7164_dev *dev = data;
1130b285192aSMauro Carvalho Chehab 	struct tmFwInfoStruct fwinfo;
1131b285192aSMauro Carvalho Chehab 	u64 last_poll_time = 0;
1132b285192aSMauro Carvalho Chehab 
1133b285192aSMauro Carvalho Chehab 	dprintk(DBGLVL_THR, "thread started\n");
1134b285192aSMauro Carvalho Chehab 
1135b285192aSMauro Carvalho Chehab 	set_freezable();
1136b285192aSMauro Carvalho Chehab 
1137b285192aSMauro Carvalho Chehab 	while (1) {
1138b285192aSMauro Carvalho Chehab 		msleep_interruptible(100);
1139b285192aSMauro Carvalho Chehab 		if (kthread_should_stop())
1140b285192aSMauro Carvalho Chehab 			break;
1141b285192aSMauro Carvalho Chehab 		try_to_freeze();
1142b285192aSMauro Carvalho Chehab 
1143b285192aSMauro Carvalho Chehab 		dprintk(DBGLVL_THR, "thread running\n");
1144b285192aSMauro Carvalho Chehab 
1145b285192aSMauro Carvalho Chehab 		/* Dump the firmware debug message to console */
1146b285192aSMauro Carvalho Chehab 		/* Polling this costs us 1-2% of the arm CPU */
1147b285192aSMauro Carvalho Chehab 		/* convert this into a respnde to interrupt 0x7a */
1148b285192aSMauro Carvalho Chehab 		saa7164_api_collect_debug(dev);
1149b285192aSMauro Carvalho Chehab 
1150b285192aSMauro Carvalho Chehab 		/* Monitor CPU load every 1 second */
1151b285192aSMauro Carvalho Chehab 		if ((last_poll_time + 1000 /* ms */) < jiffies_to_msecs(jiffies)) {
1152b285192aSMauro Carvalho Chehab 			saa7164_api_get_load_info(dev, &fwinfo);
1153b285192aSMauro Carvalho Chehab 			last_poll_time = jiffies_to_msecs(jiffies);
1154b285192aSMauro Carvalho Chehab 		}
1155b285192aSMauro Carvalho Chehab 
1156b285192aSMauro Carvalho Chehab 	}
1157b285192aSMauro Carvalho Chehab 
1158b285192aSMauro Carvalho Chehab 	dprintk(DBGLVL_THR, "thread exiting\n");
1159b285192aSMauro Carvalho Chehab 	return 0;
1160b285192aSMauro Carvalho Chehab }
1161b285192aSMauro Carvalho Chehab 
116277978089SBrendan McGrath static bool saa7164_enable_msi(struct pci_dev *pci_dev, struct saa7164_dev *dev)
116377978089SBrendan McGrath {
116477978089SBrendan McGrath 	int err;
116577978089SBrendan McGrath 
116677978089SBrendan McGrath 	if (!enable_msi) {
116777978089SBrendan McGrath 		printk(KERN_WARNING "%s() MSI disabled by module parameter 'enable_msi'"
116877978089SBrendan McGrath 		       , __func__);
116977978089SBrendan McGrath 		return false;
117077978089SBrendan McGrath 	}
117177978089SBrendan McGrath 
117277978089SBrendan McGrath 	err = pci_enable_msi(pci_dev);
117377978089SBrendan McGrath 
117477978089SBrendan McGrath 	if (err) {
117524f711c1SMauro Carvalho Chehab 		printk(KERN_ERR "%s() Failed to enable MSI interrupt. Falling back to a shared IRQ\n",
117624f711c1SMauro Carvalho Chehab 		       __func__);
117777978089SBrendan McGrath 		return false;
117877978089SBrendan McGrath 	}
117977978089SBrendan McGrath 
118077978089SBrendan McGrath 	/* no error - so request an msi interrupt */
118177978089SBrendan McGrath 	err = request_irq(pci_dev->irq, saa7164_irq, 0,
118277978089SBrendan McGrath 						dev->name, dev);
118377978089SBrendan McGrath 
118477978089SBrendan McGrath 	if (err) {
118577978089SBrendan McGrath 		/* fall back to legacy interrupt */
118624f711c1SMauro Carvalho Chehab 		printk(KERN_ERR "%s() Failed to get an MSI interrupt. Falling back to a shared IRQ\n",
118724f711c1SMauro Carvalho Chehab 		       __func__);
118877978089SBrendan McGrath 		pci_disable_msi(pci_dev);
118977978089SBrendan McGrath 		return false;
119077978089SBrendan McGrath 	}
119177978089SBrendan McGrath 
119277978089SBrendan McGrath 	return true;
119377978089SBrendan McGrath }
119477978089SBrendan McGrath 
11954c62e976SGreg Kroah-Hartman static int saa7164_initdev(struct pci_dev *pci_dev,
1196b285192aSMauro Carvalho Chehab 			   const struct pci_device_id *pci_id)
1197b285192aSMauro Carvalho Chehab {
1198b285192aSMauro Carvalho Chehab 	struct saa7164_dev *dev;
1199b285192aSMauro Carvalho Chehab 	int err, i;
1200b285192aSMauro Carvalho Chehab 	u32 version;
1201b285192aSMauro Carvalho Chehab 
1202b285192aSMauro Carvalho Chehab 	dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1203b285192aSMauro Carvalho Chehab 	if (NULL == dev)
1204b285192aSMauro Carvalho Chehab 		return -ENOMEM;
1205b285192aSMauro Carvalho Chehab 
1206fd8d30bfSHans Verkuil 	err = v4l2_device_register(&pci_dev->dev, &dev->v4l2_dev);
1207fd8d30bfSHans Verkuil 	if (err < 0) {
1208d66de790SHans Verkuil 		dev_err(&pci_dev->dev, "v4l2_device_register failed\n");
1209d66de790SHans Verkuil 		goto fail_free;
1210d66de790SHans Verkuil 	}
1211d66de790SHans Verkuil 
1212b285192aSMauro Carvalho Chehab 	/* pci init */
1213b285192aSMauro Carvalho Chehab 	dev->pci = pci_dev;
1214b285192aSMauro Carvalho Chehab 	if (pci_enable_device(pci_dev)) {
1215b285192aSMauro Carvalho Chehab 		err = -EIO;
1216b285192aSMauro Carvalho Chehab 		goto fail_free;
1217b285192aSMauro Carvalho Chehab 	}
1218b285192aSMauro Carvalho Chehab 
1219b285192aSMauro Carvalho Chehab 	if (saa7164_dev_setup(dev) < 0) {
1220b285192aSMauro Carvalho Chehab 		err = -EINVAL;
1221b285192aSMauro Carvalho Chehab 		goto fail_free;
1222b285192aSMauro Carvalho Chehab 	}
1223b285192aSMauro Carvalho Chehab 
1224b285192aSMauro Carvalho Chehab 	/* print pci info */
1225b285192aSMauro Carvalho Chehab 	dev->pci_rev = pci_dev->revision;
1226b285192aSMauro Carvalho Chehab 	pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER,  &dev->pci_lat);
122724f711c1SMauro Carvalho Chehab 	printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, latency: %d, mmio: 0x%llx\n",
122824f711c1SMauro Carvalho Chehab 	       dev->name,
1229b285192aSMauro Carvalho Chehab 	       pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
1230b285192aSMauro Carvalho Chehab 	       dev->pci_lat,
1231b285192aSMauro Carvalho Chehab 		(unsigned long long)pci_resource_start(pci_dev, 0));
1232b285192aSMauro Carvalho Chehab 
1233b285192aSMauro Carvalho Chehab 	pci_set_master(pci_dev);
1234b285192aSMauro Carvalho Chehab 	/* TODO */
12351a47de6eSChristoph Hellwig 	err = pci_set_dma_mask(pci_dev, 0xffffffff);
12361a47de6eSChristoph Hellwig 	if (err) {
1237b285192aSMauro Carvalho Chehab 		printk("%s/0: Oops: no 32bit PCI DMA ???\n", dev->name);
1238b285192aSMauro Carvalho Chehab 		goto fail_irq;
1239b285192aSMauro Carvalho Chehab 	}
1240b285192aSMauro Carvalho Chehab 
124177978089SBrendan McGrath 	/* irq bit */
124277978089SBrendan McGrath 	if (saa7164_enable_msi(pci_dev, dev)) {
124377978089SBrendan McGrath 		dev->msi = true;
124477978089SBrendan McGrath 	} else {
124577978089SBrendan McGrath 		/* if we have an error (i.e. we don't have an interrupt)
124677978089SBrendan McGrath 			 or msi is not enabled - fallback to shared interrupt */
124777978089SBrendan McGrath 
1248b285192aSMauro Carvalho Chehab 		err = request_irq(pci_dev->irq, saa7164_irq,
12493e018fe4SMichael Opdenacker 				IRQF_SHARED, dev->name, dev);
125077978089SBrendan McGrath 
1251b285192aSMauro Carvalho Chehab 		if (err < 0) {
1252b285192aSMauro Carvalho Chehab 			printk(KERN_ERR "%s: can't get IRQ %d\n", dev->name,
1253b285192aSMauro Carvalho Chehab 			       pci_dev->irq);
1254b285192aSMauro Carvalho Chehab 			err = -EIO;
1255b285192aSMauro Carvalho Chehab 			goto fail_irq;
1256b285192aSMauro Carvalho Chehab 		}
125777978089SBrendan McGrath 	}
1258b285192aSMauro Carvalho Chehab 
1259b285192aSMauro Carvalho Chehab 	pci_set_drvdata(pci_dev, dev);
1260b285192aSMauro Carvalho Chehab 
1261b285192aSMauro Carvalho Chehab 	/* Init the internal command list */
1262b285192aSMauro Carvalho Chehab 	for (i = 0; i < SAA_CMD_MAX_MSG_UNITS; i++) {
1263b285192aSMauro Carvalho Chehab 		dev->cmds[i].seqno = i;
1264b285192aSMauro Carvalho Chehab 		dev->cmds[i].inuse = 0;
1265b285192aSMauro Carvalho Chehab 		mutex_init(&dev->cmds[i].lock);
1266b285192aSMauro Carvalho Chehab 		init_waitqueue_head(&dev->cmds[i].wait);
1267b285192aSMauro Carvalho Chehab 	}
1268b285192aSMauro Carvalho Chehab 
1269b285192aSMauro Carvalho Chehab 	/* We need a deferred interrupt handler for cmd handling */
1270b285192aSMauro Carvalho Chehab 	INIT_WORK(&dev->workcmd, saa7164_work_cmdhandler);
1271b285192aSMauro Carvalho Chehab 
1272b285192aSMauro Carvalho Chehab 	/* Only load the firmware if we know the board */
1273b285192aSMauro Carvalho Chehab 	if (dev->board != SAA7164_BOARD_UNKNOWN) {
1274b285192aSMauro Carvalho Chehab 
1275b285192aSMauro Carvalho Chehab 		err = saa7164_downloadfirmware(dev);
1276b285192aSMauro Carvalho Chehab 		if (err < 0) {
1277b285192aSMauro Carvalho Chehab 			printk(KERN_ERR
127824f711c1SMauro Carvalho Chehab 				"Failed to boot firmware, no features registered\n");
1279b285192aSMauro Carvalho Chehab 			goto fail_fw;
1280b285192aSMauro Carvalho Chehab 		}
1281b285192aSMauro Carvalho Chehab 
1282b285192aSMauro Carvalho Chehab 		saa7164_get_descriptors(dev);
1283b285192aSMauro Carvalho Chehab 		saa7164_dumpregs(dev, 0);
1284b285192aSMauro Carvalho Chehab 		saa7164_getcurrentfirmwareversion(dev);
1285b285192aSMauro Carvalho Chehab 		saa7164_getfirmwarestatus(dev);
1286b285192aSMauro Carvalho Chehab 		err = saa7164_bus_setup(dev);
1287b285192aSMauro Carvalho Chehab 		if (err < 0)
1288b285192aSMauro Carvalho Chehab 			printk(KERN_ERR
1289b285192aSMauro Carvalho Chehab 				"Failed to setup the bus, will continue\n");
1290b285192aSMauro Carvalho Chehab 		saa7164_bus_dump(dev);
1291b285192aSMauro Carvalho Chehab 
1292b285192aSMauro Carvalho Chehab 		/* Ping the running firmware via the command bus and get the
1293b285192aSMauro Carvalho Chehab 		 * firmware version, this checks the bus is running OK.
1294b285192aSMauro Carvalho Chehab 		 */
1295b285192aSMauro Carvalho Chehab 		version = 0;
1296b285192aSMauro Carvalho Chehab 		if (saa7164_api_get_fw_version(dev, &version) == SAA_OK)
129724f711c1SMauro Carvalho Chehab 			dprintk(1, "Bus is operating correctly using version %d.%d.%d.%d (0x%x)\n",
1298b285192aSMauro Carvalho Chehab 				(version & 0x0000fc00) >> 10,
1299b285192aSMauro Carvalho Chehab 				(version & 0x000003e0) >> 5,
1300b285192aSMauro Carvalho Chehab 				(version & 0x0000001f),
1301b285192aSMauro Carvalho Chehab 				(version & 0xffff0000) >> 16,
1302b285192aSMauro Carvalho Chehab 				version);
1303b285192aSMauro Carvalho Chehab 		else
1304b285192aSMauro Carvalho Chehab 			printk(KERN_ERR
1305b285192aSMauro Carvalho Chehab 				"Failed to communicate with the firmware\n");
1306b285192aSMauro Carvalho Chehab 
1307b285192aSMauro Carvalho Chehab 		/* Bring up the I2C buses */
1308b285192aSMauro Carvalho Chehab 		saa7164_i2c_register(&dev->i2c_bus[0]);
1309b285192aSMauro Carvalho Chehab 		saa7164_i2c_register(&dev->i2c_bus[1]);
1310b285192aSMauro Carvalho Chehab 		saa7164_i2c_register(&dev->i2c_bus[2]);
1311b285192aSMauro Carvalho Chehab 		saa7164_gpio_setup(dev);
1312b285192aSMauro Carvalho Chehab 		saa7164_card_setup(dev);
1313b285192aSMauro Carvalho Chehab 
1314b285192aSMauro Carvalho Chehab 		/* Parse the dynamic device configuration, find various
1315b285192aSMauro Carvalho Chehab 		 * media endpoints (MPEG, WMV, PS, TS) and cache their
1316b285192aSMauro Carvalho Chehab 		 * configuration details into the driver, so we can
1317b285192aSMauro Carvalho Chehab 		 * reference them later during simething_register() func,
1318b285192aSMauro Carvalho Chehab 		 * interrupt handlers, deferred work handlers etc.
1319b285192aSMauro Carvalho Chehab 		 */
1320b285192aSMauro Carvalho Chehab 		saa7164_api_enum_subdevs(dev);
1321b285192aSMauro Carvalho Chehab 
1322b285192aSMauro Carvalho Chehab 		/* Begin to create the video sub-systems and register funcs */
1323b285192aSMauro Carvalho Chehab 		if (saa7164_boards[dev->board].porta == SAA7164_MPEG_DVB) {
1324b285192aSMauro Carvalho Chehab 			if (saa7164_dvb_register(&dev->ports[SAA7164_PORT_TS1]) < 0) {
132524f711c1SMauro Carvalho Chehab 				printk(KERN_ERR "%s() Failed to register dvb adapters on porta\n",
1326b285192aSMauro Carvalho Chehab 					__func__);
1327b285192aSMauro Carvalho Chehab 			}
1328b285192aSMauro Carvalho Chehab 		}
1329b285192aSMauro Carvalho Chehab 
1330b285192aSMauro Carvalho Chehab 		if (saa7164_boards[dev->board].portb == SAA7164_MPEG_DVB) {
1331b285192aSMauro Carvalho Chehab 			if (saa7164_dvb_register(&dev->ports[SAA7164_PORT_TS2]) < 0) {
133224f711c1SMauro Carvalho Chehab 				printk(KERN_ERR"%s() Failed to register dvb adapters on portb\n",
1333b285192aSMauro Carvalho Chehab 					__func__);
1334b285192aSMauro Carvalho Chehab 			}
1335b285192aSMauro Carvalho Chehab 		}
1336b285192aSMauro Carvalho Chehab 
1337b285192aSMauro Carvalho Chehab 		if (saa7164_boards[dev->board].portc == SAA7164_MPEG_ENCODER) {
1338b285192aSMauro Carvalho Chehab 			if (saa7164_encoder_register(&dev->ports[SAA7164_PORT_ENC1]) < 0) {
133924f711c1SMauro Carvalho Chehab 				printk(KERN_ERR"%s() Failed to register mpeg encoder\n",
134024f711c1SMauro Carvalho Chehab 				       __func__);
1341b285192aSMauro Carvalho Chehab 			}
1342b285192aSMauro Carvalho Chehab 		}
1343b285192aSMauro Carvalho Chehab 
1344b285192aSMauro Carvalho Chehab 		if (saa7164_boards[dev->board].portd == SAA7164_MPEG_ENCODER) {
1345b285192aSMauro Carvalho Chehab 			if (saa7164_encoder_register(&dev->ports[SAA7164_PORT_ENC2]) < 0) {
134624f711c1SMauro Carvalho Chehab 				printk(KERN_ERR"%s() Failed to register mpeg encoder\n",
134724f711c1SMauro Carvalho Chehab 				       __func__);
1348b285192aSMauro Carvalho Chehab 			}
1349b285192aSMauro Carvalho Chehab 		}
1350b285192aSMauro Carvalho Chehab 
1351b285192aSMauro Carvalho Chehab 		if (saa7164_boards[dev->board].porte == SAA7164_MPEG_VBI) {
1352b285192aSMauro Carvalho Chehab 			if (saa7164_vbi_register(&dev->ports[SAA7164_PORT_VBI1]) < 0) {
135324f711c1SMauro Carvalho Chehab 				printk(KERN_ERR"%s() Failed to register vbi device\n",
135424f711c1SMauro Carvalho Chehab 				       __func__);
1355b285192aSMauro Carvalho Chehab 			}
1356b285192aSMauro Carvalho Chehab 		}
1357b285192aSMauro Carvalho Chehab 
1358b285192aSMauro Carvalho Chehab 		if (saa7164_boards[dev->board].portf == SAA7164_MPEG_VBI) {
1359b285192aSMauro Carvalho Chehab 			if (saa7164_vbi_register(&dev->ports[SAA7164_PORT_VBI2]) < 0) {
136024f711c1SMauro Carvalho Chehab 				printk(KERN_ERR"%s() Failed to register vbi device\n",
136124f711c1SMauro Carvalho Chehab 				       __func__);
1362b285192aSMauro Carvalho Chehab 			}
1363b285192aSMauro Carvalho Chehab 		}
1364b285192aSMauro Carvalho Chehab 		saa7164_api_set_debug(dev, fw_debug);
1365b285192aSMauro Carvalho Chehab 
1366b285192aSMauro Carvalho Chehab 		if (fw_debug) {
1367b285192aSMauro Carvalho Chehab 			dev->kthread = kthread_run(saa7164_thread_function, dev,
1368b285192aSMauro Carvalho Chehab 				"saa7164 debug");
136989f4d45bSWei Yongjun 			if (IS_ERR(dev->kthread)) {
137089f4d45bSWei Yongjun 				dev->kthread = NULL;
137124f711c1SMauro Carvalho Chehab 				printk(KERN_ERR "%s() Failed to create debug kernel thread\n",
137224f711c1SMauro Carvalho Chehab 				       __func__);
1373b285192aSMauro Carvalho Chehab 			}
137489f4d45bSWei Yongjun 		}
1375b285192aSMauro Carvalho Chehab 
1376b285192aSMauro Carvalho Chehab 	} /* != BOARD_UNKNOWN */
1377b285192aSMauro Carvalho Chehab 	else
137824f711c1SMauro Carvalho Chehab 		printk(KERN_ERR "%s() Unsupported board detected, registering without firmware\n",
137924f711c1SMauro Carvalho Chehab 		       __func__);
1380b285192aSMauro Carvalho Chehab 
1381b285192aSMauro Carvalho Chehab 	dprintk(1, "%s() parameter debug = %d\n", __func__, saa_debug);
1382b285192aSMauro Carvalho Chehab 	dprintk(1, "%s() parameter waitsecs = %d\n", __func__, waitsecs);
1383b285192aSMauro Carvalho Chehab 
1384b285192aSMauro Carvalho Chehab fail_fw:
1385b285192aSMauro Carvalho Chehab 	return 0;
1386b285192aSMauro Carvalho Chehab 
1387b285192aSMauro Carvalho Chehab fail_irq:
1388b285192aSMauro Carvalho Chehab 	saa7164_dev_unregister(dev);
1389b285192aSMauro Carvalho Chehab fail_free:
1390d66de790SHans Verkuil 	v4l2_device_unregister(&dev->v4l2_dev);
1391b285192aSMauro Carvalho Chehab 	kfree(dev);
1392b285192aSMauro Carvalho Chehab 	return err;
1393b285192aSMauro Carvalho Chehab }
1394b285192aSMauro Carvalho Chehab 
1395b285192aSMauro Carvalho Chehab static void saa7164_shutdown(struct saa7164_dev *dev)
1396b285192aSMauro Carvalho Chehab {
1397b285192aSMauro Carvalho Chehab 	dprintk(1, "%s()\n", __func__);
1398b285192aSMauro Carvalho Chehab }
1399b285192aSMauro Carvalho Chehab 
14004c62e976SGreg Kroah-Hartman static void saa7164_finidev(struct pci_dev *pci_dev)
1401b285192aSMauro Carvalho Chehab {
1402b285192aSMauro Carvalho Chehab 	struct saa7164_dev *dev = pci_get_drvdata(pci_dev);
1403b285192aSMauro Carvalho Chehab 
1404b285192aSMauro Carvalho Chehab 	if (dev->board != SAA7164_BOARD_UNKNOWN) {
1405b285192aSMauro Carvalho Chehab 		if (fw_debug && dev->kthread) {
1406b285192aSMauro Carvalho Chehab 			kthread_stop(dev->kthread);
1407b285192aSMauro Carvalho Chehab 			dev->kthread = NULL;
1408b285192aSMauro Carvalho Chehab 		}
1409b285192aSMauro Carvalho Chehab 		if (dev->firmwareloaded)
1410b285192aSMauro Carvalho Chehab 			saa7164_api_set_debug(dev, 0x00);
1411b285192aSMauro Carvalho Chehab 	}
1412b285192aSMauro Carvalho Chehab 
1413b285192aSMauro Carvalho Chehab 	saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],
1414b285192aSMauro Carvalho Chehab 		&dev->ports[SAA7164_PORT_ENC1].irq_interval);
1415b285192aSMauro Carvalho Chehab 	saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],
1416b285192aSMauro Carvalho Chehab 		&dev->ports[SAA7164_PORT_ENC1].svc_interval);
1417b285192aSMauro Carvalho Chehab 	saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],
1418b285192aSMauro Carvalho Chehab 		&dev->ports[SAA7164_PORT_ENC1].irq_svc_interval);
1419b285192aSMauro Carvalho Chehab 	saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],
1420b285192aSMauro Carvalho Chehab 		&dev->ports[SAA7164_PORT_ENC1].read_interval);
1421b285192aSMauro Carvalho Chehab 	saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],
1422b285192aSMauro Carvalho Chehab 		&dev->ports[SAA7164_PORT_ENC1].poll_interval);
1423b285192aSMauro Carvalho Chehab 	saa7164_histogram_print(&dev->ports[SAA7164_PORT_VBI1],
1424b285192aSMauro Carvalho Chehab 		&dev->ports[SAA7164_PORT_VBI1].read_interval);
1425b285192aSMauro Carvalho Chehab 	saa7164_histogram_print(&dev->ports[SAA7164_PORT_VBI2],
1426b285192aSMauro Carvalho Chehab 		&dev->ports[SAA7164_PORT_VBI2].poll_interval);
1427b285192aSMauro Carvalho Chehab 
1428b285192aSMauro Carvalho Chehab 	saa7164_shutdown(dev);
1429b285192aSMauro Carvalho Chehab 
1430b285192aSMauro Carvalho Chehab 	if (saa7164_boards[dev->board].porta == SAA7164_MPEG_DVB)
1431b285192aSMauro Carvalho Chehab 		saa7164_dvb_unregister(&dev->ports[SAA7164_PORT_TS1]);
1432b285192aSMauro Carvalho Chehab 
1433b285192aSMauro Carvalho Chehab 	if (saa7164_boards[dev->board].portb == SAA7164_MPEG_DVB)
1434b285192aSMauro Carvalho Chehab 		saa7164_dvb_unregister(&dev->ports[SAA7164_PORT_TS2]);
1435b285192aSMauro Carvalho Chehab 
1436b285192aSMauro Carvalho Chehab 	if (saa7164_boards[dev->board].portc == SAA7164_MPEG_ENCODER)
1437b285192aSMauro Carvalho Chehab 		saa7164_encoder_unregister(&dev->ports[SAA7164_PORT_ENC1]);
1438b285192aSMauro Carvalho Chehab 
1439b285192aSMauro Carvalho Chehab 	if (saa7164_boards[dev->board].portd == SAA7164_MPEG_ENCODER)
1440b285192aSMauro Carvalho Chehab 		saa7164_encoder_unregister(&dev->ports[SAA7164_PORT_ENC2]);
1441b285192aSMauro Carvalho Chehab 
1442b285192aSMauro Carvalho Chehab 	if (saa7164_boards[dev->board].porte == SAA7164_MPEG_VBI)
1443b285192aSMauro Carvalho Chehab 		saa7164_vbi_unregister(&dev->ports[SAA7164_PORT_VBI1]);
1444b285192aSMauro Carvalho Chehab 
1445b285192aSMauro Carvalho Chehab 	if (saa7164_boards[dev->board].portf == SAA7164_MPEG_VBI)
1446b285192aSMauro Carvalho Chehab 		saa7164_vbi_unregister(&dev->ports[SAA7164_PORT_VBI2]);
1447b285192aSMauro Carvalho Chehab 
1448b285192aSMauro Carvalho Chehab 	saa7164_i2c_unregister(&dev->i2c_bus[0]);
1449b285192aSMauro Carvalho Chehab 	saa7164_i2c_unregister(&dev->i2c_bus[1]);
1450b285192aSMauro Carvalho Chehab 	saa7164_i2c_unregister(&dev->i2c_bus[2]);
1451b285192aSMauro Carvalho Chehab 
1452b285192aSMauro Carvalho Chehab 	/* unregister stuff */
1453b285192aSMauro Carvalho Chehab 	free_irq(pci_dev->irq, dev);
1454b285192aSMauro Carvalho Chehab 
145577978089SBrendan McGrath 	if (dev->msi) {
145677978089SBrendan McGrath 		pci_disable_msi(pci_dev);
145777978089SBrendan McGrath 		dev->msi = false;
145877978089SBrendan McGrath 	}
145977978089SBrendan McGrath 
14603f845f3cSOlli Salonen 	pci_disable_device(pci_dev);
14613f845f3cSOlli Salonen 
1462b285192aSMauro Carvalho Chehab 	mutex_lock(&devlist);
1463b285192aSMauro Carvalho Chehab 	list_del(&dev->devlist);
1464b285192aSMauro Carvalho Chehab 	mutex_unlock(&devlist);
1465b285192aSMauro Carvalho Chehab 
1466b285192aSMauro Carvalho Chehab 	saa7164_dev_unregister(dev);
1467d66de790SHans Verkuil 	v4l2_device_unregister(&dev->v4l2_dev);
1468b285192aSMauro Carvalho Chehab 	kfree(dev);
1469b285192aSMauro Carvalho Chehab }
1470b285192aSMauro Carvalho Chehab 
147152b025b1SArvind Yadav static const struct pci_device_id saa7164_pci_tbl[] = {
1472b285192aSMauro Carvalho Chehab 	{
1473b285192aSMauro Carvalho Chehab 		/* SAA7164 */
1474b285192aSMauro Carvalho Chehab 		.vendor       = 0x1131,
1475b285192aSMauro Carvalho Chehab 		.device       = 0x7164,
1476b285192aSMauro Carvalho Chehab 		.subvendor    = PCI_ANY_ID,
1477b285192aSMauro Carvalho Chehab 		.subdevice    = PCI_ANY_ID,
1478b285192aSMauro Carvalho Chehab 	}, {
1479b285192aSMauro Carvalho Chehab 		/* --- end of list --- */
1480b285192aSMauro Carvalho Chehab 	}
1481b285192aSMauro Carvalho Chehab };
1482b285192aSMauro Carvalho Chehab MODULE_DEVICE_TABLE(pci, saa7164_pci_tbl);
1483b285192aSMauro Carvalho Chehab 
1484b285192aSMauro Carvalho Chehab static struct pci_driver saa7164_pci_driver = {
1485b285192aSMauro Carvalho Chehab 	.name     = "saa7164",
1486b285192aSMauro Carvalho Chehab 	.id_table = saa7164_pci_tbl,
1487b285192aSMauro Carvalho Chehab 	.probe    = saa7164_initdev,
14884c62e976SGreg Kroah-Hartman 	.remove   = saa7164_finidev,
1489b285192aSMauro Carvalho Chehab 	/* TODO */
1490b285192aSMauro Carvalho Chehab 	.suspend  = NULL,
1491b285192aSMauro Carvalho Chehab 	.resume   = NULL,
1492b285192aSMauro Carvalho Chehab };
1493b285192aSMauro Carvalho Chehab 
1494b285192aSMauro Carvalho Chehab static int __init saa7164_init(void)
1495b285192aSMauro Carvalho Chehab {
1496b285192aSMauro Carvalho Chehab 	printk(KERN_INFO "saa7164 driver loaded\n");
1497b285192aSMauro Carvalho Chehab 
1498b285192aSMauro Carvalho Chehab #ifdef CONFIG_PROC_FS
1499b285192aSMauro Carvalho Chehab 	saa7164_proc_create();
1500b285192aSMauro Carvalho Chehab #endif
1501b285192aSMauro Carvalho Chehab 	return pci_register_driver(&saa7164_pci_driver);
1502b285192aSMauro Carvalho Chehab }
1503b285192aSMauro Carvalho Chehab 
1504b285192aSMauro Carvalho Chehab static void __exit saa7164_fini(void)
1505b285192aSMauro Carvalho Chehab {
1506b285192aSMauro Carvalho Chehab #ifdef CONFIG_PROC_FS
1507b285192aSMauro Carvalho Chehab 	remove_proc_entry("saa7164", NULL);
1508b285192aSMauro Carvalho Chehab #endif
1509b285192aSMauro Carvalho Chehab 	pci_unregister_driver(&saa7164_pci_driver);
1510b285192aSMauro Carvalho Chehab }
1511b285192aSMauro Carvalho Chehab 
1512b285192aSMauro Carvalho Chehab module_init(saa7164_init);
1513b285192aSMauro Carvalho Chehab module_exit(saa7164_fini);
1514b285192aSMauro Carvalho Chehab 
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