1c942fddfSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later 2b285192aSMauro Carvalho Chehab /* 3b285192aSMauro Carvalho Chehab * Driver for the NXP SAA7164 PCIe bridge 4b285192aSMauro Carvalho Chehab * 563a412ecSSteven Toth * Copyright (c) 2010-2015 Steven Toth <stoth@kernellabs.com> 6b285192aSMauro Carvalho Chehab */ 7b285192aSMauro Carvalho Chehab 8b285192aSMauro Carvalho Chehab #include <linux/init.h> 9b285192aSMauro Carvalho Chehab #include <linux/list.h> 10b285192aSMauro Carvalho Chehab #include <linux/module.h> 11b285192aSMauro Carvalho Chehab #include <linux/moduleparam.h> 12b285192aSMauro Carvalho Chehab #include <linux/kmod.h> 13b285192aSMauro Carvalho Chehab #include <linux/kernel.h> 14b285192aSMauro Carvalho Chehab #include <linux/slab.h> 15b285192aSMauro Carvalho Chehab #include <linux/interrupt.h> 16ae5f9737SSean Young #include <linux/debugfs.h> 17b285192aSMauro Carvalho Chehab #include <linux/delay.h> 18b285192aSMauro Carvalho Chehab #include <asm/div64.h> 19b285192aSMauro Carvalho Chehab 20b285192aSMauro Carvalho Chehab #include "saa7164.h" 21b285192aSMauro Carvalho Chehab 22b285192aSMauro Carvalho Chehab MODULE_DESCRIPTION("Driver for NXP SAA7164 based TV cards"); 23b285192aSMauro Carvalho Chehab MODULE_AUTHOR("Steven Toth <stoth@kernellabs.com>"); 24b285192aSMauro Carvalho Chehab MODULE_LICENSE("GPL"); 25b285192aSMauro Carvalho Chehab 26b285192aSMauro Carvalho Chehab /* 27b285192aSMauro Carvalho Chehab * 1 Basic 28b285192aSMauro Carvalho Chehab * 2 29b285192aSMauro Carvalho Chehab * 4 i2c 30b285192aSMauro Carvalho Chehab * 8 api 31b285192aSMauro Carvalho Chehab * 16 cmd 32b285192aSMauro Carvalho Chehab * 32 bus 33b285192aSMauro Carvalho Chehab */ 34b285192aSMauro Carvalho Chehab 35b285192aSMauro Carvalho Chehab unsigned int saa_debug; 36b285192aSMauro Carvalho Chehab module_param_named(debug, saa_debug, int, 0644); 37b285192aSMauro Carvalho Chehab MODULE_PARM_DESC(debug, "enable debug messages"); 38b285192aSMauro Carvalho Chehab 395a9ff85dSMauro Carvalho Chehab static unsigned int fw_debug; 40b285192aSMauro Carvalho Chehab module_param(fw_debug, int, 0644); 41a895d57dSMasanari Iida MODULE_PARM_DESC(fw_debug, "Firmware debug level def:2"); 42b285192aSMauro Carvalho Chehab 43b285192aSMauro Carvalho Chehab unsigned int encoder_buffers = SAA7164_MAX_ENCODER_BUFFERS; 44b285192aSMauro Carvalho Chehab module_param(encoder_buffers, int, 0644); 45b285192aSMauro Carvalho Chehab MODULE_PARM_DESC(encoder_buffers, "Total buffers in read queue 16-512 def:64"); 46b285192aSMauro Carvalho Chehab 47b285192aSMauro Carvalho Chehab unsigned int vbi_buffers = SAA7164_MAX_VBI_BUFFERS; 48b285192aSMauro Carvalho Chehab module_param(vbi_buffers, int, 0644); 49b285192aSMauro Carvalho Chehab MODULE_PARM_DESC(vbi_buffers, "Total buffers in read queue 16-512 def:64"); 50b285192aSMauro Carvalho Chehab 51b285192aSMauro Carvalho Chehab unsigned int waitsecs = 10; 52b285192aSMauro Carvalho Chehab module_param(waitsecs, int, 0644); 53b285192aSMauro Carvalho Chehab MODULE_PARM_DESC(waitsecs, "timeout on firmware messages"); 54b285192aSMauro Carvalho Chehab 55b285192aSMauro Carvalho Chehab static unsigned int card[] = {[0 ... (SAA7164_MAXBOARDS - 1)] = UNSET }; 56b285192aSMauro Carvalho Chehab module_param_array(card, int, NULL, 0444); 57b285192aSMauro Carvalho Chehab MODULE_PARM_DESC(card, "card type"); 58b285192aSMauro Carvalho Chehab 595a9ff85dSMauro Carvalho Chehab static unsigned int print_histogram = 64; 60b285192aSMauro Carvalho Chehab module_param(print_histogram, int, 0644); 61b285192aSMauro Carvalho Chehab MODULE_PARM_DESC(print_histogram, "print histogram values once"); 62b285192aSMauro Carvalho Chehab 63b285192aSMauro Carvalho Chehab unsigned int crc_checking = 1; 64b285192aSMauro Carvalho Chehab module_param(crc_checking, int, 0644); 65b285192aSMauro Carvalho Chehab MODULE_PARM_DESC(crc_checking, "enable crc sanity checking on buffers"); 66b285192aSMauro Carvalho Chehab 675a9ff85dSMauro Carvalho Chehab static unsigned int guard_checking = 1; 68b285192aSMauro Carvalho Chehab module_param(guard_checking, int, 0644); 69b285192aSMauro Carvalho Chehab MODULE_PARM_DESC(guard_checking, 70b285192aSMauro Carvalho Chehab "enable dma sanity checking for buffer overruns"); 71b285192aSMauro Carvalho Chehab 7277978089SBrendan McGrath static bool enable_msi = true; 7377978089SBrendan McGrath module_param(enable_msi, bool, 0444); 7477978089SBrendan McGrath MODULE_PARM_DESC(enable_msi, 7577978089SBrendan McGrath "enable the use of an msi interrupt if available"); 7677978089SBrendan McGrath 77b285192aSMauro Carvalho Chehab static unsigned int saa7164_devcount; 78b285192aSMauro Carvalho Chehab 79b285192aSMauro Carvalho Chehab static DEFINE_MUTEX(devlist); 80b285192aSMauro Carvalho Chehab LIST_HEAD(saa7164_devlist); 81b285192aSMauro Carvalho Chehab 82b285192aSMauro Carvalho Chehab #define INT_SIZE 16 83b285192aSMauro Carvalho Chehab 84b285192aSMauro Carvalho Chehab static void saa7164_pack_verifier(struct saa7164_buffer *buf) 85b285192aSMauro Carvalho Chehab { 86b285192aSMauro Carvalho Chehab u8 *p = (u8 *)buf->cpu; 87b285192aSMauro Carvalho Chehab int i; 88b285192aSMauro Carvalho Chehab 89b285192aSMauro Carvalho Chehab for (i = 0; i < buf->actual_size; i += 2048) { 90b285192aSMauro Carvalho Chehab 91b285192aSMauro Carvalho Chehab if ((*(p + i + 0) != 0x00) || (*(p + i + 1) != 0x00) || 92b285192aSMauro Carvalho Chehab (*(p + i + 2) != 0x01) || (*(p + i + 3) != 0xBA)) { 93b285192aSMauro Carvalho Chehab printk(KERN_ERR "No pack at 0x%x\n", i); 94b285192aSMauro Carvalho Chehab #if 0 95b285192aSMauro Carvalho Chehab print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 16, 1, 96b285192aSMauro Carvalho Chehab p + 1, 32, false); 97b285192aSMauro Carvalho Chehab #endif 98b285192aSMauro Carvalho Chehab } 99b285192aSMauro Carvalho Chehab } 100b285192aSMauro Carvalho Chehab } 101b285192aSMauro Carvalho Chehab 102b285192aSMauro Carvalho Chehab #define FIXED_VIDEO_PID 0xf1 103b285192aSMauro Carvalho Chehab #define FIXED_AUDIO_PID 0xf2 104b285192aSMauro Carvalho Chehab 105b285192aSMauro Carvalho Chehab static void saa7164_ts_verifier(struct saa7164_buffer *buf) 106b285192aSMauro Carvalho Chehab { 107b285192aSMauro Carvalho Chehab struct saa7164_port *port = buf->port; 108b285192aSMauro Carvalho Chehab u32 i; 109b285192aSMauro Carvalho Chehab u8 cc, a; 110b285192aSMauro Carvalho Chehab u16 pid; 111065e1477SHans Verkuil u8 *bufcpu = (u8 *)buf->cpu; 112b285192aSMauro Carvalho Chehab 113b285192aSMauro Carvalho Chehab port->sync_errors = 0; 114b285192aSMauro Carvalho Chehab port->v_cc_errors = 0; 115b285192aSMauro Carvalho Chehab port->a_cc_errors = 0; 116b285192aSMauro Carvalho Chehab 117b285192aSMauro Carvalho Chehab for (i = 0; i < buf->actual_size; i += 188) { 118b285192aSMauro Carvalho Chehab if (*(bufcpu + i) != 0x47) 119b285192aSMauro Carvalho Chehab port->sync_errors++; 120b285192aSMauro Carvalho Chehab 121b285192aSMauro Carvalho Chehab /* TODO: Query pid lower 8 bits, ignoring upper bits intensionally */ 122b285192aSMauro Carvalho Chehab pid = ((*(bufcpu + i + 1) & 0x1f) << 8) | *(bufcpu + i + 2); 123b285192aSMauro Carvalho Chehab cc = *(bufcpu + i + 3) & 0x0f; 124b285192aSMauro Carvalho Chehab 125b285192aSMauro Carvalho Chehab if (pid == FIXED_VIDEO_PID) { 126b285192aSMauro Carvalho Chehab a = ((port->last_v_cc + 1) & 0x0f); 127b285192aSMauro Carvalho Chehab if (a != cc) { 128b285192aSMauro Carvalho Chehab printk(KERN_ERR "video cc last = %x current = %x i = %d\n", 129b285192aSMauro Carvalho Chehab port->last_v_cc, cc, i); 130b285192aSMauro Carvalho Chehab port->v_cc_errors++; 131b285192aSMauro Carvalho Chehab } 132b285192aSMauro Carvalho Chehab 133b285192aSMauro Carvalho Chehab port->last_v_cc = cc; 134b285192aSMauro Carvalho Chehab } else 135b285192aSMauro Carvalho Chehab if (pid == FIXED_AUDIO_PID) { 136b285192aSMauro Carvalho Chehab a = ((port->last_a_cc + 1) & 0x0f); 137b285192aSMauro Carvalho Chehab if (a != cc) { 138b285192aSMauro Carvalho Chehab printk(KERN_ERR "audio cc last = %x current = %x i = %d\n", 139b285192aSMauro Carvalho Chehab port->last_a_cc, cc, i); 140b285192aSMauro Carvalho Chehab port->a_cc_errors++; 141b285192aSMauro Carvalho Chehab } 142b285192aSMauro Carvalho Chehab 143b285192aSMauro Carvalho Chehab port->last_a_cc = cc; 144b285192aSMauro Carvalho Chehab } 145b285192aSMauro Carvalho Chehab 146b285192aSMauro Carvalho Chehab } 147b285192aSMauro Carvalho Chehab 148b285192aSMauro Carvalho Chehab /* Only report errors if we've been through this function at least 149b285192aSMauro Carvalho Chehab * once already and the cached cc values are primed. First time through 150b285192aSMauro Carvalho Chehab * always generates errors. 151b285192aSMauro Carvalho Chehab */ 152b285192aSMauro Carvalho Chehab if (port->v_cc_errors && (port->done_first_interrupt > 1)) 153b285192aSMauro Carvalho Chehab printk(KERN_ERR "video pid cc, %d errors\n", port->v_cc_errors); 154b285192aSMauro Carvalho Chehab 155b285192aSMauro Carvalho Chehab if (port->a_cc_errors && (port->done_first_interrupt > 1)) 156b285192aSMauro Carvalho Chehab printk(KERN_ERR "audio pid cc, %d errors\n", port->a_cc_errors); 157b285192aSMauro Carvalho Chehab 158b285192aSMauro Carvalho Chehab if (port->sync_errors && (port->done_first_interrupt > 1)) 159b285192aSMauro Carvalho Chehab printk(KERN_ERR "sync_errors = %d\n", port->sync_errors); 160b285192aSMauro Carvalho Chehab 161b285192aSMauro Carvalho Chehab if (port->done_first_interrupt == 1) 162b285192aSMauro Carvalho Chehab port->done_first_interrupt++; 163b285192aSMauro Carvalho Chehab } 164b285192aSMauro Carvalho Chehab 165b285192aSMauro Carvalho Chehab static void saa7164_histogram_reset(struct saa7164_histogram *hg, char *name) 166b285192aSMauro Carvalho Chehab { 167b285192aSMauro Carvalho Chehab int i; 168b285192aSMauro Carvalho Chehab 169b285192aSMauro Carvalho Chehab memset(hg, 0, sizeof(struct saa7164_histogram)); 170cc1e6315SMauro Carvalho Chehab strscpy(hg->name, name, sizeof(hg->name)); 171b285192aSMauro Carvalho Chehab 172b285192aSMauro Carvalho Chehab /* First 30ms x 1ms */ 173b285192aSMauro Carvalho Chehab for (i = 0; i < 30; i++) 174b285192aSMauro Carvalho Chehab hg->counter1[0 + i].val = i; 175b285192aSMauro Carvalho Chehab 176b285192aSMauro Carvalho Chehab /* 30 - 200ms x 10ms */ 177b285192aSMauro Carvalho Chehab for (i = 0; i < 18; i++) 178b285192aSMauro Carvalho Chehab hg->counter1[30 + i].val = 30 + (i * 10); 179b285192aSMauro Carvalho Chehab 180b285192aSMauro Carvalho Chehab /* 200 - 2000ms x 100ms */ 181b285192aSMauro Carvalho Chehab for (i = 0; i < 15; i++) 182b285192aSMauro Carvalho Chehab hg->counter1[48 + i].val = 200 + (i * 200); 183b285192aSMauro Carvalho Chehab 184b285192aSMauro Carvalho Chehab /* Catch all massive value (2secs) */ 185b285192aSMauro Carvalho Chehab hg->counter1[55].val = 2000; 186b285192aSMauro Carvalho Chehab 187b285192aSMauro Carvalho Chehab /* Catch all massive value (4secs) */ 188b285192aSMauro Carvalho Chehab hg->counter1[56].val = 4000; 189b285192aSMauro Carvalho Chehab 190b285192aSMauro Carvalho Chehab /* Catch all massive value (8secs) */ 191b285192aSMauro Carvalho Chehab hg->counter1[57].val = 8000; 192b285192aSMauro Carvalho Chehab 193b285192aSMauro Carvalho Chehab /* Catch all massive value (15secs) */ 194b285192aSMauro Carvalho Chehab hg->counter1[58].val = 15000; 195b285192aSMauro Carvalho Chehab 196b285192aSMauro Carvalho Chehab /* Catch all massive value (30secs) */ 197b285192aSMauro Carvalho Chehab hg->counter1[59].val = 30000; 198b285192aSMauro Carvalho Chehab 199b285192aSMauro Carvalho Chehab /* Catch all massive value (60secs) */ 200b285192aSMauro Carvalho Chehab hg->counter1[60].val = 60000; 201b285192aSMauro Carvalho Chehab 202b285192aSMauro Carvalho Chehab /* Catch all massive value (5mins) */ 203b285192aSMauro Carvalho Chehab hg->counter1[61].val = 300000; 204b285192aSMauro Carvalho Chehab 205b285192aSMauro Carvalho Chehab /* Catch all massive value (15mins) */ 206b285192aSMauro Carvalho Chehab hg->counter1[62].val = 900000; 207b285192aSMauro Carvalho Chehab 208b285192aSMauro Carvalho Chehab /* Catch all massive values (1hr) */ 209b285192aSMauro Carvalho Chehab hg->counter1[63].val = 3600000; 210b285192aSMauro Carvalho Chehab } 211b285192aSMauro Carvalho Chehab 212b285192aSMauro Carvalho Chehab void saa7164_histogram_update(struct saa7164_histogram *hg, u32 val) 213b285192aSMauro Carvalho Chehab { 214b285192aSMauro Carvalho Chehab int i; 215b285192aSMauro Carvalho Chehab for (i = 0; i < 64; i++) { 216b285192aSMauro Carvalho Chehab if (val <= hg->counter1[i].val) { 217b285192aSMauro Carvalho Chehab hg->counter1[i].count++; 218b285192aSMauro Carvalho Chehab hg->counter1[i].update_time = jiffies; 219b285192aSMauro Carvalho Chehab break; 220b285192aSMauro Carvalho Chehab } 221b285192aSMauro Carvalho Chehab } 222b285192aSMauro Carvalho Chehab } 223b285192aSMauro Carvalho Chehab 224b285192aSMauro Carvalho Chehab static void saa7164_histogram_print(struct saa7164_port *port, 225b285192aSMauro Carvalho Chehab struct saa7164_histogram *hg) 226b285192aSMauro Carvalho Chehab { 227b285192aSMauro Carvalho Chehab u32 entries = 0; 228b285192aSMauro Carvalho Chehab int i; 229b285192aSMauro Carvalho Chehab 230b285192aSMauro Carvalho Chehab printk(KERN_ERR "Histogram named %s (ms, count, last_update_jiffy)\n", hg->name); 231b285192aSMauro Carvalho Chehab for (i = 0; i < 64; i++) { 232b285192aSMauro Carvalho Chehab if (hg->counter1[i].count == 0) 233b285192aSMauro Carvalho Chehab continue; 234b285192aSMauro Carvalho Chehab 235b285192aSMauro Carvalho Chehab printk(KERN_ERR " %4d %12d %Ld\n", 236b285192aSMauro Carvalho Chehab hg->counter1[i].val, 237b285192aSMauro Carvalho Chehab hg->counter1[i].count, 238b285192aSMauro Carvalho Chehab hg->counter1[i].update_time); 239b285192aSMauro Carvalho Chehab 240b285192aSMauro Carvalho Chehab entries++; 241b285192aSMauro Carvalho Chehab } 242b285192aSMauro Carvalho Chehab printk(KERN_ERR "Total: %d\n", entries); 243b285192aSMauro Carvalho Chehab } 244b285192aSMauro Carvalho Chehab 245b285192aSMauro Carvalho Chehab static void saa7164_work_enchandler_helper(struct saa7164_port *port, int bufnr) 246b285192aSMauro Carvalho Chehab { 247b285192aSMauro Carvalho Chehab struct saa7164_dev *dev = port->dev; 248b285192aSMauro Carvalho Chehab struct saa7164_buffer *buf = NULL; 249b285192aSMauro Carvalho Chehab struct saa7164_user_buffer *ubuf = NULL; 250b285192aSMauro Carvalho Chehab struct list_head *c, *n; 251b285192aSMauro Carvalho Chehab int i = 0; 252065e1477SHans Verkuil u8 *p; 253b285192aSMauro Carvalho Chehab 254b285192aSMauro Carvalho Chehab mutex_lock(&port->dmaqueue_lock); 255b285192aSMauro Carvalho Chehab list_for_each_safe(c, n, &port->dmaqueue.list) { 256b285192aSMauro Carvalho Chehab 257b285192aSMauro Carvalho Chehab buf = list_entry(c, struct saa7164_buffer, list); 258b285192aSMauro Carvalho Chehab if (i++ > port->hwcfg.buffercount) { 259b285192aSMauro Carvalho Chehab printk(KERN_ERR "%s() illegal i count %d\n", 260b285192aSMauro Carvalho Chehab __func__, i); 261b285192aSMauro Carvalho Chehab break; 262b285192aSMauro Carvalho Chehab } 263b285192aSMauro Carvalho Chehab 264b285192aSMauro Carvalho Chehab if (buf->idx == bufnr) { 265b285192aSMauro Carvalho Chehab 266b285192aSMauro Carvalho Chehab /* Found the buffer, deal with it */ 267b285192aSMauro Carvalho Chehab dprintk(DBGLVL_IRQ, "%s() bufnr: %d\n", __func__, bufnr); 268b285192aSMauro Carvalho Chehab 269b285192aSMauro Carvalho Chehab if (crc_checking) { 270b285192aSMauro Carvalho Chehab /* Throw a new checksum on the dma buffer */ 271b285192aSMauro Carvalho Chehab buf->crc = crc32(0, buf->cpu, buf->actual_size); 272b285192aSMauro Carvalho Chehab } 273b285192aSMauro Carvalho Chehab 274b285192aSMauro Carvalho Chehab if (guard_checking) { 275b285192aSMauro Carvalho Chehab p = (u8 *)buf->cpu; 276b285192aSMauro Carvalho Chehab if ((*(p + buf->actual_size + 0) != 0xff) || 277b285192aSMauro Carvalho Chehab (*(p + buf->actual_size + 1) != 0xff) || 278b285192aSMauro Carvalho Chehab (*(p + buf->actual_size + 2) != 0xff) || 279b285192aSMauro Carvalho Chehab (*(p + buf->actual_size + 3) != 0xff) || 280b285192aSMauro Carvalho Chehab (*(p + buf->actual_size + 0x10) != 0xff) || 281b285192aSMauro Carvalho Chehab (*(p + buf->actual_size + 0x11) != 0xff) || 282b285192aSMauro Carvalho Chehab (*(p + buf->actual_size + 0x12) != 0xff) || 283b285192aSMauro Carvalho Chehab (*(p + buf->actual_size + 0x13) != 0xff)) { 284b285192aSMauro Carvalho Chehab printk(KERN_ERR "%s() buf %p guard buffer breach\n", 285b285192aSMauro Carvalho Chehab __func__, buf); 286b285192aSMauro Carvalho Chehab #if 0 287b285192aSMauro Carvalho Chehab print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 16, 1, 288b285192aSMauro Carvalho Chehab p + buf->actual_size - 32, 64, false); 289b285192aSMauro Carvalho Chehab #endif 290b285192aSMauro Carvalho Chehab } 291b285192aSMauro Carvalho Chehab } 292b285192aSMauro Carvalho Chehab 293b285192aSMauro Carvalho Chehab if ((port->nr != SAA7164_PORT_VBI1) && (port->nr != SAA7164_PORT_VBI2)) { 294b285192aSMauro Carvalho Chehab /* Validate the incoming buffer content */ 295b285192aSMauro Carvalho Chehab if (port->encoder_params.stream_type == V4L2_MPEG_STREAM_TYPE_MPEG2_TS) 296b285192aSMauro Carvalho Chehab saa7164_ts_verifier(buf); 297b285192aSMauro Carvalho Chehab else if (port->encoder_params.stream_type == V4L2_MPEG_STREAM_TYPE_MPEG2_PS) 298b285192aSMauro Carvalho Chehab saa7164_pack_verifier(buf); 299b285192aSMauro Carvalho Chehab } 300b285192aSMauro Carvalho Chehab 301b285192aSMauro Carvalho Chehab /* find a free user buffer and clone to it */ 302b285192aSMauro Carvalho Chehab if (!list_empty(&port->list_buf_free.list)) { 303b285192aSMauro Carvalho Chehab 304b285192aSMauro Carvalho Chehab /* Pull the first buffer from the used list */ 305b285192aSMauro Carvalho Chehab ubuf = list_first_entry(&port->list_buf_free.list, 306b285192aSMauro Carvalho Chehab struct saa7164_user_buffer, list); 307b285192aSMauro Carvalho Chehab 308b285192aSMauro Carvalho Chehab if (buf->actual_size <= ubuf->actual_size) { 309b285192aSMauro Carvalho Chehab 310065e1477SHans Verkuil memcpy(ubuf->data, buf->cpu, ubuf->actual_size); 311b285192aSMauro Carvalho Chehab 312b285192aSMauro Carvalho Chehab if (crc_checking) { 313b285192aSMauro Carvalho Chehab /* Throw a new checksum on the read buffer */ 314b285192aSMauro Carvalho Chehab ubuf->crc = crc32(0, ubuf->data, ubuf->actual_size); 315b285192aSMauro Carvalho Chehab } 316b285192aSMauro Carvalho Chehab 317b285192aSMauro Carvalho Chehab /* Requeue the buffer on the free list */ 318b285192aSMauro Carvalho Chehab ubuf->pos = 0; 319b285192aSMauro Carvalho Chehab 320b285192aSMauro Carvalho Chehab list_move_tail(&ubuf->list, 321b285192aSMauro Carvalho Chehab &port->list_buf_used.list); 322b285192aSMauro Carvalho Chehab 323b285192aSMauro Carvalho Chehab /* Flag any userland waiters */ 324b285192aSMauro Carvalho Chehab wake_up_interruptible(&port->wait_read); 325b285192aSMauro Carvalho Chehab 326b285192aSMauro Carvalho Chehab } else { 327b285192aSMauro Carvalho Chehab printk(KERN_ERR "buf %p bufsize fails match\n", buf); 328b285192aSMauro Carvalho Chehab } 329b285192aSMauro Carvalho Chehab 330b285192aSMauro Carvalho Chehab } else 331b285192aSMauro Carvalho Chehab printk(KERN_ERR "encirq no free buffers, increase param encoder_buffers\n"); 332b285192aSMauro Carvalho Chehab 333b285192aSMauro Carvalho Chehab /* Ensure offset into buffer remains 0, fill buffer 334b285192aSMauro Carvalho Chehab * with known bad data. We check for this data at a later point 335b285192aSMauro Carvalho Chehab * in time. */ 336b285192aSMauro Carvalho Chehab saa7164_buffer_zero_offsets(port, bufnr); 337065e1477SHans Verkuil memset(buf->cpu, 0xff, buf->pci_size); 338b285192aSMauro Carvalho Chehab if (crc_checking) { 339b285192aSMauro Carvalho Chehab /* Throw yet aanother new checksum on the dma buffer */ 340b285192aSMauro Carvalho Chehab buf->crc = crc32(0, buf->cpu, buf->actual_size); 341b285192aSMauro Carvalho Chehab } 342b285192aSMauro Carvalho Chehab 343b285192aSMauro Carvalho Chehab break; 344b285192aSMauro Carvalho Chehab } 345b285192aSMauro Carvalho Chehab } 346b285192aSMauro Carvalho Chehab mutex_unlock(&port->dmaqueue_lock); 347b285192aSMauro Carvalho Chehab } 348b285192aSMauro Carvalho Chehab 349b285192aSMauro Carvalho Chehab static void saa7164_work_enchandler(struct work_struct *w) 350b285192aSMauro Carvalho Chehab { 351b285192aSMauro Carvalho Chehab struct saa7164_port *port = 352b285192aSMauro Carvalho Chehab container_of(w, struct saa7164_port, workenc); 353b285192aSMauro Carvalho Chehab struct saa7164_dev *dev = port->dev; 354b285192aSMauro Carvalho Chehab 355b285192aSMauro Carvalho Chehab u32 wp, mcb, rp, cnt = 0; 356b285192aSMauro Carvalho Chehab 357b285192aSMauro Carvalho Chehab port->last_svc_msecs_diff = port->last_svc_msecs; 358b285192aSMauro Carvalho Chehab port->last_svc_msecs = jiffies_to_msecs(jiffies); 359b285192aSMauro Carvalho Chehab 360b285192aSMauro Carvalho Chehab port->last_svc_msecs_diff = port->last_svc_msecs - 361b285192aSMauro Carvalho Chehab port->last_svc_msecs_diff; 362b285192aSMauro Carvalho Chehab 363b285192aSMauro Carvalho Chehab saa7164_histogram_update(&port->svc_interval, 364b285192aSMauro Carvalho Chehab port->last_svc_msecs_diff); 365b285192aSMauro Carvalho Chehab 366b285192aSMauro Carvalho Chehab port->last_irq_svc_msecs_diff = port->last_svc_msecs - 367b285192aSMauro Carvalho Chehab port->last_irq_msecs; 368b285192aSMauro Carvalho Chehab 369b285192aSMauro Carvalho Chehab saa7164_histogram_update(&port->irq_svc_interval, 370b285192aSMauro Carvalho Chehab port->last_irq_svc_msecs_diff); 371b285192aSMauro Carvalho Chehab 372b285192aSMauro Carvalho Chehab dprintk(DBGLVL_IRQ, 373b285192aSMauro Carvalho Chehab "%s() %Ldms elapsed irq->deferred %Ldms wp: %d rp: %d\n", 374b285192aSMauro Carvalho Chehab __func__, 375b285192aSMauro Carvalho Chehab port->last_svc_msecs_diff, 376b285192aSMauro Carvalho Chehab port->last_irq_svc_msecs_diff, 377b285192aSMauro Carvalho Chehab port->last_svc_wp, 378b285192aSMauro Carvalho Chehab port->last_svc_rp 379b285192aSMauro Carvalho Chehab ); 380b285192aSMauro Carvalho Chehab 381b285192aSMauro Carvalho Chehab /* Current write position */ 382b285192aSMauro Carvalho Chehab wp = saa7164_readl(port->bufcounter); 383b285192aSMauro Carvalho Chehab if (wp > (port->hwcfg.buffercount - 1)) { 384b285192aSMauro Carvalho Chehab printk(KERN_ERR "%s() illegal buf count %d\n", __func__, wp); 385b285192aSMauro Carvalho Chehab return; 386b285192aSMauro Carvalho Chehab } 387b285192aSMauro Carvalho Chehab 388b285192aSMauro Carvalho Chehab /* Most current complete buffer */ 389b285192aSMauro Carvalho Chehab if (wp == 0) 390b285192aSMauro Carvalho Chehab mcb = (port->hwcfg.buffercount - 1); 391b285192aSMauro Carvalho Chehab else 392b285192aSMauro Carvalho Chehab mcb = wp - 1; 393b285192aSMauro Carvalho Chehab 394b285192aSMauro Carvalho Chehab while (1) { 395b285192aSMauro Carvalho Chehab if (port->done_first_interrupt == 0) { 396b285192aSMauro Carvalho Chehab port->done_first_interrupt++; 397b285192aSMauro Carvalho Chehab rp = mcb; 398b285192aSMauro Carvalho Chehab } else 399b285192aSMauro Carvalho Chehab rp = (port->last_svc_rp + 1) % 8; 400b285192aSMauro Carvalho Chehab 4013eeba4a7SMauro Carvalho Chehab if (rp > (port->hwcfg.buffercount - 1)) { 402b285192aSMauro Carvalho Chehab printk(KERN_ERR "%s() illegal rp count %d\n", __func__, rp); 403b285192aSMauro Carvalho Chehab break; 404b285192aSMauro Carvalho Chehab } 405b285192aSMauro Carvalho Chehab 406b285192aSMauro Carvalho Chehab saa7164_work_enchandler_helper(port, rp); 407b285192aSMauro Carvalho Chehab port->last_svc_rp = rp; 408b285192aSMauro Carvalho Chehab cnt++; 409b285192aSMauro Carvalho Chehab 410b285192aSMauro Carvalho Chehab if (rp == mcb) 411b285192aSMauro Carvalho Chehab break; 412b285192aSMauro Carvalho Chehab } 413b285192aSMauro Carvalho Chehab 414b285192aSMauro Carvalho Chehab /* TODO: Convert this into a /proc/saa7164 style readable file */ 415b285192aSMauro Carvalho Chehab if (print_histogram == port->nr) { 416b285192aSMauro Carvalho Chehab saa7164_histogram_print(port, &port->irq_interval); 417b285192aSMauro Carvalho Chehab saa7164_histogram_print(port, &port->svc_interval); 418b285192aSMauro Carvalho Chehab saa7164_histogram_print(port, &port->irq_svc_interval); 419b285192aSMauro Carvalho Chehab saa7164_histogram_print(port, &port->read_interval); 420b285192aSMauro Carvalho Chehab saa7164_histogram_print(port, &port->poll_interval); 421b285192aSMauro Carvalho Chehab /* TODO: fix this to preserve any previous state */ 422b285192aSMauro Carvalho Chehab print_histogram = 64 + port->nr; 423b285192aSMauro Carvalho Chehab } 424b285192aSMauro Carvalho Chehab } 425b285192aSMauro Carvalho Chehab 426b285192aSMauro Carvalho Chehab static void saa7164_work_vbihandler(struct work_struct *w) 427b285192aSMauro Carvalho Chehab { 428b285192aSMauro Carvalho Chehab struct saa7164_port *port = 429b285192aSMauro Carvalho Chehab container_of(w, struct saa7164_port, workenc); 430b285192aSMauro Carvalho Chehab struct saa7164_dev *dev = port->dev; 431b285192aSMauro Carvalho Chehab 432b285192aSMauro Carvalho Chehab u32 wp, mcb, rp, cnt = 0; 433b285192aSMauro Carvalho Chehab 434b285192aSMauro Carvalho Chehab port->last_svc_msecs_diff = port->last_svc_msecs; 435b285192aSMauro Carvalho Chehab port->last_svc_msecs = jiffies_to_msecs(jiffies); 436b285192aSMauro Carvalho Chehab port->last_svc_msecs_diff = port->last_svc_msecs - 437b285192aSMauro Carvalho Chehab port->last_svc_msecs_diff; 438b285192aSMauro Carvalho Chehab 439b285192aSMauro Carvalho Chehab saa7164_histogram_update(&port->svc_interval, 440b285192aSMauro Carvalho Chehab port->last_svc_msecs_diff); 441b285192aSMauro Carvalho Chehab 442b285192aSMauro Carvalho Chehab port->last_irq_svc_msecs_diff = port->last_svc_msecs - 443b285192aSMauro Carvalho Chehab port->last_irq_msecs; 444b285192aSMauro Carvalho Chehab 445b285192aSMauro Carvalho Chehab saa7164_histogram_update(&port->irq_svc_interval, 446b285192aSMauro Carvalho Chehab port->last_irq_svc_msecs_diff); 447b285192aSMauro Carvalho Chehab 448b285192aSMauro Carvalho Chehab dprintk(DBGLVL_IRQ, 449b285192aSMauro Carvalho Chehab "%s() %Ldms elapsed irq->deferred %Ldms wp: %d rp: %d\n", 450b285192aSMauro Carvalho Chehab __func__, 451b285192aSMauro Carvalho Chehab port->last_svc_msecs_diff, 452b285192aSMauro Carvalho Chehab port->last_irq_svc_msecs_diff, 453b285192aSMauro Carvalho Chehab port->last_svc_wp, 454b285192aSMauro Carvalho Chehab port->last_svc_rp 455b285192aSMauro Carvalho Chehab ); 456b285192aSMauro Carvalho Chehab 457b285192aSMauro Carvalho Chehab /* Current write position */ 458b285192aSMauro Carvalho Chehab wp = saa7164_readl(port->bufcounter); 459b285192aSMauro Carvalho Chehab if (wp > (port->hwcfg.buffercount - 1)) { 460b285192aSMauro Carvalho Chehab printk(KERN_ERR "%s() illegal buf count %d\n", __func__, wp); 461b285192aSMauro Carvalho Chehab return; 462b285192aSMauro Carvalho Chehab } 463b285192aSMauro Carvalho Chehab 464b285192aSMauro Carvalho Chehab /* Most current complete buffer */ 465b285192aSMauro Carvalho Chehab if (wp == 0) 466b285192aSMauro Carvalho Chehab mcb = (port->hwcfg.buffercount - 1); 467b285192aSMauro Carvalho Chehab else 468b285192aSMauro Carvalho Chehab mcb = wp - 1; 469b285192aSMauro Carvalho Chehab 470b285192aSMauro Carvalho Chehab while (1) { 471b285192aSMauro Carvalho Chehab if (port->done_first_interrupt == 0) { 472b285192aSMauro Carvalho Chehab port->done_first_interrupt++; 473b285192aSMauro Carvalho Chehab rp = mcb; 474b285192aSMauro Carvalho Chehab } else 475b285192aSMauro Carvalho Chehab rp = (port->last_svc_rp + 1) % 8; 476b285192aSMauro Carvalho Chehab 4773eeba4a7SMauro Carvalho Chehab if (rp > (port->hwcfg.buffercount - 1)) { 478b285192aSMauro Carvalho Chehab printk(KERN_ERR "%s() illegal rp count %d\n", __func__, rp); 479b285192aSMauro Carvalho Chehab break; 480b285192aSMauro Carvalho Chehab } 481b285192aSMauro Carvalho Chehab 482b285192aSMauro Carvalho Chehab saa7164_work_enchandler_helper(port, rp); 483b285192aSMauro Carvalho Chehab port->last_svc_rp = rp; 484b285192aSMauro Carvalho Chehab cnt++; 485b285192aSMauro Carvalho Chehab 486b285192aSMauro Carvalho Chehab if (rp == mcb) 487b285192aSMauro Carvalho Chehab break; 488b285192aSMauro Carvalho Chehab } 489b285192aSMauro Carvalho Chehab 490b285192aSMauro Carvalho Chehab /* TODO: Convert this into a /proc/saa7164 style readable file */ 491b285192aSMauro Carvalho Chehab if (print_histogram == port->nr) { 492b285192aSMauro Carvalho Chehab saa7164_histogram_print(port, &port->irq_interval); 493b285192aSMauro Carvalho Chehab saa7164_histogram_print(port, &port->svc_interval); 494b285192aSMauro Carvalho Chehab saa7164_histogram_print(port, &port->irq_svc_interval); 495b285192aSMauro Carvalho Chehab saa7164_histogram_print(port, &port->read_interval); 496b285192aSMauro Carvalho Chehab saa7164_histogram_print(port, &port->poll_interval); 497b285192aSMauro Carvalho Chehab /* TODO: fix this to preserve any previous state */ 498b285192aSMauro Carvalho Chehab print_histogram = 64 + port->nr; 499b285192aSMauro Carvalho Chehab } 500b285192aSMauro Carvalho Chehab } 501b285192aSMauro Carvalho Chehab 502b285192aSMauro Carvalho Chehab static void saa7164_work_cmdhandler(struct work_struct *w) 503b285192aSMauro Carvalho Chehab { 504b285192aSMauro Carvalho Chehab struct saa7164_dev *dev = container_of(w, struct saa7164_dev, workcmd); 505b285192aSMauro Carvalho Chehab 506b285192aSMauro Carvalho Chehab /* Wake up any complete commands */ 507b285192aSMauro Carvalho Chehab saa7164_irq_dequeue(dev); 508b285192aSMauro Carvalho Chehab } 509b285192aSMauro Carvalho Chehab 510b285192aSMauro Carvalho Chehab static void saa7164_buffer_deliver(struct saa7164_buffer *buf) 511b285192aSMauro Carvalho Chehab { 512b285192aSMauro Carvalho Chehab struct saa7164_port *port = buf->port; 513b285192aSMauro Carvalho Chehab 514b285192aSMauro Carvalho Chehab /* Feed the transport payload into the kernel demux */ 515b285192aSMauro Carvalho Chehab dvb_dmx_swfilter_packets(&port->dvb.demux, (u8 *)buf->cpu, 516b285192aSMauro Carvalho Chehab SAA7164_TS_NUMBER_OF_LINES); 517b285192aSMauro Carvalho Chehab 518b285192aSMauro Carvalho Chehab } 519b285192aSMauro Carvalho Chehab 520b285192aSMauro Carvalho Chehab static irqreturn_t saa7164_irq_vbi(struct saa7164_port *port) 521b285192aSMauro Carvalho Chehab { 522b285192aSMauro Carvalho Chehab struct saa7164_dev *dev = port->dev; 523b285192aSMauro Carvalho Chehab 524b285192aSMauro Carvalho Chehab /* Store old time */ 525b285192aSMauro Carvalho Chehab port->last_irq_msecs_diff = port->last_irq_msecs; 526b285192aSMauro Carvalho Chehab 527b285192aSMauro Carvalho Chehab /* Collect new stats */ 528b285192aSMauro Carvalho Chehab port->last_irq_msecs = jiffies_to_msecs(jiffies); 529b285192aSMauro Carvalho Chehab 530b285192aSMauro Carvalho Chehab /* Calculate stats */ 531b285192aSMauro Carvalho Chehab port->last_irq_msecs_diff = port->last_irq_msecs - 532b285192aSMauro Carvalho Chehab port->last_irq_msecs_diff; 533b285192aSMauro Carvalho Chehab 534b285192aSMauro Carvalho Chehab saa7164_histogram_update(&port->irq_interval, 535b285192aSMauro Carvalho Chehab port->last_irq_msecs_diff); 536b285192aSMauro Carvalho Chehab 537b285192aSMauro Carvalho Chehab dprintk(DBGLVL_IRQ, "%s() %Ldms elapsed\n", __func__, 538b285192aSMauro Carvalho Chehab port->last_irq_msecs_diff); 539b285192aSMauro Carvalho Chehab 540b285192aSMauro Carvalho Chehab /* Tis calls the vbi irq handler */ 541b285192aSMauro Carvalho Chehab schedule_work(&port->workenc); 542b285192aSMauro Carvalho Chehab return 0; 543b285192aSMauro Carvalho Chehab } 544b285192aSMauro Carvalho Chehab 545b285192aSMauro Carvalho Chehab static irqreturn_t saa7164_irq_encoder(struct saa7164_port *port) 546b285192aSMauro Carvalho Chehab { 547b285192aSMauro Carvalho Chehab struct saa7164_dev *dev = port->dev; 548b285192aSMauro Carvalho Chehab 549b285192aSMauro Carvalho Chehab /* Store old time */ 550b285192aSMauro Carvalho Chehab port->last_irq_msecs_diff = port->last_irq_msecs; 551b285192aSMauro Carvalho Chehab 552b285192aSMauro Carvalho Chehab /* Collect new stats */ 553b285192aSMauro Carvalho Chehab port->last_irq_msecs = jiffies_to_msecs(jiffies); 554b285192aSMauro Carvalho Chehab 555b285192aSMauro Carvalho Chehab /* Calculate stats */ 556b285192aSMauro Carvalho Chehab port->last_irq_msecs_diff = port->last_irq_msecs - 557b285192aSMauro Carvalho Chehab port->last_irq_msecs_diff; 558b285192aSMauro Carvalho Chehab 559b285192aSMauro Carvalho Chehab saa7164_histogram_update(&port->irq_interval, 560b285192aSMauro Carvalho Chehab port->last_irq_msecs_diff); 561b285192aSMauro Carvalho Chehab 562b285192aSMauro Carvalho Chehab dprintk(DBGLVL_IRQ, "%s() %Ldms elapsed\n", __func__, 563b285192aSMauro Carvalho Chehab port->last_irq_msecs_diff); 564b285192aSMauro Carvalho Chehab 565b285192aSMauro Carvalho Chehab schedule_work(&port->workenc); 566b285192aSMauro Carvalho Chehab return 0; 567b285192aSMauro Carvalho Chehab } 568b285192aSMauro Carvalho Chehab 569b285192aSMauro Carvalho Chehab static irqreturn_t saa7164_irq_ts(struct saa7164_port *port) 570b285192aSMauro Carvalho Chehab { 571b285192aSMauro Carvalho Chehab struct saa7164_dev *dev = port->dev; 572b285192aSMauro Carvalho Chehab struct saa7164_buffer *buf; 573b285192aSMauro Carvalho Chehab struct list_head *c, *n; 574b285192aSMauro Carvalho Chehab int wp, i = 0, rp; 575b285192aSMauro Carvalho Chehab 576b285192aSMauro Carvalho Chehab /* Find the current write point from the hardware */ 577b285192aSMauro Carvalho Chehab wp = saa7164_readl(port->bufcounter); 57856149c8cSDaniel W. S. Almeida 57956149c8cSDaniel W. S. Almeida BUG_ON(wp > (port->hwcfg.buffercount - 1)); 580b285192aSMauro Carvalho Chehab 581b285192aSMauro Carvalho Chehab /* Find the previous buffer to the current write point */ 582b285192aSMauro Carvalho Chehab if (wp == 0) 583b285192aSMauro Carvalho Chehab rp = (port->hwcfg.buffercount - 1); 584b285192aSMauro Carvalho Chehab else 585b285192aSMauro Carvalho Chehab rp = wp - 1; 586b285192aSMauro Carvalho Chehab 587b285192aSMauro Carvalho Chehab /* Lookup the WP in the buffer list */ 588b285192aSMauro Carvalho Chehab /* TODO: turn this into a worker thread */ 589b285192aSMauro Carvalho Chehab list_for_each_safe(c, n, &port->dmaqueue.list) { 590b285192aSMauro Carvalho Chehab buf = list_entry(c, struct saa7164_buffer, list); 59156149c8cSDaniel W. S. Almeida BUG_ON(i > port->hwcfg.buffercount); 59256149c8cSDaniel W. S. Almeida i++; 593b285192aSMauro Carvalho Chehab 594b285192aSMauro Carvalho Chehab if (buf->idx == rp) { 595b285192aSMauro Carvalho Chehab /* Found the buffer, deal with it */ 596b285192aSMauro Carvalho Chehab dprintk(DBGLVL_IRQ, "%s() wp: %d processing: %d\n", 597b285192aSMauro Carvalho Chehab __func__, wp, rp); 598b285192aSMauro Carvalho Chehab saa7164_buffer_deliver(buf); 599b285192aSMauro Carvalho Chehab break; 600b285192aSMauro Carvalho Chehab } 601b285192aSMauro Carvalho Chehab 602b285192aSMauro Carvalho Chehab } 603b285192aSMauro Carvalho Chehab return 0; 604b285192aSMauro Carvalho Chehab } 605b285192aSMauro Carvalho Chehab 606b285192aSMauro Carvalho Chehab /* Primary IRQ handler and dispatch mechanism */ 607b285192aSMauro Carvalho Chehab static irqreturn_t saa7164_irq(int irq, void *dev_id) 608b285192aSMauro Carvalho Chehab { 609b285192aSMauro Carvalho Chehab struct saa7164_dev *dev = dev_id; 6103c71d978SMauro Carvalho Chehab struct saa7164_port *porta, *portb, *portc, *portd, *porte, *portf; 611b285192aSMauro Carvalho Chehab 612b285192aSMauro Carvalho Chehab u32 intid, intstat[INT_SIZE/4]; 613b285192aSMauro Carvalho Chehab int i, handled = 0, bit; 614b285192aSMauro Carvalho Chehab 615b285192aSMauro Carvalho Chehab if (dev == NULL) { 616b285192aSMauro Carvalho Chehab printk(KERN_ERR "%s() No device specified\n", __func__); 617b285192aSMauro Carvalho Chehab handled = 0; 618b285192aSMauro Carvalho Chehab goto out; 619b285192aSMauro Carvalho Chehab } 620b285192aSMauro Carvalho Chehab 6213c71d978SMauro Carvalho Chehab porta = &dev->ports[SAA7164_PORT_TS1]; 6223c71d978SMauro Carvalho Chehab portb = &dev->ports[SAA7164_PORT_TS2]; 6233c71d978SMauro Carvalho Chehab portc = &dev->ports[SAA7164_PORT_ENC1]; 6243c71d978SMauro Carvalho Chehab portd = &dev->ports[SAA7164_PORT_ENC2]; 6253c71d978SMauro Carvalho Chehab porte = &dev->ports[SAA7164_PORT_VBI1]; 6263c71d978SMauro Carvalho Chehab portf = &dev->ports[SAA7164_PORT_VBI2]; 6273c71d978SMauro Carvalho Chehab 628b285192aSMauro Carvalho Chehab /* Check that the hardware is accessible. If the status bytes are 629b285192aSMauro Carvalho Chehab * 0xFF then the device is not accessible, the the IRQ belongs 630b285192aSMauro Carvalho Chehab * to another driver. 631b285192aSMauro Carvalho Chehab * 4 x u32 interrupt registers. 632b285192aSMauro Carvalho Chehab */ 633b285192aSMauro Carvalho Chehab for (i = 0; i < INT_SIZE/4; i++) { 634b285192aSMauro Carvalho Chehab 635b285192aSMauro Carvalho Chehab /* TODO: Convert into saa7164_readl() */ 636b285192aSMauro Carvalho Chehab /* Read the 4 hardware interrupt registers */ 637b285192aSMauro Carvalho Chehab intstat[i] = saa7164_readl(dev->int_status + (i * 4)); 638b285192aSMauro Carvalho Chehab 639b285192aSMauro Carvalho Chehab if (intstat[i]) 640b285192aSMauro Carvalho Chehab handled = 1; 641b285192aSMauro Carvalho Chehab } 642b285192aSMauro Carvalho Chehab if (handled == 0) 643b285192aSMauro Carvalho Chehab goto out; 644b285192aSMauro Carvalho Chehab 645b285192aSMauro Carvalho Chehab /* For each of the HW interrupt registers */ 646b285192aSMauro Carvalho Chehab for (i = 0; i < INT_SIZE/4; i++) { 647b285192aSMauro Carvalho Chehab 648b285192aSMauro Carvalho Chehab if (intstat[i]) { 649b285192aSMauro Carvalho Chehab /* Each function of the board has it's own interruptid. 650b285192aSMauro Carvalho Chehab * Find the function that triggered then call 651b285192aSMauro Carvalho Chehab * it's handler. 652b285192aSMauro Carvalho Chehab */ 653b285192aSMauro Carvalho Chehab for (bit = 0; bit < 32; bit++) { 654b285192aSMauro Carvalho Chehab 655b285192aSMauro Carvalho Chehab if (((intstat[i] >> bit) & 0x00000001) == 0) 656b285192aSMauro Carvalho Chehab continue; 657b285192aSMauro Carvalho Chehab 658b285192aSMauro Carvalho Chehab /* Calculate the interrupt id (0x00 to 0x7f) */ 659b285192aSMauro Carvalho Chehab 660b285192aSMauro Carvalho Chehab intid = (i * 32) + bit; 661b285192aSMauro Carvalho Chehab if (intid == dev->intfdesc.bInterruptId) { 662b285192aSMauro Carvalho Chehab /* A response to an cmd/api call */ 663b285192aSMauro Carvalho Chehab schedule_work(&dev->workcmd); 664b285192aSMauro Carvalho Chehab } else if (intid == porta->hwcfg.interruptid) { 665b285192aSMauro Carvalho Chehab 666b285192aSMauro Carvalho Chehab /* Transport path 1 */ 667b285192aSMauro Carvalho Chehab saa7164_irq_ts(porta); 668b285192aSMauro Carvalho Chehab 669b285192aSMauro Carvalho Chehab } else if (intid == portb->hwcfg.interruptid) { 670b285192aSMauro Carvalho Chehab 671b285192aSMauro Carvalho Chehab /* Transport path 2 */ 672b285192aSMauro Carvalho Chehab saa7164_irq_ts(portb); 673b285192aSMauro Carvalho Chehab 674b285192aSMauro Carvalho Chehab } else if (intid == portc->hwcfg.interruptid) { 675b285192aSMauro Carvalho Chehab 676b285192aSMauro Carvalho Chehab /* Encoder path 1 */ 677b285192aSMauro Carvalho Chehab saa7164_irq_encoder(portc); 678b285192aSMauro Carvalho Chehab 679b285192aSMauro Carvalho Chehab } else if (intid == portd->hwcfg.interruptid) { 680b285192aSMauro Carvalho Chehab 681b285192aSMauro Carvalho Chehab /* Encoder path 2 */ 682b285192aSMauro Carvalho Chehab saa7164_irq_encoder(portd); 683b285192aSMauro Carvalho Chehab 684b285192aSMauro Carvalho Chehab } else if (intid == porte->hwcfg.interruptid) { 685b285192aSMauro Carvalho Chehab 686b285192aSMauro Carvalho Chehab /* VBI path 1 */ 687b285192aSMauro Carvalho Chehab saa7164_irq_vbi(porte); 688b285192aSMauro Carvalho Chehab 689b285192aSMauro Carvalho Chehab } else if (intid == portf->hwcfg.interruptid) { 690b285192aSMauro Carvalho Chehab 691b285192aSMauro Carvalho Chehab /* VBI path 2 */ 692b285192aSMauro Carvalho Chehab saa7164_irq_vbi(portf); 693b285192aSMauro Carvalho Chehab 694b285192aSMauro Carvalho Chehab } else { 695b285192aSMauro Carvalho Chehab /* Find the function */ 696b285192aSMauro Carvalho Chehab dprintk(DBGLVL_IRQ, 69724f711c1SMauro Carvalho Chehab "%s() unhandled interrupt reg 0x%x bit 0x%x intid = 0x%x\n", 698b285192aSMauro Carvalho Chehab __func__, i, bit, intid); 699b285192aSMauro Carvalho Chehab } 700b285192aSMauro Carvalho Chehab } 701b285192aSMauro Carvalho Chehab 702b285192aSMauro Carvalho Chehab /* Ack it */ 703b285192aSMauro Carvalho Chehab saa7164_writel(dev->int_ack + (i * 4), intstat[i]); 704b285192aSMauro Carvalho Chehab 705b285192aSMauro Carvalho Chehab } 706b285192aSMauro Carvalho Chehab } 707b285192aSMauro Carvalho Chehab out: 708b285192aSMauro Carvalho Chehab return IRQ_RETVAL(handled); 709b285192aSMauro Carvalho Chehab } 710b285192aSMauro Carvalho Chehab 711b285192aSMauro Carvalho Chehab void saa7164_getfirmwarestatus(struct saa7164_dev *dev) 712b285192aSMauro Carvalho Chehab { 713b285192aSMauro Carvalho Chehab struct saa7164_fw_status *s = &dev->fw_status; 714b285192aSMauro Carvalho Chehab 715b285192aSMauro Carvalho Chehab dev->fw_status.status = saa7164_readl(SAA_DEVICE_SYSINIT_STATUS); 716b285192aSMauro Carvalho Chehab dev->fw_status.mode = saa7164_readl(SAA_DEVICE_SYSINIT_MODE); 717b285192aSMauro Carvalho Chehab dev->fw_status.spec = saa7164_readl(SAA_DEVICE_SYSINIT_SPEC); 718b285192aSMauro Carvalho Chehab dev->fw_status.inst = saa7164_readl(SAA_DEVICE_SYSINIT_INST); 719b285192aSMauro Carvalho Chehab dev->fw_status.cpuload = saa7164_readl(SAA_DEVICE_SYSINIT_CPULOAD); 720b285192aSMauro Carvalho Chehab dev->fw_status.remainheap = 721b285192aSMauro Carvalho Chehab saa7164_readl(SAA_DEVICE_SYSINIT_REMAINHEAP); 722b285192aSMauro Carvalho Chehab 723b285192aSMauro Carvalho Chehab dprintk(1, "Firmware status:\n"); 724b285192aSMauro Carvalho Chehab dprintk(1, " .status = 0x%08x\n", s->status); 725b285192aSMauro Carvalho Chehab dprintk(1, " .mode = 0x%08x\n", s->mode); 726b285192aSMauro Carvalho Chehab dprintk(1, " .spec = 0x%08x\n", s->spec); 727b285192aSMauro Carvalho Chehab dprintk(1, " .inst = 0x%08x\n", s->inst); 728b285192aSMauro Carvalho Chehab dprintk(1, " .cpuload = 0x%08x\n", s->cpuload); 729b285192aSMauro Carvalho Chehab dprintk(1, " .remainheap = 0x%08x\n", s->remainheap); 730b285192aSMauro Carvalho Chehab } 731b285192aSMauro Carvalho Chehab 732b285192aSMauro Carvalho Chehab u32 saa7164_getcurrentfirmwareversion(struct saa7164_dev *dev) 733b285192aSMauro Carvalho Chehab { 734b285192aSMauro Carvalho Chehab u32 reg; 735b285192aSMauro Carvalho Chehab 736b285192aSMauro Carvalho Chehab reg = saa7164_readl(SAA_DEVICE_VERSION); 737b285192aSMauro Carvalho Chehab dprintk(1, "Device running firmware version %d.%d.%d.%d (0x%x)\n", 738b285192aSMauro Carvalho Chehab (reg & 0x0000fc00) >> 10, 739b285192aSMauro Carvalho Chehab (reg & 0x000003e0) >> 5, 740b285192aSMauro Carvalho Chehab (reg & 0x0000001f), 741b285192aSMauro Carvalho Chehab (reg & 0xffff0000) >> 16, 742b285192aSMauro Carvalho Chehab reg); 743b285192aSMauro Carvalho Chehab 744b285192aSMauro Carvalho Chehab return reg; 745b285192aSMauro Carvalho Chehab } 746b285192aSMauro Carvalho Chehab 747b285192aSMauro Carvalho Chehab /* TODO: Debugging func, remove */ 748b285192aSMauro Carvalho Chehab void saa7164_dumpregs(struct saa7164_dev *dev, u32 addr) 749b285192aSMauro Carvalho Chehab { 750b285192aSMauro Carvalho Chehab int i; 751b285192aSMauro Carvalho Chehab 75224f711c1SMauro Carvalho Chehab dprintk(1, "--------------------> 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n"); 753b285192aSMauro Carvalho Chehab 754b285192aSMauro Carvalho Chehab for (i = 0; i < 0x100; i += 16) 75524f711c1SMauro Carvalho Chehab dprintk(1, "region0[0x%08x] = %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 75624f711c1SMauro Carvalho Chehab i, 757b285192aSMauro Carvalho Chehab (u8)saa7164_readb(addr + i + 0), 758b285192aSMauro Carvalho Chehab (u8)saa7164_readb(addr + i + 1), 759b285192aSMauro Carvalho Chehab (u8)saa7164_readb(addr + i + 2), 760b285192aSMauro Carvalho Chehab (u8)saa7164_readb(addr + i + 3), 761b285192aSMauro Carvalho Chehab (u8)saa7164_readb(addr + i + 4), 762b285192aSMauro Carvalho Chehab (u8)saa7164_readb(addr + i + 5), 763b285192aSMauro Carvalho Chehab (u8)saa7164_readb(addr + i + 6), 764b285192aSMauro Carvalho Chehab (u8)saa7164_readb(addr + i + 7), 765b285192aSMauro Carvalho Chehab (u8)saa7164_readb(addr + i + 8), 766b285192aSMauro Carvalho Chehab (u8)saa7164_readb(addr + i + 9), 767b285192aSMauro Carvalho Chehab (u8)saa7164_readb(addr + i + 10), 768b285192aSMauro Carvalho Chehab (u8)saa7164_readb(addr + i + 11), 769b285192aSMauro Carvalho Chehab (u8)saa7164_readb(addr + i + 12), 770b285192aSMauro Carvalho Chehab (u8)saa7164_readb(addr + i + 13), 771b285192aSMauro Carvalho Chehab (u8)saa7164_readb(addr + i + 14), 772b285192aSMauro Carvalho Chehab (u8)saa7164_readb(addr + i + 15) 773b285192aSMauro Carvalho Chehab ); 774b285192aSMauro Carvalho Chehab } 775b285192aSMauro Carvalho Chehab 776b285192aSMauro Carvalho Chehab static void saa7164_dump_hwdesc(struct saa7164_dev *dev) 777b285192aSMauro Carvalho Chehab { 778b285192aSMauro Carvalho Chehab dprintk(1, "@0x%p hwdesc sizeof(struct tmComResHWDescr) = %d bytes\n", 779b285192aSMauro Carvalho Chehab &dev->hwdesc, (u32)sizeof(struct tmComResHWDescr)); 780b285192aSMauro Carvalho Chehab 781b285192aSMauro Carvalho Chehab dprintk(1, " .bLength = 0x%x\n", dev->hwdesc.bLength); 782b285192aSMauro Carvalho Chehab dprintk(1, " .bDescriptorType = 0x%x\n", dev->hwdesc.bDescriptorType); 783b285192aSMauro Carvalho Chehab dprintk(1, " .bDescriptorSubtype = 0x%x\n", 784b285192aSMauro Carvalho Chehab dev->hwdesc.bDescriptorSubtype); 785b285192aSMauro Carvalho Chehab 786b285192aSMauro Carvalho Chehab dprintk(1, " .bcdSpecVersion = 0x%x\n", dev->hwdesc.bcdSpecVersion); 787b285192aSMauro Carvalho Chehab dprintk(1, " .dwClockFrequency = 0x%x\n", dev->hwdesc.dwClockFrequency); 788b285192aSMauro Carvalho Chehab dprintk(1, " .dwClockUpdateRes = 0x%x\n", dev->hwdesc.dwClockUpdateRes); 789b285192aSMauro Carvalho Chehab dprintk(1, " .bCapabilities = 0x%x\n", dev->hwdesc.bCapabilities); 790b285192aSMauro Carvalho Chehab dprintk(1, " .dwDeviceRegistersLocation = 0x%x\n", 791b285192aSMauro Carvalho Chehab dev->hwdesc.dwDeviceRegistersLocation); 792b285192aSMauro Carvalho Chehab 793b285192aSMauro Carvalho Chehab dprintk(1, " .dwHostMemoryRegion = 0x%x\n", 794b285192aSMauro Carvalho Chehab dev->hwdesc.dwHostMemoryRegion); 795b285192aSMauro Carvalho Chehab 796b285192aSMauro Carvalho Chehab dprintk(1, " .dwHostMemoryRegionSize = 0x%x\n", 797b285192aSMauro Carvalho Chehab dev->hwdesc.dwHostMemoryRegionSize); 798b285192aSMauro Carvalho Chehab 799b285192aSMauro Carvalho Chehab dprintk(1, " .dwHostHibernatMemRegion = 0x%x\n", 800b285192aSMauro Carvalho Chehab dev->hwdesc.dwHostHibernatMemRegion); 801b285192aSMauro Carvalho Chehab 802b285192aSMauro Carvalho Chehab dprintk(1, " .dwHostHibernatMemRegionSize = 0x%x\n", 803b285192aSMauro Carvalho Chehab dev->hwdesc.dwHostHibernatMemRegionSize); 804b285192aSMauro Carvalho Chehab } 805b285192aSMauro Carvalho Chehab 806b285192aSMauro Carvalho Chehab static void saa7164_dump_intfdesc(struct saa7164_dev *dev) 807b285192aSMauro Carvalho Chehab { 80824f711c1SMauro Carvalho Chehab dprintk(1, "@0x%p intfdesc sizeof(struct tmComResInterfaceDescr) = %d bytes\n", 809b285192aSMauro Carvalho Chehab &dev->intfdesc, (u32)sizeof(struct tmComResInterfaceDescr)); 810b285192aSMauro Carvalho Chehab 811b285192aSMauro Carvalho Chehab dprintk(1, " .bLength = 0x%x\n", dev->intfdesc.bLength); 812b285192aSMauro Carvalho Chehab dprintk(1, " .bDescriptorType = 0x%x\n", dev->intfdesc.bDescriptorType); 813b285192aSMauro Carvalho Chehab dprintk(1, " .bDescriptorSubtype = 0x%x\n", 814b285192aSMauro Carvalho Chehab dev->intfdesc.bDescriptorSubtype); 815b285192aSMauro Carvalho Chehab 816b285192aSMauro Carvalho Chehab dprintk(1, " .bFlags = 0x%x\n", dev->intfdesc.bFlags); 817b285192aSMauro Carvalho Chehab dprintk(1, " .bInterfaceType = 0x%x\n", dev->intfdesc.bInterfaceType); 818b285192aSMauro Carvalho Chehab dprintk(1, " .bInterfaceId = 0x%x\n", dev->intfdesc.bInterfaceId); 819b285192aSMauro Carvalho Chehab dprintk(1, " .bBaseInterface = 0x%x\n", dev->intfdesc.bBaseInterface); 820b285192aSMauro Carvalho Chehab dprintk(1, " .bInterruptId = 0x%x\n", dev->intfdesc.bInterruptId); 821b285192aSMauro Carvalho Chehab dprintk(1, " .bDebugInterruptId = 0x%x\n", 822b285192aSMauro Carvalho Chehab dev->intfdesc.bDebugInterruptId); 823b285192aSMauro Carvalho Chehab 824b285192aSMauro Carvalho Chehab dprintk(1, " .BARLocation = 0x%x\n", dev->intfdesc.BARLocation); 825b285192aSMauro Carvalho Chehab } 826b285192aSMauro Carvalho Chehab 827b285192aSMauro Carvalho Chehab static void saa7164_dump_busdesc(struct saa7164_dev *dev) 828b285192aSMauro Carvalho Chehab { 829b285192aSMauro Carvalho Chehab dprintk(1, "@0x%p busdesc sizeof(struct tmComResBusDescr) = %d bytes\n", 830b285192aSMauro Carvalho Chehab &dev->busdesc, (u32)sizeof(struct tmComResBusDescr)); 831b285192aSMauro Carvalho Chehab 832b285192aSMauro Carvalho Chehab dprintk(1, " .CommandRing = 0x%016Lx\n", dev->busdesc.CommandRing); 833b285192aSMauro Carvalho Chehab dprintk(1, " .ResponseRing = 0x%016Lx\n", dev->busdesc.ResponseRing); 834b285192aSMauro Carvalho Chehab dprintk(1, " .CommandWrite = 0x%x\n", dev->busdesc.CommandWrite); 835b285192aSMauro Carvalho Chehab dprintk(1, " .CommandRead = 0x%x\n", dev->busdesc.CommandRead); 836b285192aSMauro Carvalho Chehab dprintk(1, " .ResponseWrite = 0x%x\n", dev->busdesc.ResponseWrite); 837b285192aSMauro Carvalho Chehab dprintk(1, " .ResponseRead = 0x%x\n", dev->busdesc.ResponseRead); 838b285192aSMauro Carvalho Chehab } 839b285192aSMauro Carvalho Chehab 840b285192aSMauro Carvalho Chehab /* Much of the hardware configuration and PCI registers are configured 841b285192aSMauro Carvalho Chehab * dynamically depending on firmware. We have to cache some initial 842b285192aSMauro Carvalho Chehab * structures then use these to locate other important structures 843b285192aSMauro Carvalho Chehab * from PCI space. 844b285192aSMauro Carvalho Chehab */ 845b285192aSMauro Carvalho Chehab static void saa7164_get_descriptors(struct saa7164_dev *dev) 846b285192aSMauro Carvalho Chehab { 847b285192aSMauro Carvalho Chehab memcpy_fromio(&dev->hwdesc, dev->bmmio, sizeof(struct tmComResHWDescr)); 848b285192aSMauro Carvalho Chehab memcpy_fromio(&dev->intfdesc, dev->bmmio + sizeof(struct tmComResHWDescr), 849b285192aSMauro Carvalho Chehab sizeof(struct tmComResInterfaceDescr)); 850b285192aSMauro Carvalho Chehab memcpy_fromio(&dev->busdesc, dev->bmmio + dev->intfdesc.BARLocation, 851b285192aSMauro Carvalho Chehab sizeof(struct tmComResBusDescr)); 852b285192aSMauro Carvalho Chehab 853b285192aSMauro Carvalho Chehab if (dev->hwdesc.bLength != sizeof(struct tmComResHWDescr)) { 854b285192aSMauro Carvalho Chehab printk(KERN_ERR "Structure struct tmComResHWDescr is mangled\n"); 855b285192aSMauro Carvalho Chehab printk(KERN_ERR "Need %x got %d\n", dev->hwdesc.bLength, 856b285192aSMauro Carvalho Chehab (u32)sizeof(struct tmComResHWDescr)); 857b285192aSMauro Carvalho Chehab } else 858b285192aSMauro Carvalho Chehab saa7164_dump_hwdesc(dev); 859b285192aSMauro Carvalho Chehab 860b285192aSMauro Carvalho Chehab if (dev->intfdesc.bLength != sizeof(struct tmComResInterfaceDescr)) { 861b285192aSMauro Carvalho Chehab printk(KERN_ERR "struct struct tmComResInterfaceDescr is mangled\n"); 862b285192aSMauro Carvalho Chehab printk(KERN_ERR "Need %x got %d\n", dev->intfdesc.bLength, 863b285192aSMauro Carvalho Chehab (u32)sizeof(struct tmComResInterfaceDescr)); 864b285192aSMauro Carvalho Chehab } else 865b285192aSMauro Carvalho Chehab saa7164_dump_intfdesc(dev); 866b285192aSMauro Carvalho Chehab 867b285192aSMauro Carvalho Chehab saa7164_dump_busdesc(dev); 868b285192aSMauro Carvalho Chehab } 869b285192aSMauro Carvalho Chehab 870b285192aSMauro Carvalho Chehab static int saa7164_pci_quirks(struct saa7164_dev *dev) 871b285192aSMauro Carvalho Chehab { 872b285192aSMauro Carvalho Chehab return 0; 873b285192aSMauro Carvalho Chehab } 874b285192aSMauro Carvalho Chehab 875b285192aSMauro Carvalho Chehab static int get_resources(struct saa7164_dev *dev) 876b285192aSMauro Carvalho Chehab { 877b285192aSMauro Carvalho Chehab if (request_mem_region(pci_resource_start(dev->pci, 0), 878b285192aSMauro Carvalho Chehab pci_resource_len(dev->pci, 0), dev->name)) { 879b285192aSMauro Carvalho Chehab 880b285192aSMauro Carvalho Chehab if (request_mem_region(pci_resource_start(dev->pci, 2), 881b285192aSMauro Carvalho Chehab pci_resource_len(dev->pci, 2), dev->name)) 882b285192aSMauro Carvalho Chehab return 0; 883b285192aSMauro Carvalho Chehab } 884b285192aSMauro Carvalho Chehab 885b285192aSMauro Carvalho Chehab printk(KERN_ERR "%s: can't get MMIO memory @ 0x%llx or 0x%llx\n", 886b285192aSMauro Carvalho Chehab dev->name, 887b285192aSMauro Carvalho Chehab (u64)pci_resource_start(dev->pci, 0), 888b285192aSMauro Carvalho Chehab (u64)pci_resource_start(dev->pci, 2)); 889b285192aSMauro Carvalho Chehab 890b285192aSMauro Carvalho Chehab return -EBUSY; 891b285192aSMauro Carvalho Chehab } 892b285192aSMauro Carvalho Chehab 893b285192aSMauro Carvalho Chehab static int saa7164_port_init(struct saa7164_dev *dev, int portnr) 894b285192aSMauro Carvalho Chehab { 895b285192aSMauro Carvalho Chehab struct saa7164_port *port = NULL; 896b285192aSMauro Carvalho Chehab 89756149c8cSDaniel W. S. Almeida BUG_ON((portnr < 0) || (portnr >= SAA7164_MAX_PORTS)); 898b285192aSMauro Carvalho Chehab 899b285192aSMauro Carvalho Chehab port = &dev->ports[portnr]; 900b285192aSMauro Carvalho Chehab 901b285192aSMauro Carvalho Chehab port->dev = dev; 902b285192aSMauro Carvalho Chehab port->nr = portnr; 903b285192aSMauro Carvalho Chehab 904b285192aSMauro Carvalho Chehab if ((portnr == SAA7164_PORT_TS1) || (portnr == SAA7164_PORT_TS2)) 905b285192aSMauro Carvalho Chehab port->type = SAA7164_MPEG_DVB; 906b285192aSMauro Carvalho Chehab else 907b285192aSMauro Carvalho Chehab if ((portnr == SAA7164_PORT_ENC1) || (portnr == SAA7164_PORT_ENC2)) { 908b285192aSMauro Carvalho Chehab port->type = SAA7164_MPEG_ENCODER; 909b285192aSMauro Carvalho Chehab 910b285192aSMauro Carvalho Chehab /* We need a deferred interrupt handler for cmd handling */ 911b285192aSMauro Carvalho Chehab INIT_WORK(&port->workenc, saa7164_work_enchandler); 912b285192aSMauro Carvalho Chehab } else if ((portnr == SAA7164_PORT_VBI1) || (portnr == SAA7164_PORT_VBI2)) { 913b285192aSMauro Carvalho Chehab port->type = SAA7164_MPEG_VBI; 914b285192aSMauro Carvalho Chehab 915b285192aSMauro Carvalho Chehab /* We need a deferred interrupt handler for cmd handling */ 916b285192aSMauro Carvalho Chehab INIT_WORK(&port->workenc, saa7164_work_vbihandler); 917b285192aSMauro Carvalho Chehab } else 918b285192aSMauro Carvalho Chehab BUG(); 919b285192aSMauro Carvalho Chehab 920b285192aSMauro Carvalho Chehab /* Init all the critical resources */ 921b285192aSMauro Carvalho Chehab mutex_init(&port->dvb.lock); 922b285192aSMauro Carvalho Chehab INIT_LIST_HEAD(&port->dmaqueue.list); 923b285192aSMauro Carvalho Chehab mutex_init(&port->dmaqueue_lock); 924b285192aSMauro Carvalho Chehab 925b285192aSMauro Carvalho Chehab INIT_LIST_HEAD(&port->list_buf_used.list); 926b285192aSMauro Carvalho Chehab INIT_LIST_HEAD(&port->list_buf_free.list); 927b285192aSMauro Carvalho Chehab init_waitqueue_head(&port->wait_read); 928b285192aSMauro Carvalho Chehab 929b285192aSMauro Carvalho Chehab 930b285192aSMauro Carvalho Chehab saa7164_histogram_reset(&port->irq_interval, "irq intervals"); 931b285192aSMauro Carvalho Chehab saa7164_histogram_reset(&port->svc_interval, "deferred intervals"); 932b285192aSMauro Carvalho Chehab saa7164_histogram_reset(&port->irq_svc_interval, 933b285192aSMauro Carvalho Chehab "irq to deferred intervals"); 934b285192aSMauro Carvalho Chehab saa7164_histogram_reset(&port->read_interval, 935b285192aSMauro Carvalho Chehab "encoder/vbi read() intervals"); 936b285192aSMauro Carvalho Chehab saa7164_histogram_reset(&port->poll_interval, 937b285192aSMauro Carvalho Chehab "encoder/vbi poll() intervals"); 938b285192aSMauro Carvalho Chehab 939b285192aSMauro Carvalho Chehab return 0; 940b285192aSMauro Carvalho Chehab } 941b285192aSMauro Carvalho Chehab 942b285192aSMauro Carvalho Chehab static int saa7164_dev_setup(struct saa7164_dev *dev) 943b285192aSMauro Carvalho Chehab { 944b285192aSMauro Carvalho Chehab int i; 945b285192aSMauro Carvalho Chehab 946b285192aSMauro Carvalho Chehab mutex_init(&dev->lock); 947b285192aSMauro Carvalho Chehab atomic_inc(&dev->refcount); 948b285192aSMauro Carvalho Chehab dev->nr = saa7164_devcount++; 949b285192aSMauro Carvalho Chehab 950b285192aSMauro Carvalho Chehab snprintf(dev->name, sizeof(dev->name), "saa7164[%d]", dev->nr); 951b285192aSMauro Carvalho Chehab 952b285192aSMauro Carvalho Chehab mutex_lock(&devlist); 953b285192aSMauro Carvalho Chehab list_add_tail(&dev->devlist, &saa7164_devlist); 954b285192aSMauro Carvalho Chehab mutex_unlock(&devlist); 955b285192aSMauro Carvalho Chehab 956b285192aSMauro Carvalho Chehab /* board config */ 957b285192aSMauro Carvalho Chehab dev->board = UNSET; 958b285192aSMauro Carvalho Chehab if (card[dev->nr] < saa7164_bcount) 959b285192aSMauro Carvalho Chehab dev->board = card[dev->nr]; 960b285192aSMauro Carvalho Chehab 961b285192aSMauro Carvalho Chehab for (i = 0; UNSET == dev->board && i < saa7164_idcount; i++) 962b285192aSMauro Carvalho Chehab if (dev->pci->subsystem_vendor == saa7164_subids[i].subvendor && 963b285192aSMauro Carvalho Chehab dev->pci->subsystem_device == 964b285192aSMauro Carvalho Chehab saa7164_subids[i].subdevice) 965b285192aSMauro Carvalho Chehab dev->board = saa7164_subids[i].card; 966b285192aSMauro Carvalho Chehab 967b285192aSMauro Carvalho Chehab if (UNSET == dev->board) { 968b285192aSMauro Carvalho Chehab dev->board = SAA7164_BOARD_UNKNOWN; 969b285192aSMauro Carvalho Chehab saa7164_card_list(dev); 970b285192aSMauro Carvalho Chehab } 971b285192aSMauro Carvalho Chehab 972b285192aSMauro Carvalho Chehab dev->pci_bus = dev->pci->bus->number; 973b285192aSMauro Carvalho Chehab dev->pci_slot = PCI_SLOT(dev->pci->devfn); 974b285192aSMauro Carvalho Chehab 975b285192aSMauro Carvalho Chehab /* I2C Defaults / setup */ 976b285192aSMauro Carvalho Chehab dev->i2c_bus[0].dev = dev; 977b285192aSMauro Carvalho Chehab dev->i2c_bus[0].nr = 0; 978b285192aSMauro Carvalho Chehab dev->i2c_bus[1].dev = dev; 979b285192aSMauro Carvalho Chehab dev->i2c_bus[1].nr = 1; 980b285192aSMauro Carvalho Chehab dev->i2c_bus[2].dev = dev; 981b285192aSMauro Carvalho Chehab dev->i2c_bus[2].nr = 2; 982b285192aSMauro Carvalho Chehab 983b285192aSMauro Carvalho Chehab /* Transport + Encoder ports 1, 2, 3, 4 - Defaults / setup */ 984b285192aSMauro Carvalho Chehab saa7164_port_init(dev, SAA7164_PORT_TS1); 985b285192aSMauro Carvalho Chehab saa7164_port_init(dev, SAA7164_PORT_TS2); 986b285192aSMauro Carvalho Chehab saa7164_port_init(dev, SAA7164_PORT_ENC1); 987b285192aSMauro Carvalho Chehab saa7164_port_init(dev, SAA7164_PORT_ENC2); 988b285192aSMauro Carvalho Chehab saa7164_port_init(dev, SAA7164_PORT_VBI1); 989b285192aSMauro Carvalho Chehab saa7164_port_init(dev, SAA7164_PORT_VBI2); 990b285192aSMauro Carvalho Chehab 991b285192aSMauro Carvalho Chehab if (get_resources(dev) < 0) { 99224f711c1SMauro Carvalho Chehab printk(KERN_ERR "CORE %s No more PCIe resources for subsystem: %04x:%04x\n", 993b285192aSMauro Carvalho Chehab dev->name, dev->pci->subsystem_vendor, 994b285192aSMauro Carvalho Chehab dev->pci->subsystem_device); 995b285192aSMauro Carvalho Chehab 996b285192aSMauro Carvalho Chehab saa7164_devcount--; 997b285192aSMauro Carvalho Chehab return -ENODEV; 998b285192aSMauro Carvalho Chehab } 999b285192aSMauro Carvalho Chehab 1000b285192aSMauro Carvalho Chehab /* PCI/e allocations */ 1001b285192aSMauro Carvalho Chehab dev->lmmio = ioremap(pci_resource_start(dev->pci, 0), 1002b285192aSMauro Carvalho Chehab pci_resource_len(dev->pci, 0)); 1003b285192aSMauro Carvalho Chehab 1004b285192aSMauro Carvalho Chehab dev->lmmio2 = ioremap(pci_resource_start(dev->pci, 2), 1005b285192aSMauro Carvalho Chehab pci_resource_len(dev->pci, 2)); 1006b285192aSMauro Carvalho Chehab 1007b285192aSMauro Carvalho Chehab dev->bmmio = (u8 __iomem *)dev->lmmio; 1008b285192aSMauro Carvalho Chehab dev->bmmio2 = (u8 __iomem *)dev->lmmio2; 1009b285192aSMauro Carvalho Chehab 101016790554SMauro Carvalho Chehab /* Interrupt and ack register locations offset of bmmio */ 1011b285192aSMauro Carvalho Chehab dev->int_status = 0x183000 + 0xf80; 1012b285192aSMauro Carvalho Chehab dev->int_ack = 0x183000 + 0xf90; 1013b285192aSMauro Carvalho Chehab 1014b285192aSMauro Carvalho Chehab printk(KERN_INFO 1015b285192aSMauro Carvalho Chehab "CORE %s: subsystem: %04x:%04x, board: %s [card=%d,%s]\n", 1016b285192aSMauro Carvalho Chehab dev->name, dev->pci->subsystem_vendor, 1017b285192aSMauro Carvalho Chehab dev->pci->subsystem_device, saa7164_boards[dev->board].name, 1018b285192aSMauro Carvalho Chehab dev->board, card[dev->nr] == dev->board ? 1019b285192aSMauro Carvalho Chehab "insmod option" : "autodetected"); 1020b285192aSMauro Carvalho Chehab 1021b285192aSMauro Carvalho Chehab saa7164_pci_quirks(dev); 1022b285192aSMauro Carvalho Chehab 1023b285192aSMauro Carvalho Chehab return 0; 1024b285192aSMauro Carvalho Chehab } 1025b285192aSMauro Carvalho Chehab 1026b285192aSMauro Carvalho Chehab static void saa7164_dev_unregister(struct saa7164_dev *dev) 1027b285192aSMauro Carvalho Chehab { 1028b285192aSMauro Carvalho Chehab dprintk(1, "%s()\n", __func__); 1029b285192aSMauro Carvalho Chehab 1030b285192aSMauro Carvalho Chehab release_mem_region(pci_resource_start(dev->pci, 0), 1031b285192aSMauro Carvalho Chehab pci_resource_len(dev->pci, 0)); 1032b285192aSMauro Carvalho Chehab 1033b285192aSMauro Carvalho Chehab release_mem_region(pci_resource_start(dev->pci, 2), 1034b285192aSMauro Carvalho Chehab pci_resource_len(dev->pci, 2)); 1035b285192aSMauro Carvalho Chehab 1036b285192aSMauro Carvalho Chehab if (!atomic_dec_and_test(&dev->refcount)) 1037b285192aSMauro Carvalho Chehab return; 1038b285192aSMauro Carvalho Chehab 1039b285192aSMauro Carvalho Chehab iounmap(dev->lmmio); 1040b285192aSMauro Carvalho Chehab iounmap(dev->lmmio2); 1041b285192aSMauro Carvalho Chehab 1042b285192aSMauro Carvalho Chehab return; 1043b285192aSMauro Carvalho Chehab } 1044b285192aSMauro Carvalho Chehab 1045ae5f9737SSean Young #ifdef CONFIG_DEBUG_FS 1046ae5f9737SSean Young static void *saa7164_seq_start(struct seq_file *s, loff_t *pos) 1047b285192aSMauro Carvalho Chehab { 1048b285192aSMauro Carvalho Chehab struct saa7164_dev *dev; 1049ae5f9737SSean Young loff_t index = *pos; 1050ae5f9737SSean Young 1051ae5f9737SSean Young mutex_lock(&devlist); 1052ae5f9737SSean Young list_for_each_entry(dev, &saa7164_devlist, devlist) { 1053ae5f9737SSean Young if (index-- == 0) { 1054ae5f9737SSean Young mutex_unlock(&devlist); 1055ae5f9737SSean Young return dev; 1056ae5f9737SSean Young } 1057ae5f9737SSean Young } 1058ae5f9737SSean Young mutex_unlock(&devlist); 1059ae5f9737SSean Young 1060ae5f9737SSean Young return NULL; 1061ae5f9737SSean Young } 1062ae5f9737SSean Young 1063ae5f9737SSean Young static void *saa7164_seq_next(struct seq_file *s, void *v, loff_t *pos) 1064ae5f9737SSean Young { 1065ae5f9737SSean Young struct saa7164_dev *dev = v; 1066ae5f9737SSean Young void *ret; 1067ae5f9737SSean Young 1068ae5f9737SSean Young mutex_lock(&devlist); 1069ae5f9737SSean Young if (list_is_last(&dev->devlist, &saa7164_devlist)) 1070ae5f9737SSean Young ret = NULL; 1071ae5f9737SSean Young else 1072ae5f9737SSean Young ret = list_next_entry(dev, devlist); 1073ae5f9737SSean Young mutex_unlock(&devlist); 1074ae5f9737SSean Young 1075ae5f9737SSean Young ++*pos; 1076ae5f9737SSean Young 1077ae5f9737SSean Young return ret; 1078ae5f9737SSean Young } 1079ae5f9737SSean Young 1080ae5f9737SSean Young static void saa7164_seq_stop(struct seq_file *s, void *v) 1081ae5f9737SSean Young { 1082ae5f9737SSean Young } 1083ae5f9737SSean Young 1084ae5f9737SSean Young static int saa7164_seq_show(struct seq_file *m, void *v) 1085ae5f9737SSean Young { 1086ae5f9737SSean Young struct saa7164_dev *dev = v; 1087b285192aSMauro Carvalho Chehab struct tmComResBusInfo *b; 1088b285192aSMauro Carvalho Chehab int i, c; 1089b285192aSMauro Carvalho Chehab 1090b285192aSMauro Carvalho Chehab seq_printf(m, "%s = %p\n", dev->name, dev); 1091b285192aSMauro Carvalho Chehab 1092b285192aSMauro Carvalho Chehab /* Lock the bus from any other access */ 1093b285192aSMauro Carvalho Chehab b = &dev->bus; 1094b285192aSMauro Carvalho Chehab mutex_lock(&b->lock); 1095b285192aSMauro Carvalho Chehab 1096b285192aSMauro Carvalho Chehab seq_printf(m, " .m_pdwSetWritePos = 0x%x (0x%08x)\n", 1097b285192aSMauro Carvalho Chehab b->m_dwSetReadPos, saa7164_readl(b->m_dwSetReadPos)); 1098b285192aSMauro Carvalho Chehab 1099b285192aSMauro Carvalho Chehab seq_printf(m, " .m_pdwSetReadPos = 0x%x (0x%08x)\n", 1100b285192aSMauro Carvalho Chehab b->m_dwSetWritePos, saa7164_readl(b->m_dwSetWritePos)); 1101b285192aSMauro Carvalho Chehab 1102b285192aSMauro Carvalho Chehab seq_printf(m, " .m_pdwGetWritePos = 0x%x (0x%08x)\n", 1103b285192aSMauro Carvalho Chehab b->m_dwGetReadPos, saa7164_readl(b->m_dwGetReadPos)); 1104b285192aSMauro Carvalho Chehab 1105b285192aSMauro Carvalho Chehab seq_printf(m, " .m_pdwGetReadPos = 0x%x (0x%08x)\n", 1106b285192aSMauro Carvalho Chehab b->m_dwGetWritePos, saa7164_readl(b->m_dwGetWritePos)); 1107b285192aSMauro Carvalho Chehab c = 0; 1108ae5f9737SSean Young seq_puts(m, "\n Set Ring:\n"); 1109ae5f9737SSean Young seq_puts(m, "\n addr 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n"); 1110b285192aSMauro Carvalho Chehab for (i = 0; i < b->m_dwSizeSetRing; i++) { 1111b285192aSMauro Carvalho Chehab if (c == 0) 1112b285192aSMauro Carvalho Chehab seq_printf(m, " %04x:", i); 1113b285192aSMauro Carvalho Chehab 1114065e1477SHans Verkuil seq_printf(m, " %02x", readb(b->m_pdwSetRing + i)); 1115b285192aSMauro Carvalho Chehab 1116b285192aSMauro Carvalho Chehab if (++c == 16) { 1117ae5f9737SSean Young seq_puts(m, "\n"); 1118b285192aSMauro Carvalho Chehab c = 0; 1119b285192aSMauro Carvalho Chehab } 1120b285192aSMauro Carvalho Chehab } 1121b285192aSMauro Carvalho Chehab 1122b285192aSMauro Carvalho Chehab c = 0; 1123ae5f9737SSean Young seq_puts(m, "\n Get Ring:\n"); 1124ae5f9737SSean Young seq_puts(m, "\n addr 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n"); 1125b285192aSMauro Carvalho Chehab for (i = 0; i < b->m_dwSizeGetRing; i++) { 1126b285192aSMauro Carvalho Chehab if (c == 0) 1127b285192aSMauro Carvalho Chehab seq_printf(m, " %04x:", i); 1128b285192aSMauro Carvalho Chehab 1129065e1477SHans Verkuil seq_printf(m, " %02x", readb(b->m_pdwGetRing + i)); 1130b285192aSMauro Carvalho Chehab 1131b285192aSMauro Carvalho Chehab if (++c == 16) { 1132ae5f9737SSean Young seq_puts(m, "\n"); 1133b285192aSMauro Carvalho Chehab c = 0; 1134b285192aSMauro Carvalho Chehab } 1135b285192aSMauro Carvalho Chehab } 1136b285192aSMauro Carvalho Chehab 1137b285192aSMauro Carvalho Chehab mutex_unlock(&b->lock); 1138b285192aSMauro Carvalho Chehab 1139b285192aSMauro Carvalho Chehab return 0; 1140b285192aSMauro Carvalho Chehab } 1141b285192aSMauro Carvalho Chehab 1142*1671d4eaSLiu Shixin static const struct seq_operations saa7164_sops = { 1143ae5f9737SSean Young .start = saa7164_seq_start, 1144ae5f9737SSean Young .next = saa7164_seq_next, 1145ae5f9737SSean Young .stop = saa7164_seq_stop, 1146ae5f9737SSean Young .show = saa7164_seq_show, 1147ae5f9737SSean Young }; 114850710eeeSKefeng Wang 1149*1671d4eaSLiu Shixin DEFINE_SEQ_ATTRIBUTE(saa7164); 1150ae5f9737SSean Young 1151ae5f9737SSean Young static struct dentry *saa7614_dentry; 1152ae5f9737SSean Young 1153ae5f9737SSean Young static void __init saa7164_debugfs_create(void) 115450710eeeSKefeng Wang { 1155ae5f9737SSean Young saa7614_dentry = debugfs_create_file("saa7164", 0444, NULL, NULL, 1156*1671d4eaSLiu Shixin &saa7164_fops); 1157ae5f9737SSean Young } 1158ae5f9737SSean Young 1159ae5f9737SSean Young static void __exit saa7164_debugfs_remove(void) 1160ae5f9737SSean Young { 1161ae5f9737SSean Young debugfs_remove(saa7614_dentry); 116250710eeeSKefeng Wang } 116350710eeeSKefeng Wang #else 1164ae5f9737SSean Young static void saa7164_debugfs_create(void) { } 1165ae5f9737SSean Young static void saa7164_debugfs_remove(void) { } 1166b285192aSMauro Carvalho Chehab #endif 1167b285192aSMauro Carvalho Chehab 1168b285192aSMauro Carvalho Chehab static int saa7164_thread_function(void *data) 1169b285192aSMauro Carvalho Chehab { 1170b285192aSMauro Carvalho Chehab struct saa7164_dev *dev = data; 1171b285192aSMauro Carvalho Chehab struct tmFwInfoStruct fwinfo; 1172b285192aSMauro Carvalho Chehab u64 last_poll_time = 0; 1173b285192aSMauro Carvalho Chehab 1174b285192aSMauro Carvalho Chehab dprintk(DBGLVL_THR, "thread started\n"); 1175b285192aSMauro Carvalho Chehab 1176b285192aSMauro Carvalho Chehab set_freezable(); 1177b285192aSMauro Carvalho Chehab 1178b285192aSMauro Carvalho Chehab while (1) { 1179b285192aSMauro Carvalho Chehab msleep_interruptible(100); 1180b285192aSMauro Carvalho Chehab if (kthread_should_stop()) 1181b285192aSMauro Carvalho Chehab break; 1182b285192aSMauro Carvalho Chehab try_to_freeze(); 1183b285192aSMauro Carvalho Chehab 1184b285192aSMauro Carvalho Chehab dprintk(DBGLVL_THR, "thread running\n"); 1185b285192aSMauro Carvalho Chehab 1186b285192aSMauro Carvalho Chehab /* Dump the firmware debug message to console */ 1187b285192aSMauro Carvalho Chehab /* Polling this costs us 1-2% of the arm CPU */ 1188b285192aSMauro Carvalho Chehab /* convert this into a respnde to interrupt 0x7a */ 1189b285192aSMauro Carvalho Chehab saa7164_api_collect_debug(dev); 1190b285192aSMauro Carvalho Chehab 1191b285192aSMauro Carvalho Chehab /* Monitor CPU load every 1 second */ 1192b285192aSMauro Carvalho Chehab if ((last_poll_time + 1000 /* ms */) < jiffies_to_msecs(jiffies)) { 1193b285192aSMauro Carvalho Chehab saa7164_api_get_load_info(dev, &fwinfo); 1194b285192aSMauro Carvalho Chehab last_poll_time = jiffies_to_msecs(jiffies); 1195b285192aSMauro Carvalho Chehab } 1196b285192aSMauro Carvalho Chehab 1197b285192aSMauro Carvalho Chehab } 1198b285192aSMauro Carvalho Chehab 1199b285192aSMauro Carvalho Chehab dprintk(DBGLVL_THR, "thread exiting\n"); 1200b285192aSMauro Carvalho Chehab return 0; 1201b285192aSMauro Carvalho Chehab } 1202b285192aSMauro Carvalho Chehab 120377978089SBrendan McGrath static bool saa7164_enable_msi(struct pci_dev *pci_dev, struct saa7164_dev *dev) 120477978089SBrendan McGrath { 120577978089SBrendan McGrath int err; 120677978089SBrendan McGrath 120777978089SBrendan McGrath if (!enable_msi) { 120877978089SBrendan McGrath printk(KERN_WARNING "%s() MSI disabled by module parameter 'enable_msi'" 120977978089SBrendan McGrath , __func__); 121077978089SBrendan McGrath return false; 121177978089SBrendan McGrath } 121277978089SBrendan McGrath 121377978089SBrendan McGrath err = pci_enable_msi(pci_dev); 121477978089SBrendan McGrath 121577978089SBrendan McGrath if (err) { 121624f711c1SMauro Carvalho Chehab printk(KERN_ERR "%s() Failed to enable MSI interrupt. Falling back to a shared IRQ\n", 121724f711c1SMauro Carvalho Chehab __func__); 121877978089SBrendan McGrath return false; 121977978089SBrendan McGrath } 122077978089SBrendan McGrath 122177978089SBrendan McGrath /* no error - so request an msi interrupt */ 122277978089SBrendan McGrath err = request_irq(pci_dev->irq, saa7164_irq, 0, 122377978089SBrendan McGrath dev->name, dev); 122477978089SBrendan McGrath 122577978089SBrendan McGrath if (err) { 122677978089SBrendan McGrath /* fall back to legacy interrupt */ 122724f711c1SMauro Carvalho Chehab printk(KERN_ERR "%s() Failed to get an MSI interrupt. Falling back to a shared IRQ\n", 122824f711c1SMauro Carvalho Chehab __func__); 122977978089SBrendan McGrath pci_disable_msi(pci_dev); 123077978089SBrendan McGrath return false; 123177978089SBrendan McGrath } 123277978089SBrendan McGrath 123377978089SBrendan McGrath return true; 123477978089SBrendan McGrath } 123577978089SBrendan McGrath 12364c62e976SGreg Kroah-Hartman static int saa7164_initdev(struct pci_dev *pci_dev, 1237b285192aSMauro Carvalho Chehab const struct pci_device_id *pci_id) 1238b285192aSMauro Carvalho Chehab { 1239b285192aSMauro Carvalho Chehab struct saa7164_dev *dev; 1240b285192aSMauro Carvalho Chehab int err, i; 1241b285192aSMauro Carvalho Chehab u32 version; 1242b285192aSMauro Carvalho Chehab 1243b285192aSMauro Carvalho Chehab dev = kzalloc(sizeof(*dev), GFP_KERNEL); 1244b285192aSMauro Carvalho Chehab if (NULL == dev) 1245b285192aSMauro Carvalho Chehab return -ENOMEM; 1246b285192aSMauro Carvalho Chehab 1247fd8d30bfSHans Verkuil err = v4l2_device_register(&pci_dev->dev, &dev->v4l2_dev); 1248fd8d30bfSHans Verkuil if (err < 0) { 1249d66de790SHans Verkuil dev_err(&pci_dev->dev, "v4l2_device_register failed\n"); 1250d66de790SHans Verkuil goto fail_free; 1251d66de790SHans Verkuil } 1252d66de790SHans Verkuil 1253b285192aSMauro Carvalho Chehab /* pci init */ 1254b285192aSMauro Carvalho Chehab dev->pci = pci_dev; 1255b285192aSMauro Carvalho Chehab if (pci_enable_device(pci_dev)) { 1256b285192aSMauro Carvalho Chehab err = -EIO; 1257b285192aSMauro Carvalho Chehab goto fail_free; 1258b285192aSMauro Carvalho Chehab } 1259b285192aSMauro Carvalho Chehab 1260b285192aSMauro Carvalho Chehab if (saa7164_dev_setup(dev) < 0) { 1261b285192aSMauro Carvalho Chehab err = -EINVAL; 1262b285192aSMauro Carvalho Chehab goto fail_free; 1263b285192aSMauro Carvalho Chehab } 1264b285192aSMauro Carvalho Chehab 1265b285192aSMauro Carvalho Chehab /* print pci info */ 1266b285192aSMauro Carvalho Chehab dev->pci_rev = pci_dev->revision; 1267b285192aSMauro Carvalho Chehab pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat); 126824f711c1SMauro Carvalho Chehab printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, latency: %d, mmio: 0x%llx\n", 126924f711c1SMauro Carvalho Chehab dev->name, 1270b285192aSMauro Carvalho Chehab pci_name(pci_dev), dev->pci_rev, pci_dev->irq, 1271b285192aSMauro Carvalho Chehab dev->pci_lat, 1272b285192aSMauro Carvalho Chehab (unsigned long long)pci_resource_start(pci_dev, 0)); 1273b285192aSMauro Carvalho Chehab 1274b285192aSMauro Carvalho Chehab pci_set_master(pci_dev); 1275b285192aSMauro Carvalho Chehab /* TODO */ 12761a47de6eSChristoph Hellwig err = pci_set_dma_mask(pci_dev, 0xffffffff); 12771a47de6eSChristoph Hellwig if (err) { 1278b285192aSMauro Carvalho Chehab printk("%s/0: Oops: no 32bit PCI DMA ???\n", dev->name); 1279b285192aSMauro Carvalho Chehab goto fail_irq; 1280b285192aSMauro Carvalho Chehab } 1281b285192aSMauro Carvalho Chehab 128277978089SBrendan McGrath /* irq bit */ 128377978089SBrendan McGrath if (saa7164_enable_msi(pci_dev, dev)) { 128477978089SBrendan McGrath dev->msi = true; 128577978089SBrendan McGrath } else { 128677978089SBrendan McGrath /* if we have an error (i.e. we don't have an interrupt) 128777978089SBrendan McGrath or msi is not enabled - fallback to shared interrupt */ 128877978089SBrendan McGrath 1289b285192aSMauro Carvalho Chehab err = request_irq(pci_dev->irq, saa7164_irq, 12903e018fe4SMichael Opdenacker IRQF_SHARED, dev->name, dev); 129177978089SBrendan McGrath 1292b285192aSMauro Carvalho Chehab if (err < 0) { 1293b285192aSMauro Carvalho Chehab printk(KERN_ERR "%s: can't get IRQ %d\n", dev->name, 1294b285192aSMauro Carvalho Chehab pci_dev->irq); 1295b285192aSMauro Carvalho Chehab err = -EIO; 1296b285192aSMauro Carvalho Chehab goto fail_irq; 1297b285192aSMauro Carvalho Chehab } 129877978089SBrendan McGrath } 1299b285192aSMauro Carvalho Chehab 1300b285192aSMauro Carvalho Chehab pci_set_drvdata(pci_dev, dev); 1301b285192aSMauro Carvalho Chehab 1302b285192aSMauro Carvalho Chehab /* Init the internal command list */ 1303b285192aSMauro Carvalho Chehab for (i = 0; i < SAA_CMD_MAX_MSG_UNITS; i++) { 1304b285192aSMauro Carvalho Chehab dev->cmds[i].seqno = i; 1305b285192aSMauro Carvalho Chehab dev->cmds[i].inuse = 0; 1306b285192aSMauro Carvalho Chehab mutex_init(&dev->cmds[i].lock); 1307b285192aSMauro Carvalho Chehab init_waitqueue_head(&dev->cmds[i].wait); 1308b285192aSMauro Carvalho Chehab } 1309b285192aSMauro Carvalho Chehab 1310b285192aSMauro Carvalho Chehab /* We need a deferred interrupt handler for cmd handling */ 1311b285192aSMauro Carvalho Chehab INIT_WORK(&dev->workcmd, saa7164_work_cmdhandler); 1312b285192aSMauro Carvalho Chehab 1313b285192aSMauro Carvalho Chehab /* Only load the firmware if we know the board */ 1314b285192aSMauro Carvalho Chehab if (dev->board != SAA7164_BOARD_UNKNOWN) { 1315b285192aSMauro Carvalho Chehab 1316b285192aSMauro Carvalho Chehab err = saa7164_downloadfirmware(dev); 1317b285192aSMauro Carvalho Chehab if (err < 0) { 1318b285192aSMauro Carvalho Chehab printk(KERN_ERR 131924f711c1SMauro Carvalho Chehab "Failed to boot firmware, no features registered\n"); 1320b285192aSMauro Carvalho Chehab goto fail_fw; 1321b285192aSMauro Carvalho Chehab } 1322b285192aSMauro Carvalho Chehab 1323b285192aSMauro Carvalho Chehab saa7164_get_descriptors(dev); 1324b285192aSMauro Carvalho Chehab saa7164_dumpregs(dev, 0); 1325b285192aSMauro Carvalho Chehab saa7164_getcurrentfirmwareversion(dev); 1326b285192aSMauro Carvalho Chehab saa7164_getfirmwarestatus(dev); 1327b285192aSMauro Carvalho Chehab err = saa7164_bus_setup(dev); 1328b285192aSMauro Carvalho Chehab if (err < 0) 1329b285192aSMauro Carvalho Chehab printk(KERN_ERR 1330b285192aSMauro Carvalho Chehab "Failed to setup the bus, will continue\n"); 1331b285192aSMauro Carvalho Chehab saa7164_bus_dump(dev); 1332b285192aSMauro Carvalho Chehab 1333b285192aSMauro Carvalho Chehab /* Ping the running firmware via the command bus and get the 1334b285192aSMauro Carvalho Chehab * firmware version, this checks the bus is running OK. 1335b285192aSMauro Carvalho Chehab */ 1336b285192aSMauro Carvalho Chehab version = 0; 1337b285192aSMauro Carvalho Chehab if (saa7164_api_get_fw_version(dev, &version) == SAA_OK) 133824f711c1SMauro Carvalho Chehab dprintk(1, "Bus is operating correctly using version %d.%d.%d.%d (0x%x)\n", 1339b285192aSMauro Carvalho Chehab (version & 0x0000fc00) >> 10, 1340b285192aSMauro Carvalho Chehab (version & 0x000003e0) >> 5, 1341b285192aSMauro Carvalho Chehab (version & 0x0000001f), 1342b285192aSMauro Carvalho Chehab (version & 0xffff0000) >> 16, 1343b285192aSMauro Carvalho Chehab version); 1344b285192aSMauro Carvalho Chehab else 1345b285192aSMauro Carvalho Chehab printk(KERN_ERR 1346b285192aSMauro Carvalho Chehab "Failed to communicate with the firmware\n"); 1347b285192aSMauro Carvalho Chehab 1348b285192aSMauro Carvalho Chehab /* Bring up the I2C buses */ 1349b285192aSMauro Carvalho Chehab saa7164_i2c_register(&dev->i2c_bus[0]); 1350b285192aSMauro Carvalho Chehab saa7164_i2c_register(&dev->i2c_bus[1]); 1351b285192aSMauro Carvalho Chehab saa7164_i2c_register(&dev->i2c_bus[2]); 1352b285192aSMauro Carvalho Chehab saa7164_gpio_setup(dev); 1353b285192aSMauro Carvalho Chehab saa7164_card_setup(dev); 1354b285192aSMauro Carvalho Chehab 1355b285192aSMauro Carvalho Chehab /* Parse the dynamic device configuration, find various 1356b285192aSMauro Carvalho Chehab * media endpoints (MPEG, WMV, PS, TS) and cache their 1357b285192aSMauro Carvalho Chehab * configuration details into the driver, so we can 1358b285192aSMauro Carvalho Chehab * reference them later during simething_register() func, 1359b285192aSMauro Carvalho Chehab * interrupt handlers, deferred work handlers etc. 1360b285192aSMauro Carvalho Chehab */ 1361b285192aSMauro Carvalho Chehab saa7164_api_enum_subdevs(dev); 1362b285192aSMauro Carvalho Chehab 1363b285192aSMauro Carvalho Chehab /* Begin to create the video sub-systems and register funcs */ 1364b285192aSMauro Carvalho Chehab if (saa7164_boards[dev->board].porta == SAA7164_MPEG_DVB) { 1365b285192aSMauro Carvalho Chehab if (saa7164_dvb_register(&dev->ports[SAA7164_PORT_TS1]) < 0) { 136624f711c1SMauro Carvalho Chehab printk(KERN_ERR "%s() Failed to register dvb adapters on porta\n", 1367b285192aSMauro Carvalho Chehab __func__); 1368b285192aSMauro Carvalho Chehab } 1369b285192aSMauro Carvalho Chehab } 1370b285192aSMauro Carvalho Chehab 1371b285192aSMauro Carvalho Chehab if (saa7164_boards[dev->board].portb == SAA7164_MPEG_DVB) { 1372b285192aSMauro Carvalho Chehab if (saa7164_dvb_register(&dev->ports[SAA7164_PORT_TS2]) < 0) { 137324f711c1SMauro Carvalho Chehab printk(KERN_ERR"%s() Failed to register dvb adapters on portb\n", 1374b285192aSMauro Carvalho Chehab __func__); 1375b285192aSMauro Carvalho Chehab } 1376b285192aSMauro Carvalho Chehab } 1377b285192aSMauro Carvalho Chehab 1378b285192aSMauro Carvalho Chehab if (saa7164_boards[dev->board].portc == SAA7164_MPEG_ENCODER) { 1379b285192aSMauro Carvalho Chehab if (saa7164_encoder_register(&dev->ports[SAA7164_PORT_ENC1]) < 0) { 138024f711c1SMauro Carvalho Chehab printk(KERN_ERR"%s() Failed to register mpeg encoder\n", 138124f711c1SMauro Carvalho Chehab __func__); 1382b285192aSMauro Carvalho Chehab } 1383b285192aSMauro Carvalho Chehab } 1384b285192aSMauro Carvalho Chehab 1385b285192aSMauro Carvalho Chehab if (saa7164_boards[dev->board].portd == SAA7164_MPEG_ENCODER) { 1386b285192aSMauro Carvalho Chehab if (saa7164_encoder_register(&dev->ports[SAA7164_PORT_ENC2]) < 0) { 138724f711c1SMauro Carvalho Chehab printk(KERN_ERR"%s() Failed to register mpeg encoder\n", 138824f711c1SMauro Carvalho Chehab __func__); 1389b285192aSMauro Carvalho Chehab } 1390b285192aSMauro Carvalho Chehab } 1391b285192aSMauro Carvalho Chehab 1392b285192aSMauro Carvalho Chehab if (saa7164_boards[dev->board].porte == SAA7164_MPEG_VBI) { 1393b285192aSMauro Carvalho Chehab if (saa7164_vbi_register(&dev->ports[SAA7164_PORT_VBI1]) < 0) { 139424f711c1SMauro Carvalho Chehab printk(KERN_ERR"%s() Failed to register vbi device\n", 139524f711c1SMauro Carvalho Chehab __func__); 1396b285192aSMauro Carvalho Chehab } 1397b285192aSMauro Carvalho Chehab } 1398b285192aSMauro Carvalho Chehab 1399b285192aSMauro Carvalho Chehab if (saa7164_boards[dev->board].portf == SAA7164_MPEG_VBI) { 1400b285192aSMauro Carvalho Chehab if (saa7164_vbi_register(&dev->ports[SAA7164_PORT_VBI2]) < 0) { 140124f711c1SMauro Carvalho Chehab printk(KERN_ERR"%s() Failed to register vbi device\n", 140224f711c1SMauro Carvalho Chehab __func__); 1403b285192aSMauro Carvalho Chehab } 1404b285192aSMauro Carvalho Chehab } 1405b285192aSMauro Carvalho Chehab saa7164_api_set_debug(dev, fw_debug); 1406b285192aSMauro Carvalho Chehab 1407b285192aSMauro Carvalho Chehab if (fw_debug) { 1408b285192aSMauro Carvalho Chehab dev->kthread = kthread_run(saa7164_thread_function, dev, 1409b285192aSMauro Carvalho Chehab "saa7164 debug"); 141089f4d45bSWei Yongjun if (IS_ERR(dev->kthread)) { 141189f4d45bSWei Yongjun dev->kthread = NULL; 141224f711c1SMauro Carvalho Chehab printk(KERN_ERR "%s() Failed to create debug kernel thread\n", 141324f711c1SMauro Carvalho Chehab __func__); 1414b285192aSMauro Carvalho Chehab } 141589f4d45bSWei Yongjun } 1416b285192aSMauro Carvalho Chehab 1417b285192aSMauro Carvalho Chehab } /* != BOARD_UNKNOWN */ 1418b285192aSMauro Carvalho Chehab else 141924f711c1SMauro Carvalho Chehab printk(KERN_ERR "%s() Unsupported board detected, registering without firmware\n", 142024f711c1SMauro Carvalho Chehab __func__); 1421b285192aSMauro Carvalho Chehab 1422b285192aSMauro Carvalho Chehab dprintk(1, "%s() parameter debug = %d\n", __func__, saa_debug); 1423b285192aSMauro Carvalho Chehab dprintk(1, "%s() parameter waitsecs = %d\n", __func__, waitsecs); 1424b285192aSMauro Carvalho Chehab 1425b285192aSMauro Carvalho Chehab fail_fw: 1426b285192aSMauro Carvalho Chehab return 0; 1427b285192aSMauro Carvalho Chehab 1428b285192aSMauro Carvalho Chehab fail_irq: 1429b285192aSMauro Carvalho Chehab saa7164_dev_unregister(dev); 1430b285192aSMauro Carvalho Chehab fail_free: 1431d66de790SHans Verkuil v4l2_device_unregister(&dev->v4l2_dev); 1432b285192aSMauro Carvalho Chehab kfree(dev); 1433b285192aSMauro Carvalho Chehab return err; 1434b285192aSMauro Carvalho Chehab } 1435b285192aSMauro Carvalho Chehab 1436b285192aSMauro Carvalho Chehab static void saa7164_shutdown(struct saa7164_dev *dev) 1437b285192aSMauro Carvalho Chehab { 1438b285192aSMauro Carvalho Chehab dprintk(1, "%s()\n", __func__); 1439b285192aSMauro Carvalho Chehab } 1440b285192aSMauro Carvalho Chehab 14414c62e976SGreg Kroah-Hartman static void saa7164_finidev(struct pci_dev *pci_dev) 1442b285192aSMauro Carvalho Chehab { 1443b285192aSMauro Carvalho Chehab struct saa7164_dev *dev = pci_get_drvdata(pci_dev); 1444b285192aSMauro Carvalho Chehab 1445b285192aSMauro Carvalho Chehab if (dev->board != SAA7164_BOARD_UNKNOWN) { 1446b285192aSMauro Carvalho Chehab if (fw_debug && dev->kthread) { 1447b285192aSMauro Carvalho Chehab kthread_stop(dev->kthread); 1448b285192aSMauro Carvalho Chehab dev->kthread = NULL; 1449b285192aSMauro Carvalho Chehab } 1450b285192aSMauro Carvalho Chehab if (dev->firmwareloaded) 1451b285192aSMauro Carvalho Chehab saa7164_api_set_debug(dev, 0x00); 1452b285192aSMauro Carvalho Chehab } 1453b285192aSMauro Carvalho Chehab 1454b285192aSMauro Carvalho Chehab saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1], 1455b285192aSMauro Carvalho Chehab &dev->ports[SAA7164_PORT_ENC1].irq_interval); 1456b285192aSMauro Carvalho Chehab saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1], 1457b285192aSMauro Carvalho Chehab &dev->ports[SAA7164_PORT_ENC1].svc_interval); 1458b285192aSMauro Carvalho Chehab saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1], 1459b285192aSMauro Carvalho Chehab &dev->ports[SAA7164_PORT_ENC1].irq_svc_interval); 1460b285192aSMauro Carvalho Chehab saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1], 1461b285192aSMauro Carvalho Chehab &dev->ports[SAA7164_PORT_ENC1].read_interval); 1462b285192aSMauro Carvalho Chehab saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1], 1463b285192aSMauro Carvalho Chehab &dev->ports[SAA7164_PORT_ENC1].poll_interval); 1464b285192aSMauro Carvalho Chehab saa7164_histogram_print(&dev->ports[SAA7164_PORT_VBI1], 1465b285192aSMauro Carvalho Chehab &dev->ports[SAA7164_PORT_VBI1].read_interval); 1466b285192aSMauro Carvalho Chehab saa7164_histogram_print(&dev->ports[SAA7164_PORT_VBI2], 1467b285192aSMauro Carvalho Chehab &dev->ports[SAA7164_PORT_VBI2].poll_interval); 1468b285192aSMauro Carvalho Chehab 1469b285192aSMauro Carvalho Chehab saa7164_shutdown(dev); 1470b285192aSMauro Carvalho Chehab 1471b285192aSMauro Carvalho Chehab if (saa7164_boards[dev->board].porta == SAA7164_MPEG_DVB) 1472b285192aSMauro Carvalho Chehab saa7164_dvb_unregister(&dev->ports[SAA7164_PORT_TS1]); 1473b285192aSMauro Carvalho Chehab 1474b285192aSMauro Carvalho Chehab if (saa7164_boards[dev->board].portb == SAA7164_MPEG_DVB) 1475b285192aSMauro Carvalho Chehab saa7164_dvb_unregister(&dev->ports[SAA7164_PORT_TS2]); 1476b285192aSMauro Carvalho Chehab 1477b285192aSMauro Carvalho Chehab if (saa7164_boards[dev->board].portc == SAA7164_MPEG_ENCODER) 1478b285192aSMauro Carvalho Chehab saa7164_encoder_unregister(&dev->ports[SAA7164_PORT_ENC1]); 1479b285192aSMauro Carvalho Chehab 1480b285192aSMauro Carvalho Chehab if (saa7164_boards[dev->board].portd == SAA7164_MPEG_ENCODER) 1481b285192aSMauro Carvalho Chehab saa7164_encoder_unregister(&dev->ports[SAA7164_PORT_ENC2]); 1482b285192aSMauro Carvalho Chehab 1483b285192aSMauro Carvalho Chehab if (saa7164_boards[dev->board].porte == SAA7164_MPEG_VBI) 1484b285192aSMauro Carvalho Chehab saa7164_vbi_unregister(&dev->ports[SAA7164_PORT_VBI1]); 1485b285192aSMauro Carvalho Chehab 1486b285192aSMauro Carvalho Chehab if (saa7164_boards[dev->board].portf == SAA7164_MPEG_VBI) 1487b285192aSMauro Carvalho Chehab saa7164_vbi_unregister(&dev->ports[SAA7164_PORT_VBI2]); 1488b285192aSMauro Carvalho Chehab 1489b285192aSMauro Carvalho Chehab saa7164_i2c_unregister(&dev->i2c_bus[0]); 1490b285192aSMauro Carvalho Chehab saa7164_i2c_unregister(&dev->i2c_bus[1]); 1491b285192aSMauro Carvalho Chehab saa7164_i2c_unregister(&dev->i2c_bus[2]); 1492b285192aSMauro Carvalho Chehab 1493b285192aSMauro Carvalho Chehab /* unregister stuff */ 1494b285192aSMauro Carvalho Chehab free_irq(pci_dev->irq, dev); 1495b285192aSMauro Carvalho Chehab 149677978089SBrendan McGrath if (dev->msi) { 149777978089SBrendan McGrath pci_disable_msi(pci_dev); 149877978089SBrendan McGrath dev->msi = false; 149977978089SBrendan McGrath } 150077978089SBrendan McGrath 15013f845f3cSOlli Salonen pci_disable_device(pci_dev); 15023f845f3cSOlli Salonen 1503b285192aSMauro Carvalho Chehab mutex_lock(&devlist); 1504b285192aSMauro Carvalho Chehab list_del(&dev->devlist); 1505b285192aSMauro Carvalho Chehab mutex_unlock(&devlist); 1506b285192aSMauro Carvalho Chehab 1507b285192aSMauro Carvalho Chehab saa7164_dev_unregister(dev); 1508d66de790SHans Verkuil v4l2_device_unregister(&dev->v4l2_dev); 1509b285192aSMauro Carvalho Chehab kfree(dev); 1510b285192aSMauro Carvalho Chehab } 1511b285192aSMauro Carvalho Chehab 151252b025b1SArvind Yadav static const struct pci_device_id saa7164_pci_tbl[] = { 1513b285192aSMauro Carvalho Chehab { 1514b285192aSMauro Carvalho Chehab /* SAA7164 */ 1515b285192aSMauro Carvalho Chehab .vendor = 0x1131, 1516b285192aSMauro Carvalho Chehab .device = 0x7164, 1517b285192aSMauro Carvalho Chehab .subvendor = PCI_ANY_ID, 1518b285192aSMauro Carvalho Chehab .subdevice = PCI_ANY_ID, 1519b285192aSMauro Carvalho Chehab }, { 1520b285192aSMauro Carvalho Chehab /* --- end of list --- */ 1521b285192aSMauro Carvalho Chehab } 1522b285192aSMauro Carvalho Chehab }; 1523b285192aSMauro Carvalho Chehab MODULE_DEVICE_TABLE(pci, saa7164_pci_tbl); 1524b285192aSMauro Carvalho Chehab 1525b285192aSMauro Carvalho Chehab static struct pci_driver saa7164_pci_driver = { 1526b285192aSMauro Carvalho Chehab .name = "saa7164", 1527b285192aSMauro Carvalho Chehab .id_table = saa7164_pci_tbl, 1528b285192aSMauro Carvalho Chehab .probe = saa7164_initdev, 15294c62e976SGreg Kroah-Hartman .remove = saa7164_finidev, 1530b285192aSMauro Carvalho Chehab }; 1531b285192aSMauro Carvalho Chehab 1532b285192aSMauro Carvalho Chehab static int __init saa7164_init(void) 1533b285192aSMauro Carvalho Chehab { 153450710eeeSKefeng Wang int ret = pci_register_driver(&saa7164_pci_driver); 1535b285192aSMauro Carvalho Chehab 153650710eeeSKefeng Wang if (ret) 153750710eeeSKefeng Wang return ret; 153850710eeeSKefeng Wang 1539ae5f9737SSean Young saa7164_debugfs_create(); 154050710eeeSKefeng Wang 154150710eeeSKefeng Wang pr_info("saa7164 driver loaded\n"); 154250710eeeSKefeng Wang 154350710eeeSKefeng Wang return 0; 1544b285192aSMauro Carvalho Chehab } 1545b285192aSMauro Carvalho Chehab 1546b285192aSMauro Carvalho Chehab static void __exit saa7164_fini(void) 1547b285192aSMauro Carvalho Chehab { 1548ae5f9737SSean Young saa7164_debugfs_remove(); 1549b285192aSMauro Carvalho Chehab pci_unregister_driver(&saa7164_pci_driver); 1550b285192aSMauro Carvalho Chehab } 1551b285192aSMauro Carvalho Chehab 1552b285192aSMauro Carvalho Chehab module_init(saa7164_init); 1553b285192aSMauro Carvalho Chehab module_exit(saa7164_fini); 1554